[deliverable/linux.git] / drivers / media / video / cx18 / cx18-av-firmware.c

/*
 *  cx18 ADEC firmware functions
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version 2
 *  of the License, or (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 *  02110-1301, USA.
 */

#include "cx18-driver.h"
#include <linux/firmware.h>

#define CX18_AUDIO_ENABLE 0xc72014
#define FWFILE "v4l-cx23418-dig.fw"

int cx18_av_loadfw(struct cx18 *cx)
{
	const struct firmware *fw = NULL;
	u32 size;
	u32 v;
	const u8 *ptr;
	int i;
	int retries1 = 0;

	if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) {
		CX18_ERR("unable to open firmware %s\n", FWFILE);
		return -EINVAL;
	}

	/* The firmware load often has byte errors, so allow for several
	   retries, both at byte level and at the firmware load level. */
	while (retries1 < 5) {
		cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000);
		cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6);

		/* Reset the Mako core (Register is undocumented.) */
		cx18_av_write4(cx, 0x8100, 0x00010000);

		/* Put the 8051 in reset and enable firmware upload */
		cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000);

		ptr = fw->data;
		size = fw->size;

		for (i = 0; i < size; i++) {
			u32 dl_control = 0x0F000000 | i | ((u32)ptr[i] << 16);
			u32 value = 0;
			int retries2;

			for (retries2 = 0; retries2 < 5; retries2++) {
				cx18_av_write4(cx, CXADEC_DL_CTL, dl_control);
				udelay(10);
				value = cx18_av_read4(cx, CXADEC_DL_CTL);
				if (value == dl_control)
					break;
				/* Check if we can correct the byte by changing
				   the address.  We can only write the lower
				   address byte of the address. */
				if ((value & 0x3F00) != (dl_control & 0x3F00)) {
					retries2 = 5;
					break;
				}
			}
			if (retries2 >= 5)
				break;
		}
		if (i == size)
			break;
		retries1++;
	}
	if (retries1 >= 5) {
		CX18_ERR("unable to load firmware %s\n", FWFILE);
		release_firmware(fw);
		return -EIO;
	}

	cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 | fw->size);

	/* Output to the 416 */
	cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);

	/* Audio input control 1 set to Sony mode */
	/* Audio output input 2 is 0 for slave operation input */
	/* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
	/* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
	   after WS transition for first bit of audio word. */
	cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0);

	/* Audio output control 1 is set to Sony mode */
	/* Audio output control 2 is set to 1 for master mode */
	/* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
	/* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
	   after WS transition for first bit of audio word. */
	/* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
	   are generated) */
	cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0);

	/* set alt I2s master clock to /16 and enable alt divider i2s
	   passthrough */
	cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687);

	cx18_av_write4(cx, CXADEC_STD_DET_CTL, 0x000000F6);
	/* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */

	/* Set bit 0 in register 0x9CC to signify that this is MiniMe. */
	/* Register 0x09CC is defined by the Merlin firmware, and doesn't
	   have a name in the spec. */
	cx18_av_write4(cx, 0x09CC, 1);

	v = read_reg(CX18_AUDIO_ENABLE);
	/* If bit 11 is 1 */
	if (v & 0x800)
		write_reg(v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); /* Clear bit 10 */

	/* Enable WW auto audio standard detection */
	v = cx18_av_read4(cx, CXADEC_STD_DET_CTL);
	v |= 0xFF;   /* Auto by default */
	v |= 0x400;  /* Stereo by default */
	v |= 0x14000000;
	cx18_av_write4(cx, CXADEC_STD_DET_CTL, v);

	release_firmware(fw);

	CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size);
	return 0;
}
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 ADEC firmware functions
	3	*
	4	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version 2
	9	* of the License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
	19	* 02110-1301, USA.
	20	*/
	21
	22	#include "cx18-driver.h"
	23	#include <linux/firmware.h>
	24
81cb727d	25	#define CX18_AUDIO_ENABLE 0xc72014
1c1e45d1 HV	26	#define FWFILE "v4l-cx23418-dig.fw"
	27
	28	int cx18_av_loadfw(struct cx18 *cx)
	29	{
	30	const struct firmware *fw = NULL;
	31	u32 size;
	32	u32 v;
9b8a3e4c	33	const u8 *ptr;
1c1e45d1	34	int i;
c6eb8eaf	35	int retries1 = 0;
1c1e45d1 HV	36
	37	if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) {
	38	CX18_ERR("unable to open firmware %s\n", FWFILE);
	39	return -EINVAL;
	40	}
	41
f313da11 HV	42	/* The firmware load often has byte errors, so allow for several
f313da11 HV	43	retries, both at byte level and at the firmware load level. */
c6eb8eaf	44	while (retries1 < 5) {
f313da11 HV	45	cx18_av_write4(cx, CXADEC_CHIP_CTRL, 0x00010000);
f313da11 HV	46	cx18_av_write(cx, CXADEC_STD_DET_CTL, 0xf6);
1c1e45d1	47
f313da11 HV	48	/* Reset the Mako core (Register is undocumented.) */
f313da11 HV	49	cx18_av_write4(cx, 0x8100, 0x00010000);
1c1e45d1	50
f313da11 HV	51	/* Put the 8051 in reset and enable firmware upload */
f313da11 HV	52	cx18_av_write4(cx, CXADEC_DL_CTL, 0x0F000000);
1c1e45d1	53
f313da11 HV	54	ptr = fw->data;
f313da11 HV	55	size = fw->size;
1c1e45d1	56
f313da11 HV	57	for (i = 0; i < size; i++) {
	58	u32 dl_control = 0x0F000000 \| i \| ((u32)ptr[i] << 16);
	59	u32 value = 0;
c6eb8eaf	60	int retries2;
1c1e45d1	61
c6eb8eaf	62	for (retries2 = 0; retries2 < 5; retries2++) {
f313da11 HV	63	cx18_av_write4(cx, CXADEC_DL_CTL, dl_control);
	64	udelay(10);
	65	value = cx18_av_read4(cx, CXADEC_DL_CTL);
	66	if (value == dl_control)
	67	break;
	68	/* Check if we can correct the byte by changing
	69	the address. We can only write the lower
	70	address byte of the address. */
	71	if ((value & 0x3F00) != (dl_control & 0x3F00)) {
c6eb8eaf	72	retries2 = 5;
f313da11 HV	73	break;
	74	}
	75	}
c6eb8eaf	76	if (retries2 >= 5)
1c1e45d1 HV	77	break;
1c1e45d1 HV	78	}
f313da11 HV	79	if (i == size)
f313da11 HV	80	break;
c6eb8eaf	81	retries1++;
f313da11	82	}
c6eb8eaf	83	if (retries1 >= 5) {
f313da11 HV	84	CX18_ERR("unable to load firmware %s\n", FWFILE);
	85	release_firmware(fw);
	86	return -EIO;
1c1e45d1 HV	87	}
	88
	89	cx18_av_write4(cx, CXADEC_DL_CTL, 0x13000000 \| fw->size);
	90
	91	/* Output to the 416 */
	92	cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);
	93
	94	/* Audio input control 1 set to Sony mode */
	95	/* Audio output input 2 is 0 for slave operation input */
	96	/* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
	97	/* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
	98	after WS transition for first bit of audio word. */
	99	cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0);
	100
	101	/* Audio output control 1 is set to Sony mode */
	102	/* Audio output control 2 is set to 1 for master mode */
	103	/* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
	104	/* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
	105	after WS transition for first bit of audio word. */
	106	/* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
	107	are generated) */
	108	cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0);
	109
	110	/* set alt I2s master clock to /16 and enable alt divider i2s
	111	passthrough */
	112	cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687);
	113
	114	cx18_av_write4(cx, CXADEC_STD_DET_CTL, 0x000000F6);
	115	/* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */
	116
	117	/* Set bit 0 in register 0x9CC to signify that this is MiniMe. */
	118	/* Register 0x09CC is defined by the Merlin firmware, and doesn't
	119	have a name in the spec. */
	120	cx18_av_write4(cx, 0x09CC, 1);
	121
1c1e45d1 HV	122	v = read_reg(CX18_AUDIO_ENABLE);
	123	/* If bit 11 is 1 */
	124	if (v & 0x800)
	125	write_reg(v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); /* Clear bit 10 */
	126
	127	/* Enable WW auto audio standard detection */
	128	v = cx18_av_read4(cx, CXADEC_STD_DET_CTL);
	129	v \|= 0xFF; /* Auto by default */
	130	v \|= 0x400; /* Stereo by default */
	131	v \|= 0x14000000;
	132	cx18_av_write4(cx, CXADEC_STD_DET_CTL, v);
	133
	134	release_firmware(fw);
	135
	136	CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size);
	137	return 0;
	138	}