V4L/DVB (11619): cx18: Simplify the work handler for outgoing mailbox commands
[deliverable/linux.git] / drivers / media / video / cx18 / cx18-driver.h
CommitLineData
1c1e45d1
HV
1/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8 7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
1c1e45d1
HV
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#ifndef CX18_DRIVER_H
26#define CX18_DRIVER_H
27
28#include <linux/version.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/fs.h>
35#include <linux/pci.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/i2c.h>
39#include <linux/i2c-algo-bit.h>
40#include <linux/list.h>
41#include <linux/unistd.h>
1c1e45d1
HV
42#include <linux/pagemap.h>
43#include <linux/workqueue.h>
44#include <linux/mutex.h>
1a651a00 45#include <asm/byteorder.h>
1c1e45d1
HV
46
47#include <linux/dvb/video.h>
48#include <linux/dvb/audio.h>
49#include <media/v4l2-common.h>
35ea11ff 50#include <media/v4l2-ioctl.h>
888cdb07 51#include <media/v4l2-device.h>
1c1e45d1
HV
52#include <media/tuner.h>
53#include "cx18-mailbox.h"
54#include "cx18-av-core.h"
55#include "cx23418.h"
56
57/* DVB */
58#include "demux.h"
59#include "dmxdev.h"
60#include "dvb_demux.h"
61#include "dvb_frontend.h"
62#include "dvb_net.h"
63#include "dvbdev.h"
64
65#ifndef CONFIG_PCI
66# error "This driver requires kernel PCI support."
67#endif
68
69#define CX18_MEM_OFFSET 0x00000000
70#define CX18_MEM_SIZE 0x04000000
71#define CX18_REG_OFFSET 0x02000000
72
73/* Maximum cx18 driver instances. */
74#define CX18_MAX_CARDS 32
75
76/* Supported cards */
77#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
78#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
79#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
80#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
03c28085 81#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
9eee4fb6 82#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
6ce9ee53 83#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100/DVR3100 H */
9eee4fb6 84#define CX18_CARD_LAST 6
1c1e45d1
HV
85
86#define CX18_ENC_STREAM_TYPE_MPG 0
87#define CX18_ENC_STREAM_TYPE_TS 1
88#define CX18_ENC_STREAM_TYPE_YUV 2
89#define CX18_ENC_STREAM_TYPE_VBI 3
90#define CX18_ENC_STREAM_TYPE_PCM 4
91#define CX18_ENC_STREAM_TYPE_IDX 5
92#define CX18_ENC_STREAM_TYPE_RAD 6
93#define CX18_MAX_STREAMS 7
94
95/* system vendor and device IDs */
96#define PCI_VENDOR_ID_CX 0x14f1
97#define PCI_DEVICE_ID_CX23418 0x5b7a
98
99/* subsystem vendor ID */
100#define CX18_PCI_ID_HAUPPAUGE 0x0070
101#define CX18_PCI_ID_COMPRO 0x185b
102#define CX18_PCI_ID_YUAN 0x12ab
03c28085 103#define CX18_PCI_ID_CONEXANT 0x14f1
9eee4fb6
AW
104#define CX18_PCI_ID_TOSHIBA 0x1179
105#define CX18_PCI_ID_LEADTEK 0x107D
1c1e45d1
HV
106
107/* ======================================================================== */
108/* ========================== START USER SETTABLE DMA VARIABLES =========== */
109/* ======================================================================== */
110
111/* DMA Buffers, Default size in MB allocated */
112#define CX18_DEFAULT_ENC_TS_BUFFERS 1
113#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
114#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
115#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
116#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
117#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
118
6ecd86dc 119/* Maximum firmware DMA buffers per stream */
0ef02892 120#define CX18_MAX_FW_MDLS_PER_STREAM 63
6ecd86dc
AW
121
122/* DMA buffer, default size in kB allocated */
123#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
124#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
125#define CX18_DEFAULT_ENC_IDX_BUFSIZE 32
126#define CX18_DEFAULT_ENC_YUV_BUFSIZE 128
127/* Default VBI bufsize based on standards supported by card tuner for now */
128#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
129
1c1e45d1
HV
130/* i2c stuff */
131#define I2C_CLIENTS_MAX 16
132
133/* debugging */
134
135/* Flag to turn on high volume debugging */
136#define CX18_DBGFLG_WARN (1 << 0)
137#define CX18_DBGFLG_INFO (1 << 1)
138#define CX18_DBGFLG_API (1 << 2)
139#define CX18_DBGFLG_DMA (1 << 3)
140#define CX18_DBGFLG_IOCTL (1 << 4)
141#define CX18_DBGFLG_FILE (1 << 5)
142#define CX18_DBGFLG_I2C (1 << 6)
143#define CX18_DBGFLG_IRQ (1 << 7)
144/* Flag to turn on high volume debugging */
145#define CX18_DBGFLG_HIGHVOL (1 << 8)
146
5811cf99 147/* NOTE: extra space before comma in 'fmt , ## args' is required for
1c1e45d1
HV
148 gcc-2.95, otherwise it won't compile. */
149#define CX18_DEBUG(x, type, fmt, args...) \
150 do { \
151 if ((x) & cx18_debug) \
5811cf99 152 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV
153 } while (0)
154#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
155#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
156#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
157#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
158#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
159#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
160#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
161#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
162
163#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
164 do { \
165 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
5811cf99 166 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV
167 } while (0)
168#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
169#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
170#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
171#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
172#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
173#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
174#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
175#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
176
177/* Standard kernel messages */
5811cf99
AW
178#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
179#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
180#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
1c1e45d1 181
6246d4e1
AW
182/* Messages for internal subdevs to use */
183#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
184 do { \
185 if ((x) & cx18_debug) \
186 v4l2_info(dev, " " type ": " fmt , ## args); \
187 } while (0)
188#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
189 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
190#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
191 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
192#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
193 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
194#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
195 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
196#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
197 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
198#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
199 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
200#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
201 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
202#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
203 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
204
205#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
206 do { \
207 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
208 v4l2_info(dev, " " type ": " fmt , ## args); \
209 } while (0)
210#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
211 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
212#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
213 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
214#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
215 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
216#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
217 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
218#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
219 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
220#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
221 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
222#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
223 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
224#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
225 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
226
227#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
228#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
229#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
230
1c1e45d1
HV
231/* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
232#define MPEG_FRAME_TYPE_IFRAME 1
233#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
234#define MPEG_FRAME_TYPE_ALL 7
235
236#define CX18_MAX_PGM_INDEX (400)
237
238extern int cx18_debug;
239
240
241struct cx18_options {
242 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
243 int cardtype; /* force card type on load */
244 int tuner; /* set tuner on load */
245 int radio; /* enable/disable radio */
246};
247
248/* per-buffer bit flags */
249#define CX18_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
250
251/* per-stream, s_flags */
252#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
253#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
254#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
255#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
256#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
87116159 257#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
1c1e45d1
HV
258
259/* per-cx18, i_flags */
1d6782bd
AW
260#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
261#define CX18_F_I_EOS 4 /* End of encoder stream */
262#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
263#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
1d6782bd
AW
264#define CX18_F_I_INITED 21 /* set after first open */
265#define CX18_F_I_FAILED 22 /* set if first open failed */
1c1e45d1
HV
266
267/* These are the VBI types as they appear in the embedded VBI private packets. */
268#define CX18_SLICED_TYPE_TELETEXT_B (1)
269#define CX18_SLICED_TYPE_CAPTION_525 (4)
270#define CX18_SLICED_TYPE_WSS_625 (5)
271#define CX18_SLICED_TYPE_VPS (7)
272
273struct cx18_buffer {
274 struct list_head list;
275 dma_addr_t dma_handle;
276 u32 id;
277 unsigned long b_flags;
bca11a57 278 unsigned skipped;
1c1e45d1
HV
279 char *buf;
280
281 u32 bytesused;
282 u32 readpos;
283};
284
285struct cx18_queue {
286 struct list_head list;
b04bce47 287 atomic_t buffers;
1c1e45d1 288 u32 bytesused;
40c5520f 289 spinlock_t lock;
1c1e45d1
HV
290};
291
292struct cx18_dvb {
293 struct dmx_frontend hw_frontend;
294 struct dmx_frontend mem_frontend;
295 struct dmxdev dmxdev;
296 struct dvb_adapter dvb_adapter;
297 struct dvb_demux demux;
298 struct dvb_frontend *fe;
299 struct dvb_net dvbnet;
300 int enabled;
301 int feeding;
1c1e45d1 302 struct mutex feedlock;
1c1e45d1
HV
303};
304
305struct cx18; /* forward reference */
306struct cx18_scb; /* forward reference */
307
72a4f808 308
ee2d64f5 309#define CX18_MAX_MDL_ACKS 2
deed75ed 310#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
0ef02892 311/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
ee2d64f5 312
72a4f808
AW
313#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
314#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
315#define CX18_F_EWO_MB_STALE \
316 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
317
deed75ed 318struct cx18_in_work_order {
ee2d64f5
AW
319 struct work_struct work;
320 atomic_t pending;
321 struct cx18 *cx;
72a4f808 322 unsigned long flags;
ee2d64f5
AW
323 int rpu;
324 struct cx18_mailbox mb;
325 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
326 char *str;
327};
328
d3c5e707
AW
329#define CX18_INVALID_TASK_HANDLE 0xffffffff
330
1c1e45d1
HV
331struct cx18_stream {
332 /* These first four fields are always set, even if the stream
333 is not actually created. */
3d05913d 334 struct video_device *video_dev; /* NULL when stream not created */
1c1e45d1
HV
335 struct cx18 *cx; /* for ease of use */
336 const char *name; /* name of the stream */
337 int type; /* stream type */
338 u32 handle; /* task handle */
339 unsigned mdl_offset;
340
341 u32 id;
1c1e45d1
HV
342 unsigned long s_flags; /* status flags, see above */
343 int dma; /* can be PCI_DMA_TODEVICE,
344 PCI_DMA_FROMDEVICE or
345 PCI_DMA_NONE */
1c1e45d1
HV
346 wait_queue_head_t waitq;
347
348 /* Buffer Stats */
349 u32 buffers;
350 u32 buf_size;
1c1e45d1
HV
351
352 /* Buffer Queues */
353 struct cx18_queue q_free; /* free buffers */
66c2a6b0
AW
354 struct cx18_queue q_busy; /* busy buffers - in use by firmware */
355 struct cx18_queue q_full; /* full buffers - data for user apps */
1c1e45d1 356
21a278b8
AW
357 struct work_struct out_work_order;
358
1c1e45d1
HV
359 /* DVB / Digital Transport */
360 struct cx18_dvb dvb;
361};
362
363struct cx18_open_id {
364 u32 open_id;
365 int type;
366 enum v4l2_priority prio;
367 struct cx18 *cx;
368};
369
370/* forward declaration of struct defined in cx18-cards.h */
371struct cx18_card;
372
302df970
AW
373/*
374 * A note about "sliced" VBI data as implemented in this driver:
375 *
376 * Currently we collect the sliced VBI in the form of Ancillary Data
377 * packets, inserted by the AV core decoder/digitizer/slicer in the
378 * horizontal blanking region of the VBI lines, in "raw" mode as far as
379 * the Encoder is concerned. We don't ever tell the Encoder itself
380 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
381 *
382 * We then process the ancillary data ourselves to send the sliced data
383 * to the user application directly or build up MPEG-2 private stream 1
384 * packets to splice into (only!) MPEG-2 PS streams for the user app.
385 *
386 * (That's how ivtv essentially does it.)
387 *
388 * The Encoder should be able to extract certain sliced VBI data for
389 * us and provide it in a separate stream or splice it into any type of
390 * MPEG PS or TS stream, but this isn't implemented yet.
391 */
392
393/*
394 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
395 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
396 * It depends on the pixel clock and the horiz rate:
397 *
398 * (1/Fh)*(2*Fp) = Samples/line
399 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
400 *
401 * Sliced VBI data is sent as ancillary data during horizontal blanking
402 * Raw VBI is sent as active video samples during vertcal blanking
403 *
404 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
405 * length of 720 pixels @ 4:2:2 sampling. Thus...
406 *
407 * For systems that use a 15.734 kHz horizontal rate, such as
408 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
409 *
410 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
411 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
412 *
413 * For systems that use a 15.625 kHz horizontal rate, such as
414 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
415 *
416 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
417 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
418 */
419static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
420static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
421static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
1c1e45d1
HV
422
423#define CX18_VBI_FRAMES 32
424
1c1e45d1 425struct vbi_info {
302df970 426 /* Current state of v4l2 VBI settings for this device */
1c1e45d1 427 struct v4l2_format in;
302df970
AW
428 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
429 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
430 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
1c1e45d1 431
302df970 432 u32 frame; /* Count of VBI buffers/frames received from Encoder */
1c1e45d1 433
302df970
AW
434 /*
435 * Vars for creation and insertion of MPEG Private Stream 1 packets
436 * of sliced VBI data into an MPEG PS
437 */
1c1e45d1 438
302df970
AW
439 /* Boolean: create and insert Private Stream 1 packets into the PS */
440 int insert_mpeg;
441
442 /*
443 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
444 * Used in cx18-vbi.c only for collecting sliced data, and as a source
445 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
446 * We don't need to save state here, but the array may have been a bit
447 * too big (2304 bytes) to alloc from the stack.
448 */
449 struct v4l2_sliced_vbi_data sliced_data[36];
1c1e45d1 450
302df970
AW
451 /*
452 * A ring buffer of driver-generated MPEG-2 PS
453 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
454 * into the MPEG PS stream.
455 *
456 * In each sliced_mpeg_data[] buffer is:
457 * 16 byte MPEG-2 PS Program Pack Header
458 * 16 byte MPEG-2 Private Stream 1 PES Header
459 * 4 byte magic number: "itv0" or "ITV0"
460 * 4 byte first field line mask, if "itv0"
461 * 4 byte second field line mask, if "itv0"
462 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
463 *
464 * Each line in the payload is
465 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
466 * 42 bytes of line data
467 *
468 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
469 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
470 * accept for VBI data. So, including the headers, it's a maximum 1584
471 * bytes total.
472 */
473#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
474 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
475#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
1c1e45d1
HV
476 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
477 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
302df970
AW
478
479 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
1c1e45d1
HV
480 u32 inserted_frame;
481
302df970
AW
482 /*
483 * A dummy driver stream transfer buffer with a copy of the next
484 * sliced_mpeg_data[] buffer for output to userland apps.
485 * Only used in cx18-fileops.c, but its state needs to persist at times.
486 */
487 struct cx18_buffer sliced_mpeg_buf;
1c1e45d1
HV
488};
489
490/* Per cx23418, per I2C bus private algo callback data */
491struct cx18_i2c_algo_callback_data {
492 struct cx18 *cx;
493 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
494};
495
f7823f8f 496#define CX18_MAX_MMIO_WR_RETRIES 10
330c6ec8 497
1c1e45d1
HV
498/* Struct to hold info about cx18 cards */
499struct cx18 {
5811cf99 500 int instance;
3d05913d 501 struct pci_dev *pci_dev;
888cdb07 502 struct v4l2_device v4l2_dev;
ff2a2001 503 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
eefe1010 504 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
888cdb07 505
1c1e45d1
HV
506 const struct cx18_card *card; /* card information */
507 const char *card_name; /* full name of the card */
508 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
509 u8 is_50hz;
510 u8 is_60hz;
1c1e45d1
HV
511 u8 nof_inputs; /* number of video inputs */
512 u8 nof_audio_inputs; /* number of audio inputs */
513 u16 buffer_id; /* buffer ID counter */
514 u32 v4l2_cap; /* V4L2 capabilities of card */
515 u32 hw_flags; /* Hardware description of the board */
516 unsigned mdl_offset;
72c2d6d3
AW
517 struct cx18_scb __iomem *scb; /* pointer to SCB */
518 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
519 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
520
1c1e45d1
HV
521 struct cx18_av_state av_state;
522
523 /* codec settings */
524 struct cx2341x_mpeg_params params;
525 u32 filter_mode;
526 u32 temporal_strength;
527 u32 spatial_strength;
528
529 /* dualwatch */
530 unsigned long dualwatch_jiffies;
0d82fe80 531 u32 dualwatch_stereo_mode;
1c1e45d1 532
1c1e45d1
HV
533 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
534 struct cx18_options options; /* User options */
6ecd86dc 535 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
1c1e45d1
HV
536 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
537 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
538 unsigned long i_flags; /* global cx18 flags */
31554ae5
HV
539 atomic_t ana_capturing; /* count number of active analog capture streams */
540 atomic_t tot_capturing; /* total count number of active capture streams */
1c1e45d1
HV
541 int search_pack_header;
542
1c1e45d1
HV
543 int open_id; /* incremented each time an open occurs, used as
544 unique ID. Starts at 1, so 0 can be used as
545 uninitialized value in the stream->id. */
546
547 u32 base_addr;
548 struct v4l2_prio_state prio;
549
550 u8 card_rev;
551 void __iomem *enc_mem, *reg_mem;
552
553 struct vbi_info vbi;
554
555 u32 pgm_info_offset;
556 u32 pgm_info_num;
557 u32 pgm_info_write_idx;
558 u32 pgm_info_read_idx;
559 struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
560
561 u64 mpg_data_received;
562 u64 vbi_data_inserted;
563
564 wait_queue_head_t mb_apu_waitq;
565 wait_queue_head_t mb_cpu_waitq;
1c1e45d1
HV
566 wait_queue_head_t cap_w;
567 /* when the current DMA is finished this queue is woken up */
568 wait_queue_head_t dma_waitq;
569
d6c7e5f8
AW
570 u32 sw1_irq_mask;
571 u32 sw2_irq_mask;
572 u32 hw2_irq_mask;
573
deed75ed
AW
574 struct workqueue_struct *in_work_queue;
575 char in_workq_name[11]; /* "cx18-NN-in" */
576 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
ee2d64f5 577 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
1d6782bd 578
87116159
AW
579 struct workqueue_struct *out_work_queue;
580 char out_workq_name[12]; /* "cx18-NN-out" */
87116159 581
1c1e45d1
HV
582 /* i2c */
583 struct i2c_adapter i2c_adap[2];
584 struct i2c_algo_bit_data i2c_algo[2];
585 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
1c1e45d1 586
ba60bc67
HV
587 /* gpio */
588 u32 gpio_dir;
589 u32 gpio_val;
8abdd00d 590 struct mutex gpio_lock;
eefe1010
AW
591 struct v4l2_subdev sd_gpiomux;
592 struct v4l2_subdev sd_resetctrl;
ba60bc67 593
1c1e45d1
HV
594 /* v4l2 and User settings */
595
596 /* codec settings */
597 u32 audio_input;
598 u32 active_input;
1c1e45d1
HV
599 v4l2_std_id std;
600 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
601};
602
5811cf99
AW
603static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
604{
605 return container_of(v4l2_dev, struct cx18, v4l2_dev);
606}
607
1c1e45d1 608/* Globals */
1c1e45d1 609extern int cx18_first_minor;
1c1e45d1
HV
610
611/*==============Prototypes==================*/
612
613/* Return non-zero if a signal is pending */
614int cx18_msleep_timeout(unsigned int msecs, int intr);
615
1c1e45d1
HV
616/* Read Hauppauge eeprom */
617struct tveeprom; /* forward reference */
618void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
619
620/* First-open initialization: load firmware, etc. */
621int cx18_init_on_first_open(struct cx18 *cx);
622
dd073434
AW
623/* Test if the current VBI mode is raw (1) or sliced (0) */
624static inline int cx18_raw_vbi(const struct cx18 *cx)
625{
626 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
627}
628
ff2a2001
AW
629/* Call the specified callback for all subdevs with a grp_id bit matching the
630 * mask in hw (if 0, then match them all). Ignore any errors. */
631#define cx18_call_hw(cx, hw, o, f, args...) \
632 __v4l2_device_call_subdevs(&(cx)->v4l2_dev, \
633 !(hw) || (sd->grp_id & (hw)), o, f , ##args)
634
635#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
636
637/* Call the specified callback for all subdevs with a grp_id bit matching the
638 * mask in hw (if 0, then match them all). If the callback returns an error
639 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
640#define cx18_call_hw_err(cx, hw, o, f, args...) \
641 __v4l2_device_call_subdevs_until_err( \
642 &(cx)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
643
644#define cx18_call_all_err(cx, o, f, args...) \
645 cx18_call_hw_err(cx, 0, o, f , ##args)
646
1c1e45d1 647#endif /* CX18_DRIVER_H */
This page took 0.193841 seconds and 5 git commands to generate.