V4L/DVB (11561a): move media after i2c
[deliverable/linux.git] / drivers / media / video / cx18 / cx18-i2c.c
CommitLineData
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1/*
2 * cx18 I2C functions
3 *
4 * Derived from ivtv-i2c.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8 7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
b1526421 26#include "cx18-io.h"
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27#include "cx18-cards.h"
28#include "cx18-gpio.h"
50510993 29#include "cx18-i2c.h"
ced07371 30#include "cx18-irq.h"
1c1e45d1 31
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32#define CX18_REG_I2C_1_WR 0xf15000
33#define CX18_REG_I2C_1_RD 0xf15008
34#define CX18_REG_I2C_2_WR 0xf25100
35#define CX18_REG_I2C_2_RD 0xf25108
36
37#define SETSCL_BIT 0x0001
38#define SETSDL_BIT 0x0002
39#define GETSCL_BIT 0x0004
40#define GETSDL_BIT 0x0008
41
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42#define CX18_CS5345_I2C_ADDR 0x4c
43
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44/* This array should match the CX18_HW_ defines */
45static const u8 hw_addrs[] = {
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46 0, /* CX18_HW_TUNER */
47 0, /* CX18_HW_TVEEPROM */
48 CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
49 0, /* CX18_HW_DVB */
50 0, /* CX18_HW_418_AV */
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51 0, /* CX18_HW_GPIO_MUX */
52 0, /* CX18_HW_GPIO_RESET_CTRL */
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53};
54
55/* This array should match the CX18_HW_ defines */
56/* This might well become a card-specific array */
57static const u8 hw_bus[] = {
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58 1, /* CX18_HW_TUNER */
59 0, /* CX18_HW_TVEEPROM */
60 0, /* CX18_HW_CS5345 */
61 0, /* CX18_HW_DVB */
62 0, /* CX18_HW_418_AV */
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63 0, /* CX18_HW_GPIO_MUX */
64 0, /* CX18_HW_GPIO_RESET_CTRL */
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65};
66
67/* This array should match the CX18_HW_ defines */
68static const char * const hw_modules[] = {
69 "tuner", /* CX18_HW_TUNER */
70 NULL, /* CX18_HW_TVEEPROM */
71 "cs5345", /* CX18_HW_CS5345 */
72 NULL, /* CX18_HW_DVB */
73 NULL, /* CX18_HW_418_AV */
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74 NULL, /* CX18_HW_GPIO_MUX */
75 NULL, /* CX18_HW_GPIO_RESET_CTRL */
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76};
77
78/* This array should match the CX18_HW_ defines */
af294867 79static const char * const hw_devicenames[] = {
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80 "tuner",
81 "tveeprom",
82 "cs5345",
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83 "cx23418_DTV",
84 "cx23418_AV",
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85 "gpio_mux",
86 "gpio_reset_ctrl",
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87};
88
89int cx18_i2c_register(struct cx18 *cx, unsigned idx)
90{
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91 struct v4l2_subdev *sd;
92 int bus = hw_bus[idx];
93 struct i2c_adapter *adap = &cx->i2c_adap[bus];
94 const char *mod = hw_modules[idx];
95 const char *type = hw_devicenames[idx];
96 u32 hw = 1 << idx;
97
98 if (idx >= ARRAY_SIZE(hw_addrs))
1c1e45d1 99 return -1;
1c1e45d1 100
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101 if (hw == CX18_HW_TUNER) {
102 /* special tuner group handling */
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103 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
104 adap, mod, type, cx->card_i2c->radio);
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105 if (sd != NULL)
106 sd->grp_id = hw;
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107 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
108 adap, mod, type, cx->card_i2c->demod);
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109 if (sd != NULL)
110 sd->grp_id = hw;
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111 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
112 adap, mod, type, cx->card_i2c->tv);
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113 if (sd != NULL)
114 sd->grp_id = hw;
115 return sd != NULL ? 0 : -1;
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116 }
117
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118 /* Is it not an I2C device or one we do not wish to register? */
119 if (!hw_addrs[idx])
120 return -1;
1c1e45d1 121
ff2a2001 122 /* It's an I2C device other than an analog tuner */
e6574f2f 123 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
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124 if (sd != NULL)
125 sd->grp_id = hw;
126 return sd != NULL ? 0 : -1;
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127}
128
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129/* Find the first member of the subdev group id in hw */
130struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
1c1e45d1 131{
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132 struct v4l2_subdev *result = NULL;
133 struct v4l2_subdev *sd;
1c1e45d1 134
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135 spin_lock(&cx->v4l2_dev.lock);
136 v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
137 if (sd->grp_id == hw) {
138 result = sd;
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139 break;
140 }
141 }
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142 spin_unlock(&cx->v4l2_dev.lock);
143 return result;
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144}
145
146static void cx18_setscl(void *data, int state)
147{
148 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
149 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
150 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421 151 u32 r = cx18_read_reg(cx, addr);
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152
153 if (state)
3f75c616 154 cx18_write_reg(cx, r | SETSCL_BIT, addr);
1c1e45d1 155 else
3f75c616 156 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
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157}
158
159static void cx18_setsda(void *data, int state)
160{
161 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
162 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
163 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421 164 u32 r = cx18_read_reg(cx, addr);
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165
166 if (state)
3f75c616 167 cx18_write_reg(cx, r | SETSDL_BIT, addr);
1c1e45d1 168 else
3f75c616 169 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
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170}
171
172static int cx18_getscl(void *data)
173{
174 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
175 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
176 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
177
b1526421 178 return cx18_read_reg(cx, addr) & GETSCL_BIT;
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179}
180
181static int cx18_getsda(void *data)
182{
183 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
184 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
185 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
186
b1526421 187 return cx18_read_reg(cx, addr) & GETSDL_BIT;
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188}
189
190/* template for i2c-bit-algo */
191static struct i2c_adapter cx18_i2c_adap_template = {
192 .name = "cx18 i2c driver",
193 .id = I2C_HW_B_CX2341X,
194 .algo = NULL, /* set by i2c-algo-bit */
195 .algo_data = NULL, /* filled from template */
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196 .owner = THIS_MODULE,
197};
198
199#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
200#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
201
202static struct i2c_algo_bit_data cx18_i2c_algo_template = {
203 .setsda = cx18_setsda,
204 .setscl = cx18_setscl,
205 .getsda = cx18_getsda,
206 .getscl = cx18_getscl,
207 .udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
208 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
209};
210
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211/* init + register i2c algo-bit adapter */
212int init_cx18_i2c(struct cx18 *cx)
213{
214 int i;
215 CX18_DEBUG_I2C("i2c init\n");
216
217 for (i = 0; i < 2; i++) {
ff2a2001 218 /* Setup algorithm for adapter */
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219 memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
220 sizeof(struct i2c_algo_bit_data));
221 cx->i2c_algo_cb_data[i].cx = cx;
222 cx->i2c_algo_cb_data[i].bus_index = i;
223 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
1c1e45d1 224
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225 /* Setup adapter */
226 memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
227 sizeof(struct i2c_adapter));
228 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
1c1e45d1 229 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
5811cf99 230 " #%d-%d", cx->instance, i);
ff2a2001 231 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
3d05913d 232 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
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233 }
234
b1526421 235 if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
1c1e45d1 236 /* Reset/Unreset I2C hardware block */
b1526421 237 /* Clock select 220MHz */
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238 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
239 0x00000000, 0x10001000);
b1526421 240 /* Clock Enable */
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241 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
242 0x00001000, 0x10001000);
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243 }
244 /* courtesy of Steven Toth <stoth@hauppauge.com> */
ced07371 245 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
1c1e45d1 246 mdelay(10);
ced07371 247 cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
1c1e45d1 248 mdelay(10);
ced07371 249 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
53ad02ef 250 mdelay(10);
1c1e45d1 251
b1526421 252 /* Set to edge-triggered intrs. */
ced07371 253 cx18_write_reg(cx, 0x00c00000, 0xc730c8);
b1526421 254 /* Clear any stale intrs */
ced07371
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255 cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
256 ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
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257
258 /* Hw I2C1 Clock Freq ~100kHz */
3f75c616 259 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
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260 cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
261 cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
262
263 /* Hw I2C2 Clock Freq ~100kHz */
3f75c616 264 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
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265 cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
266 cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
267
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268 cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
269 core, reset, (u32) CX18_GPIO_RESET_I2C);
1f09e8a2 270
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271 return i2c_bit_add_bus(&cx->i2c_adap[0]) ||
272 i2c_bit_add_bus(&cx->i2c_adap[1]);
273}
274
275void exit_cx18_i2c(struct cx18 *cx)
276{
277 int i;
278 CX18_DEBUG_I2C("i2c exit\n");
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279 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
280 CX18_REG_I2C_1_WR);
281 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
282 CX18_REG_I2C_2_WR);
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283
284 for (i = 0; i < 2; i++) {
285 i2c_del_adapter(&cx->i2c_adap[i]);
286 }
287}
288
289/*
290 Hauppauge HVR1600 should have:
291 32 cx24227
292 98 unknown
293 a0 eeprom
294 c2 tuner
295 e? zilog ir
296 */
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