Commit | Line | Data |
---|---|---|
e0d3bafd SD |
1 | /* |
2 | cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices | |
3 | ||
4 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
84b5dbf3 | 5 | Based on em28xx driver |
e0d3bafd SD |
6 | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef _CX231XX_H | |
23 | #define _CX231XX_H | |
24 | ||
25 | #include <linux/videodev2.h> | |
b1196126 SD |
26 | #include <linux/types.h> |
27 | #include <linux/ioctl.h> | |
e0d3bafd SD |
28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-algo-bit.h> | |
61b04cb2 | 30 | #include <linux/workqueue.h> |
e0d3bafd | 31 | #include <linux/mutex.h> |
b1196126 | 32 | |
64fbf444 | 33 | #include <media/cx2341x.h> |
b1196126 SD |
34 | |
35 | #include <media/videobuf-vmalloc.h> | |
36 | #include <media/v4l2-device.h> | |
6bda9644 | 37 | #include <media/rc-core.h> |
9ab66912 | 38 | #include <media/ir-kbd-i2c.h> |
e0d3bafd | 39 | #include <media/videobuf-dvb.h> |
e0d3bafd SD |
40 | |
41 | #include "cx231xx-reg.h" | |
6e4f574b | 42 | #include "cx231xx-pcb-cfg.h" |
e0d3bafd SD |
43 | #include "cx231xx-conf-reg.h" |
44 | ||
e0d3bafd | 45 | #define DRIVER_NAME "cx231xx" |
44ecf1df | 46 | #define PWR_SLEEP_INTERVAL 10 |
e0d3bafd SD |
47 | |
48 | /* I2C addresses for control block in Cx231xx */ | |
ecc67d10 SD |
49 | #define AFE_DEVICE_ADDRESS 0x60 |
50 | #define I2S_BLK_DEVICE_ADDRESS 0x98 | |
51 | #define VID_BLK_I2C_ADDRESS 0x88 | |
64fbf444 | 52 | #define VERVE_I2C_ADDRESS 0x40 |
e0d3bafd SD |
53 | #define DIF_USE_BASEBAND 0xFFFFFFFF |
54 | ||
55 | /* Boards supported by driver */ | |
56 | #define CX231XX_BOARD_UNKNOWN 0 | |
955e6ed8 MCC |
57 | #define CX231XX_BOARD_CNXT_CARRAERA 1 |
58 | #define CX231XX_BOARD_CNXT_SHELBY 2 | |
59 | #define CX231XX_BOARD_CNXT_RDE_253S 3 | |
60 | #define CX231XX_BOARD_CNXT_RDU_253S 4 | |
64fbf444 | 61 | #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 |
955e6ed8 MCC |
62 | #define CX231XX_BOARD_CNXT_RDE_250 6 |
63 | #define CX231XX_BOARD_CNXT_RDU_250 7 | |
1a50fdde | 64 | #define CX231XX_BOARD_HAUPPAUGE_EXETER 8 |
4270c3ca | 65 | #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9 |
9417bc6d | 66 | #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10 |
4e105039 | 67 | #define CX231XX_BOARD_PV_XCAPTURE_USB 11 |
eeaaf817 | 68 | #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12 |
2a7b6a40 | 69 | #define CX231XX_BOARD_ICONBIT_U100 13 |
de8ae0d5 PM |
70 | #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14 |
71 | #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15 | |
e0d3bafd SD |
72 | |
73 | /* Limits minimum and default number of buffers */ | |
74 | #define CX231XX_MIN_BUF 4 | |
75 | #define CX231XX_DEF_BUF 12 | |
76 | #define CX231XX_DEF_VBI_BUF 6 | |
77 | ||
78 | #define VBI_LINE_COUNT 17 | |
79 | #define VBI_LINE_LENGTH 1440 | |
80 | ||
81 | /*Limits the max URB message size */ | |
82 | #define URB_MAX_CTRL_SIZE 80 | |
83 | ||
84 | /* Params for validated field */ | |
85 | #define CX231XX_BOARD_NOT_VALIDATED 1 | |
84b5dbf3 | 86 | #define CX231XX_BOARD_VALIDATED 0 |
e0d3bafd SD |
87 | |
88 | /* maximum number of cx231xx boards */ | |
89 | #define CX231XX_MAXBOARDS 8 | |
90 | ||
91 | /* maximum number of frames that can be queued */ | |
92 | #define CX231XX_NUM_FRAMES 5 | |
93 | ||
94 | /* number of buffers for isoc transfers */ | |
95 | #define CX231XX_NUM_BUFS 8 | |
96 | ||
97 | /* number of packets for each buffer | |
98 | windows requests only 40 packets .. so we better do the same | |
99 | this is what I found out for all alternate numbers there! | |
100 | */ | |
101 | #define CX231XX_NUM_PACKETS 40 | |
102 | ||
e0d3bafd SD |
103 | /* default alternate; 0 means choose the best */ |
104 | #define CX231XX_PINOUT 0 | |
105 | ||
106 | #define CX231XX_INTERLACED_DEFAULT 1 | |
107 | ||
e0d3bafd | 108 | /* time to wait when stopping the isoc transfer */ |
b9255176 SD |
109 | #define CX231XX_URB_TIMEOUT \ |
110 | msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) | |
e0d3bafd | 111 | |
64fbf444 PB |
112 | #define CX231xx_NORMS (\ |
113 | V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ | |
114 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | |
115 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | |
116 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | |
64fbf444 PB |
117 | |
118 | #define SLEEP_S5H1432 30 | |
119 | #define CX23417_OSC_EN 8 | |
120 | #define CX23417_RESET 9 | |
121 | ||
122 | struct cx23417_fmt { | |
123 | char *name; | |
124 | u32 fourcc; /* v4l2 format id */ | |
125 | int depth; | |
126 | int flags; | |
127 | u32 cxformat; | |
128 | }; | |
e0d3bafd SD |
129 | enum cx231xx_mode { |
130 | CX231XX_SUSPEND, | |
131 | CX231XX_ANALOG_MODE, | |
132 | CX231XX_DIGITAL_MODE, | |
133 | }; | |
134 | ||
135 | enum cx231xx_std_mode { | |
136 | CX231XX_TV_AIR = 0, | |
137 | CX231XX_TV_CABLE | |
138 | }; | |
139 | ||
140 | enum cx231xx_stream_state { | |
141 | STREAM_OFF, | |
142 | STREAM_INTERRUPT, | |
143 | STREAM_ON, | |
144 | }; | |
145 | ||
146 | struct cx231xx; | |
147 | ||
64fbf444 | 148 | struct cx231xx_isoc_ctl { |
84b5dbf3 MCC |
149 | /* max packet size of isoc transaction */ |
150 | int max_pkt_size; | |
e0d3bafd | 151 | |
84b5dbf3 MCC |
152 | /* number of allocated urbs */ |
153 | int num_bufs; | |
e0d3bafd | 154 | |
84b5dbf3 MCC |
155 | /* urb for isoc transfers */ |
156 | struct urb **urb; | |
e0d3bafd | 157 | |
84b5dbf3 MCC |
158 | /* transfer buffers for isoc transfer */ |
159 | char **transfer_buffer; | |
e0d3bafd | 160 | |
84b5dbf3 MCC |
161 | /* Last buffer command and region */ |
162 | u8 cmd; | |
163 | int pos, size, pktsize; | |
e0d3bafd | 164 | |
84b5dbf3 MCC |
165 | /* Last field: ODD or EVEN? */ |
166 | int field; | |
e0d3bafd | 167 | |
84b5dbf3 MCC |
168 | /* Stores incomplete commands */ |
169 | u32 tmp_buf; | |
170 | int tmp_buf_len; | |
e0d3bafd | 171 | |
84b5dbf3 MCC |
172 | /* Stores already requested buffers */ |
173 | struct cx231xx_buffer *buf; | |
e0d3bafd | 174 | |
84b5dbf3 MCC |
175 | /* Stores the number of received fields */ |
176 | int nfields; | |
e0d3bafd | 177 | |
84b5dbf3 | 178 | /* isoc urb callback */ |
cde4362f | 179 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); |
e0d3bafd SD |
180 | }; |
181 | ||
64fbf444 PB |
182 | struct cx231xx_bulk_ctl { |
183 | /* max packet size of bulk transaction */ | |
184 | int max_pkt_size; | |
185 | ||
186 | /* number of allocated urbs */ | |
187 | int num_bufs; | |
188 | ||
189 | /* urb for bulk transfers */ | |
190 | struct urb **urb; | |
191 | ||
192 | /* transfer buffers for bulk transfer */ | |
193 | char **transfer_buffer; | |
194 | ||
195 | /* Last buffer command and region */ | |
196 | u8 cmd; | |
197 | int pos, size, pktsize; | |
198 | ||
199 | /* Last field: ODD or EVEN? */ | |
200 | int field; | |
201 | ||
202 | /* Stores incomplete commands */ | |
203 | u32 tmp_buf; | |
204 | int tmp_buf_len; | |
205 | ||
206 | /* Stores already requested buffers */ | |
207 | struct cx231xx_buffer *buf; | |
208 | ||
209 | /* Stores the number of received fields */ | |
210 | int nfields; | |
211 | ||
212 | /* bulk urb callback */ | |
213 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); | |
214 | }; | |
215 | ||
e0d3bafd | 216 | struct cx231xx_fmt { |
84b5dbf3 MCC |
217 | char *name; |
218 | u32 fourcc; /* v4l2 format id */ | |
219 | int depth; | |
220 | int reg; | |
e0d3bafd SD |
221 | }; |
222 | ||
223 | /* buffer for one video frame */ | |
224 | struct cx231xx_buffer { | |
225 | /* common v4l buffer stuff -- must be first */ | |
226 | struct videobuf_buffer vb; | |
227 | ||
228 | struct list_head frame; | |
229 | int top_field; | |
230 | int receiving; | |
231 | }; | |
232 | ||
64fbf444 PB |
233 | enum ps_package_head { |
234 | CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, | |
235 | CX231XX_NONEED_PS_PACKAGE_HEAD | |
236 | }; | |
237 | ||
e0d3bafd | 238 | struct cx231xx_dmaqueue { |
84b5dbf3 MCC |
239 | struct list_head active; |
240 | struct list_head queued; | |
e0d3bafd | 241 | |
84b5dbf3 | 242 | wait_queue_head_t wq; |
e0d3bafd SD |
243 | |
244 | /* Counters to control buffer fill */ | |
84b5dbf3 MCC |
245 | int pos; |
246 | u8 is_partial_line; | |
247 | u8 partial_buf[8]; | |
248 | u8 last_sav; | |
249 | int current_field; | |
250 | u32 bytes_left_in_line; | |
251 | u32 lines_completed; | |
252 | u8 field1_done; | |
253 | u32 lines_per_field; | |
64fbf444 PB |
254 | |
255 | /*Mpeg2 control buffer*/ | |
256 | u8 *p_left_data; | |
257 | u32 left_data_count; | |
258 | u8 mpeg_buffer_done; | |
259 | u32 mpeg_buffer_completed; | |
260 | enum ps_package_head add_ps_package_head; | |
261 | char ps_head[10]; | |
e0d3bafd SD |
262 | }; |
263 | ||
e0d3bafd SD |
264 | /* inputs */ |
265 | ||
266 | #define MAX_CX231XX_INPUT 4 | |
267 | ||
268 | enum cx231xx_itype { | |
269 | CX231XX_VMUX_COMPOSITE1 = 1, | |
270 | CX231XX_VMUX_SVIDEO, | |
271 | CX231XX_VMUX_TELEVISION, | |
84b5dbf3 MCC |
272 | CX231XX_VMUX_CABLE, |
273 | CX231XX_RADIO, | |
274 | CX231XX_VMUX_DVB, | |
e0d3bafd SD |
275 | CX231XX_VMUX_DEBUG |
276 | }; | |
277 | ||
278 | enum cx231xx_v_input { | |
84b5dbf3 MCC |
279 | CX231XX_VIN_1_1 = 0x1, |
280 | CX231XX_VIN_2_1, | |
281 | CX231XX_VIN_3_1, | |
282 | CX231XX_VIN_4_1, | |
283 | CX231XX_VIN_1_2 = 0x01, | |
284 | CX231XX_VIN_2_2, | |
285 | CX231XX_VIN_3_2, | |
286 | CX231XX_VIN_1_3 = 0x1, | |
287 | CX231XX_VIN_2_3, | |
288 | CX231XX_VIN_3_3, | |
e0d3bafd SD |
289 | }; |
290 | ||
291 | /* cx231xx has two audio inputs: tuner and line in */ | |
292 | enum cx231xx_amux { | |
293 | /* This is the only entry for cx231xx tuner input */ | |
84b5dbf3 | 294 | CX231XX_AMUX_VIDEO, /* cx231xx tuner */ |
e0d3bafd SD |
295 | CX231XX_AMUX_LINE_IN, /* Line In */ |
296 | }; | |
297 | ||
298 | struct cx231xx_reg_seq { | |
299 | unsigned char bit; | |
84b5dbf3 | 300 | unsigned char val; |
e0d3bafd SD |
301 | int sleep; |
302 | }; | |
303 | ||
304 | struct cx231xx_input { | |
305 | enum cx231xx_itype type; | |
306 | unsigned int vmux; | |
307 | enum cx231xx_amux amux; | |
308 | struct cx231xx_reg_seq *gpio; | |
309 | }; | |
310 | ||
311 | #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) | |
312 | ||
313 | enum cx231xx_decoder { | |
314 | CX231XX_NODECODER, | |
315 | CX231XX_AVDECODER | |
316 | }; | |
317 | ||
b9255176 | 318 | enum CX231XX_I2C_MASTER_PORT { |
84b5dbf3 MCC |
319 | I2C_0 = 0, |
320 | I2C_1 = 1, | |
321 | I2C_2 = 2, | |
322 | I2C_3 = 3 | |
b9255176 | 323 | }; |
e0d3bafd SD |
324 | |
325 | struct cx231xx_board { | |
326 | char *name; | |
327 | int vchannels; | |
328 | int tuner_type; | |
329 | int tuner_addr; | |
84b5dbf3 | 330 | v4l2_std_id norm; /* tv norm */ |
e0d3bafd | 331 | |
84b5dbf3 MCC |
332 | /* demod related */ |
333 | int demod_addr; | |
334 | u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ | |
e0d3bafd SD |
335 | |
336 | /* GPIO Pins */ | |
337 | struct cx231xx_reg_seq *dvb_gpio; | |
338 | struct cx231xx_reg_seq *suspend_gpio; | |
339 | struct cx231xx_reg_seq *tuner_gpio; | |
78bb6df6 MCC |
340 | /* Negative means don't use it */ |
341 | s8 tuner_sif_gpio; | |
342 | s8 tuner_scl_gpio; | |
343 | s8 tuner_sda_gpio; | |
e0d3bafd | 344 | |
84b5dbf3 MCC |
345 | /* PIN ctrl */ |
346 | u32 ctl_pin_status_mask; | |
347 | u8 agc_analog_digital_select_gpio; | |
348 | u32 gpio_pin_status_mask; | |
e0d3bafd | 349 | |
84b5dbf3 MCC |
350 | /* i2c masters */ |
351 | u8 tuner_i2c_master; | |
352 | u8 demod_i2c_master; | |
9ab66912 MCC |
353 | u8 ir_i2c_master; |
354 | ||
355 | /* for devices with I2C chips for IR */ | |
29e3ec19 | 356 | char *rc_map_name; |
e0d3bafd SD |
357 | |
358 | unsigned int max_range_640_480:1; | |
359 | unsigned int has_dvb:1; | |
2f861387 | 360 | unsigned int has_417:1; |
e0d3bafd | 361 | unsigned int valid:1; |
2f861387 MCC |
362 | unsigned int no_alt_vanc:1; |
363 | unsigned int external_av:1; | |
38f5ddc1 | 364 | unsigned int dont_use_port_3:1; |
e0d3bafd SD |
365 | |
366 | unsigned char xclk, i2c_speed; | |
367 | ||
368 | enum cx231xx_decoder decoder; | |
88806218 | 369 | int output_mode; |
e0d3bafd | 370 | |
84b5dbf3 MCC |
371 | struct cx231xx_input input[MAX_CX231XX_INPUT]; |
372 | struct cx231xx_input radio; | |
b088ba65 | 373 | struct rc_map *ir_codes; |
e0d3bafd SD |
374 | }; |
375 | ||
376 | /* device states */ | |
377 | enum cx231xx_dev_state { | |
378 | DEV_INITIALIZED = 0x01, | |
379 | DEV_DISCONNECTED = 0x02, | |
e0d3bafd SD |
380 | }; |
381 | ||
84b5dbf3 MCC |
382 | enum AFE_MODE { |
383 | AFE_MODE_LOW_IF, | |
384 | AFE_MODE_BASEBAND, | |
385 | AFE_MODE_EU_HI_IF, | |
386 | AFE_MODE_US_HI_IF, | |
387 | AFE_MODE_JAPAN_HI_IF | |
e0d3bafd SD |
388 | }; |
389 | ||
84b5dbf3 MCC |
390 | enum AUDIO_INPUT { |
391 | AUDIO_INPUT_MUTE, | |
392 | AUDIO_INPUT_LINE, | |
393 | AUDIO_INPUT_TUNER_TV, | |
394 | AUDIO_INPUT_SPDIF, | |
395 | AUDIO_INPUT_TUNER_FM | |
e0d3bafd SD |
396 | }; |
397 | ||
398 | #define CX231XX_AUDIO_BUFS 5 | |
64fbf444 PB |
399 | #define CX231XX_NUM_AUDIO_PACKETS 16 |
400 | #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 | |
e0d3bafd | 401 | |
e0d3bafd SD |
402 | /* cx231xx extensions */ |
403 | #define CX231XX_AUDIO 0x10 | |
404 | #define CX231XX_DVB 0x20 | |
405 | ||
406 | struct cx231xx_audio { | |
407 | char name[50]; | |
408 | char *transfer_buffer[CX231XX_AUDIO_BUFS]; | |
409 | struct urb *urb[CX231XX_AUDIO_BUFS]; | |
410 | struct usb_device *udev; | |
411 | unsigned int capture_transfer_done; | |
84b5dbf3 | 412 | struct snd_pcm_substream *capture_pcm_substream; |
e0d3bafd SD |
413 | |
414 | unsigned int hwptr_done_capture; | |
84b5dbf3 | 415 | struct snd_card *sndcard; |
e0d3bafd SD |
416 | |
417 | int users, shutdown; | |
64fbf444 | 418 | /* locks */ |
e0d3bafd SD |
419 | spinlock_t slock; |
420 | ||
84b5dbf3 MCC |
421 | int alt; /* alternate */ |
422 | int max_pkt_size; /* max packet size of isoc transaction */ | |
423 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 424 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 425 | u16 end_point_addr; |
e0d3bafd SD |
426 | }; |
427 | ||
428 | struct cx231xx; | |
429 | ||
430 | struct cx231xx_fh { | |
431 | struct cx231xx *dev; | |
84b5dbf3 MCC |
432 | unsigned int stream_on:1; /* Locks streams */ |
433 | int radio; | |
e0d3bafd | 434 | |
84b5dbf3 | 435 | struct videobuf_queue vb_vidq; |
e0d3bafd | 436 | |
84b5dbf3 | 437 | enum v4l2_buf_type type; |
64fbf444 PB |
438 | |
439 | ||
440 | ||
441 | /*following is copyed from cx23885.h*/ | |
442 | u32 resources; | |
443 | ||
444 | /* video overlay */ | |
445 | struct v4l2_window win; | |
446 | struct v4l2_clip *clips; | |
447 | unsigned int nclips; | |
448 | ||
449 | /* video capture */ | |
450 | struct cx23417_fmt *fmt; | |
451 | unsigned int width, height; | |
452 | ||
453 | /* vbi capture */ | |
454 | struct videobuf_queue vidq; | |
455 | struct videobuf_queue vbiq; | |
456 | ||
457 | /* MPEG Encoder specifics ONLY */ | |
458 | ||
459 | atomic_t v4l_reading; | |
e0d3bafd SD |
460 | }; |
461 | ||
b9255176 | 462 | /*****************************************************************/ |
e0d3bafd | 463 | /* set/get i2c */ |
b9255176 SD |
464 | /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ |
465 | #define I2C_SPEED_1M 0x0 | |
466 | #define I2C_SPEED_400K 0x1 | |
467 | #define I2C_SPEED_100K 0x2 | |
468 | #define I2C_SPEED_5M 0x3 | |
469 | ||
470 | /* 0-- STOP transaction */ | |
471 | #define I2C_STOP 0x0 | |
472 | /* 1-- do not transmit STOP at end of transaction */ | |
473 | #define I2C_NOSTOP 0x1 | |
b251e618 | 474 | /* 1--allow slave to insert clock wait states */ |
b9255176 | 475 | #define I2C_SYNC 0x1 |
e0d3bafd SD |
476 | |
477 | struct cx231xx_i2c { | |
84b5dbf3 | 478 | struct cx231xx *dev; |
e0d3bafd | 479 | |
84b5dbf3 | 480 | int nr; |
e0d3bafd SD |
481 | |
482 | /* i2c i/o */ | |
84b5dbf3 MCC |
483 | struct i2c_adapter i2c_adap; |
484 | struct i2c_algo_bit_data i2c_algo; | |
485 | struct i2c_client i2c_client; | |
486 | u32 i2c_rc; | |
e0d3bafd SD |
487 | |
488 | /* different settings for each bus */ | |
84b5dbf3 MCC |
489 | u8 i2c_period; |
490 | u8 i2c_nostop; | |
491 | u8 i2c_reserve; | |
e0d3bafd SD |
492 | }; |
493 | ||
84b5dbf3 MCC |
494 | struct cx231xx_i2c_xfer_data { |
495 | u8 dev_addr; | |
496 | u8 direction; /* 1 - IN, 0 - OUT */ | |
497 | u8 saddr_len; /* sub address len */ | |
498 | u16 saddr_dat; /* sub addr data */ | |
499 | u8 buf_size; /* buffer size */ | |
500 | u8 *p_buffer; /* pointer to the buffer */ | |
e0d3bafd SD |
501 | }; |
502 | ||
6e4f574b | 503 | struct VENDOR_REQUEST_IN { |
84b5dbf3 MCC |
504 | u8 bRequest; |
505 | u16 wValue; | |
506 | u16 wIndex; | |
507 | u16 wLength; | |
508 | u8 direction; | |
509 | u8 bData; | |
510 | u8 *pBuff; | |
b9255176 | 511 | }; |
e0d3bafd | 512 | |
64fbf444 PB |
513 | struct cx231xx_tvnorm { |
514 | char *name; | |
515 | v4l2_std_id id; | |
516 | u32 cxiformat; | |
517 | u32 cxoformat; | |
518 | }; | |
519 | ||
e0d3bafd SD |
520 | struct cx231xx_ctrl { |
521 | struct v4l2_queryctrl v; | |
84b5dbf3 MCC |
522 | u32 off; |
523 | u32 reg; | |
524 | u32 mask; | |
525 | u32 shift; | |
e0d3bafd SD |
526 | }; |
527 | ||
6e4f574b | 528 | enum TRANSFER_TYPE { |
84b5dbf3 MCC |
529 | Raw_Video = 0, |
530 | Audio, | |
531 | Vbi, /* VANC */ | |
532 | Sliced_cc, /* HANC */ | |
533 | TS1_serial_mode, | |
534 | TS2, | |
535 | TS1_parallel_mode | |
b9255176 | 536 | } ; |
e0d3bafd SD |
537 | |
538 | struct cx231xx_video_mode { | |
84b5dbf3 | 539 | /* Isoc control struct */ |
e0d3bafd | 540 | struct cx231xx_dmaqueue vidq; |
64fbf444 PB |
541 | struct cx231xx_isoc_ctl isoc_ctl; |
542 | struct cx231xx_bulk_ctl bulk_ctl; | |
543 | /* locks */ | |
e0d3bafd SD |
544 | spinlock_t slock; |
545 | ||
546 | /* usb transfer */ | |
84b5dbf3 MCC |
547 | int alt; /* alternate */ |
548 | int max_pkt_size; /* max packet size of isoc transaction */ | |
549 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 550 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 551 | u16 end_point_addr; |
e0d3bafd | 552 | }; |
64fbf444 PB |
553 | /* |
554 | struct cx23885_dmaqueue { | |
555 | struct list_head active; | |
556 | struct list_head queued; | |
557 | struct timer_list timeout; | |
558 | struct btcx_riscmem stopper; | |
559 | u32 count; | |
560 | }; | |
561 | */ | |
562 | struct cx231xx_tsport { | |
563 | struct cx231xx *dev; | |
564 | ||
565 | int nr; | |
566 | int sram_chno; | |
567 | ||
568 | struct videobuf_dvb_frontends frontends; | |
569 | ||
570 | /* dma queues */ | |
571 | ||
572 | u32 ts_packet_size; | |
573 | u32 ts_packet_count; | |
574 | ||
575 | int width; | |
576 | int height; | |
577 | ||
578 | /* locks */ | |
579 | spinlock_t slock; | |
580 | ||
581 | /* registers */ | |
582 | u32 reg_gpcnt; | |
583 | u32 reg_gpcnt_ctl; | |
584 | u32 reg_dma_ctl; | |
585 | u32 reg_lngth; | |
586 | u32 reg_hw_sop_ctrl; | |
587 | u32 reg_gen_ctrl; | |
588 | u32 reg_bd_pkt_status; | |
589 | u32 reg_sop_status; | |
590 | u32 reg_fifo_ovfl_stat; | |
591 | u32 reg_vld_misc; | |
592 | u32 reg_ts_clk_en; | |
593 | u32 reg_ts_int_msk; | |
594 | u32 reg_ts_int_stat; | |
595 | u32 reg_src_sel; | |
596 | ||
597 | /* Default register vals */ | |
598 | int pci_irqmask; | |
599 | u32 dma_ctl_val; | |
600 | u32 ts_int_msk_val; | |
601 | u32 gen_ctrl_val; | |
602 | u32 ts_clk_en_val; | |
603 | u32 src_sel_val; | |
604 | u32 vld_misc_val; | |
605 | u32 hw_sop_ctrl_val; | |
606 | ||
607 | /* Allow a single tsport to have multiple frontends */ | |
608 | u32 num_frontends; | |
609 | void *port_priv; | |
610 | }; | |
e0d3bafd | 611 | |
e0d3bafd SD |
612 | /* main device struct */ |
613 | struct cx231xx { | |
614 | /* generic device properties */ | |
84b5dbf3 MCC |
615 | char name[30]; /* name (including minor) of the device */ |
616 | int model; /* index in the device_data struct */ | |
617 | int devno; /* marks the number of this device */ | |
e0d3bafd SD |
618 | |
619 | struct cx231xx_board board; | |
620 | ||
9ab66912 | 621 | /* For I2C IR support */ |
141bb0dc | 622 | struct IR_i2c_init_data init_data; |
7528cd27 | 623 | struct i2c_client *ir_i2c_client; |
9ab66912 | 624 | |
84b5dbf3 MCC |
625 | unsigned int stream_on:1; /* Locks streams */ |
626 | unsigned int vbi_stream_on:1; /* Locks streams for VBI */ | |
e0d3bafd SD |
627 | unsigned int has_audio_class:1; |
628 | unsigned int has_alsa_audio:1; | |
629 | ||
84b5dbf3 | 630 | struct cx231xx_fmt *format; |
e0d3bafd | 631 | |
b1196126 SD |
632 | struct v4l2_device v4l2_dev; |
633 | struct v4l2_subdev *sd_cx25840; | |
634 | struct v4l2_subdev *sd_tuner; | |
635 | ||
61b04cb2 MCC |
636 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ |
637 | atomic_t stream_started; /* stream should be running if true */ | |
638 | ||
84b5dbf3 | 639 | struct list_head devlist; |
e0d3bafd | 640 | |
84b5dbf3 MCC |
641 | int tuner_type; /* type of the tuner */ |
642 | int tuner_addr; /* tuner address */ | |
e0d3bafd | 643 | |
84b5dbf3 MCC |
644 | /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ |
645 | struct cx231xx_i2c i2c_bus[3]; | |
646 | unsigned int xc_fw_load_done:1; | |
64fbf444 | 647 | /* locks */ |
84b5dbf3 | 648 | struct mutex gpio_i2c_lock; |
64fbf444 | 649 | struct mutex i2c_lock; |
e0d3bafd SD |
650 | |
651 | /* video for linux */ | |
84b5dbf3 MCC |
652 | int users; /* user count for exclusive use */ |
653 | struct video_device *vdev; /* video for linux device struct */ | |
654 | v4l2_std_id norm; /* selected tv norm */ | |
655 | int ctl_freq; /* selected frequency */ | |
656 | unsigned int ctl_ainput; /* selected audio input */ | |
e0d3bafd SD |
657 | int mute; |
658 | int volume; | |
659 | ||
660 | /* frame properties */ | |
84b5dbf3 MCC |
661 | int width; /* current frame width */ |
662 | int height; /* current frame height */ | |
84b5dbf3 | 663 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
e0d3bafd SD |
664 | |
665 | struct cx231xx_audio adev; | |
666 | ||
667 | /* states */ | |
668 | enum cx231xx_dev_state state; | |
669 | ||
84b5dbf3 | 670 | struct work_struct request_module_wk; |
e0d3bafd SD |
671 | |
672 | /* locks */ | |
673 | struct mutex lock; | |
84b5dbf3 | 674 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
e0d3bafd SD |
675 | struct list_head inqueue, outqueue; |
676 | wait_queue_head_t open, wait_frame, wait_stream; | |
677 | struct video_device *vbi_dev; | |
678 | struct video_device *radio_dev; | |
679 | ||
680 | unsigned char eedata[256]; | |
681 | ||
84b5dbf3 MCC |
682 | struct cx231xx_video_mode video_mode; |
683 | struct cx231xx_video_mode vbi_mode; | |
684 | struct cx231xx_video_mode sliced_cc_mode; | |
685 | struct cx231xx_video_mode ts1_mode; | |
e0d3bafd | 686 | |
64fbf444 PB |
687 | atomic_t devlist_count; |
688 | ||
84b5dbf3 MCC |
689 | struct usb_device *udev; /* the usb device */ |
690 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ | |
e0d3bafd SD |
691 | |
692 | /* helper funcs that call usb_control_msg */ | |
cde4362f | 693 | int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
e0d3bafd | 694 | char *buf, int len); |
cde4362f | 695 | int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
84b5dbf3 | 696 | char *buf, int len); |
cde4362f | 697 | int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, |
b9255176 | 698 | struct cx231xx_i2c_xfer_data *req_data); |
cde4362f MCC |
699 | int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, |
700 | u8 *buf, u8 len); | |
701 | int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, | |
702 | u8 *buf, u8 len); | |
84b5dbf3 | 703 | |
cde4362f MCC |
704 | int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); |
705 | int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); | |
e0d3bafd SD |
706 | |
707 | enum cx231xx_mode mode; | |
708 | ||
709 | struct cx231xx_dvb *dvb; | |
710 | ||
84b5dbf3 MCC |
711 | /* Cx231xx supported PCB config's */ |
712 | struct pcb_config current_pcb_config; | |
713 | u8 current_scenario_idx; | |
714 | u8 interface_count; | |
715 | u8 max_iad_interface_count; | |
e0d3bafd | 716 | |
84b5dbf3 MCC |
717 | /* GPIO related register direction and values */ |
718 | u32 gpio_dir; | |
719 | u32 gpio_val; | |
e0d3bafd | 720 | |
84b5dbf3 MCC |
721 | /* Power Modes */ |
722 | int power_mode; | |
e0d3bafd | 723 | |
ecc67d10 SD |
724 | /* afe parameters */ |
725 | enum AFE_MODE afe_mode; | |
726 | u32 afe_ref_count; | |
e0d3bafd | 727 | |
84b5dbf3 MCC |
728 | /* video related parameters */ |
729 | u32 video_input; | |
730 | u32 active_mode; | |
731 | u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ | |
732 | enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ | |
e0d3bafd | 733 | |
64fbf444 PB |
734 | /*mode: digital=1 or analog=0*/ |
735 | u8 mode_tv; | |
736 | ||
737 | u8 USE_ISO; | |
738 | struct cx231xx_tvnorm encodernorm; | |
739 | struct cx231xx_tsport ts1, ts2; | |
740 | struct cx2341x_mpeg_params mpeg_params; | |
741 | struct video_device *v4l_device; | |
742 | atomic_t v4l_reader_count; | |
743 | u32 freq; | |
744 | unsigned int input; | |
745 | u32 cx23417_mailbox; | |
746 | u32 __iomem *lmmio; | |
747 | u8 __iomem *bmmio; | |
e0d3bafd SD |
748 | }; |
749 | ||
64fbf444 PB |
750 | extern struct list_head cx231xx_devlist; |
751 | ||
b1196126 SD |
752 | #define cx25840_call(cx231xx, o, f, args...) \ |
753 | v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) | |
754 | #define tuner_call(cx231xx, o, f, args...) \ | |
755 | v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) | |
756 | #define call_all(dev, o, f, args...) \ | |
757 | v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) | |
758 | ||
e0d3bafd SD |
759 | struct cx231xx_ops { |
760 | struct list_head next; | |
761 | char *name; | |
762 | int id; | |
84b5dbf3 MCC |
763 | int (*init) (struct cx231xx *); |
764 | int (*fini) (struct cx231xx *); | |
e0d3bafd SD |
765 | }; |
766 | ||
767 | /* call back functions in dvb module */ | |
84b5dbf3 MCC |
768 | int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); |
769 | int cx231xx_reset_analog_tuner(struct cx231xx *dev); | |
e0d3bafd SD |
770 | |
771 | /* Provided by cx231xx-i2c.c */ | |
e0d3bafd SD |
772 | void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); |
773 | int cx231xx_i2c_register(struct cx231xx_i2c *bus); | |
774 | int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); | |
775 | ||
776 | /* Internal block control functions */ | |
64fbf444 PB |
777 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
778 | u8 saddr_len, u32 *data, u8 data_len, int master); | |
779 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
780 | u8 saddr_len, u32 data, u8 data_len, int master); | |
e0d3bafd | 781 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, |
cde4362f | 782 | u16 saddr, u8 saddr_len, u32 *data, u8 data_len); |
e0d3bafd | 783 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 MCC |
784 | u16 saddr, u8 saddr_len, u32 data, u8 data_len); |
785 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, | |
786 | u16 register_address, u8 bit_start, u8 bit_end, | |
787 | u32 value); | |
e0d3bafd | 788 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 | 789 | u16 saddr, u32 mask, u32 value); |
e0d3bafd SD |
790 | u32 cx231xx_set_field(u32 field_mask, u32 data); |
791 | ||
64fbf444 PB |
792 | /*verve r/w*/ |
793 | void initGPIO(struct cx231xx *dev); | |
794 | void uninitGPIO(struct cx231xx *dev); | |
ecc67d10 SD |
795 | /* afe related functions */ |
796 | int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); | |
797 | int cx231xx_afe_init_channels(struct cx231xx *dev); | |
798 | int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); | |
799 | int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); | |
800 | int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); | |
801 | int cx231xx_afe_update_power_control(struct cx231xx *dev, | |
6e4f574b | 802 | enum AV_MODE avmode); |
ecc67d10 | 803 | int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); |
e0d3bafd | 804 | |
ecc67d10 SD |
805 | /* i2s block related functions */ |
806 | int cx231xx_i2s_blk_initialize(struct cx231xx *dev); | |
807 | int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, | |
6e4f574b | 808 | enum AV_MODE avmode); |
ecc67d10 | 809 | int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); |
e0d3bafd SD |
810 | |
811 | /* DIF related functions */ | |
812 | int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, | |
84b5dbf3 | 813 | u32 function_mode, u32 standard); |
64fbf444 PB |
814 | void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, |
815 | u8 spectral_invert, u32 mode); | |
816 | u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); | |
817 | void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, | |
818 | u8 spectral_invert, u32 mode); | |
819 | void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); | |
820 | void reset_s5h1432_demod(struct cx231xx *dev); | |
821 | void cx231xx_dump_HH_reg(struct cx231xx *dev); | |
822 | void update_HH_register_after_set_DIF(struct cx231xx *dev); | |
823 | void cx231xx_dump_SC_reg(struct cx231xx *dev); | |
824 | ||
825 | ||
826 | ||
e0d3bafd SD |
827 | int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); |
828 | int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); | |
829 | int cx231xx_tuner_post_channel_change(struct cx231xx *dev); | |
830 | ||
831 | /* video parser functions */ | |
cde4362f MCC |
832 | u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, |
833 | u32 *p_bytes_used); | |
834 | u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, | |
835 | u32 *p_bytes_used); | |
e0d3bafd | 836 | int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f | 837 | u8 *p_buffer, u32 bytes_to_copy); |
84b5dbf3 MCC |
838 | void cx231xx_reset_video_buffer(struct cx231xx *dev, |
839 | struct cx231xx_dmaqueue *dma_q); | |
840 | u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); | |
841 | u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, | |
cde4362f | 842 | u8 *p_line, u32 length, int field_number); |
84b5dbf3 | 843 | u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f MCC |
844 | u8 sav_eav, u8 *p_buffer, u32 buffer_size); |
845 | void cx231xx_swab(u16 *from, u16 *to, u16 len); | |
e0d3bafd SD |
846 | |
847 | /* Provided by cx231xx-core.c */ | |
848 | ||
849 | u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); | |
850 | void cx231xx_queue_unusedframes(struct cx231xx *dev); | |
851 | void cx231xx_release_buffers(struct cx231xx *dev); | |
852 | ||
853 | /* read from control pipe */ | |
854 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 855 | char *buf, int len); |
e0d3bafd SD |
856 | |
857 | /* write to control pipe */ | |
858 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 859 | char *buf, int len); |
e0d3bafd SD |
860 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); |
861 | ||
b9255176 SD |
862 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
863 | struct VENDOR_REQUEST_IN *ven_req); | |
e0d3bafd | 864 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
b9255176 | 865 | struct cx231xx_i2c_xfer_data *req_data); |
e0d3bafd SD |
866 | |
867 | /* Gpio related functions */ | |
cde4362f | 868 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 869 | u8 len, u8 request, u8 direction); |
cde4362f MCC |
870 | int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); |
871 | int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); | |
e0d3bafd | 872 | int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); |
84b5dbf3 MCC |
873 | int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, |
874 | int pin_value); | |
e0d3bafd SD |
875 | |
876 | int cx231xx_gpio_i2c_start(struct cx231xx *dev); | |
877 | int cx231xx_gpio_i2c_end(struct cx231xx *dev); | |
878 | int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); | |
cde4362f | 879 | int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); |
e0d3bafd SD |
880 | int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); |
881 | int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); | |
882 | int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); | |
883 | ||
cde4362f MCC |
884 | int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); |
885 | int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); | |
e0d3bafd SD |
886 | |
887 | /* audio related functions */ | |
84b5dbf3 MCC |
888 | int cx231xx_set_audio_decoder_input(struct cx231xx *dev, |
889 | enum AUDIO_INPUT audio_input); | |
e0d3bafd SD |
890 | |
891 | int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); | |
e0d3bafd SD |
892 | int cx231xx_set_video_alternate(struct cx231xx *dev); |
893 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); | |
64fbf444 PB |
894 | int is_fw_load(struct cx231xx *dev); |
895 | int cx231xx_check_fw(struct cx231xx *dev); | |
e0d3bafd | 896 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, |
84b5dbf3 | 897 | int num_bufs, int max_pkt_size, |
cde4362f MCC |
898 | int (*isoc_copy) (struct cx231xx *dev, |
899 | struct urb *urb)); | |
64fbf444 PB |
900 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, |
901 | int num_bufs, int max_pkt_size, | |
902 | int (*bulk_copy) (struct cx231xx *dev, | |
903 | struct urb *urb)); | |
904 | void cx231xx_stop_TS1(struct cx231xx *dev); | |
905 | void cx231xx_start_TS1(struct cx231xx *dev); | |
e0d3bafd | 906 | void cx231xx_uninit_isoc(struct cx231xx *dev); |
64fbf444 | 907 | void cx231xx_uninit_bulk(struct cx231xx *dev); |
e0d3bafd | 908 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); |
64fbf444 PB |
909 | int cx231xx_unmute_audio(struct cx231xx *dev); |
910 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); | |
911 | void cx231xx_disable656(struct cx231xx *dev); | |
912 | void cx231xx_enable656(struct cx231xx *dev); | |
913 | int cx231xx_demod_reset(struct cx231xx *dev); | |
e0d3bafd SD |
914 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); |
915 | ||
916 | /* Device list functions */ | |
917 | void cx231xx_release_resources(struct cx231xx *dev); | |
918 | void cx231xx_release_analog_resources(struct cx231xx *dev); | |
919 | int cx231xx_register_analog_devices(struct cx231xx *dev); | |
920 | void cx231xx_remove_from_devlist(struct cx231xx *dev); | |
921 | void cx231xx_add_into_devlist(struct cx231xx *dev); | |
e0d3bafd SD |
922 | void cx231xx_init_extension(struct cx231xx *dev); |
923 | void cx231xx_close_extension(struct cx231xx *dev); | |
924 | ||
925 | /* hardware init functions */ | |
926 | int cx231xx_dev_init(struct cx231xx *dev); | |
927 | void cx231xx_dev_uninit(struct cx231xx *dev); | |
928 | void cx231xx_config_i2c(struct cx231xx *dev); | |
929 | int cx231xx_config(struct cx231xx *dev); | |
930 | ||
931 | /* Stream control functions */ | |
932 | int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); | |
933 | int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); | |
934 | ||
935 | int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); | |
936 | ||
937 | /* Power control functions */ | |
6e4f574b | 938 | int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); |
e0d3bafd SD |
939 | int cx231xx_power_suspend(struct cx231xx *dev); |
940 | ||
941 | /* chip specific control functions */ | |
942 | int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); | |
84b5dbf3 MCC |
943 | int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, |
944 | u8 analog_or_digital); | |
a6f6fb9c | 945 | int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3); |
e0d3bafd SD |
946 | |
947 | /* video audio decoder related functions */ | |
948 | void video_mux(struct cx231xx *dev, int index); | |
949 | int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); | |
950 | int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); | |
951 | int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); | |
952 | int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); | |
e0d3bafd SD |
953 | |
954 | /* Provided by cx231xx-video.c */ | |
955 | int cx231xx_register_extension(struct cx231xx_ops *dev); | |
956 | void cx231xx_unregister_extension(struct cx231xx_ops *dev); | |
957 | void cx231xx_init_extension(struct cx231xx *dev); | |
958 | void cx231xx_close_extension(struct cx231xx *dev); | |
959 | ||
960 | /* Provided by cx231xx-cards.c */ | |
961 | extern void cx231xx_pre_card_setup(struct cx231xx *dev); | |
962 | extern void cx231xx_card_setup(struct cx231xx *dev); | |
963 | extern struct cx231xx_board cx231xx_boards[]; | |
964 | extern struct usb_device_id cx231xx_id_table[]; | |
965 | extern const unsigned int cx231xx_bcount; | |
e0d3bafd SD |
966 | int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); |
967 | ||
64fbf444 PB |
968 | /* cx23885-417.c */ |
969 | extern int cx231xx_417_register(struct cx231xx *dev); | |
970 | extern void cx231xx_417_unregister(struct cx231xx *dev); | |
971 | ||
9ab66912 MCC |
972 | /* cx23885-input.c */ |
973 | ||
974 | #if defined(CONFIG_VIDEO_CX231XX_RC) | |
975 | int cx231xx_ir_init(struct cx231xx *dev); | |
976 | void cx231xx_ir_exit(struct cx231xx *dev); | |
977 | #else | |
978 | #define cx231xx_ir_init(dev) (0) | |
979 | #define cx231xx_ir_exit(dev) (0) | |
980 | #endif | |
981 | ||
982 | ||
e0d3bafd SD |
983 | /* printk macros */ |
984 | ||
985 | #define cx231xx_err(fmt, arg...) do {\ | |
986 | printk(KERN_ERR fmt , ##arg); } while (0) | |
987 | ||
988 | #define cx231xx_errdev(fmt, arg...) do {\ | |
989 | printk(KERN_ERR "%s: "fmt,\ | |
990 | dev->name , ##arg); } while (0) | |
991 | ||
992 | #define cx231xx_info(fmt, arg...) do {\ | |
993 | printk(KERN_INFO "%s: "fmt,\ | |
994 | dev->name , ##arg); } while (0) | |
995 | #define cx231xx_warn(fmt, arg...) do {\ | |
996 | printk(KERN_WARNING "%s: "fmt,\ | |
997 | dev->name , ##arg); } while (0) | |
998 | ||
e0d3bafd SD |
999 | static inline unsigned int norm_maxw(struct cx231xx *dev) |
1000 | { | |
1001 | if (dev->board.max_range_640_480) | |
1002 | return 640; | |
1003 | else | |
1004 | return 720; | |
1005 | } | |
1006 | ||
1007 | static inline unsigned int norm_maxh(struct cx231xx *dev) | |
1008 | { | |
1009 | if (dev->board.max_range_640_480) | |
1010 | return 480; | |
1011 | else | |
1012 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
1013 | } | |
1014 | #endif |