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[media] stv0367.c: fix compiler warning
[deliverable/linux.git] / drivers / media / video / cx23885 / altera-ci.c
CommitLineData
349bcf02
IL		 1/*
2 * altera-ci.c
3 *
4 * CI driver in conjunction with NetUp Dual DVB-T/C RF CI card
5 *
6 * Copyright (C) 2010,2011 NetUP Inc.
7 * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 *
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25/*
26 * currently cx23885 GPIO's used.
27 * GPIO-0 ~INT in
28 * GPIO-1 TMS out
29 * GPIO-2 ~reset chips out
30 * GPIO-3 to GPIO-10 data/addr for CA in/out
31 * GPIO-11 ~CS out
32 * GPIO-12 AD_RG out
33 * GPIO-13 ~WR out
34 * GPIO-14 ~RD out
35 * GPIO-15 ~RDY in
36 * GPIO-16 TCK out
37 * GPIO-17 TDO in
38 * GPIO-18 TDI out
39 */
40/*
41 * Bit definitions for MC417_RWD and MC417_OEN registers
42 * bits 31-16
43 * +-----------+
44 * | Reserved |
45 * +-----------+
46 * bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
47 * +-------+-------+-------+-------+-------+-------+-------+-------+
48 * | TDI | TDO | TCK | RDY# | #RD | #WR | AD_RG | #CS |
49 * +-------+-------+-------+-------+-------+-------+-------+-------+
50 * bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
51 * +-------+-------+-------+-------+-------+-------+-------+-------+
52 * | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
53 * +-------+-------+-------+-------+-------+-------+-------+-------+
54 */
55#include <linux/version.h>
56#include <media/videobuf-dma-sg.h>
57#include <media/videobuf-dvb.h>
58#include "altera-ci.h"
59#include "dvb_ca_en50221.h"
60
61/* FPGA regs */
62#define NETUP_CI_INT_CTRL 0x00
63#define NETUP_CI_BUSCTRL2 0x01
64#define NETUP_CI_ADDR0 0x04
65#define NETUP_CI_ADDR1 0x05
66#define NETUP_CI_DATA 0x06
67#define NETUP_CI_BUSCTRL 0x07
68#define NETUP_CI_PID_ADDR0 0x08
69#define NETUP_CI_PID_ADDR1 0x09
70#define NETUP_CI_PID_DATA 0x0a
71#define NETUP_CI_TSA_DIV 0x0c
72#define NETUP_CI_TSB_DIV 0x0d
73#define NETUP_CI_REVISION 0x0f
74
75/* const for ci op */
76#define NETUP_CI_FLG_CTL 1
77#define NETUP_CI_FLG_RD 1
78#define NETUP_CI_FLG_AD 1
79
80static unsigned int ci_dbg;
81module_param(ci_dbg, int, 0644);
82MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
83
84static unsigned int pid_dbg;
85module_param(pid_dbg, int, 0644);
86MODULE_PARM_DESC(pid_dbg, "Enable PID filtering debugging");
87
88MODULE_DESCRIPTION("altera FPGA CI module");
89MODULE_AUTHOR("Igor M. Liplianin <liplianin@netup.ru>");
90MODULE_LICENSE("GPL");
91
92#define ci_dbg_print(args...) \
93 do { \
94 if (ci_dbg) \
95 printk(KERN_DEBUG args); \
96 } while (0)
97
98#define pid_dbg_print(args...) \
99 do { \
100 if (pid_dbg) \
101 printk(KERN_DEBUG args); \
102 } while (0)
103
104struct altera_ci_state;
105struct netup_hw_pid_filter;
106
107struct fpga_internal {
108 void *dev;
109 struct mutex fpga_mutex;/* two CI's on the same fpga */
110 struct netup_hw_pid_filter *pid_filt[2];
111 struct altera_ci_state *state[2];
112 struct work_struct work;
113 int (*fpga_rw) (void *dev, int flag, int data, int rw);
114 int cis_used;
115 int filts_used;
116 int strt_wrk;
117};
118
119/* stores all private variables for communication with CI */
120struct altera_ci_state {
121 struct fpga_internal *internal;
122 struct dvb_ca_en50221 ca;
123 int status;
124 int nr;
125};
126
127/* stores all private variables for hardware pid filtering */
128struct netup_hw_pid_filter {
129 struct fpga_internal *internal;
130 struct dvb_demux *demux;
131 /* save old functions */
132 int (*start_feed)(struct dvb_demux_feed *feed);
133 int (*stop_feed)(struct dvb_demux_feed *feed);
134
135 int status;
136 int nr;
137};
138
139/* internal params node */
140struct fpga_inode {
141 /* pointer for internal params, one for each pair of CI's */
142 struct fpga_internal *internal;
143 struct fpga_inode *next_inode;
144};
145
146/* first internal params */
147static struct fpga_inode *fpga_first_inode;
148
149/* find chip by dev */
150static struct fpga_inode *find_inode(void *dev)
151{
152 struct fpga_inode *temp_chip = fpga_first_inode;
153
154 if (temp_chip == NULL)
155 return temp_chip;
156
157 /*
158 Search for the last fpga CI chip or
159 find it by dev */
160 while ((temp_chip != NULL) &&
161 (temp_chip->internal->dev != dev))
162 temp_chip = temp_chip->next_inode;
163
164 return temp_chip;
165}
166/* check demux */
167static struct fpga_internal *check_filter(struct fpga_internal *temp_int,
168 void *demux_dev, int filt_nr)
169{
170 if (temp_int == NULL)
171 return NULL;
172
173 if ((temp_int->pid_filt[filt_nr]) == NULL)
174 return NULL;
175
176 if (temp_int->pid_filt[filt_nr]->demux == demux_dev)
177 return temp_int;
178
179 return NULL;
180}
181
182/* find chip by demux */
183static struct fpga_inode *find_dinode(void *demux_dev)
184{
185 struct fpga_inode *temp_chip = fpga_first_inode;
186 struct fpga_internal *temp_int;
187
188 /*
189 * Search of the last fpga CI chip or
190 * find it by demux
191 */
192 while (temp_chip != NULL) {
193 if (temp_chip->internal != NULL) {
194 temp_int = temp_chip->internal;
195 if (check_filter(temp_int, demux_dev, 0))
196 break;
197 if (check_filter(temp_int, demux_dev, 1))
198 break;
199 }
200
201 temp_chip = temp_chip->next_inode;
202 }
203
204 return temp_chip;
205}
206
207/* deallocating chip */
208static void remove_inode(struct fpga_internal *internal)
209{
210 struct fpga_inode *prev_node = fpga_first_inode;
211 struct fpga_inode *del_node = find_inode(internal->dev);
212
213 if (del_node != NULL) {
214 if (del_node == fpga_first_inode) {
215 fpga_first_inode = del_node->next_inode;
216 } else {
217 while (prev_node->next_inode != del_node)
218 prev_node = prev_node->next_inode;
219
220 if (del_node->next_inode == NULL)
221 prev_node->next_inode = NULL;
222 else
223 prev_node->next_inode =
224 prev_node->next_inode->next_inode;
225 }
226
227 kfree(del_node);
228 }
229}
230
231/* allocating new chip */
232static struct fpga_inode *append_internal(struct fpga_internal *internal)
233{
234 struct fpga_inode *new_node = fpga_first_inode;
235
236 if (new_node == NULL) {
237 new_node = kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
238 fpga_first_inode = new_node;
239 } else {
240 while (new_node->next_inode != NULL)
241 new_node = new_node->next_inode;
242
243 new_node->next_inode =
244 kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
245 if (new_node->next_inode != NULL)
246 new_node = new_node->next_inode;
247 else
248 new_node = NULL;
249 }
250
251 if (new_node != NULL) {
252 new_node->internal = internal;
253 new_node->next_inode = NULL;
254 }
255
256 return new_node;
257}
258
259static int netup_fpga_op_rw(struct fpga_internal *inter, int addr,
260 u8 val, u8 read)
261{
262 inter->fpga_rw(inter->dev, NETUP_CI_FLG_AD, addr, 0);
263 return inter->fpga_rw(inter->dev, 0, val, read);
264}
265
266/* flag - mem/io, read - read/write */
267int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
268 u8 flag, u8 read, int addr, u8 val)
269{
270
271 struct altera_ci_state *state = en50221->data;
272 struct fpga_internal *inter = state->internal;
273
274 u8 store;
275 int mem = 0;
276
277 if (0 != slot)
278 return -EINVAL;
279
280 mutex_lock(&inter->fpga_mutex);
281
282 netup_fpga_op_rw(inter, NETUP_CI_ADDR0, ((addr << 1) & 0xfe), 0);
283 netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
284 store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
285
286 store &= 0x3f;
287 store |= ((state->nr << 7) | (flag << 6));
288
289 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
290 mem = netup_fpga_op_rw(inter, NETUP_CI_DATA, val, read);
291
292 mutex_unlock(&inter->fpga_mutex);
293
294 ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
295 (read) ? "read" : "write", addr,
296 (flag == NETUP_CI_FLG_CTL) ? "ctl" : "mem",
297 (read) ? mem : val);
298
299 return mem;
300}
301
302int altera_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
303 int slot, int addr)
304{
305 return altera_ci_op_cam(en50221, slot, 0, NETUP_CI_FLG_RD, addr, 0);
306}
307
308int altera_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
309 int slot, int addr, u8 data)
310{
311 return altera_ci_op_cam(en50221, slot, 0, 0, addr, data);
312}
313
314int altera_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
315{
316 return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL,
317 NETUP_CI_FLG_RD, addr, 0);
318}
319
320int altera_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
321 u8 addr, u8 data)
322{
323 return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL, 0, addr, data);
324}
325
326int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
327{
328 struct altera_ci_state *state = en50221->data;
329 struct fpga_internal *inter = state->internal;
330 /* reasonable timeout for CI reset is 10 seconds */
331 unsigned long t_out = jiffies + msecs_to_jiffies(9999);
332 int ret;
333
334 ci_dbg_print("%s\n", __func__);
335
336 if (0 != slot)
337 return -EINVAL;
338
339 mutex_lock(&inter->fpga_mutex);
340
341 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
342 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
343 ret | (1 << (5 - state->nr)), 0);
344
345 for (;;) {
346 mdelay(50);
347 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
348 0, NETUP_CI_FLG_RD);
349 if ((ret & (1 << (5 - state->nr))) == 0)
350 break;
351 if (time_after(jiffies, t_out))
352 break;
353 }
354
355 mutex_unlock(&inter->fpga_mutex);
356
357 ci_dbg_print("%s: %d msecs\n", __func__,
358 jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
359
360 return 0;
361}
362
363int altera_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
364{
365 /* not implemented */
366 return 0;
367}
368
369int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
370{
371 struct altera_ci_state *state = en50221->data;
372 struct fpga_internal *inter = state->internal;
373 int ret;
374
375 ci_dbg_print("%s\n", __func__);
376
377 if (0 != slot)
378 return -EINVAL;
379
380 mutex_lock(&inter->fpga_mutex);
381
382 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
383 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
384 ret | (1 << (3 - state->nr)), 0);
385
386 mutex_unlock(&inter->fpga_mutex);
387
388 return 0;
389}
390
391/* work handler */
392static void netup_read_ci_status(struct work_struct *work)
393{
394 struct fpga_internal *inter =
395 container_of(work, struct fpga_internal, work);
396 int ret;
397
398 ci_dbg_print("%s\n", __func__);
399
400 mutex_lock(&inter->fpga_mutex);
401 /* ack' irq */
402 ret = netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0, NETUP_CI_FLG_RD);
403 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
404
405 mutex_unlock(&inter->fpga_mutex);
406
407 if (inter->state[1] != NULL) {
408 inter->state[1]->status =
409 ((ret & 1) == 0 ?
410 DVB_CA_EN50221_POLL_CAM_PRESENT |
411 DVB_CA_EN50221_POLL_CAM_READY : 0);
412 ci_dbg_print("%s: setting CI[1] status = 0x%x\n",
413 __func__, inter->state[1]->status);
414 };
415
416 if (inter->state[0] != NULL) {
417 inter->state[0]->status =
418 ((ret & 2) == 0 ?
419 DVB_CA_EN50221_POLL_CAM_PRESENT |
420 DVB_CA_EN50221_POLL_CAM_READY : 0);
421 ci_dbg_print("%s: setting CI[0] status = 0x%x\n",
422 __func__, inter->state[0]->status);
423 };
424}
425
426/* CI irq handler */
427int altera_ci_irq(void *dev)
428{
429 struct fpga_inode *temp_int = NULL;
430 struct fpga_internal *inter = NULL;
431
432 ci_dbg_print("%s\n", __func__);
433
434 if (dev != NULL) {
435 temp_int = find_inode(dev);
436 if (temp_int != NULL) {
437 inter = temp_int->internal;
438 schedule_work(&inter->work);
439 }
440 }
441
442 return 1;
443}
444EXPORT_SYMBOL(altera_ci_irq);
445
446int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot,
447 int open)
448{
449 struct altera_ci_state *state = en50221->data;
450
451 if (0 != slot)
452 return -EINVAL;
453
454 return state->status;
455}
456
457void altera_hw_filt_release(void *main_dev, int filt_nr)
458{
459 struct fpga_inode *temp_int = find_inode(main_dev);
460 struct netup_hw_pid_filter *pid_filt = NULL;
461
462 ci_dbg_print("%s\n", __func__);
463
464 if (temp_int != NULL) {
465 pid_filt = temp_int->internal->pid_filt[filt_nr - 1];
466 /* stored old feed controls */
467 pid_filt->demux->start_feed = pid_filt->start_feed;
468 pid_filt->demux->stop_feed = pid_filt->stop_feed;
469
470 if (((--(temp_int->internal->filts_used)) <= 0) &&
471 ((temp_int->internal->cis_used) <= 0)) {
472
473 ci_dbg_print("%s: Actually removing\n", __func__);
474
475 remove_inode(temp_int->internal);
476 kfree(pid_filt->internal);
477 }
478
479 kfree(pid_filt);
480
481 }
482
483}
484EXPORT_SYMBOL(altera_hw_filt_release);
485
486void altera_ci_release(void *dev, int ci_nr)
487{
488 struct fpga_inode *temp_int = find_inode(dev);
489 struct altera_ci_state *state = NULL;
490
491 ci_dbg_print("%s\n", __func__);
492
493 if (temp_int != NULL) {
494 state = temp_int->internal->state[ci_nr - 1];
495 altera_hw_filt_release(dev, ci_nr);
496
497
498 if (((temp_int->internal->filts_used) <= 0) &&
499 ((--(temp_int->internal->cis_used)) <= 0)) {
500
501 ci_dbg_print("%s: Actually removing\n", __func__);
502
503 remove_inode(temp_int->internal);
504 kfree(state->internal);
505 }
506
507 if (state != NULL) {
508 if (state->ca.data != NULL)
509 dvb_ca_en50221_release(&state->ca);
510
511 kfree(state);
512 }
513 }
514
515}
516EXPORT_SYMBOL(altera_ci_release);
517
518static void altera_pid_control(struct netup_hw_pid_filter *pid_filt,
519 u16 pid, int onoff)
520{
521 struct fpga_internal *inter = pid_filt->internal;
522 u8 store = 0;
523
2f2710bd
IL		 524 /* pid 0-0x1f always enabled, don't touch them */
525 if ((pid == 0x2000) || (pid < 0x20))
349bcf02
IL		 526 return;
527
528 mutex_lock(&inter->fpga_mutex);
529
530 netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, (pid >> 3) & 0xff, 0);
531 netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
532 ((pid >> 11) & 0x03) | (pid_filt->nr << 2), 0);
533
534 store = netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, 0, NETUP_CI_FLG_RD);
535
536 if (onoff)/* 0 - on, 1 - off */
537 store |= (1 << (pid & 7));
538 else
539 store &= ~(1 << (pid & 7));
540
541 netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, store, 0);
542
543 mutex_unlock(&inter->fpga_mutex);
544
545 pid_dbg_print("%s: (%d) set pid: %5d 0x%04x '%s'\n", __func__,
546 pid_filt->nr, pid, pid, onoff ? "off" : "on");
547}
548
549static void altera_toggle_fullts_streaming(struct netup_hw_pid_filter *pid_filt,
550 int filt_nr, int onoff)
551{
552 struct fpga_internal *inter = pid_filt->internal;
553 u8 store = 0;
554 int i;
555
556 pid_dbg_print("%s: pid_filt->nr[%d] now %s\n", __func__, pid_filt->nr,
557 onoff ? "off" : "on");
558
559 if (onoff)/* 0 - on, 1 - off */
560 store = 0xff;/* ignore pid */
561 else
562 store = 0;/* enable pid */
563
564 mutex_lock(&inter->fpga_mutex);
565
566 for (i = 0; i < 1024; i++) {
567 netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, i & 0xff, 0);
568
569 netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
570 ((i >> 8) & 0x03) | (pid_filt->nr << 2), 0);
2f2710bd
IL		 571 /* pid 0-0x1f always enabled */
572 netup_fpga_op_rw(inter, NETUP_CI_PID_DATA,
573 (i > 3 ? store : 0), 0);
349bcf02
IL		 574 }
575
576 mutex_unlock(&inter->fpga_mutex);
577}
578
579int altera_pid_feed_control(void *demux_dev, int filt_nr,
580 struct dvb_demux_feed *feed, int onoff)
581{
582 struct fpga_inode *temp_int = find_dinode(demux_dev);
583 struct fpga_internal *inter = temp_int->internal;
584 struct netup_hw_pid_filter *pid_filt = inter->pid_filt[filt_nr - 1];
585
586 altera_pid_control(pid_filt, feed->pid, onoff ? 0 : 1);
587 /* call old feed proc's */
588 if (onoff)
589 pid_filt->start_feed(feed);
590 else
591 pid_filt->stop_feed(feed);
592
593 if (feed->pid == 0x2000)
594 altera_toggle_fullts_streaming(pid_filt, filt_nr,
595 onoff ? 0 : 1);
596
597 return 0;
598}
599EXPORT_SYMBOL(altera_pid_feed_control);
600
601int altera_ci_start_feed(struct dvb_demux_feed *feed, int num)
602{
603 altera_pid_feed_control(feed->demux, num, feed, 1);
604
605 return 0;
606}
607
608int altera_ci_stop_feed(struct dvb_demux_feed *feed, int num)
609{
610 altera_pid_feed_control(feed->demux, num, feed, 0);
611
612 return 0;
613}
614
615int altera_ci_start_feed_1(struct dvb_demux_feed *feed)
616{
617 return altera_ci_start_feed(feed, 1);
618}
619
620int altera_ci_stop_feed_1(struct dvb_demux_feed *feed)
621{
622 return altera_ci_stop_feed(feed, 1);
623}
624
625int altera_ci_start_feed_2(struct dvb_demux_feed *feed)
626{
627 return altera_ci_start_feed(feed, 2);
628}
629
630int altera_ci_stop_feed_2(struct dvb_demux_feed *feed)
631{
632 return altera_ci_stop_feed(feed, 2);
633}
634
635int altera_hw_filt_init(struct altera_ci_config *config, int hw_filt_nr)
636{
637 struct netup_hw_pid_filter *pid_filt = NULL;
638 struct fpga_inode *temp_int = find_inode(config->dev);
639 struct fpga_internal *inter = NULL;
640 int ret = 0;
641
642 pid_filt = kzalloc(sizeof(struct netup_hw_pid_filter), GFP_KERNEL);
643
644 ci_dbg_print("%s\n", __func__);
645
646 if (!pid_filt) {
647 ret = -ENOMEM;
648 goto err;
649 }
650
651 if (temp_int != NULL) {
652 inter = temp_int->internal;
653 (inter->filts_used)++;
654 ci_dbg_print("%s: Find Internal Structure!\n", __func__);
655 } else {
656 inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
657 if (!inter) {
658 ret = -ENOMEM;
659 goto err;
660 }
661
662 temp_int = append_internal(inter);
663 inter->filts_used = 1;
664 inter->dev = config->dev;
665 inter->fpga_rw = config->fpga_rw;
666 mutex_init(&inter->fpga_mutex);
667 inter->strt_wrk = 1;
668 ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
669 }
670
671 ci_dbg_print("%s: setting hw pid filter = 0x%x for ci = %d\n", __func__,
672 (int)pid_filt, hw_filt_nr - 1);
673 inter->pid_filt[hw_filt_nr - 1] = pid_filt;
674 pid_filt->demux = config->demux;
675 pid_filt->internal = inter;
676 pid_filt->nr = hw_filt_nr - 1;
677 /* store old feed controls */
678 pid_filt->start_feed = config->demux->start_feed;
679 pid_filt->stop_feed = config->demux->stop_feed;
680 /* replace with new feed controls */
681 if (hw_filt_nr == 1) {
682 pid_filt->demux->start_feed = altera_ci_start_feed_1;
683 pid_filt->demux->stop_feed = altera_ci_stop_feed_1;
684 } else if (hw_filt_nr == 2) {
685 pid_filt->demux->start_feed = altera_ci_start_feed_2;
686 pid_filt->demux->stop_feed = altera_ci_stop_feed_2;
687 }
688
689 altera_toggle_fullts_streaming(pid_filt, 0, 1);
690
691 return 0;
692err:
693 ci_dbg_print("%s: Can't init hardware filter: Error %d\n",
694 __func__, ret);
695
696 kfree(pid_filt);
697
698 return ret;
699}
700EXPORT_SYMBOL(altera_hw_filt_init);
701
702int altera_ci_init(struct altera_ci_config *config, int ci_nr)
703{
704 struct altera_ci_state *state;
705 struct fpga_inode *temp_int = find_inode(config->dev);
706 struct fpga_internal *inter = NULL;
707 int ret = 0;
708 u8 store = 0;
709
710 state = kzalloc(sizeof(struct altera_ci_state), GFP_KERNEL);
711
712 ci_dbg_print("%s\n", __func__);
713
714 if (!state) {
715 ret = -ENOMEM;
716 goto err;
717 }
718
719 if (temp_int != NULL) {
720 inter = temp_int->internal;
721 (inter->cis_used)++;
722 ci_dbg_print("%s: Find Internal Structure!\n", __func__);
723 } else {
724 inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
725 if (!inter) {
726 ret = -ENOMEM;
727 goto err;
728 }
729
730 temp_int = append_internal(inter);
731 inter->cis_used = 1;
732 inter->dev = config->dev;
733 inter->fpga_rw = config->fpga_rw;
734 mutex_init(&inter->fpga_mutex);
735 inter->strt_wrk = 1;
736 ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
737 }
738
739 ci_dbg_print("%s: setting state = 0x%x for ci = %d\n", __func__,
740 (int)state, ci_nr - 1);
741 inter->state[ci_nr - 1] = state;
742 state->internal = inter;
743 state->nr = ci_nr - 1;
744
745 state->ca.owner = THIS_MODULE;
746 state->ca.read_attribute_mem = altera_ci_read_attribute_mem;
747 state->ca.write_attribute_mem = altera_ci_write_attribute_mem;
748 state->ca.read_cam_control = altera_ci_read_cam_ctl;
749 state->ca.write_cam_control = altera_ci_write_cam_ctl;
750 state->ca.slot_reset = altera_ci_slot_reset;
751 state->ca.slot_shutdown = altera_ci_slot_shutdown;
752 state->ca.slot_ts_enable = altera_ci_slot_ts_ctl;
753 state->ca.poll_slot_status = altera_poll_ci_slot_status;
754 state->ca.data = state;
755
756 ret = dvb_ca_en50221_init(config->adapter,
757 &state->ca,
758 /* flags */ 0,
759 /* n_slots */ 1);
760 if (0 != ret)
761 goto err;
762
763 altera_hw_filt_init(config, ci_nr);
764
765 if (inter->strt_wrk) {
766 INIT_WORK(&inter->work, netup_read_ci_status);
767 inter->strt_wrk = 0;
768 }
769
770 ci_dbg_print("%s: CI initialized!\n", __func__);
771
772 mutex_lock(&inter->fpga_mutex);
773
774 /* Enable div */
775 netup_fpga_op_rw(inter, NETUP_CI_TSA_DIV, 0x0, 0);
776 netup_fpga_op_rw(inter, NETUP_CI_TSB_DIV, 0x0, 0);
777
778 /* enable TS out */
779 store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
780 store |= (3 << 4);
781 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
782
783 ret = netup_fpga_op_rw(inter, NETUP_CI_REVISION, 0, NETUP_CI_FLG_RD);
784 /* enable irq */
785 netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0x44, 0);
786
787 mutex_unlock(&inter->fpga_mutex);
788
789 ci_dbg_print("%s: NetUP CI Revision = 0x%x\n", __func__, ret);
790
791 schedule_work(&inter->work);
792
793 return 0;
794err:
795 ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
796
797 kfree(state);
798
799 return ret;
800}
801EXPORT_SYMBOL(altera_ci_init);
802
803int altera_ci_tuner_reset(void *dev, int ci_nr)
804{
805 struct fpga_inode *temp_int = find_inode(dev);
806 struct fpga_internal *inter = NULL;
807 u8 store;
808
809 ci_dbg_print("%s\n", __func__);
810
811 if (temp_int == NULL)
812 return -1;
813
814 if (temp_int->internal == NULL)
815 return -1;
816
817 inter = temp_int->internal;
818
819 mutex_lock(&inter->fpga_mutex);
820
821 store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
822 store &= ~(4 << (2 - ci_nr));
823 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
824 msleep(100);
825 store |= (4 << (2 - ci_nr));
826 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
827
828 mutex_unlock(&inter->fpga_mutex);
829
830 return 0;
831}
832EXPORT_SYMBOL(altera_ci_tuner_reset);
Linux kernel - Deliverables
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