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V4L/DVB: xc5000: Fix a few warnings
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
29f8a0a5 31#include "cx23888-ir.h"
d19770e5
ST		 32
33/* ------------------------------------------------------------------ */
34/* board config info */
35
36struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
c7712613
ST		 39 /* Ensure safe default for unknown boards */
40 .clk_freq = 0,
d19770e5
ST		 41 .input = {{
42 .type = CX23885_VMUX_COMPOSITE1,
43 .vmux = 0,
9c8ced51 44 }, {
d19770e5
ST		 45 .type = CX23885_VMUX_COMPOSITE2,
46 .vmux = 1,
9c8ced51 47 }, {
d19770e5
ST		 48 .type = CX23885_VMUX_COMPOSITE3,
49 .vmux = 2,
9c8ced51 50 }, {
d19770e5
ST		 51 .type = CX23885_VMUX_COMPOSITE4,
52 .vmux = 3,
9c8ced51 53 } },
d19770e5
ST		 54 },
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 57 .portc = CX23885_MPEG_DVB,
58 .input = {{
59 .type = CX23885_VMUX_TELEVISION,
60 .vmux = 0,
61 .gpio0 = 0xff00,
9c8ced51 62 }, {
d19770e5
ST		 63 .type = CX23885_VMUX_DEBUG,
64 .vmux = 0,
65 .gpio0 = 0xff01,
9c8ced51 66 }, {
d19770e5
ST		 67 .type = CX23885_VMUX_COMPOSITE1,
68 .vmux = 1,
69 .gpio0 = 0xff02,
9c8ced51 70 }, {
d19770e5
ST		 71 .type = CX23885_VMUX_SVIDEO,
72 .vmux = 2,
73 .gpio0 = 0xff02,
9c8ced51 74 } },
d19770e5
ST		 75 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
7b888014 78 .porta = CX23885_ANALOG_VIDEO,
a589b665 79 .portb = CX23885_MPEG_ENCODER,
d19770e5 80 .portc = CX23885_MPEG_DVB,
7b888014
ST		 81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 83 .input = {{
84 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 85 .vmux = CX25840_VIN7_CH3 |
86 CX25840_VIN5_CH2 |
87 CX25840_VIN2_CH1,
88 .gpio0 = 0,
9c8ced51 89 }, {
d19770e5 90 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 91 .vmux = CX25840_VIN7_CH3 |
92 CX25840_VIN4_CH2 |
93 CX25840_VIN6_CH1,
94 .gpio0 = 0,
9c8ced51 95 }, {
d19770e5 96 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 97 .vmux = CX25840_VIN7_CH3 |
98 CX25840_VIN4_CH2 |
99 CX25840_VIN8_CH1 |
100 CX25840_SVIDEO_ON,
101 .gpio0 = 0,
9c8ced51 102 } },
d19770e5 103 },
a77743bc
ST		 104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
107 .input = {{
108 .type = CX23885_VMUX_TELEVISION,
109 .vmux = 0,
110 .gpio0 = 0xff00,
9c8ced51 111 }, {
a77743bc
ST		 112 .type = CX23885_VMUX_DEBUG,
113 .vmux = 0,
114 .gpio0 = 0xff01,
9c8ced51 115 }, {
a77743bc
ST		 116 .type = CX23885_VMUX_COMPOSITE1,
117 .vmux = 1,
118 .gpio0 = 0xff02,
9c8ced51 119 }, {
a77743bc
ST		 120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = 2,
122 .gpio0 = 0xff02,
9c8ced51 123 } },
a77743bc 124 },
9bc37caa
MK		 125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
a6a3f140 127 .portb = CX23885_MPEG_DVB,
9bc37caa 128 },
d1987d55
ST		 129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
132 },
07b4a835
MK		 133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
136 },
b3ea0166
ST		 137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
140 },
a780a31c
ST		 141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
144 },
66762373
ST		 145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
148 },
335377b7
MK		 149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 151 .portb = CX23885_MPEG_DVB,
335377b7
MK		 152 .portc = CX23885_MPEG_DVB,
153 },
aef2d186
ST		 154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
158 },
4c56b04a
ST		 159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
162 },
9bb1b7e8
IL		 163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
166 },
96318d0c
IL		 167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
170 },
579943f5
IL		 171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
174 },
c9b8b04b
IL		 175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
178 },
5a23b076
IL		 179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
180 .cimax = 1,
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
184 },
2074dffa
ST		 185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 187 .portc = CX23885_MPEG_DVB,
2074dffa 188 },
d099becb
MK		 189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
192 },
19bc5796
MK		 193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
196 },
6b926eca
MK		 197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
200 },
493b7127
DW		 201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
6f0d8c02
DW		 203 .tuner_type = TUNER_XC5000,
204 .tuner_addr = 0x61,
bc1548ad 205 .porta = CX23885_ANALOG_VIDEO,
493b7127 206 .portb = CX23885_MPEG_DVB,
bc1548ad 207 .input = {
6f0d8c02
DW		 208 {
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
211 },
bc1548ad
DW		 212 {
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
215 },
216 {
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
220 },
221 {
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
224 CX25840_VIN1_CH1 |
225 CX25840_VIN6_CH2 |
226 CX25840_VIN7_CH3,
227 },
228 },
493b7127 229 },
2365b2d3
DW		 230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
6f0d8c02
DW		 232 .tuner_type = TUNER_XC5000,
233 .tuner_addr = 0x61,
bc1548ad 234 .porta = CX23885_ANALOG_VIDEO,
2365b2d3 235 .portb = CX23885_MPEG_DVB,
bc1548ad 236 .input = {
6f0d8c02
DW		 237 {
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
240 },
bc1548ad
DW		 241 {
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
244 },
245 {
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
249 },
250 {
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
253 CX25840_VIN1_CH1 |
254 CX25840_VIN6_CH2 |
255 CX25840_VIN7_CH3,
256 },
257 },
2365b2d3 258 },
13697380
ST		 259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
263 },
34e383dd
VG		 264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
267 },
aee0b24c
MK		 268 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
269 .name = "Hauppauge WinTV-HVR1290",
270 .portc = CX23885_MPEG_DVB,
271 },
ea5697fe
DW		 272 [CX23885_BOARD_MYGICA_X8558PRO] = {
273 .name = "Mygica X8558 PRO DMB-TH",
274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB,
276 },
0b32d65c
KK		 277 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
278 .name = "LEADTEK WinFast PxTV1200",
279 .porta = CX23885_ANALOG_VIDEO,
280 .tuner_type = TUNER_XC2028,
281 .tuner_addr = 0x61,
282 .input = {{
283 .type = CX23885_VMUX_TELEVISION,
284 .vmux = CX25840_VIN2_CH1 |
285 CX25840_VIN5_CH2 |
286 CX25840_NONE0_CH3,
287 }, {
288 .type = CX23885_VMUX_COMPOSITE1,
289 .vmux = CX25840_COMPOSITE1,
290 }, {
291 .type = CX23885_VMUX_SVIDEO,
292 .vmux = CX25840_SVIDEO_LUMA3 |
293 CX25840_SVIDEO_CHROMA4,
294 }, {
295 .type = CX23885_VMUX_COMPONENT,
296 .vmux = CX25840_VIN7_CH1 |
297 CX25840_VIN6_CH2 |
298 CX25840_VIN8_CH3 |
299 CX25840_COMPONENT_ON,
300 } },
301 },
d19770e5
ST		 302};
303const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
304
305/* ------------------------------------------------------------------ */
306/* PCI subsystem IDs */
307
308struct cx23885_subid cx23885_subids[] = {
309 {
310 .subvendor = 0x0070,
311 .subdevice = 0x3400,
312 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 313 }, {
d19770e5
ST		 314 .subvendor = 0x0070,
315 .subdevice = 0x7600,
316 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 317 }, {
d19770e5
ST		 318 .subvendor = 0x0070,
319 .subdevice = 0x7800,
320 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 321 }, {
d19770e5
ST		 322 .subvendor = 0x0070,
323 .subdevice = 0x7801,
324 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 325 }, {
6ccb8cfb
MK		 326 .subvendor = 0x0070,
327 .subdevice = 0x7809,
328 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 329 }, {
a77743bc
ST		 330 .subvendor = 0x0070,
331 .subdevice = 0x7911,
332 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 333 }, {
9bc37caa
MK		 334 .subvendor = 0x18ac,
335 .subdevice = 0xd500,
336 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 337 }, {
b00fff0b
MK		 338 .subvendor = 0x0070,
339 .subdevice = 0x7790,
340 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 341 }, {
d1987d55
ST		 342 .subvendor = 0x0070,
343 .subdevice = 0x7797,
344 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 345 }, {
b00fff0b
MK		 346 .subvendor = 0x0070,
347 .subdevice = 0x7710,
348 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 349 }, {
07b4a835
MK		 350 .subvendor = 0x0070,
351 .subdevice = 0x7717,
352 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 353 }, {
354 .subvendor = 0x0070,
355 .subdevice = 0x71d1,
356 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 357 }, {
358 .subvendor = 0x0070,
359 .subdevice = 0x71d3,
360 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 361 }, {
362 .subvendor = 0x0070,
363 .subdevice = 0x8101,
364 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 365 }, {
366 .subvendor = 0x0070,
367 .subdevice = 0x8010,
368 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 369 }, {
335377b7
MK		 370 .subvendor = 0x18ac,
371 .subdevice = 0xd618,
372 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 373 }, {
aef2d186
ST		 374 .subvendor = 0x18ac,
375 .subdevice = 0xdb78,
376 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 377 }, {
378 .subvendor = 0x107d,
379 .subdevice = 0x6681,
380 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 381 }, {
382 .subvendor = 0x185b,
383 .subdevice = 0xe800,
384 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 385 }, {
386 .subvendor = 0x6920,
387 .subdevice = 0x8888,
388 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 389 }, {
390 .subvendor = 0xd470,
391 .subdevice = 0x9022,
392 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 393 }, {
394 .subvendor = 0x0001,
395 .subdevice = 0x2005,
396 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 397 }, {
398 .subvendor = 0x1b55,
399 .subdevice = 0x2a2c,
400 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 401 }, {
402 .subvendor = 0x0070,
403 .subdevice = 0x2211,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 405 }, {
406 .subvendor = 0x0070,
407 .subdevice = 0x2215,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 409 }, {
410 .subvendor = 0x0070,
411 .subdevice = 0x2251,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 413 }, {
414 .subvendor = 0x0070,
415 .subdevice = 0x2291,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
417 }, {
418 .subvendor = 0x0070,
419 .subdevice = 0x2295,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 421 }, {
422 .subvendor = 0x14f1,
423 .subdevice = 0x8651,
424 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 425 }, {
426 .subvendor = 0x14f1,
427 .subdevice = 0x8657,
428 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 429 }, {
430 .subvendor = 0x0070,
431 .subdevice = 0x8541,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 433 }, {
434 .subvendor = 0x1858,
435 .subdevice = 0xe800,
436 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
aee0b24c
MK		 437 }, {
438 .subvendor = 0x0070,
439 .subdevice = 0x8551,
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
ea5697fe
DW		 441 }, {
442 .subvendor = 0x14f1,
443 .subdevice = 0x8578,
444 .card = CX23885_BOARD_MYGICA_X8558PRO,
0b32d65c
KK		 445 }, {
446 .subvendor = 0x107d,
447 .subdevice = 0x6f22,
448 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
d19770e5
ST		 449 },
450};
451const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
452
453void cx23885_card_list(struct cx23885_dev *dev)
454{
455 int i;
456
457 if (0 == dev->pci->subsystem_vendor &&
458 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 459 printk(KERN_INFO
460 "%s: Board has no valid PCIe Subsystem ID and can't\n"
461 "%s: be autodetected. Pass card=<n> insmod option\n"
462 "%s: to workaround that. Redirect complaints to the\n"
463 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 464 "%s: -- tux\n",
465 dev->name, dev->name, dev->name, dev->name, dev->name);
466 } else {
9c8ced51
ST		 467 printk(KERN_INFO
468 "%s: Your board isn't known (yet) to the driver.\n"
469 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 470 "%s: card=<n> insmod option. Updating to the latest\n"
471 "%s: version might help as well.\n",
472 dev->name, dev->name, dev->name, dev->name);
473 }
9c8ced51 474 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 475 dev->name);
476 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 477 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 478 dev->name, i, cx23885_boards[i].name);
479}
480
481static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
482{
483 struct tveeprom tv;
484
9c8ced51
ST		 485 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
486 eeprom_data);
d19770e5 487
d19770e5 488 /* Make sure we support the board model */
9c8ced51 489 switch (tv.model) {
5308cf09
MK		 490 case 22001:
491 /* WinTV-HVR1270 (PCIe, Retail, half height)
492 * ATSC/QAM and basic analog, IR Blast */
493 case 22009:
494 /* WinTV-HVR1210 (PCIe, Retail, half height)
495 * DVB-T and basic analog, IR Blast */
496 case 22011:
497 /* WinTV-HVR1270 (PCIe, Retail, half height)
498 * ATSC/QAM and basic analog, IR Recv */
499 case 22019:
500 /* WinTV-HVR1210 (PCIe, Retail, half height)
501 * DVB-T and basic analog, IR Recv */
502 case 22021:
503 /* WinTV-HVR1275 (PCIe, Retail, half height)
504 * ATSC/QAM and basic analog, IR Recv */
505 case 22029:
506 /* WinTV-HVR1210 (PCIe, Retail, half height)
507 * DVB-T and basic analog, IR Recv */
508 case 22101:
509 /* WinTV-HVR1270 (PCIe, Retail, full height)
510 * ATSC/QAM and basic analog, IR Blast */
511 case 22109:
512 /* WinTV-HVR1210 (PCIe, Retail, full height)
513 * DVB-T and basic analog, IR Blast */
514 case 22111:
515 /* WinTV-HVR1270 (PCIe, Retail, full height)
516 * ATSC/QAM and basic analog, IR Recv */
517 case 22119:
518 /* WinTV-HVR1210 (PCIe, Retail, full height)
519 * DVB-T and basic analog, IR Recv */
520 case 22121:
521 /* WinTV-HVR1275 (PCIe, Retail, full height)
522 * ATSC/QAM and basic analog, IR Recv */
523 case 22129:
524 /* WinTV-HVR1210 (PCIe, Retail, full height)
525 * DVB-T and basic analog, IR Recv */
36396c89
MK		 526 case 71009:
527 /* WinTV-HVR1200 (PCIe, Retail, full height)
528 * DVB-T and basic analog */
529 case 71359:
530 /* WinTV-HVR1200 (PCIe, OEM, half height)
531 * DVB-T and basic analog */
532 case 71439:
533 /* WinTV-HVR1200 (PCIe, OEM, half height)
534 * DVB-T and basic analog */
535 case 71449:
536 /* WinTV-HVR1200 (PCIe, OEM, full height)
537 * DVB-T and basic analog */
538 case 71939:
539 /* WinTV-HVR1200 (PCIe, OEM, half height)
540 * DVB-T and basic analog */
541 case 71949:
542 /* WinTV-HVR1200 (PCIe, OEM, full height)
543 * DVB-T and basic analog */
544 case 71959:
545 /* WinTV-HVR1200 (PCIe, OEM, full height)
546 * DVB-T and basic analog */
547 case 71979:
548 /* WinTV-HVR1200 (PCIe, OEM, half height)
549 * DVB-T and basic analog */
550 case 71999:
551 /* WinTV-HVR1200 (PCIe, OEM, full height)
552 * DVB-T and basic analog */
9c8ced51
ST		 553 case 76601:
554 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
555 channel ATSC and MPEG2 HW Encoder */
556 case 77001:
557 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
558 and Basic analog */
559 case 77011:
560 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
561 and Basic analog */
562 case 77041:
563 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
564 and Basic analog */
565 case 77051:
566 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
567 and Basic analog */
568 case 78011:
569 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
570 Dual channel ATSC and MPEG2 HW Encoder */
571 case 78501:
572 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
573 Dual channel ATSC and MPEG2 HW Encoder */
574 case 78521:
575 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
576 Dual channel ATSC and MPEG2 HW Encoder */
577 case 78531:
578 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
579 Dual channel ATSC and MPEG2 HW Encoder */
580 case 78631:
581 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
582 Dual channel ATSC and MPEG2 HW Encoder */
583 case 79001:
584 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
585 ATSC and Basic analog */
586 case 79101:
587 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
588 ATSC and Basic analog */
589 case 79561:
590 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
591 ATSC and Basic analog */
592 case 79571:
593 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
594 ATSC and Basic analog */
595 case 79671:
596 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
597 ATSC and Basic analog */
66762373
ST		 598 case 80019:
599 /* WinTV-HVR1400 (Express Card, Retail, IR,
600 * DVB-T and Basic analog */
36396c89
MK		 601 case 81509:
602 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
603 * DVB-T and MPEG2 HW Encoder */
a780a31c 604 case 81519:
36396c89 605 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 606 * DVB-T and MPEG2 HW Encoder */
d19770e5 607 break;
13697380 608 case 85021:
73a5f419 609 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
13697380
ST		 610 Dual channel ATSC and MPEG2 HW Encoder */
611 break;
73a5f419
MK		 612 case 85721:
613 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
614 Dual channel ATSC and Basic analog */
615 break;
d19770e5 616 default:
13697380
ST		 617 printk(KERN_WARNING "%s: warning: "
618 "unknown hauppauge model #%d\n",
9c8ced51 619 dev->name, tv.model);
d19770e5
ST		 620 break;
621 }
622
623 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
624 dev->name, tv.model);
625}
626
d7cba043 627int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 628{
89ce2216
ST		 629 struct cx23885_tsport *port = priv;
630 struct cx23885_dev *dev = port->dev;
6df51690
ST		 631 u32 bitmask = 0;
632
89ce2216
ST		 633 if (command == XC2028_RESET_CLK)
634 return 0;
635
6df51690
ST		 636 if (command != 0) {
637 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
638 __func__, command);
639 return -EINVAL;
640 }
8c70017f 641
9c8ced51 642 switch (dev->board) {
90a71b1c
ST		 643 case CX23885_BOARD_HAUPPAUGE_HVR1400:
644 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 645 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 646 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 647 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 648 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
0b32d65c 649 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
90a71b1c 650 /* Tuner Reset Command */
4c56b04a 651 bitmask = 0x04;
6df51690
ST		 652 break;
653 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 654 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 655 /* Two identical tuners on two different i2c buses,
656 * we need to reset the correct gpio. */
d4dc673d 657 if (port->nr == 1)
4c56b04a 658 bitmask = 0x01;
d4dc673d 659 else if (port->nr == 2)
4c56b04a 660 bitmask = 0x04;
8c70017f
ST		 661 break;
662 }
663
6df51690
ST		 664 if (bitmask) {
665 /* Drive the tuner into reset and back out */
666 cx_clear(GP0_IO, bitmask);
667 mdelay(200);
668 cx_set(GP0_IO, bitmask);
669 }
670
671 return 0;
8c70017f 672}
73c993a8 673
a6a3f140
ST		 674void cx23885_gpio_setup(struct cx23885_dev *dev)
675{
9c8ced51 676 switch (dev->board) {
a6a3f140
ST		 677 case CX23885_BOARD_HAUPPAUGE_HVR1250:
678 /* GPIO-0 cx24227 demodulator reset */
679 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
680 break;
07b4a835
MK		 681 case CX23885_BOARD_HAUPPAUGE_HVR1500:
682 /* GPIO-0 cx24227 demodulator */
683 /* GPIO-2 xc3028 tuner */
684
685 /* Put the parts into reset */
686 cx_set(GP0_IO, 0x00050000);
687 cx_clear(GP0_IO, 0x00000005);
688 msleep(5);
689
690 /* Bring the parts out of reset */
691 cx_set(GP0_IO, 0x00050005);
692 break;
d1987d55
ST		 693 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
694 /* GPIO-0 cx24227 demodulator reset */
695 /* GPIO-2 xc5000 tuner reset */
696 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
697 break;
a6a3f140
ST		 698 case CX23885_BOARD_HAUPPAUGE_HVR1800:
699 /* GPIO-0 656_CLK */
700 /* GPIO-1 656_D0 */
701 /* GPIO-2 8295A Reset */
702 /* GPIO-3-10 cx23417 data0-7 */
703 /* GPIO-11-14 cx23417 addr0-3 */
704 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
705 /* GPIO-19 IR_RX */
3ba71d21 706
a589b665
ST		 707 /* CX23417 GPIO's */
708 /* EIO15 Zilog Reset */
709 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 710 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
711
712 /* Put the demod into reset and protect the eeprom */
713 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
714 mdelay(100);
715
716 /* Bring the demod and blaster out of reset */
717 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
718 mdelay(100);
a589b665 719
5206d6ec 720 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 721 cx23885_gpio_enable(dev, GPIO_2, 1);
722 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 723 mdelay(20);
21ff3e4f 724 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 725 mdelay(20);
21ff3e4f 726 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 727 mdelay(20);
a6a3f140 728 break;
b3ea0166
ST		 729 case CX23885_BOARD_HAUPPAUGE_HVR1200:
730 /* GPIO-0 tda10048 demodulator reset */
731 /* GPIO-2 tda18271 tuner reset */
732
a780a31c
ST		 733 /* Put the parts into reset and back */
734 cx_set(GP0_IO, 0x00050000);
735 mdelay(20);
736 cx_clear(GP0_IO, 0x00000005);
737 mdelay(20);
738 cx_set(GP0_IO, 0x00050005);
739 break;
740 case CX23885_BOARD_HAUPPAUGE_HVR1700:
741 /* GPIO-0 TDA10048 demodulator reset */
742 /* GPIO-2 TDA8295A Reset */
743 /* GPIO-3-10 cx23417 data0-7 */
744 /* GPIO-11-14 cx23417 addr0-3 */
745 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
746
747 /* The following GPIO's are on the interna AVCore (cx25840) */
748 /* GPIO-19 IR_RX */
749 /* GPIO-20 IR_TX 416/DVBT Select */
750 /* GPIO-21 IIS DAT */
751 /* GPIO-22 IIS WCLK */
752 /* GPIO-23 IIS BCLK */
753
66762373
ST		 754 /* Put the parts into reset and back */
755 cx_set(GP0_IO, 0x00050000);
756 mdelay(20);
757 cx_clear(GP0_IO, 0x00000005);
758 mdelay(20);
759 cx_set(GP0_IO, 0x00050005);
760 break;
761 case CX23885_BOARD_HAUPPAUGE_HVR1400:
762 /* GPIO-0 Dibcom7000p demodulator reset */
763 /* GPIO-2 xc3028L tuner reset */
764 /* GPIO-13 LED */
765
b3ea0166
ST		 766 /* Put the parts into reset and back */
767 cx_set(GP0_IO, 0x00050000);
768 mdelay(20);
769 cx_clear(GP0_IO, 0x00000005);
770 mdelay(20);
771 cx_set(GP0_IO, 0x00050005);
772 break;
1ecc5aed
ST		 773 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
774 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
775 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
776 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
777 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
778
aef2d186
ST		 779 /* Put the parts into reset and back */
780 cx_set(GP0_IO, 0x000f0000);
781 mdelay(20);
782 cx_clear(GP0_IO, 0x0000000f);
783 mdelay(20);
784 cx_set(GP0_IO, 0x000f000f);
785 break;
786 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
787 /* GPIO-0 portb xc3028 reset */
788 /* GPIO-1 portb zl10353 reset */
789 /* GPIO-2 portc xc3028 reset */
790 /* GPIO-3 portc zl10353 reset */
791
1ecc5aed
ST		 792 /* Put the parts into reset and back */
793 cx_set(GP0_IO, 0x000f0000);
794 mdelay(20);
795 cx_clear(GP0_IO, 0x0000000f);
796 mdelay(20);
797 cx_set(GP0_IO, 0x000f000f);
798 break;
4c56b04a 799 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 800 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 801 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
0b32d65c 802 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
4c56b04a
ST		 803 /* GPIO-2 xc3028 tuner reset */
804
805 /* The following GPIO's are on the internal AVCore (cx25840) */
806 /* GPIO-? zl10353 demod reset */
807
808 /* Put the parts into reset and back */
809 cx_set(GP0_IO, 0x00040000);
810 mdelay(20);
811 cx_clear(GP0_IO, 0x00000004);
812 mdelay(20);
813 cx_set(GP0_IO, 0x00040004);
814 break;
96318d0c
IL		 815 case CX23885_BOARD_TBS_6920:
816 cx_write(MC417_CTL, 0x00000036);
817 cx_write(MC417_OEN, 0x00001000);
09ea33e5
IL		 818 cx_set(MC417_RWD, 0x00000002);
819 mdelay(200);
820 cx_clear(MC417_RWD, 0x00000800);
821 mdelay(200);
822 cx_set(MC417_RWD, 0x00000800);
823 mdelay(200);
96318d0c 824 break;
5a23b076
IL		 825 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
826 /* GPIO-0 INTA from CiMax1
827 GPIO-1 INTB from CiMax2
828 GPIO-2 reset chips
829 GPIO-3 to GPIO-10 data/addr for CA
830 GPIO-11 ~CS0 to CiMax1
831 GPIO-12 ~CS1 to CiMax2
832 GPIO-13 ADL0 load LSB addr
833 GPIO-14 ADL1 load MSB addr
834 GPIO-15 ~RDY from CiMax
835 GPIO-17 ~RD to CiMax
836 GPIO-18 ~WR to CiMax
837 */
838 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
839 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
840 cx_clear(GP0_IO, 0x00030004);
841 mdelay(100);/* reset delay */
842 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
843 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
844 /* GPIO-15 IN as ~ACK, rest as OUT */
845 cx_write(MC417_OEN, 0x00001000);
846 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
847 cx_write(MC417_RWD, 0x0000c300);
848 /* enable irq */
849 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
850 break;
2074dffa 851 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 852 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 853 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 854 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 855 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 856 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
857 /* GPIO-9 Demod reset */
2074dffa
ST		 858
859 /* Put the parts into reset and back */
d099becb
MK		 860 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
861 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 862 cx23885_gpio_clear(dev, GPIO_9);
863 mdelay(20);
864 cx23885_gpio_set(dev, GPIO_9);
865 break;
493b7127 866 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 867 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
8e069bb9 868 /* GPIO-0 (0)Analog / (1)Digital TV */
493b7127 869 /* GPIO-1 reset XC5000 */
2365b2d3 870 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
8e069bb9
DW		 871 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
872 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
493b7127 873 mdelay(100);
8e069bb9 874 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
493b7127
DW		 875 mdelay(100);
876 break;
ea5697fe
DW		 877 case CX23885_BOARD_MYGICA_X8558PRO:
878 /* GPIO-0 reset first ATBM8830 */
879 /* GPIO-1 reset second ATBM8830 */
880 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
881 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
882 mdelay(100);
883 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
884 mdelay(100);
885 break;
13697380 886 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 887 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 888 /* GPIO-0 656_CLK */
889 /* GPIO-1 656_D0 */
890 /* GPIO-2 Wake# */
891 /* GPIO-3-10 cx23417 data0-7 */
892 /* GPIO-11-14 cx23417 addr0-3 */
893 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
894 /* GPIO-19 IR_RX */
895 /* GPIO-20 C_IR_TX */
896 /* GPIO-21 I2S DAT */
897 /* GPIO-22 I2S WCLK */
898 /* GPIO-23 I2S BCLK */
899 /* ALT GPIO: EXP GPIO LATCH */
900
901 /* CX23417 GPIO's */
902 /* GPIO-14 S5H1411/CX24228 Reset */
903 /* GPIO-13 EEPROM write protect */
904 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
905
906 /* Put the demod into reset and protect the eeprom */
907 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
908 mdelay(100);
909
910 /* Bring the demod out of reset */
911 mc417_gpio_set(dev, GPIO_14);
912 mdelay(100);
913
914 /* CX24228 GPIO */
915 /* Connected to IF / Mux */
916 break;
a6a3f140
ST		 917 }
918}
919
920int cx23885_ir_init(struct cx23885_dev *dev)
921{
29f8a0a5 922 int ret = 0;
a6a3f140
ST		 923 switch (dev->board) {
924 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 925 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 926 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 927 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 928 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 929 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 930 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 931 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 932 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 933 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 934 /* FIXME: Implement me */
935 break;
29f8a0a5 936 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 937 case CX23885_BOARD_HAUPPAUGE_HVR1290:
29f8a0a5
AW		 938 ret = cx23888_ir_probe(dev);
939 if (ret)
940 break;
941 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
f59ad611 942 dev->pci_irqmask |= PCI_MSK_IR;
29f8a0a5 943 break;
12886871
ST		 944 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
945 request_module("ir-kbd-i2c");
946 break;
a6a3f140
ST		 947 }
948
29f8a0a5 949 return ret;
a6a3f140
ST		 950}
951
f59ad611
AW		 952void cx23885_ir_fini(struct cx23885_dev *dev)
953{
954 switch (dev->board) {
955 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 956 case CX23885_BOARD_HAUPPAUGE_HVR1290:
f59ad611
AW		 957 dev->pci_irqmask &= ~PCI_MSK_IR;
958 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
959 cx23888_ir_remove(dev);
960 dev->sd_ir = NULL;
961 break;
962 }
963}
964
965void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
966{
967 switch (dev->board) {
968 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 969 case CX23885_BOARD_HAUPPAUGE_HVR1290:
f59ad611
AW		 970 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
971 cx_set(PCI_INT_MSK, PCI_MSK_IR);
972 break;
973 }
974}
975
d19770e5
ST		 976void cx23885_card_setup(struct cx23885_dev *dev)
977{
a6a3f140
ST		 978 struct cx23885_tsport *ts1 = &dev->ts1;
979 struct cx23885_tsport *ts2 = &dev->ts2;
980
d19770e5
ST		 981 static u8 eeprom[256];
982
983 if (dev->i2c_bus[0].i2c_rc == 0) {
984 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 985 tveeprom_read(&dev->i2c_bus[0].i2c_client,
986 eeprom, sizeof(eeprom));
d19770e5
ST		 987 }
988
989 switch (dev->board) {
a77743bc 990 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 991 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 992 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 993 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 994 if (dev->i2c_bus[0].i2c_rc == 0)
995 hauppauge_eeprom(dev, eeprom+0x80);
996 break;
d19770e5
ST		 997 case CX23885_BOARD_HAUPPAUGE_HVR1800:
998 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 999 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1000 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 1001 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1002 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1003 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 1004 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 1005 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 1006 case CX23885_BOARD_HAUPPAUGE_HVR1290:
d19770e5 1007 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 1008 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 1009 break;
1010 }
a6a3f140
ST		 1011
1012 switch (dev->board) {
335377b7 1013 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 1014 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 1015 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1016 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1017 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1018 /* break omitted intentionally */
a6a3f140
ST		 1019 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1020 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1021 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1022 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1023 break;
a589b665
ST		 1024 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1025 /* Defaults for VID B - Analog encoder */
1026 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1027 ts1->gen_ctrl_val = 0x10e;
1028 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1029 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1030
1031 /* APB_TSVALERR_POL (active low)*/
1032 ts1->vld_misc_val = 0x2000;
1033 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1034
1035 /* Defaults for VID C */
1036 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1037 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1038 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c
IL		 1039 break;
1040 case CX23885_BOARD_TBS_6920:
09ea33e5
IL		 1041 ts1->gen_ctrl_val = 0x4; /* Parallel */
1042 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1043 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1044 break;
1045 case CX23885_BOARD_TEVII_S470:
c9b8b04b 1046 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 1047 ts1->gen_ctrl_val = 0x5; /* Parallel */
1048 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1049 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 1050 break;
5a23b076
IL		 1051 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1052 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1053 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1054 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1055 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1056 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1057 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1058 break;
493b7127 1059 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 1060 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 1061 ts1->gen_ctrl_val = 0x5; /* Parallel */
1062 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1063 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1064 break;
ea5697fe
DW		 1065 case CX23885_BOARD_MYGICA_X8558PRO:
1066 ts1->gen_ctrl_val = 0x5; /* Parallel */
1067 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1068 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1069 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1070 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1071 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1072 break;
a6a3f140 1073 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 1074 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 1075 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 1076 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 1077 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1078 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 1079 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 1080 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1081 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 1082 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1083 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1084 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 1085 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 1086 case CX23885_BOARD_HAUPPAUGE_HVR1850:
34e383dd 1087 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
aee0b24c 1088 case CX23885_BOARD_HAUPPAUGE_HVR1290:
a6a3f140
ST		 1089 default:
1090 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1091 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1092 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1093 }
1094
ce89cfb4
ST		 1095 /* Certain boards support analog, or require the avcore to be
1096 * loaded, ensure this happens.
1097 */
1098 switch (dev->board) {
1099 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1100 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1101 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 1102 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1103 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 1104 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
34e383dd 1105 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
c6b7053b 1106 case CX23885_BOARD_HAUPPAUGE_HVR1850:
bc1548ad
DW		 1107 case CX23885_BOARD_MYGICA_X8506:
1108 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
aee0b24c 1109 case CX23885_BOARD_HAUPPAUGE_HVR1290:
0b32d65c 1110 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
e6574f2f
HV		 1111 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1112 &dev->i2c_bus[2].i2c_adap,
53dacb15 1113 "cx25840", "cx25840", 0x88 >> 1, NULL);
cc26b076 1114 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 1115 break;
1116 }
5a23b076
IL		 1117
1118 /* AUX-PLL 27MHz CLK */
1119 switch (dev->board) {
1120 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1121 netup_initialize(dev);
1122 break;
1123 }
d19770e5
ST		 1124}
1125
1126/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
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