V4L/DVB (11879): Adds support for Leadtek WinFast DTV-1800H
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST
27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
d19770e5
ST
31
32/* ------------------------------------------------------------------ */
33/* board config info */
34
35struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
c7712613
ST
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
d19770e5
ST
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
9c8ced51 43 }, {
d19770e5
ST
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
9c8ced51 46 }, {
d19770e5
ST
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
9c8ced51 49 }, {
d19770e5
ST
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
9c8ced51 52 } },
d19770e5
ST
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
9c8ced51 61 }, {
d19770e5
ST
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
9c8ced51 65 }, {
d19770e5
ST
66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
9c8ced51 69 }, {
d19770e5
ST
70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
9c8ced51 73 } },
d19770e5
ST
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
7b888014 77 .porta = CX23885_ANALOG_VIDEO,
a589b665 78 .portb = CX23885_MPEG_ENCODER,
d19770e5 79 .portc = CX23885_MPEG_DVB,
7b888014
ST
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
7b888014
ST
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
9c8ced51 88 }, {
d19770e5 89 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
9c8ced51 94 }, {
d19770e5 95 .type = CX23885_VMUX_SVIDEO,
7b888014
ST
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
9c8ced51 101 } },
d19770e5 102 },
a77743bc
ST
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
9c8ced51 110 }, {
a77743bc
ST
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
9c8ced51 114 }, {
a77743bc
ST
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
9c8ced51 118 }, {
a77743bc
ST
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
9c8ced51 122 } },
a77743bc 123 },
9bc37caa
MK
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
a6a3f140 126 .portb = CX23885_MPEG_DVB,
9bc37caa 127 },
d1987d55
ST
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
07b4a835
MK
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
b3ea0166
ST
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
a780a31c
ST
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
66762373
ST
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
335377b7
MK
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 150 .portb = CX23885_MPEG_DVB,
335377b7
MK
151 .portc = CX23885_MPEG_DVB,
152 },
aef2d186
ST
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
4c56b04a
ST
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
9bb1b7e8
IL
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
96318d0c
IL
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
579943f5
IL
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
c9b8b04b
IL
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
5a23b076
IL
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
2074dffa
ST
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 186 .portc = CX23885_MPEG_DVB,
2074dffa 187 },
d099becb
MK
188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
19bc5796
MK
192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
6b926eca
MK
196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
d19770e5
ST
200};
201const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
202
203/* ------------------------------------------------------------------ */
204/* PCI subsystem IDs */
205
206struct cx23885_subid cx23885_subids[] = {
207 {
208 .subvendor = 0x0070,
209 .subdevice = 0x3400,
210 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 211 }, {
d19770e5
ST
212 .subvendor = 0x0070,
213 .subdevice = 0x7600,
214 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 215 }, {
d19770e5
ST
216 .subvendor = 0x0070,
217 .subdevice = 0x7800,
218 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 219 }, {
d19770e5
ST
220 .subvendor = 0x0070,
221 .subdevice = 0x7801,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 223 }, {
6ccb8cfb
MK
224 .subvendor = 0x0070,
225 .subdevice = 0x7809,
226 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 227 }, {
a77743bc
ST
228 .subvendor = 0x0070,
229 .subdevice = 0x7911,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 231 }, {
9bc37caa
MK
232 .subvendor = 0x18ac,
233 .subdevice = 0xd500,
234 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 235 }, {
b00fff0b
MK
236 .subvendor = 0x0070,
237 .subdevice = 0x7790,
238 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 239 }, {
d1987d55
ST
240 .subvendor = 0x0070,
241 .subdevice = 0x7797,
242 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 243 }, {
b00fff0b
MK
244 .subvendor = 0x0070,
245 .subdevice = 0x7710,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 247 }, {
07b4a835
MK
248 .subvendor = 0x0070,
249 .subdevice = 0x7717,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST
251 }, {
252 .subvendor = 0x0070,
253 .subdevice = 0x71d1,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK
255 }, {
256 .subvendor = 0x0070,
257 .subdevice = 0x71d3,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST
259 }, {
260 .subvendor = 0x0070,
261 .subdevice = 0x8101,
262 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST
263 }, {
264 .subvendor = 0x0070,
265 .subdevice = 0x8010,
266 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 267 }, {
335377b7
MK
268 .subvendor = 0x18ac,
269 .subdevice = 0xd618,
270 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 271 }, {
aef2d186
ST
272 .subvendor = 0x18ac,
273 .subdevice = 0xdb78,
274 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST
275 }, {
276 .subvendor = 0x107d,
277 .subdevice = 0x6681,
278 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL
279 }, {
280 .subvendor = 0x185b,
281 .subdevice = 0xe800,
282 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL
283 }, {
284 .subvendor = 0x6920,
285 .subdevice = 0x8888,
286 .card = CX23885_BOARD_TBS_6920,
579943f5
IL
287 }, {
288 .subvendor = 0xd470,
289 .subdevice = 0x9022,
290 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL
291 }, {
292 .subvendor = 0x0001,
293 .subdevice = 0x2005,
294 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL
295 }, {
296 .subvendor = 0x1b55,
297 .subdevice = 0x2a2c,
298 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST
299 }, {
300 .subvendor = 0x0070,
301 .subdevice = 0x2211,
302 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK
303 }, {
304 .subvendor = 0x0070,
305 .subdevice = 0x2215,
306 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK
307 }, {
308 .subvendor = 0x0070,
309 .subdevice = 0x2251,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK
311 }, {
312 .subvendor = 0x0070,
313 .subdevice = 0x2291,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
315 }, {
316 .subvendor = 0x0070,
317 .subdevice = 0x2295,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
d19770e5
ST
319 },
320};
321const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
322
323void cx23885_card_list(struct cx23885_dev *dev)
324{
325 int i;
326
327 if (0 == dev->pci->subsystem_vendor &&
328 0 == dev->pci->subsystem_device) {
9c8ced51
ST
329 printk(KERN_INFO
330 "%s: Board has no valid PCIe Subsystem ID and can't\n"
331 "%s: be autodetected. Pass card=<n> insmod option\n"
332 "%s: to workaround that. Redirect complaints to the\n"
333 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST
334 "%s: -- tux\n",
335 dev->name, dev->name, dev->name, dev->name, dev->name);
336 } else {
9c8ced51
ST
337 printk(KERN_INFO
338 "%s: Your board isn't known (yet) to the driver.\n"
339 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST
340 "%s: card=<n> insmod option. Updating to the latest\n"
341 "%s: version might help as well.\n",
342 dev->name, dev->name, dev->name, dev->name);
343 }
9c8ced51 344 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST
345 dev->name);
346 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 347 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST
348 dev->name, i, cx23885_boards[i].name);
349}
350
351static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
352{
353 struct tveeprom tv;
354
9c8ced51
ST
355 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
356 eeprom_data);
d19770e5 357
d19770e5 358 /* Make sure we support the board model */
9c8ced51 359 switch (tv.model) {
5308cf09
MK
360 case 22001:
361 /* WinTV-HVR1270 (PCIe, Retail, half height)
362 * ATSC/QAM and basic analog, IR Blast */
363 case 22009:
364 /* WinTV-HVR1210 (PCIe, Retail, half height)
365 * DVB-T and basic analog, IR Blast */
366 case 22011:
367 /* WinTV-HVR1270 (PCIe, Retail, half height)
368 * ATSC/QAM and basic analog, IR Recv */
369 case 22019:
370 /* WinTV-HVR1210 (PCIe, Retail, half height)
371 * DVB-T and basic analog, IR Recv */
372 case 22021:
373 /* WinTV-HVR1275 (PCIe, Retail, half height)
374 * ATSC/QAM and basic analog, IR Recv */
375 case 22029:
376 /* WinTV-HVR1210 (PCIe, Retail, half height)
377 * DVB-T and basic analog, IR Recv */
378 case 22101:
379 /* WinTV-HVR1270 (PCIe, Retail, full height)
380 * ATSC/QAM and basic analog, IR Blast */
381 case 22109:
382 /* WinTV-HVR1210 (PCIe, Retail, full height)
383 * DVB-T and basic analog, IR Blast */
384 case 22111:
385 /* WinTV-HVR1270 (PCIe, Retail, full height)
386 * ATSC/QAM and basic analog, IR Recv */
387 case 22119:
388 /* WinTV-HVR1210 (PCIe, Retail, full height)
389 * DVB-T and basic analog, IR Recv */
390 case 22121:
391 /* WinTV-HVR1275 (PCIe, Retail, full height)
392 * ATSC/QAM and basic analog, IR Recv */
393 case 22129:
394 /* WinTV-HVR1210 (PCIe, Retail, full height)
395 * DVB-T and basic analog, IR Recv */
36396c89
MK
396 case 71009:
397 /* WinTV-HVR1200 (PCIe, Retail, full height)
398 * DVB-T and basic analog */
399 case 71359:
400 /* WinTV-HVR1200 (PCIe, OEM, half height)
401 * DVB-T and basic analog */
402 case 71439:
403 /* WinTV-HVR1200 (PCIe, OEM, half height)
404 * DVB-T and basic analog */
405 case 71449:
406 /* WinTV-HVR1200 (PCIe, OEM, full height)
407 * DVB-T and basic analog */
408 case 71939:
409 /* WinTV-HVR1200 (PCIe, OEM, half height)
410 * DVB-T and basic analog */
411 case 71949:
412 /* WinTV-HVR1200 (PCIe, OEM, full height)
413 * DVB-T and basic analog */
414 case 71959:
415 /* WinTV-HVR1200 (PCIe, OEM, full height)
416 * DVB-T and basic analog */
417 case 71979:
418 /* WinTV-HVR1200 (PCIe, OEM, half height)
419 * DVB-T and basic analog */
420 case 71999:
421 /* WinTV-HVR1200 (PCIe, OEM, full height)
422 * DVB-T and basic analog */
9c8ced51
ST
423 case 76601:
424 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
425 channel ATSC and MPEG2 HW Encoder */
426 case 77001:
427 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
428 and Basic analog */
429 case 77011:
430 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
431 and Basic analog */
432 case 77041:
433 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
434 and Basic analog */
435 case 77051:
436 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
437 and Basic analog */
438 case 78011:
439 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
440 Dual channel ATSC and MPEG2 HW Encoder */
441 case 78501:
442 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
443 Dual channel ATSC and MPEG2 HW Encoder */
444 case 78521:
445 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
446 Dual channel ATSC and MPEG2 HW Encoder */
447 case 78531:
448 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
449 Dual channel ATSC and MPEG2 HW Encoder */
450 case 78631:
451 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
452 Dual channel ATSC and MPEG2 HW Encoder */
453 case 79001:
454 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
455 ATSC and Basic analog */
456 case 79101:
457 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
458 ATSC and Basic analog */
459 case 79561:
460 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
461 ATSC and Basic analog */
462 case 79571:
463 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
464 ATSC and Basic analog */
465 case 79671:
466 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
467 ATSC and Basic analog */
66762373
ST
468 case 80019:
469 /* WinTV-HVR1400 (Express Card, Retail, IR,
470 * DVB-T and Basic analog */
36396c89
MK
471 case 81509:
472 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
473 * DVB-T and MPEG2 HW Encoder */
a780a31c 474 case 81519:
36396c89 475 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 476 * DVB-T and MPEG2 HW Encoder */
d19770e5
ST
477 break;
478 default:
9c8ced51
ST
479 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
480 dev->name, tv.model);
d19770e5
ST
481 break;
482 }
483
484 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
485 dev->name, tv.model);
486}
487
d7cba043 488int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 489{
89ce2216
ST
490 struct cx23885_tsport *port = priv;
491 struct cx23885_dev *dev = port->dev;
6df51690
ST
492 u32 bitmask = 0;
493
89ce2216
ST
494 if (command == XC2028_RESET_CLK)
495 return 0;
496
6df51690
ST
497 if (command != 0) {
498 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
499 __func__, command);
500 return -EINVAL;
501 }
8c70017f 502
9c8ced51 503 switch (dev->board) {
90a71b1c
ST
504 case CX23885_BOARD_HAUPPAUGE_HVR1400:
505 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 506 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 507 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 508 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
90a71b1c 509 /* Tuner Reset Command */
4c56b04a 510 bitmask = 0x04;
6df51690
ST
511 break;
512 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 513 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST
514 /* Two identical tuners on two different i2c buses,
515 * we need to reset the correct gpio. */
d4dc673d 516 if (port->nr == 1)
4c56b04a 517 bitmask = 0x01;
d4dc673d 518 else if (port->nr == 2)
4c56b04a 519 bitmask = 0x04;
8c70017f
ST
520 break;
521 }
522
6df51690
ST
523 if (bitmask) {
524 /* Drive the tuner into reset and back out */
525 cx_clear(GP0_IO, bitmask);
526 mdelay(200);
527 cx_set(GP0_IO, bitmask);
528 }
529
530 return 0;
8c70017f 531}
73c993a8 532
a6a3f140
ST
533void cx23885_gpio_setup(struct cx23885_dev *dev)
534{
9c8ced51 535 switch (dev->board) {
a6a3f140
ST
536 case CX23885_BOARD_HAUPPAUGE_HVR1250:
537 /* GPIO-0 cx24227 demodulator reset */
538 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
539 break;
07b4a835
MK
540 case CX23885_BOARD_HAUPPAUGE_HVR1500:
541 /* GPIO-0 cx24227 demodulator */
542 /* GPIO-2 xc3028 tuner */
543
544 /* Put the parts into reset */
545 cx_set(GP0_IO, 0x00050000);
546 cx_clear(GP0_IO, 0x00000005);
547 msleep(5);
548
549 /* Bring the parts out of reset */
550 cx_set(GP0_IO, 0x00050005);
551 break;
d1987d55
ST
552 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
553 /* GPIO-0 cx24227 demodulator reset */
554 /* GPIO-2 xc5000 tuner reset */
555 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
556 break;
a6a3f140
ST
557 case CX23885_BOARD_HAUPPAUGE_HVR1800:
558 /* GPIO-0 656_CLK */
559 /* GPIO-1 656_D0 */
560 /* GPIO-2 8295A Reset */
561 /* GPIO-3-10 cx23417 data0-7 */
562 /* GPIO-11-14 cx23417 addr0-3 */
563 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
564 /* GPIO-19 IR_RX */
3ba71d21 565
a589b665
ST
566 /* CX23417 GPIO's */
567 /* EIO15 Zilog Reset */
568 /* EIO14 S5H1409/CX24227 Reset */
569
5206d6ec
ST
570 /* Force the TDA8295A into reset and back */
571 cx_set(GP0_IO, 0x00040004);
572 mdelay(20);
573 cx_clear(GP0_IO, 0x00000004);
574 mdelay(20);
575 cx_set(GP0_IO, 0x00040004);
576 mdelay(20);
a6a3f140 577 break;
b3ea0166
ST
578 case CX23885_BOARD_HAUPPAUGE_HVR1200:
579 /* GPIO-0 tda10048 demodulator reset */
580 /* GPIO-2 tda18271 tuner reset */
581
a780a31c
ST
582 /* Put the parts into reset and back */
583 cx_set(GP0_IO, 0x00050000);
584 mdelay(20);
585 cx_clear(GP0_IO, 0x00000005);
586 mdelay(20);
587 cx_set(GP0_IO, 0x00050005);
588 break;
589 case CX23885_BOARD_HAUPPAUGE_HVR1700:
590 /* GPIO-0 TDA10048 demodulator reset */
591 /* GPIO-2 TDA8295A Reset */
592 /* GPIO-3-10 cx23417 data0-7 */
593 /* GPIO-11-14 cx23417 addr0-3 */
594 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
595
596 /* The following GPIO's are on the interna AVCore (cx25840) */
597 /* GPIO-19 IR_RX */
598 /* GPIO-20 IR_TX 416/DVBT Select */
599 /* GPIO-21 IIS DAT */
600 /* GPIO-22 IIS WCLK */
601 /* GPIO-23 IIS BCLK */
602
66762373
ST
603 /* Put the parts into reset and back */
604 cx_set(GP0_IO, 0x00050000);
605 mdelay(20);
606 cx_clear(GP0_IO, 0x00000005);
607 mdelay(20);
608 cx_set(GP0_IO, 0x00050005);
609 break;
610 case CX23885_BOARD_HAUPPAUGE_HVR1400:
611 /* GPIO-0 Dibcom7000p demodulator reset */
612 /* GPIO-2 xc3028L tuner reset */
613 /* GPIO-13 LED */
614
b3ea0166
ST
615 /* Put the parts into reset and back */
616 cx_set(GP0_IO, 0x00050000);
617 mdelay(20);
618 cx_clear(GP0_IO, 0x00000005);
619 mdelay(20);
620 cx_set(GP0_IO, 0x00050005);
621 break;
1ecc5aed
ST
622 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
623 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
624 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
625 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
626 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
627
aef2d186
ST
628 /* Put the parts into reset and back */
629 cx_set(GP0_IO, 0x000f0000);
630 mdelay(20);
631 cx_clear(GP0_IO, 0x0000000f);
632 mdelay(20);
633 cx_set(GP0_IO, 0x000f000f);
634 break;
635 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
636 /* GPIO-0 portb xc3028 reset */
637 /* GPIO-1 portb zl10353 reset */
638 /* GPIO-2 portc xc3028 reset */
639 /* GPIO-3 portc zl10353 reset */
640
1ecc5aed
ST
641 /* Put the parts into reset and back */
642 cx_set(GP0_IO, 0x000f0000);
643 mdelay(20);
644 cx_clear(GP0_IO, 0x0000000f);
645 mdelay(20);
646 cx_set(GP0_IO, 0x000f000f);
647 break;
4c56b04a 648 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 649 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST
650 /* GPIO-2 xc3028 tuner reset */
651
652 /* The following GPIO's are on the internal AVCore (cx25840) */
653 /* GPIO-? zl10353 demod reset */
654
655 /* Put the parts into reset and back */
656 cx_set(GP0_IO, 0x00040000);
657 mdelay(20);
658 cx_clear(GP0_IO, 0x00000004);
659 mdelay(20);
660 cx_set(GP0_IO, 0x00040004);
661 break;
96318d0c 662 case CX23885_BOARD_TBS_6920:
579943f5 663 case CX23885_BOARD_TEVII_S470:
96318d0c
IL
664 cx_write(MC417_CTL, 0x00000036);
665 cx_write(MC417_OEN, 0x00001000);
666 cx_write(MC417_RWD, 0x00001800);
667 break;
5a23b076
IL
668 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
669 /* GPIO-0 INTA from CiMax1
670 GPIO-1 INTB from CiMax2
671 GPIO-2 reset chips
672 GPIO-3 to GPIO-10 data/addr for CA
673 GPIO-11 ~CS0 to CiMax1
674 GPIO-12 ~CS1 to CiMax2
675 GPIO-13 ADL0 load LSB addr
676 GPIO-14 ADL1 load MSB addr
677 GPIO-15 ~RDY from CiMax
678 GPIO-17 ~RD to CiMax
679 GPIO-18 ~WR to CiMax
680 */
681 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
682 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
683 cx_clear(GP0_IO, 0x00030004);
684 mdelay(100);/* reset delay */
685 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
686 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
687 /* GPIO-15 IN as ~ACK, rest as OUT */
688 cx_write(MC417_OEN, 0x00001000);
689 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
690 cx_write(MC417_RWD, 0x0000c300);
691 /* enable irq */
692 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
693 break;
2074dffa 694 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 695 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 696 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 697 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 698 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK
699 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
700 /* GPIO-9 Demod reset */
2074dffa
ST
701
702 /* Put the parts into reset and back */
d099becb
MK
703 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
704 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST
705 cx23885_gpio_clear(dev, GPIO_9);
706 mdelay(20);
707 cx23885_gpio_set(dev, GPIO_9);
708 break;
a6a3f140
ST
709 }
710}
711
712int cx23885_ir_init(struct cx23885_dev *dev)
713{
714 switch (dev->board) {
715 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 716 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 717 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 718 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 719 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 720 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 721 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 722 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 723 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 724 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST
725 /* FIXME: Implement me */
726 break;
12886871
ST
727 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
728 request_module("ir-kbd-i2c");
729 break;
a6a3f140
ST
730 }
731
732 return 0;
733}
734
d19770e5
ST
735void cx23885_card_setup(struct cx23885_dev *dev)
736{
a6a3f140
ST
737 struct cx23885_tsport *ts1 = &dev->ts1;
738 struct cx23885_tsport *ts2 = &dev->ts2;
739
d19770e5
ST
740 static u8 eeprom[256];
741
742 if (dev->i2c_bus[0].i2c_rc == 0) {
743 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK
744 tveeprom_read(&dev->i2c_bus[0].i2c_client,
745 eeprom, sizeof(eeprom));
d19770e5
ST
746 }
747
748 switch (dev->board) {
a77743bc 749 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 750 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 751 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 752 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST
753 if (dev->i2c_bus[0].i2c_rc == 0)
754 hauppauge_eeprom(dev, eeprom+0x80);
755 break;
d19770e5
ST
756 case CX23885_BOARD_HAUPPAUGE_HVR1800:
757 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 758 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 759 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 760 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 761 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 762 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 763 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d19770e5 764 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 765 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST
766 break;
767 }
a6a3f140
ST
768
769 switch (dev->board) {
335377b7 770 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 771 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK
772 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
773 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
774 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
775 /* break omitted intentionally */
a6a3f140
ST
776 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
777 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
778 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
779 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
780 break;
a589b665
ST
781 case CX23885_BOARD_HAUPPAUGE_HVR1800:
782 /* Defaults for VID B - Analog encoder */
783 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
784 ts1->gen_ctrl_val = 0x10e;
785 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
786 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
787
788 /* APB_TSVALERR_POL (active low)*/
789 ts1->vld_misc_val = 0x2000;
790 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
791
792 /* Defaults for VID C */
793 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
794 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
795 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 796 break;
579943f5 797 case CX23885_BOARD_TEVII_S470:
96318d0c 798 case CX23885_BOARD_TBS_6920:
c9b8b04b 799 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL
800 ts1->gen_ctrl_val = 0x5; /* Parallel */
801 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
802 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 803 break;
5a23b076
IL
804 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
805 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
806 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
807 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
808 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
809 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
810 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
811 break;
a6a3f140 812 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 813 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 814 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 815 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 816 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 817 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 818 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 819 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 820 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 821 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 822 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 823 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 824 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST
825 default:
826 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
827 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
828 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
829 }
830
ce89cfb4
ST
831 /* Certain boards support analog, or require the avcore to be
832 * loaded, ensure this happens.
833 */
834 switch (dev->board) {
835 case CX23885_BOARD_HAUPPAUGE_HVR1800:
836 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
837 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 838 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 839 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 840 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
e6574f2f
HV
841 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
842 &dev->i2c_bus[2].i2c_adap,
0d5a19f1 843 "cx25840", "cx25840", 0x88 >> 1);
cc26b076 844 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST
845 break;
846 }
5a23b076
IL
847
848 /* AUX-PLL 27MHz CLK */
849 switch (dev->board) {
850 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
851 netup_initialize(dev);
852 break;
853 }
d19770e5
ST
854}
855
856/* ------------------------------------------------------------------ */
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