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V4L/DVB (11771): cx23885: add DVB-T tuning support for Hauppauge WinTV-HVR1210
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
d19770e5
ST		 31
32/* ------------------------------------------------------------------ */
33/* board config info */
34
35struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
c7712613
ST		 38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
d19770e5
ST		 40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
9c8ced51 43 }, {
d19770e5
ST		 44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
9c8ced51 46 }, {
d19770e5
ST		 47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
9c8ced51 49 }, {
d19770e5
ST		 50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
9c8ced51 52 } },
d19770e5
ST		 53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
9c8ced51 61 }, {
d19770e5
ST		 62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
9c8ced51 65 }, {
d19770e5
ST		 66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
9c8ced51 69 }, {
d19770e5
ST		 70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
9c8ced51 73 } },
d19770e5
ST		 74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
7b888014 77 .porta = CX23885_ANALOG_VIDEO,
a589b665 78 .portb = CX23885_MPEG_ENCODER,
d19770e5 79 .portc = CX23885_MPEG_DVB,
7b888014
ST		 80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
9c8ced51 88 }, {
d19770e5 89 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
9c8ced51 94 }, {
d19770e5 95 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
9c8ced51 101 } },
d19770e5 102 },
a77743bc
ST		 103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
9c8ced51 110 }, {
a77743bc
ST		 111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
9c8ced51 114 }, {
a77743bc
ST		 115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
9c8ced51 118 }, {
a77743bc
ST		 119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
9c8ced51 122 } },
a77743bc 123 },
9bc37caa
MK		 124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
a6a3f140 126 .portb = CX23885_MPEG_DVB,
9bc37caa 127 },
d1987d55
ST		 128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
07b4a835
MK		 132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
b3ea0166
ST		 136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
a780a31c
ST		 140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
66762373
ST		 144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
335377b7
MK		 148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 150 .portb = CX23885_MPEG_DVB,
335377b7
MK		 151 .portc = CX23885_MPEG_DVB,
152 },
aef2d186
ST		 153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
4c56b04a
ST		 158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
9bb1b7e8
IL		 162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
96318d0c
IL		 166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
579943f5
IL		 170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
c9b8b04b
IL		 174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
5a23b076
IL		 178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
2074dffa
ST		 184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 186 .portc = CX23885_MPEG_DVB,
2074dffa 187 },
d099becb
MK		 188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
19bc5796
MK		 192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
6b926eca
MK		 196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
d19770e5
ST		 200};
201const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
202
203/* ------------------------------------------------------------------ */
204/* PCI subsystem IDs */
205
206struct cx23885_subid cx23885_subids[] = {
207 {
208 .subvendor = 0x0070,
209 .subdevice = 0x3400,
210 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 211 }, {
d19770e5
ST		 212 .subvendor = 0x0070,
213 .subdevice = 0x7600,
214 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 215 }, {
d19770e5
ST		 216 .subvendor = 0x0070,
217 .subdevice = 0x7800,
218 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 219 }, {
d19770e5
ST		 220 .subvendor = 0x0070,
221 .subdevice = 0x7801,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 223 }, {
6ccb8cfb
MK		 224 .subvendor = 0x0070,
225 .subdevice = 0x7809,
226 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 227 }, {
a77743bc
ST		 228 .subvendor = 0x0070,
229 .subdevice = 0x7911,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 231 }, {
9bc37caa
MK		 232 .subvendor = 0x18ac,
233 .subdevice = 0xd500,
234 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 235 }, {
b00fff0b
MK		 236 .subvendor = 0x0070,
237 .subdevice = 0x7790,
238 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 239 }, {
d1987d55
ST		 240 .subvendor = 0x0070,
241 .subdevice = 0x7797,
242 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 243 }, {
b00fff0b
MK		 244 .subvendor = 0x0070,
245 .subdevice = 0x7710,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 247 }, {
07b4a835
MK		 248 .subvendor = 0x0070,
249 .subdevice = 0x7717,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 251 }, {
252 .subvendor = 0x0070,
253 .subdevice = 0x71d1,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 255 }, {
256 .subvendor = 0x0070,
257 .subdevice = 0x71d3,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 259 }, {
260 .subvendor = 0x0070,
261 .subdevice = 0x8101,
262 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 263 }, {
264 .subvendor = 0x0070,
265 .subdevice = 0x8010,
266 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 267 }, {
335377b7
MK		 268 .subvendor = 0x18ac,
269 .subdevice = 0xd618,
270 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 271 }, {
aef2d186
ST		 272 .subvendor = 0x18ac,
273 .subdevice = 0xdb78,
274 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 275 }, {
276 .subvendor = 0x107d,
277 .subdevice = 0x6681,
278 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 279 }, {
280 .subvendor = 0x185b,
281 .subdevice = 0xe800,
282 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 283 }, {
284 .subvendor = 0x6920,
285 .subdevice = 0x8888,
286 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 287 }, {
288 .subvendor = 0xd470,
289 .subdevice = 0x9022,
290 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 291 }, {
292 .subvendor = 0x0001,
293 .subdevice = 0x2005,
294 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 295 }, {
296 .subvendor = 0x1b55,
297 .subdevice = 0x2a2c,
298 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 299 }, {
300 .subvendor = 0x0070,
301 .subdevice = 0x2211,
302 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 303 }, {
304 .subvendor = 0x0070,
305 .subdevice = 0x2215,
306 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 307 }, {
308 .subvendor = 0x0070,
309 .subdevice = 0x2251,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 311 }, {
312 .subvendor = 0x0070,
313 .subdevice = 0x2291,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
315 }, {
316 .subvendor = 0x0070,
317 .subdevice = 0x2295,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
d19770e5
ST		 319 },
320};
321const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
322
323void cx23885_card_list(struct cx23885_dev *dev)
324{
325 int i;
326
327 if (0 == dev->pci->subsystem_vendor &&
328 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 329 printk(KERN_INFO
330 "%s: Board has no valid PCIe Subsystem ID and can't\n"
331 "%s: be autodetected. Pass card=<n> insmod option\n"
332 "%s: to workaround that. Redirect complaints to the\n"
333 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 334 "%s: -- tux\n",
335 dev->name, dev->name, dev->name, dev->name, dev->name);
336 } else {
9c8ced51
ST		 337 printk(KERN_INFO
338 "%s: Your board isn't known (yet) to the driver.\n"
339 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 340 "%s: card=<n> insmod option. Updating to the latest\n"
341 "%s: version might help as well.\n",
342 dev->name, dev->name, dev->name, dev->name);
343 }
9c8ced51 344 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 345 dev->name);
346 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 347 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 348 dev->name, i, cx23885_boards[i].name);
349}
350
351static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
352{
353 struct tveeprom tv;
354
9c8ced51
ST		 355 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
356 eeprom_data);
d19770e5 357
d19770e5 358 /* Make sure we support the board model */
9c8ced51 359 switch (tv.model) {
36396c89
MK		 360 case 71009:
361 /* WinTV-HVR1200 (PCIe, Retail, full height)
362 * DVB-T and basic analog */
363 case 71359:
364 /* WinTV-HVR1200 (PCIe, OEM, half height)
365 * DVB-T and basic analog */
366 case 71439:
367 /* WinTV-HVR1200 (PCIe, OEM, half height)
368 * DVB-T and basic analog */
369 case 71449:
370 /* WinTV-HVR1200 (PCIe, OEM, full height)
371 * DVB-T and basic analog */
372 case 71939:
373 /* WinTV-HVR1200 (PCIe, OEM, half height)
374 * DVB-T and basic analog */
375 case 71949:
376 /* WinTV-HVR1200 (PCIe, OEM, full height)
377 * DVB-T and basic analog */
378 case 71959:
379 /* WinTV-HVR1200 (PCIe, OEM, full height)
380 * DVB-T and basic analog */
381 case 71979:
382 /* WinTV-HVR1200 (PCIe, OEM, half height)
383 * DVB-T and basic analog */
384 case 71999:
385 /* WinTV-HVR1200 (PCIe, OEM, full height)
386 * DVB-T and basic analog */
9c8ced51
ST		 387 case 76601:
388 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
389 channel ATSC and MPEG2 HW Encoder */
390 case 77001:
391 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
392 and Basic analog */
393 case 77011:
394 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
395 and Basic analog */
396 case 77041:
397 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
398 and Basic analog */
399 case 77051:
400 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
401 and Basic analog */
402 case 78011:
403 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
404 Dual channel ATSC and MPEG2 HW Encoder */
405 case 78501:
406 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
407 Dual channel ATSC and MPEG2 HW Encoder */
408 case 78521:
409 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
410 Dual channel ATSC and MPEG2 HW Encoder */
411 case 78531:
412 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
413 Dual channel ATSC and MPEG2 HW Encoder */
414 case 78631:
415 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
416 Dual channel ATSC and MPEG2 HW Encoder */
417 case 79001:
418 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
419 ATSC and Basic analog */
420 case 79101:
421 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
422 ATSC and Basic analog */
423 case 79561:
424 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
425 ATSC and Basic analog */
426 case 79571:
427 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
428 ATSC and Basic analog */
429 case 79671:
430 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
431 ATSC and Basic analog */
66762373
ST		 432 case 80019:
433 /* WinTV-HVR1400 (Express Card, Retail, IR,
434 * DVB-T and Basic analog */
36396c89
MK		 435 case 81509:
436 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
437 * DVB-T and MPEG2 HW Encoder */
a780a31c 438 case 81519:
36396c89 439 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 440 * DVB-T and MPEG2 HW Encoder */
d19770e5
ST		 441 break;
442 default:
9c8ced51
ST		 443 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
444 dev->name, tv.model);
d19770e5
ST		 445 break;
446 }
447
448 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
449 dev->name, tv.model);
450}
451
d7cba043 452int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 453{
89ce2216
ST		 454 struct cx23885_tsport *port = priv;
455 struct cx23885_dev *dev = port->dev;
6df51690
ST		 456 u32 bitmask = 0;
457
89ce2216
ST		 458 if (command == XC2028_RESET_CLK)
459 return 0;
460
6df51690
ST		 461 if (command != 0) {
462 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
463 __func__, command);
464 return -EINVAL;
465 }
8c70017f 466
9c8ced51 467 switch (dev->board) {
90a71b1c
ST		 468 case CX23885_BOARD_HAUPPAUGE_HVR1400:
469 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 470 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 471 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 472 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
90a71b1c 473 /* Tuner Reset Command */
4c56b04a 474 bitmask = 0x04;
6df51690
ST		 475 break;
476 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 477 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 478 /* Two identical tuners on two different i2c buses,
479 * we need to reset the correct gpio. */
d4dc673d 480 if (port->nr == 1)
4c56b04a 481 bitmask = 0x01;
d4dc673d 482 else if (port->nr == 2)
4c56b04a 483 bitmask = 0x04;
8c70017f
ST		 484 break;
485 }
486
6df51690
ST		 487 if (bitmask) {
488 /* Drive the tuner into reset and back out */
489 cx_clear(GP0_IO, bitmask);
490 mdelay(200);
491 cx_set(GP0_IO, bitmask);
492 }
493
494 return 0;
8c70017f 495}
73c993a8 496
a6a3f140
ST		 497void cx23885_gpio_setup(struct cx23885_dev *dev)
498{
9c8ced51 499 switch (dev->board) {
a6a3f140
ST		 500 case CX23885_BOARD_HAUPPAUGE_HVR1250:
501 /* GPIO-0 cx24227 demodulator reset */
502 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
503 break;
07b4a835
MK		 504 case CX23885_BOARD_HAUPPAUGE_HVR1500:
505 /* GPIO-0 cx24227 demodulator */
506 /* GPIO-2 xc3028 tuner */
507
508 /* Put the parts into reset */
509 cx_set(GP0_IO, 0x00050000);
510 cx_clear(GP0_IO, 0x00000005);
511 msleep(5);
512
513 /* Bring the parts out of reset */
514 cx_set(GP0_IO, 0x00050005);
515 break;
d1987d55
ST		 516 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
517 /* GPIO-0 cx24227 demodulator reset */
518 /* GPIO-2 xc5000 tuner reset */
519 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
520 break;
a6a3f140
ST		 521 case CX23885_BOARD_HAUPPAUGE_HVR1800:
522 /* GPIO-0 656_CLK */
523 /* GPIO-1 656_D0 */
524 /* GPIO-2 8295A Reset */
525 /* GPIO-3-10 cx23417 data0-7 */
526 /* GPIO-11-14 cx23417 addr0-3 */
527 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
528 /* GPIO-19 IR_RX */
3ba71d21 529
a589b665
ST		 530 /* CX23417 GPIO's */
531 /* EIO15 Zilog Reset */
532 /* EIO14 S5H1409/CX24227 Reset */
533
5206d6ec
ST		 534 /* Force the TDA8295A into reset and back */
535 cx_set(GP0_IO, 0x00040004);
536 mdelay(20);
537 cx_clear(GP0_IO, 0x00000004);
538 mdelay(20);
539 cx_set(GP0_IO, 0x00040004);
540 mdelay(20);
a6a3f140 541 break;
b3ea0166
ST		 542 case CX23885_BOARD_HAUPPAUGE_HVR1200:
543 /* GPIO-0 tda10048 demodulator reset */
544 /* GPIO-2 tda18271 tuner reset */
545
a780a31c
ST		 546 /* Put the parts into reset and back */
547 cx_set(GP0_IO, 0x00050000);
548 mdelay(20);
549 cx_clear(GP0_IO, 0x00000005);
550 mdelay(20);
551 cx_set(GP0_IO, 0x00050005);
552 break;
553 case CX23885_BOARD_HAUPPAUGE_HVR1700:
554 /* GPIO-0 TDA10048 demodulator reset */
555 /* GPIO-2 TDA8295A Reset */
556 /* GPIO-3-10 cx23417 data0-7 */
557 /* GPIO-11-14 cx23417 addr0-3 */
558 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
559
560 /* The following GPIO's are on the interna AVCore (cx25840) */
561 /* GPIO-19 IR_RX */
562 /* GPIO-20 IR_TX 416/DVBT Select */
563 /* GPIO-21 IIS DAT */
564 /* GPIO-22 IIS WCLK */
565 /* GPIO-23 IIS BCLK */
566
66762373
ST		 567 /* Put the parts into reset and back */
568 cx_set(GP0_IO, 0x00050000);
569 mdelay(20);
570 cx_clear(GP0_IO, 0x00000005);
571 mdelay(20);
572 cx_set(GP0_IO, 0x00050005);
573 break;
574 case CX23885_BOARD_HAUPPAUGE_HVR1400:
575 /* GPIO-0 Dibcom7000p demodulator reset */
576 /* GPIO-2 xc3028L tuner reset */
577 /* GPIO-13 LED */
578
b3ea0166
ST		 579 /* Put the parts into reset and back */
580 cx_set(GP0_IO, 0x00050000);
581 mdelay(20);
582 cx_clear(GP0_IO, 0x00000005);
583 mdelay(20);
584 cx_set(GP0_IO, 0x00050005);
585 break;
1ecc5aed
ST		 586 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
587 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
588 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
589 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
590 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
591
aef2d186
ST		 592 /* Put the parts into reset and back */
593 cx_set(GP0_IO, 0x000f0000);
594 mdelay(20);
595 cx_clear(GP0_IO, 0x0000000f);
596 mdelay(20);
597 cx_set(GP0_IO, 0x000f000f);
598 break;
599 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
600 /* GPIO-0 portb xc3028 reset */
601 /* GPIO-1 portb zl10353 reset */
602 /* GPIO-2 portc xc3028 reset */
603 /* GPIO-3 portc zl10353 reset */
604
1ecc5aed
ST		 605 /* Put the parts into reset and back */
606 cx_set(GP0_IO, 0x000f0000);
607 mdelay(20);
608 cx_clear(GP0_IO, 0x0000000f);
609 mdelay(20);
610 cx_set(GP0_IO, 0x000f000f);
611 break;
4c56b04a 612 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 613 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST		 614 /* GPIO-2 xc3028 tuner reset */
615
616 /* The following GPIO's are on the internal AVCore (cx25840) */
617 /* GPIO-? zl10353 demod reset */
618
619 /* Put the parts into reset and back */
620 cx_set(GP0_IO, 0x00040000);
621 mdelay(20);
622 cx_clear(GP0_IO, 0x00000004);
623 mdelay(20);
624 cx_set(GP0_IO, 0x00040004);
625 break;
96318d0c 626 case CX23885_BOARD_TBS_6920:
579943f5 627 case CX23885_BOARD_TEVII_S470:
96318d0c
IL		 628 cx_write(MC417_CTL, 0x00000036);
629 cx_write(MC417_OEN, 0x00001000);
630 cx_write(MC417_RWD, 0x00001800);
631 break;
5a23b076
IL		 632 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
633 /* GPIO-0 INTA from CiMax1
634 GPIO-1 INTB from CiMax2
635 GPIO-2 reset chips
636 GPIO-3 to GPIO-10 data/addr for CA
637 GPIO-11 ~CS0 to CiMax1
638 GPIO-12 ~CS1 to CiMax2
639 GPIO-13 ADL0 load LSB addr
640 GPIO-14 ADL1 load MSB addr
641 GPIO-15 ~RDY from CiMax
642 GPIO-17 ~RD to CiMax
643 GPIO-18 ~WR to CiMax
644 */
645 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
646 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
647 cx_clear(GP0_IO, 0x00030004);
648 mdelay(100);/* reset delay */
649 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
650 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
651 /* GPIO-15 IN as ~ACK, rest as OUT */
652 cx_write(MC417_OEN, 0x00001000);
653 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
654 cx_write(MC417_RWD, 0x0000c300);
655 /* enable irq */
656 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
657 break;
2074dffa 658 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 659 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 660 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 661 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 662 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 663 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
664 /* GPIO-9 Demod reset */
2074dffa
ST		 665
666 /* Put the parts into reset and back */
d099becb
MK		 667 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
668 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 669 cx23885_gpio_clear(dev, GPIO_9);
670 mdelay(20);
671 cx23885_gpio_set(dev, GPIO_9);
672 break;
a6a3f140
ST		 673 }
674}
675
676int cx23885_ir_init(struct cx23885_dev *dev)
677{
678 switch (dev->board) {
679 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 680 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 681 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 682 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 683 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 684 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 685 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 686 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 687 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 688 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 689 /* FIXME: Implement me */
690 break;
12886871
ST		 691 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
692 request_module("ir-kbd-i2c");
693 break;
a6a3f140
ST		 694 }
695
696 return 0;
697}
698
d19770e5
ST		 699void cx23885_card_setup(struct cx23885_dev *dev)
700{
a6a3f140
ST		 701 struct cx23885_tsport *ts1 = &dev->ts1;
702 struct cx23885_tsport *ts2 = &dev->ts2;
703
d19770e5
ST		 704 static u8 eeprom[256];
705
706 if (dev->i2c_bus[0].i2c_rc == 0) {
707 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 708 tveeprom_read(&dev->i2c_bus[0].i2c_client,
709 eeprom, sizeof(eeprom));
d19770e5
ST		 710 }
711
712 switch (dev->board) {
a77743bc 713 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 714 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 715 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 716 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 717 if (dev->i2c_bus[0].i2c_rc == 0)
718 hauppauge_eeprom(dev, eeprom+0x80);
719 break;
d19770e5
ST		 720 case CX23885_BOARD_HAUPPAUGE_HVR1800:
721 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 722 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 723 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 724 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 725 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 726 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 727 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d19770e5 728 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 729 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 730 break;
731 }
a6a3f140
ST		 732
733 switch (dev->board) {
335377b7 734 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 735 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 736 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
737 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
738 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
739 /* break omitted intentionally */
a6a3f140
ST		 740 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
741 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
742 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
743 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
744 break;
a589b665
ST		 745 case CX23885_BOARD_HAUPPAUGE_HVR1800:
746 /* Defaults for VID B - Analog encoder */
747 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
748 ts1->gen_ctrl_val = 0x10e;
749 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
750 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
751
752 /* APB_TSVALERR_POL (active low)*/
753 ts1->vld_misc_val = 0x2000;
754 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
755
756 /* Defaults for VID C */
757 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
758 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
759 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 760 break;
579943f5 761 case CX23885_BOARD_TEVII_S470:
96318d0c 762 case CX23885_BOARD_TBS_6920:
c9b8b04b 763 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 764 ts1->gen_ctrl_val = 0x5; /* Parallel */
765 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
766 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 767 break;
5a23b076
IL		 768 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
769 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
770 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
771 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
772 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
773 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
774 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
775 break;
a6a3f140 776 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 777 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 778 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 779 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 780 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 781 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 782 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 783 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 784 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 785 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 786 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 787 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 788 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 789 default:
790 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
791 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
792 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
793 }
794
ce89cfb4
ST		 795 /* Certain boards support analog, or require the avcore to be
796 * loaded, ensure this happens.
797 */
798 switch (dev->board) {
799 case CX23885_BOARD_HAUPPAUGE_HVR1800:
800 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
801 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 802 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 803 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 804 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
e6574f2f
HV		 805 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
806 &dev->i2c_bus[2].i2c_adap,
0d5a19f1 807 "cx25840", "cx25840", 0x88 >> 1);
cc26b076 808 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 809 break;
810 }
5a23b076
IL		 811
812 /* AUX-PLL 27MHz CLK */
813 switch (dev->board) {
814 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
815 netup_initialize(dev);
816 break;
817 }
d19770e5
ST		 818}
819
820/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
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