projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (13341): stv0900: big rework to support cut 3.0.
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
29f8a0a5 31#include "cx23888-ir.h"
d19770e5
ST		 32
33/* ------------------------------------------------------------------ */
34/* board config info */
35
36struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
c7712613
ST		 39 /* Ensure safe default for unknown boards */
40 .clk_freq = 0,
d19770e5
ST		 41 .input = {{
42 .type = CX23885_VMUX_COMPOSITE1,
43 .vmux = 0,
9c8ced51 44 }, {
d19770e5
ST		 45 .type = CX23885_VMUX_COMPOSITE2,
46 .vmux = 1,
9c8ced51 47 }, {
d19770e5
ST		 48 .type = CX23885_VMUX_COMPOSITE3,
49 .vmux = 2,
9c8ced51 50 }, {
d19770e5
ST		 51 .type = CX23885_VMUX_COMPOSITE4,
52 .vmux = 3,
9c8ced51 53 } },
d19770e5
ST		 54 },
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 57 .portc = CX23885_MPEG_DVB,
58 .input = {{
59 .type = CX23885_VMUX_TELEVISION,
60 .vmux = 0,
61 .gpio0 = 0xff00,
9c8ced51 62 }, {
d19770e5
ST		 63 .type = CX23885_VMUX_DEBUG,
64 .vmux = 0,
65 .gpio0 = 0xff01,
9c8ced51 66 }, {
d19770e5
ST		 67 .type = CX23885_VMUX_COMPOSITE1,
68 .vmux = 1,
69 .gpio0 = 0xff02,
9c8ced51 70 }, {
d19770e5
ST		 71 .type = CX23885_VMUX_SVIDEO,
72 .vmux = 2,
73 .gpio0 = 0xff02,
9c8ced51 74 } },
d19770e5
ST		 75 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
7b888014 78 .porta = CX23885_ANALOG_VIDEO,
a589b665 79 .portb = CX23885_MPEG_ENCODER,
d19770e5 80 .portc = CX23885_MPEG_DVB,
7b888014
ST		 81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 83 .input = {{
84 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 85 .vmux = CX25840_VIN7_CH3 |
86 CX25840_VIN5_CH2 |
87 CX25840_VIN2_CH1,
88 .gpio0 = 0,
9c8ced51 89 }, {
d19770e5 90 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 91 .vmux = CX25840_VIN7_CH3 |
92 CX25840_VIN4_CH2 |
93 CX25840_VIN6_CH1,
94 .gpio0 = 0,
9c8ced51 95 }, {
d19770e5 96 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 97 .vmux = CX25840_VIN7_CH3 |
98 CX25840_VIN4_CH2 |
99 CX25840_VIN8_CH1 |
100 CX25840_SVIDEO_ON,
101 .gpio0 = 0,
9c8ced51 102 } },
d19770e5 103 },
a77743bc
ST		 104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
107 .input = {{
108 .type = CX23885_VMUX_TELEVISION,
109 .vmux = 0,
110 .gpio0 = 0xff00,
9c8ced51 111 }, {
a77743bc
ST		 112 .type = CX23885_VMUX_DEBUG,
113 .vmux = 0,
114 .gpio0 = 0xff01,
9c8ced51 115 }, {
a77743bc
ST		 116 .type = CX23885_VMUX_COMPOSITE1,
117 .vmux = 1,
118 .gpio0 = 0xff02,
9c8ced51 119 }, {
a77743bc
ST		 120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = 2,
122 .gpio0 = 0xff02,
9c8ced51 123 } },
a77743bc 124 },
9bc37caa
MK		 125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
a6a3f140 127 .portb = CX23885_MPEG_DVB,
9bc37caa 128 },
d1987d55
ST		 129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
132 },
07b4a835
MK		 133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
136 },
b3ea0166
ST		 137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
140 },
a780a31c
ST		 141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
144 },
66762373
ST		 145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
148 },
335377b7
MK		 149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 151 .portb = CX23885_MPEG_DVB,
335377b7
MK		 152 .portc = CX23885_MPEG_DVB,
153 },
aef2d186
ST		 154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
158 },
4c56b04a
ST		 159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
162 },
9bb1b7e8
IL		 163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
166 },
96318d0c
IL		 167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
170 },
579943f5
IL		 171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
174 },
c9b8b04b
IL		 175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
178 },
5a23b076
IL		 179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
180 .cimax = 1,
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
184 },
2074dffa
ST		 185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 187 .portc = CX23885_MPEG_DVB,
2074dffa 188 },
d099becb
MK		 189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
192 },
19bc5796
MK		 193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
196 },
6b926eca
MK		 197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
200 },
493b7127
DW		 201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
6f0d8c02
DW		 203 .tuner_type = TUNER_XC5000,
204 .tuner_addr = 0x61,
bc1548ad 205 .porta = CX23885_ANALOG_VIDEO,
493b7127 206 .portb = CX23885_MPEG_DVB,
bc1548ad 207 .input = {
6f0d8c02
DW		 208 {
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
211 },
bc1548ad
DW		 212 {
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
215 },
216 {
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
220 },
221 {
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
224 CX25840_VIN1_CH1 |
225 CX25840_VIN6_CH2 |
226 CX25840_VIN7_CH3,
227 },
228 },
493b7127 229 },
2365b2d3
DW		 230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
6f0d8c02
DW		 232 .tuner_type = TUNER_XC5000,
233 .tuner_addr = 0x61,
bc1548ad 234 .porta = CX23885_ANALOG_VIDEO,
2365b2d3 235 .portb = CX23885_MPEG_DVB,
bc1548ad 236 .input = {
6f0d8c02
DW		 237 {
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
240 },
bc1548ad
DW		 241 {
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
244 },
245 {
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
249 },
250 {
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
253 CX25840_VIN1_CH1 |
254 CX25840_VIN6_CH2 |
255 CX25840_VIN7_CH3,
256 },
257 },
2365b2d3 258 },
13697380
ST		 259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
263 },
34e383dd
VG		 264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
267 },
d19770e5
ST		 268};
269const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
270
271/* ------------------------------------------------------------------ */
272/* PCI subsystem IDs */
273
274struct cx23885_subid cx23885_subids[] = {
275 {
276 .subvendor = 0x0070,
277 .subdevice = 0x3400,
278 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 279 }, {
d19770e5
ST		 280 .subvendor = 0x0070,
281 .subdevice = 0x7600,
282 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 283 }, {
d19770e5
ST		 284 .subvendor = 0x0070,
285 .subdevice = 0x7800,
286 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 287 }, {
d19770e5
ST		 288 .subvendor = 0x0070,
289 .subdevice = 0x7801,
290 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 291 }, {
6ccb8cfb
MK		 292 .subvendor = 0x0070,
293 .subdevice = 0x7809,
294 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 295 }, {
a77743bc
ST		 296 .subvendor = 0x0070,
297 .subdevice = 0x7911,
298 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 299 }, {
9bc37caa
MK		 300 .subvendor = 0x18ac,
301 .subdevice = 0xd500,
302 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 303 }, {
b00fff0b
MK		 304 .subvendor = 0x0070,
305 .subdevice = 0x7790,
306 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 307 }, {
d1987d55
ST		 308 .subvendor = 0x0070,
309 .subdevice = 0x7797,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 311 }, {
b00fff0b
MK		 312 .subvendor = 0x0070,
313 .subdevice = 0x7710,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 315 }, {
07b4a835
MK		 316 .subvendor = 0x0070,
317 .subdevice = 0x7717,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 319 }, {
320 .subvendor = 0x0070,
321 .subdevice = 0x71d1,
322 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 323 }, {
324 .subvendor = 0x0070,
325 .subdevice = 0x71d3,
326 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 327 }, {
328 .subvendor = 0x0070,
329 .subdevice = 0x8101,
330 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 331 }, {
332 .subvendor = 0x0070,
333 .subdevice = 0x8010,
334 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 335 }, {
335377b7
MK		 336 .subvendor = 0x18ac,
337 .subdevice = 0xd618,
338 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 339 }, {
aef2d186
ST		 340 .subvendor = 0x18ac,
341 .subdevice = 0xdb78,
342 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 343 }, {
344 .subvendor = 0x107d,
345 .subdevice = 0x6681,
346 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 347 }, {
348 .subvendor = 0x185b,
349 .subdevice = 0xe800,
350 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 351 }, {
352 .subvendor = 0x6920,
353 .subdevice = 0x8888,
354 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 355 }, {
356 .subvendor = 0xd470,
357 .subdevice = 0x9022,
358 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 359 }, {
360 .subvendor = 0x0001,
361 .subdevice = 0x2005,
362 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 363 }, {
364 .subvendor = 0x1b55,
365 .subdevice = 0x2a2c,
366 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 367 }, {
368 .subvendor = 0x0070,
369 .subdevice = 0x2211,
370 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 371 }, {
372 .subvendor = 0x0070,
373 .subdevice = 0x2215,
374 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 375 }, {
376 .subvendor = 0x0070,
377 .subdevice = 0x2251,
378 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 379 }, {
380 .subvendor = 0x0070,
381 .subdevice = 0x2291,
382 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
383 }, {
384 .subvendor = 0x0070,
385 .subdevice = 0x2295,
386 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 387 }, {
388 .subvendor = 0x14f1,
389 .subdevice = 0x8651,
390 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 391 }, {
392 .subvendor = 0x14f1,
393 .subdevice = 0x8657,
394 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 395 }, {
396 .subvendor = 0x0070,
397 .subdevice = 0x8541,
398 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 399 }, {
400 .subvendor = 0x1858,
401 .subdevice = 0xe800,
402 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
d19770e5
ST		 403 },
404};
405const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
406
407void cx23885_card_list(struct cx23885_dev *dev)
408{
409 int i;
410
411 if (0 == dev->pci->subsystem_vendor &&
412 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 413 printk(KERN_INFO
414 "%s: Board has no valid PCIe Subsystem ID and can't\n"
415 "%s: be autodetected. Pass card=<n> insmod option\n"
416 "%s: to workaround that. Redirect complaints to the\n"
417 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 418 "%s: -- tux\n",
419 dev->name, dev->name, dev->name, dev->name, dev->name);
420 } else {
9c8ced51
ST		 421 printk(KERN_INFO
422 "%s: Your board isn't known (yet) to the driver.\n"
423 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 424 "%s: card=<n> insmod option. Updating to the latest\n"
425 "%s: version might help as well.\n",
426 dev->name, dev->name, dev->name, dev->name);
427 }
9c8ced51 428 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 429 dev->name);
430 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 431 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 432 dev->name, i, cx23885_boards[i].name);
433}
434
435static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
436{
437 struct tveeprom tv;
438
9c8ced51
ST		 439 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
440 eeprom_data);
d19770e5 441
d19770e5 442 /* Make sure we support the board model */
9c8ced51 443 switch (tv.model) {
5308cf09
MK		 444 case 22001:
445 /* WinTV-HVR1270 (PCIe, Retail, half height)
446 * ATSC/QAM and basic analog, IR Blast */
447 case 22009:
448 /* WinTV-HVR1210 (PCIe, Retail, half height)
449 * DVB-T and basic analog, IR Blast */
450 case 22011:
451 /* WinTV-HVR1270 (PCIe, Retail, half height)
452 * ATSC/QAM and basic analog, IR Recv */
453 case 22019:
454 /* WinTV-HVR1210 (PCIe, Retail, half height)
455 * DVB-T and basic analog, IR Recv */
456 case 22021:
457 /* WinTV-HVR1275 (PCIe, Retail, half height)
458 * ATSC/QAM and basic analog, IR Recv */
459 case 22029:
460 /* WinTV-HVR1210 (PCIe, Retail, half height)
461 * DVB-T and basic analog, IR Recv */
462 case 22101:
463 /* WinTV-HVR1270 (PCIe, Retail, full height)
464 * ATSC/QAM and basic analog, IR Blast */
465 case 22109:
466 /* WinTV-HVR1210 (PCIe, Retail, full height)
467 * DVB-T and basic analog, IR Blast */
468 case 22111:
469 /* WinTV-HVR1270 (PCIe, Retail, full height)
470 * ATSC/QAM and basic analog, IR Recv */
471 case 22119:
472 /* WinTV-HVR1210 (PCIe, Retail, full height)
473 * DVB-T and basic analog, IR Recv */
474 case 22121:
475 /* WinTV-HVR1275 (PCIe, Retail, full height)
476 * ATSC/QAM and basic analog, IR Recv */
477 case 22129:
478 /* WinTV-HVR1210 (PCIe, Retail, full height)
479 * DVB-T and basic analog, IR Recv */
36396c89
MK		 480 case 71009:
481 /* WinTV-HVR1200 (PCIe, Retail, full height)
482 * DVB-T and basic analog */
483 case 71359:
484 /* WinTV-HVR1200 (PCIe, OEM, half height)
485 * DVB-T and basic analog */
486 case 71439:
487 /* WinTV-HVR1200 (PCIe, OEM, half height)
488 * DVB-T and basic analog */
489 case 71449:
490 /* WinTV-HVR1200 (PCIe, OEM, full height)
491 * DVB-T and basic analog */
492 case 71939:
493 /* WinTV-HVR1200 (PCIe, OEM, half height)
494 * DVB-T and basic analog */
495 case 71949:
496 /* WinTV-HVR1200 (PCIe, OEM, full height)
497 * DVB-T and basic analog */
498 case 71959:
499 /* WinTV-HVR1200 (PCIe, OEM, full height)
500 * DVB-T and basic analog */
501 case 71979:
502 /* WinTV-HVR1200 (PCIe, OEM, half height)
503 * DVB-T and basic analog */
504 case 71999:
505 /* WinTV-HVR1200 (PCIe, OEM, full height)
506 * DVB-T and basic analog */
9c8ced51
ST		 507 case 76601:
508 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
509 channel ATSC and MPEG2 HW Encoder */
510 case 77001:
511 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
512 and Basic analog */
513 case 77011:
514 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
515 and Basic analog */
516 case 77041:
517 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
518 and Basic analog */
519 case 77051:
520 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
521 and Basic analog */
522 case 78011:
523 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
524 Dual channel ATSC and MPEG2 HW Encoder */
525 case 78501:
526 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
527 Dual channel ATSC and MPEG2 HW Encoder */
528 case 78521:
529 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
530 Dual channel ATSC and MPEG2 HW Encoder */
531 case 78531:
532 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
533 Dual channel ATSC and MPEG2 HW Encoder */
534 case 78631:
535 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
536 Dual channel ATSC and MPEG2 HW Encoder */
537 case 79001:
538 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
539 ATSC and Basic analog */
540 case 79101:
541 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
542 ATSC and Basic analog */
543 case 79561:
544 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
545 ATSC and Basic analog */
546 case 79571:
547 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
548 ATSC and Basic analog */
549 case 79671:
550 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
551 ATSC and Basic analog */
66762373
ST		 552 case 80019:
553 /* WinTV-HVR1400 (Express Card, Retail, IR,
554 * DVB-T and Basic analog */
36396c89
MK		 555 case 81509:
556 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
557 * DVB-T and MPEG2 HW Encoder */
a780a31c 558 case 81519:
36396c89 559 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 560 * DVB-T and MPEG2 HW Encoder */
d19770e5 561 break;
13697380
ST		 562 case 85021:
563 /* WinTV-HVR1850 (PCIe, OEM, RCA in, IR, FM,
564 Dual channel ATSC and MPEG2 HW Encoder */
565 break;
d19770e5 566 default:
13697380
ST		 567 printk(KERN_WARNING "%s: warning: "
568 "unknown hauppauge model #%d\n",
9c8ced51 569 dev->name, tv.model);
d19770e5
ST		 570 break;
571 }
572
573 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
574 dev->name, tv.model);
575}
576
d7cba043 577int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 578{
89ce2216
ST		 579 struct cx23885_tsport *port = priv;
580 struct cx23885_dev *dev = port->dev;
6df51690
ST		 581 u32 bitmask = 0;
582
89ce2216
ST		 583 if (command == XC2028_RESET_CLK)
584 return 0;
585
6df51690
ST		 586 if (command != 0) {
587 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
588 __func__, command);
589 return -EINVAL;
590 }
8c70017f 591
9c8ced51 592 switch (dev->board) {
90a71b1c
ST		 593 case CX23885_BOARD_HAUPPAUGE_HVR1400:
594 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 595 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 596 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 597 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 598 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
90a71b1c 599 /* Tuner Reset Command */
4c56b04a 600 bitmask = 0x04;
6df51690
ST		 601 break;
602 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 603 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 604 /* Two identical tuners on two different i2c buses,
605 * we need to reset the correct gpio. */
d4dc673d 606 if (port->nr == 1)
4c56b04a 607 bitmask = 0x01;
d4dc673d 608 else if (port->nr == 2)
4c56b04a 609 bitmask = 0x04;
8c70017f
ST		 610 break;
611 }
612
6df51690
ST		 613 if (bitmask) {
614 /* Drive the tuner into reset and back out */
615 cx_clear(GP0_IO, bitmask);
616 mdelay(200);
617 cx_set(GP0_IO, bitmask);
618 }
619
620 return 0;
8c70017f 621}
73c993a8 622
a6a3f140
ST		 623void cx23885_gpio_setup(struct cx23885_dev *dev)
624{
9c8ced51 625 switch (dev->board) {
a6a3f140
ST		 626 case CX23885_BOARD_HAUPPAUGE_HVR1250:
627 /* GPIO-0 cx24227 demodulator reset */
628 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
629 break;
07b4a835
MK		 630 case CX23885_BOARD_HAUPPAUGE_HVR1500:
631 /* GPIO-0 cx24227 demodulator */
632 /* GPIO-2 xc3028 tuner */
633
634 /* Put the parts into reset */
635 cx_set(GP0_IO, 0x00050000);
636 cx_clear(GP0_IO, 0x00000005);
637 msleep(5);
638
639 /* Bring the parts out of reset */
640 cx_set(GP0_IO, 0x00050005);
641 break;
d1987d55
ST		 642 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
643 /* GPIO-0 cx24227 demodulator reset */
644 /* GPIO-2 xc5000 tuner reset */
645 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
646 break;
a6a3f140
ST		 647 case CX23885_BOARD_HAUPPAUGE_HVR1800:
648 /* GPIO-0 656_CLK */
649 /* GPIO-1 656_D0 */
650 /* GPIO-2 8295A Reset */
651 /* GPIO-3-10 cx23417 data0-7 */
652 /* GPIO-11-14 cx23417 addr0-3 */
653 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
654 /* GPIO-19 IR_RX */
3ba71d21 655
a589b665
ST		 656 /* CX23417 GPIO's */
657 /* EIO15 Zilog Reset */
658 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 659 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
660
661 /* Put the demod into reset and protect the eeprom */
662 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
663 mdelay(100);
664
665 /* Bring the demod and blaster out of reset */
666 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
667 mdelay(100);
a589b665 668
5206d6ec 669 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 670 cx23885_gpio_enable(dev, GPIO_2, 1);
671 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 672 mdelay(20);
21ff3e4f 673 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 674 mdelay(20);
21ff3e4f 675 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 676 mdelay(20);
a6a3f140 677 break;
b3ea0166
ST		 678 case CX23885_BOARD_HAUPPAUGE_HVR1200:
679 /* GPIO-0 tda10048 demodulator reset */
680 /* GPIO-2 tda18271 tuner reset */
681
a780a31c
ST		 682 /* Put the parts into reset and back */
683 cx_set(GP0_IO, 0x00050000);
684 mdelay(20);
685 cx_clear(GP0_IO, 0x00000005);
686 mdelay(20);
687 cx_set(GP0_IO, 0x00050005);
688 break;
689 case CX23885_BOARD_HAUPPAUGE_HVR1700:
690 /* GPIO-0 TDA10048 demodulator reset */
691 /* GPIO-2 TDA8295A Reset */
692 /* GPIO-3-10 cx23417 data0-7 */
693 /* GPIO-11-14 cx23417 addr0-3 */
694 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
695
696 /* The following GPIO's are on the interna AVCore (cx25840) */
697 /* GPIO-19 IR_RX */
698 /* GPIO-20 IR_TX 416/DVBT Select */
699 /* GPIO-21 IIS DAT */
700 /* GPIO-22 IIS WCLK */
701 /* GPIO-23 IIS BCLK */
702
66762373
ST		 703 /* Put the parts into reset and back */
704 cx_set(GP0_IO, 0x00050000);
705 mdelay(20);
706 cx_clear(GP0_IO, 0x00000005);
707 mdelay(20);
708 cx_set(GP0_IO, 0x00050005);
709 break;
710 case CX23885_BOARD_HAUPPAUGE_HVR1400:
711 /* GPIO-0 Dibcom7000p demodulator reset */
712 /* GPIO-2 xc3028L tuner reset */
713 /* GPIO-13 LED */
714
b3ea0166
ST		 715 /* Put the parts into reset and back */
716 cx_set(GP0_IO, 0x00050000);
717 mdelay(20);
718 cx_clear(GP0_IO, 0x00000005);
719 mdelay(20);
720 cx_set(GP0_IO, 0x00050005);
721 break;
1ecc5aed
ST		 722 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
723 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
724 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
725 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
726 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
727
aef2d186
ST		 728 /* Put the parts into reset and back */
729 cx_set(GP0_IO, 0x000f0000);
730 mdelay(20);
731 cx_clear(GP0_IO, 0x0000000f);
732 mdelay(20);
733 cx_set(GP0_IO, 0x000f000f);
734 break;
735 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
736 /* GPIO-0 portb xc3028 reset */
737 /* GPIO-1 portb zl10353 reset */
738 /* GPIO-2 portc xc3028 reset */
739 /* GPIO-3 portc zl10353 reset */
740
1ecc5aed
ST		 741 /* Put the parts into reset and back */
742 cx_set(GP0_IO, 0x000f0000);
743 mdelay(20);
744 cx_clear(GP0_IO, 0x0000000f);
745 mdelay(20);
746 cx_set(GP0_IO, 0x000f000f);
747 break;
4c56b04a 748 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 749 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 750 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 751 /* GPIO-2 xc3028 tuner reset */
752
753 /* The following GPIO's are on the internal AVCore (cx25840) */
754 /* GPIO-? zl10353 demod reset */
755
756 /* Put the parts into reset and back */
757 cx_set(GP0_IO, 0x00040000);
758 mdelay(20);
759 cx_clear(GP0_IO, 0x00000004);
760 mdelay(20);
761 cx_set(GP0_IO, 0x00040004);
762 break;
96318d0c 763 case CX23885_BOARD_TBS_6920:
579943f5 764 case CX23885_BOARD_TEVII_S470:
96318d0c
IL		 765 cx_write(MC417_CTL, 0x00000036);
766 cx_write(MC417_OEN, 0x00001000);
767 cx_write(MC417_RWD, 0x00001800);
768 break;
5a23b076
IL		 769 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
770 /* GPIO-0 INTA from CiMax1
771 GPIO-1 INTB from CiMax2
772 GPIO-2 reset chips
773 GPIO-3 to GPIO-10 data/addr for CA
774 GPIO-11 ~CS0 to CiMax1
775 GPIO-12 ~CS1 to CiMax2
776 GPIO-13 ADL0 load LSB addr
777 GPIO-14 ADL1 load MSB addr
778 GPIO-15 ~RDY from CiMax
779 GPIO-17 ~RD to CiMax
780 GPIO-18 ~WR to CiMax
781 */
782 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
783 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
784 cx_clear(GP0_IO, 0x00030004);
785 mdelay(100);/* reset delay */
786 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
787 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
788 /* GPIO-15 IN as ~ACK, rest as OUT */
789 cx_write(MC417_OEN, 0x00001000);
790 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
791 cx_write(MC417_RWD, 0x0000c300);
792 /* enable irq */
793 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
794 break;
2074dffa 795 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 796 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 797 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 798 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 799 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 800 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
801 /* GPIO-9 Demod reset */
2074dffa
ST		 802
803 /* Put the parts into reset and back */
d099becb
MK		 804 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
805 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 806 cx23885_gpio_clear(dev, GPIO_9);
807 mdelay(20);
808 cx23885_gpio_set(dev, GPIO_9);
809 break;
493b7127 810 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 811 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
8e069bb9 812 /* GPIO-0 (0)Analog / (1)Digital TV */
493b7127 813 /* GPIO-1 reset XC5000 */
2365b2d3 814 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
8e069bb9
DW		 815 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
816 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
493b7127 817 mdelay(100);
8e069bb9 818 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
493b7127
DW		 819 mdelay(100);
820 break;
13697380
ST		 821 case CX23885_BOARD_HAUPPAUGE_HVR1850:
822 /* GPIO-0 656_CLK */
823 /* GPIO-1 656_D0 */
824 /* GPIO-2 Wake# */
825 /* GPIO-3-10 cx23417 data0-7 */
826 /* GPIO-11-14 cx23417 addr0-3 */
827 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
828 /* GPIO-19 IR_RX */
829 /* GPIO-20 C_IR_TX */
830 /* GPIO-21 I2S DAT */
831 /* GPIO-22 I2S WCLK */
832 /* GPIO-23 I2S BCLK */
833 /* ALT GPIO: EXP GPIO LATCH */
834
835 /* CX23417 GPIO's */
836 /* GPIO-14 S5H1411/CX24228 Reset */
837 /* GPIO-13 EEPROM write protect */
838 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
839
840 /* Put the demod into reset and protect the eeprom */
841 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
842 mdelay(100);
843
844 /* Bring the demod out of reset */
845 mc417_gpio_set(dev, GPIO_14);
846 mdelay(100);
847
848 /* CX24228 GPIO */
849 /* Connected to IF / Mux */
850 break;
a6a3f140
ST		 851 }
852}
853
854int cx23885_ir_init(struct cx23885_dev *dev)
855{
29f8a0a5 856 int ret = 0;
a6a3f140
ST		 857 switch (dev->board) {
858 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 859 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 860 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 861 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 862 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 863 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 864 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 865 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 866 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 867 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 868 /* FIXME: Implement me */
869 break;
29f8a0a5
AW		 870 case CX23885_BOARD_HAUPPAUGE_HVR1850:
871 ret = cx23888_ir_probe(dev);
872 if (ret)
873 break;
874 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
f59ad611 875 dev->pci_irqmask |= PCI_MSK_IR;
29f8a0a5 876 break;
12886871
ST		 877 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
878 request_module("ir-kbd-i2c");
879 break;
a6a3f140
ST		 880 }
881
29f8a0a5 882 return ret;
a6a3f140
ST		 883}
884
f59ad611
AW		 885void cx23885_ir_fini(struct cx23885_dev *dev)
886{
887 switch (dev->board) {
888 case CX23885_BOARD_HAUPPAUGE_HVR1850:
889 dev->pci_irqmask &= ~PCI_MSK_IR;
890 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
891 cx23888_ir_remove(dev);
892 dev->sd_ir = NULL;
893 break;
894 }
895}
896
897void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
898{
899 switch (dev->board) {
900 case CX23885_BOARD_HAUPPAUGE_HVR1850:
901 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
902 cx_set(PCI_INT_MSK, PCI_MSK_IR);
903 break;
904 }
905}
906
d19770e5
ST		 907void cx23885_card_setup(struct cx23885_dev *dev)
908{
a6a3f140
ST		 909 struct cx23885_tsport *ts1 = &dev->ts1;
910 struct cx23885_tsport *ts2 = &dev->ts2;
911
d19770e5
ST		 912 static u8 eeprom[256];
913
914 if (dev->i2c_bus[0].i2c_rc == 0) {
915 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 916 tveeprom_read(&dev->i2c_bus[0].i2c_client,
917 eeprom, sizeof(eeprom));
d19770e5
ST		 918 }
919
920 switch (dev->board) {
a77743bc 921 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 922 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 923 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 924 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 925 if (dev->i2c_bus[0].i2c_rc == 0)
926 hauppauge_eeprom(dev, eeprom+0x80);
927 break;
d19770e5
ST		 928 case CX23885_BOARD_HAUPPAUGE_HVR1800:
929 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 930 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 931 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 932 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 933 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 934 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 935 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 936 case CX23885_BOARD_HAUPPAUGE_HVR1850:
d19770e5 937 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 938 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 939 break;
940 }
a6a3f140
ST		 941
942 switch (dev->board) {
335377b7 943 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 944 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 945 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
946 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
947 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
948 /* break omitted intentionally */
a6a3f140
ST		 949 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
950 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
951 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
952 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
953 break;
a589b665
ST		 954 case CX23885_BOARD_HAUPPAUGE_HVR1800:
955 /* Defaults for VID B - Analog encoder */
956 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
957 ts1->gen_ctrl_val = 0x10e;
958 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
959 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
960
961 /* APB_TSVALERR_POL (active low)*/
962 ts1->vld_misc_val = 0x2000;
963 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
964
965 /* Defaults for VID C */
966 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
967 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
968 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 969 break;
579943f5 970 case CX23885_BOARD_TEVII_S470:
96318d0c 971 case CX23885_BOARD_TBS_6920:
c9b8b04b 972 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 973 ts1->gen_ctrl_val = 0x5; /* Parallel */
974 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
975 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 976 break;
5a23b076
IL		 977 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
978 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
979 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
980 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
981 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
982 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
983 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
984 break;
493b7127 985 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 986 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 987 ts1->gen_ctrl_val = 0x5; /* Parallel */
988 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
989 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
990 break;
a6a3f140 991 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 992 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 993 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 994 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 995 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 996 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 997 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 998 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 999 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 1000 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1001 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1002 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 1003 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 1004 case CX23885_BOARD_HAUPPAUGE_HVR1850:
34e383dd 1005 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
a6a3f140
ST		 1006 default:
1007 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1008 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1009 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1010 }
1011
ce89cfb4
ST		 1012 /* Certain boards support analog, or require the avcore to be
1013 * loaded, ensure this happens.
1014 */
1015 switch (dev->board) {
1016 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1017 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1018 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 1019 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1020 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 1021 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
34e383dd 1022 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
c6b7053b 1023 case CX23885_BOARD_HAUPPAUGE_HVR1850:
bc1548ad
DW		 1024 case CX23885_BOARD_MYGICA_X8506:
1025 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
e6574f2f
HV		 1026 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1027 &dev->i2c_bus[2].i2c_adap,
53dacb15 1028 "cx25840", "cx25840", 0x88 >> 1, NULL);
cc26b076 1029 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 1030 break;
1031 }
5a23b076
IL		 1032
1033 /* AUX-PLL 27MHz CLK */
1034 switch (dev->board) {
1035 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1036 netup_initialize(dev);
1037 break;
1038 }
d19770e5
ST		 1039}
1040
1041/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
This page took 0.570323 seconds and 5 git commands to generate.