Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/delay.h> | |
7b888014 | 26 | #include <media/cx25840.h> |
78db8547 | 27 | #include <linux/firmware.h> |
cff4fa84 | 28 | #include <misc/altera.h> |
d19770e5 ST |
29 | |
30 | #include "cx23885.h" | |
90a71b1c | 31 | #include "tuner-xc2028.h" |
b8f0d306 | 32 | #include "netup-eeprom.h" |
5a23b076 | 33 | #include "netup-init.h" |
78db8547 | 34 | #include "altera-ci.h" |
0cf8af57 | 35 | #include "xc4000.h" |
78db8547 | 36 | #include "xc5000.h" |
29f8a0a5 | 37 | #include "cx23888-ir.h" |
d19770e5 | 38 | |
2d12421d AO |
39 | static unsigned int netup_card_rev = 1; |
40 | module_param(netup_card_rev, int, 0644); | |
41 | MODULE_PARM_DESC(netup_card_rev, | |
42 | "NetUP Dual DVB-T/C CI card revision"); | |
fa647f24 AW |
43 | static unsigned int enable_885_ir; |
44 | module_param(enable_885_ir, int, 0644); | |
45 | MODULE_PARM_DESC(enable_885_ir, | |
46 | "Enable integrated IR controller for supported\n" | |
47 | "\t\t CX2388[57] boards that are wired for it:\n" | |
48 | "\t\t\tHVR-1250 (reported safe)\n" | |
49 | "\t\t\tTeVii S470 (reported unsafe)\n" | |
50 | "\t\t This can cause an interrupt storm with some cards.\n" | |
51 | "\t\t Default: 0 [Disabled]"); | |
52 | ||
d19770e5 ST |
53 | /* ------------------------------------------------------------------ */ |
54 | /* board config info */ | |
55 | ||
56 | struct cx23885_board cx23885_boards[] = { | |
57 | [CX23885_BOARD_UNKNOWN] = { | |
58 | .name = "UNKNOWN/GENERIC", | |
c7712613 ST |
59 | /* Ensure safe default for unknown boards */ |
60 | .clk_freq = 0, | |
d19770e5 ST |
61 | .input = {{ |
62 | .type = CX23885_VMUX_COMPOSITE1, | |
63 | .vmux = 0, | |
9c8ced51 | 64 | }, { |
d19770e5 ST |
65 | .type = CX23885_VMUX_COMPOSITE2, |
66 | .vmux = 1, | |
9c8ced51 | 67 | }, { |
d19770e5 ST |
68 | .type = CX23885_VMUX_COMPOSITE3, |
69 | .vmux = 2, | |
9c8ced51 | 70 | }, { |
d19770e5 ST |
71 | .type = CX23885_VMUX_COMPOSITE4, |
72 | .vmux = 3, | |
9c8ced51 | 73 | } }, |
d19770e5 ST |
74 | }, |
75 | [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = { | |
76 | .name = "Hauppauge WinTV-HVR1800lp", | |
d19770e5 ST |
77 | .portc = CX23885_MPEG_DVB, |
78 | .input = {{ | |
79 | .type = CX23885_VMUX_TELEVISION, | |
80 | .vmux = 0, | |
81 | .gpio0 = 0xff00, | |
9c8ced51 | 82 | }, { |
d19770e5 ST |
83 | .type = CX23885_VMUX_DEBUG, |
84 | .vmux = 0, | |
85 | .gpio0 = 0xff01, | |
9c8ced51 | 86 | }, { |
d19770e5 ST |
87 | .type = CX23885_VMUX_COMPOSITE1, |
88 | .vmux = 1, | |
89 | .gpio0 = 0xff02, | |
9c8ced51 | 90 | }, { |
d19770e5 ST |
91 | .type = CX23885_VMUX_SVIDEO, |
92 | .vmux = 2, | |
93 | .gpio0 = 0xff02, | |
9c8ced51 | 94 | } }, |
d19770e5 ST |
95 | }, |
96 | [CX23885_BOARD_HAUPPAUGE_HVR1800] = { | |
97 | .name = "Hauppauge WinTV-HVR1800", | |
7b888014 | 98 | .porta = CX23885_ANALOG_VIDEO, |
a589b665 | 99 | .portb = CX23885_MPEG_ENCODER, |
d19770e5 | 100 | .portc = CX23885_MPEG_DVB, |
7b888014 ST |
101 | .tuner_type = TUNER_PHILIPS_TDA8290, |
102 | .tuner_addr = 0x42, /* 0x84 >> 1 */ | |
557f48d5 | 103 | .tuner_bus = 1, |
d19770e5 ST |
104 | .input = {{ |
105 | .type = CX23885_VMUX_TELEVISION, | |
7b888014 ST |
106 | .vmux = CX25840_VIN7_CH3 | |
107 | CX25840_VIN5_CH2 | | |
108 | CX25840_VIN2_CH1, | |
33cdeb35 | 109 | .amux = CX25840_AUDIO8, |
7b888014 | 110 | .gpio0 = 0, |
9c8ced51 | 111 | }, { |
d19770e5 | 112 | .type = CX23885_VMUX_COMPOSITE1, |
7b888014 ST |
113 | .vmux = CX25840_VIN7_CH3 | |
114 | CX25840_VIN4_CH2 | | |
115 | CX25840_VIN6_CH1, | |
33cdeb35 | 116 | .amux = CX25840_AUDIO7, |
7b888014 | 117 | .gpio0 = 0, |
9c8ced51 | 118 | }, { |
d19770e5 | 119 | .type = CX23885_VMUX_SVIDEO, |
7b888014 ST |
120 | .vmux = CX25840_VIN7_CH3 | |
121 | CX25840_VIN4_CH2 | | |
122 | CX25840_VIN8_CH1 | | |
123 | CX25840_SVIDEO_ON, | |
33cdeb35 | 124 | .amux = CX25840_AUDIO7, |
7b888014 | 125 | .gpio0 = 0, |
9c8ced51 | 126 | } }, |
d19770e5 | 127 | }, |
a77743bc ST |
128 | [CX23885_BOARD_HAUPPAUGE_HVR1250] = { |
129 | .name = "Hauppauge WinTV-HVR1250", | |
130 | .portc = CX23885_MPEG_DVB, | |
131 | .input = {{ | |
132 | .type = CX23885_VMUX_TELEVISION, | |
133 | .vmux = 0, | |
134 | .gpio0 = 0xff00, | |
9c8ced51 | 135 | }, { |
a77743bc ST |
136 | .type = CX23885_VMUX_DEBUG, |
137 | .vmux = 0, | |
138 | .gpio0 = 0xff01, | |
9c8ced51 | 139 | }, { |
a77743bc ST |
140 | .type = CX23885_VMUX_COMPOSITE1, |
141 | .vmux = 1, | |
142 | .gpio0 = 0xff02, | |
9c8ced51 | 143 | }, { |
a77743bc ST |
144 | .type = CX23885_VMUX_SVIDEO, |
145 | .vmux = 2, | |
146 | .gpio0 = 0xff02, | |
9c8ced51 | 147 | } }, |
a77743bc | 148 | }, |
9bc37caa MK |
149 | [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { |
150 | .name = "DViCO FusionHDTV5 Express", | |
a6a3f140 | 151 | .portb = CX23885_MPEG_DVB, |
9bc37caa | 152 | }, |
d1987d55 ST |
153 | [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = { |
154 | .name = "Hauppauge WinTV-HVR1500Q", | |
155 | .portc = CX23885_MPEG_DVB, | |
156 | }, | |
07b4a835 MK |
157 | [CX23885_BOARD_HAUPPAUGE_HVR1500] = { |
158 | .name = "Hauppauge WinTV-HVR1500", | |
18d64476 | 159 | .porta = CX23885_ANALOG_VIDEO, |
07b4a835 | 160 | .portc = CX23885_MPEG_DVB, |
18d64476 MM |
161 | .tuner_type = TUNER_XC2028, |
162 | .tuner_addr = 0x61, /* 0xc2 >> 1 */ | |
163 | .input = {{ | |
164 | .type = CX23885_VMUX_TELEVISION, | |
165 | .vmux = CX25840_VIN7_CH3 | | |
166 | CX25840_VIN5_CH2 | | |
167 | CX25840_VIN2_CH1, | |
168 | .gpio0 = 0, | |
169 | }, { | |
170 | .type = CX23885_VMUX_COMPOSITE1, | |
171 | .vmux = CX25840_VIN7_CH3 | | |
172 | CX25840_VIN4_CH2 | | |
173 | CX25840_VIN6_CH1, | |
174 | .gpio0 = 0, | |
175 | }, { | |
176 | .type = CX23885_VMUX_SVIDEO, | |
177 | .vmux = CX25840_VIN7_CH3 | | |
178 | CX25840_VIN4_CH2 | | |
179 | CX25840_VIN8_CH1 | | |
180 | CX25840_SVIDEO_ON, | |
181 | .gpio0 = 0, | |
182 | } }, | |
07b4a835 | 183 | }, |
b3ea0166 ST |
184 | [CX23885_BOARD_HAUPPAUGE_HVR1200] = { |
185 | .name = "Hauppauge WinTV-HVR1200", | |
186 | .portc = CX23885_MPEG_DVB, | |
187 | }, | |
a780a31c ST |
188 | [CX23885_BOARD_HAUPPAUGE_HVR1700] = { |
189 | .name = "Hauppauge WinTV-HVR1700", | |
190 | .portc = CX23885_MPEG_DVB, | |
191 | }, | |
66762373 ST |
192 | [CX23885_BOARD_HAUPPAUGE_HVR1400] = { |
193 | .name = "Hauppauge WinTV-HVR1400", | |
194 | .portc = CX23885_MPEG_DVB, | |
195 | }, | |
335377b7 MK |
196 | [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = { |
197 | .name = "DViCO FusionHDTV7 Dual Express", | |
aaadeac8 | 198 | .portb = CX23885_MPEG_DVB, |
335377b7 MK |
199 | .portc = CX23885_MPEG_DVB, |
200 | }, | |
aef2d186 ST |
201 | [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = { |
202 | .name = "DViCO FusionHDTV DVB-T Dual Express", | |
203 | .portb = CX23885_MPEG_DVB, | |
204 | .portc = CX23885_MPEG_DVB, | |
205 | }, | |
4c56b04a ST |
206 | [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = { |
207 | .name = "Leadtek Winfast PxDVR3200 H", | |
208 | .portc = CX23885_MPEG_DVB, | |
209 | }, | |
0cf8af57 | 210 | [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { |
211 | .name = "Leadtek Winfast PxDVR3200 H XC4000", | |
212 | .porta = CX23885_ANALOG_VIDEO, | |
213 | .portc = CX23885_MPEG_DVB, | |
214 | .tuner_type = TUNER_XC4000, | |
215 | .tuner_addr = 0x61, | |
216 | .radio_type = TUNER_XC4000, | |
217 | .radio_addr = 0x61, | |
218 | .input = {{ | |
219 | .type = CX23885_VMUX_TELEVISION, | |
220 | .vmux = CX25840_VIN2_CH1 | | |
221 | CX25840_VIN5_CH2 | | |
222 | CX25840_NONE0_CH3, | |
223 | }, { | |
224 | .type = CX23885_VMUX_COMPOSITE1, | |
225 | .vmux = CX25840_COMPOSITE1, | |
226 | }, { | |
227 | .type = CX23885_VMUX_SVIDEO, | |
228 | .vmux = CX25840_SVIDEO_LUMA3 | | |
229 | CX25840_SVIDEO_CHROMA4, | |
230 | }, { | |
231 | .type = CX23885_VMUX_COMPONENT, | |
232 | .vmux = CX25840_VIN7_CH1 | | |
233 | CX25840_VIN6_CH2 | | |
234 | CX25840_VIN8_CH3 | | |
235 | CX25840_COMPONENT_ON, | |
236 | } }, | |
237 | }, | |
9bb1b7e8 IL |
238 | [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { |
239 | .name = "Compro VideoMate E650F", | |
240 | .portc = CX23885_MPEG_DVB, | |
241 | }, | |
96318d0c IL |
242 | [CX23885_BOARD_TBS_6920] = { |
243 | .name = "TurboSight TBS 6920", | |
244 | .portb = CX23885_MPEG_DVB, | |
245 | }, | |
579943f5 IL |
246 | [CX23885_BOARD_TEVII_S470] = { |
247 | .name = "TeVii S470", | |
248 | .portb = CX23885_MPEG_DVB, | |
249 | }, | |
c9b8b04b IL |
250 | [CX23885_BOARD_DVBWORLD_2005] = { |
251 | .name = "DVBWorld DVB-S2 2005", | |
252 | .portb = CX23885_MPEG_DVB, | |
253 | }, | |
5a23b076 | 254 | [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = { |
78db8547 | 255 | .ci_type = 1, |
5a23b076 IL |
256 | .name = "NetUP Dual DVB-S2 CI", |
257 | .portb = CX23885_MPEG_DVB, | |
258 | .portc = CX23885_MPEG_DVB, | |
259 | }, | |
2074dffa ST |
260 | [CX23885_BOARD_HAUPPAUGE_HVR1270] = { |
261 | .name = "Hauppauge WinTV-HVR1270", | |
a5dbf457 | 262 | .portc = CX23885_MPEG_DVB, |
2074dffa | 263 | }, |
d099becb MK |
264 | [CX23885_BOARD_HAUPPAUGE_HVR1275] = { |
265 | .name = "Hauppauge WinTV-HVR1275", | |
266 | .portc = CX23885_MPEG_DVB, | |
267 | }, | |
19bc5796 MK |
268 | [CX23885_BOARD_HAUPPAUGE_HVR1255] = { |
269 | .name = "Hauppauge WinTV-HVR1255", | |
270 | .portc = CX23885_MPEG_DVB, | |
271 | }, | |
6b926eca MK |
272 | [CX23885_BOARD_HAUPPAUGE_HVR1210] = { |
273 | .name = "Hauppauge WinTV-HVR1210", | |
274 | .portc = CX23885_MPEG_DVB, | |
275 | }, | |
493b7127 DW |
276 | [CX23885_BOARD_MYGICA_X8506] = { |
277 | .name = "Mygica X8506 DMB-TH", | |
6f0d8c02 DW |
278 | .tuner_type = TUNER_XC5000, |
279 | .tuner_addr = 0x61, | |
557f48d5 | 280 | .tuner_bus = 1, |
bc1548ad | 281 | .porta = CX23885_ANALOG_VIDEO, |
493b7127 | 282 | .portb = CX23885_MPEG_DVB, |
bc1548ad | 283 | .input = { |
6f0d8c02 DW |
284 | { |
285 | .type = CX23885_VMUX_TELEVISION, | |
286 | .vmux = CX25840_COMPOSITE2, | |
287 | }, | |
bc1548ad DW |
288 | { |
289 | .type = CX23885_VMUX_COMPOSITE1, | |
290 | .vmux = CX25840_COMPOSITE8, | |
291 | }, | |
292 | { | |
293 | .type = CX23885_VMUX_SVIDEO, | |
294 | .vmux = CX25840_SVIDEO_LUMA3 | | |
295 | CX25840_SVIDEO_CHROMA4, | |
296 | }, | |
297 | { | |
298 | .type = CX23885_VMUX_COMPONENT, | |
299 | .vmux = CX25840_COMPONENT_ON | | |
300 | CX25840_VIN1_CH1 | | |
301 | CX25840_VIN6_CH2 | | |
302 | CX25840_VIN7_CH3, | |
303 | }, | |
304 | }, | |
493b7127 | 305 | }, |
2365b2d3 DW |
306 | [CX23885_BOARD_MAGICPRO_PROHDTVE2] = { |
307 | .name = "Magic-Pro ProHDTV Extreme 2", | |
6f0d8c02 DW |
308 | .tuner_type = TUNER_XC5000, |
309 | .tuner_addr = 0x61, | |
557f48d5 | 310 | .tuner_bus = 1, |
bc1548ad | 311 | .porta = CX23885_ANALOG_VIDEO, |
2365b2d3 | 312 | .portb = CX23885_MPEG_DVB, |
bc1548ad | 313 | .input = { |
6f0d8c02 DW |
314 | { |
315 | .type = CX23885_VMUX_TELEVISION, | |
316 | .vmux = CX25840_COMPOSITE2, | |
317 | }, | |
bc1548ad DW |
318 | { |
319 | .type = CX23885_VMUX_COMPOSITE1, | |
320 | .vmux = CX25840_COMPOSITE8, | |
321 | }, | |
322 | { | |
323 | .type = CX23885_VMUX_SVIDEO, | |
324 | .vmux = CX25840_SVIDEO_LUMA3 | | |
325 | CX25840_SVIDEO_CHROMA4, | |
326 | }, | |
327 | { | |
328 | .type = CX23885_VMUX_COMPONENT, | |
329 | .vmux = CX25840_COMPONENT_ON | | |
330 | CX25840_VIN1_CH1 | | |
331 | CX25840_VIN6_CH2 | | |
332 | CX25840_VIN7_CH3, | |
333 | }, | |
334 | }, | |
2365b2d3 | 335 | }, |
13697380 ST |
336 | [CX23885_BOARD_HAUPPAUGE_HVR1850] = { |
337 | .name = "Hauppauge WinTV-HVR1850", | |
338 | .portb = CX23885_MPEG_ENCODER, | |
339 | .portc = CX23885_MPEG_DVB, | |
340 | }, | |
34e383dd VG |
341 | [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { |
342 | .name = "Compro VideoMate E800", | |
343 | .portc = CX23885_MPEG_DVB, | |
344 | }, | |
aee0b24c MK |
345 | [CX23885_BOARD_HAUPPAUGE_HVR1290] = { |
346 | .name = "Hauppauge WinTV-HVR1290", | |
347 | .portc = CX23885_MPEG_DVB, | |
348 | }, | |
ea5697fe DW |
349 | [CX23885_BOARD_MYGICA_X8558PRO] = { |
350 | .name = "Mygica X8558 PRO DMB-TH", | |
351 | .portb = CX23885_MPEG_DVB, | |
352 | .portc = CX23885_MPEG_DVB, | |
353 | }, | |
0b32d65c KK |
354 | [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = { |
355 | .name = "LEADTEK WinFast PxTV1200", | |
356 | .porta = CX23885_ANALOG_VIDEO, | |
357 | .tuner_type = TUNER_XC2028, | |
358 | .tuner_addr = 0x61, | |
557f48d5 | 359 | .tuner_bus = 1, |
0b32d65c KK |
360 | .input = {{ |
361 | .type = CX23885_VMUX_TELEVISION, | |
362 | .vmux = CX25840_VIN2_CH1 | | |
363 | CX25840_VIN5_CH2 | | |
364 | CX25840_NONE0_CH3, | |
365 | }, { | |
366 | .type = CX23885_VMUX_COMPOSITE1, | |
367 | .vmux = CX25840_COMPOSITE1, | |
368 | }, { | |
369 | .type = CX23885_VMUX_SVIDEO, | |
370 | .vmux = CX25840_SVIDEO_LUMA3 | | |
371 | CX25840_SVIDEO_CHROMA4, | |
372 | }, { | |
373 | .type = CX23885_VMUX_COMPONENT, | |
374 | .vmux = CX25840_VIN7_CH1 | | |
375 | CX25840_VIN6_CH2 | | |
376 | CX25840_VIN8_CH3 | | |
377 | CX25840_COMPONENT_ON, | |
378 | } }, | |
379 | }, | |
9028f58f AC |
380 | [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = { |
381 | .name = "GoTView X5 3D Hybrid", | |
382 | .tuner_type = TUNER_XC5000, | |
383 | .tuner_addr = 0x64, | |
557f48d5 | 384 | .tuner_bus = 1, |
9028f58f AC |
385 | .porta = CX23885_ANALOG_VIDEO, |
386 | .portb = CX23885_MPEG_DVB, | |
387 | .input = {{ | |
388 | .type = CX23885_VMUX_TELEVISION, | |
389 | .vmux = CX25840_VIN2_CH1 | | |
390 | CX25840_VIN5_CH2, | |
391 | .gpio0 = 0x02, | |
392 | }, { | |
393 | .type = CX23885_VMUX_COMPOSITE1, | |
394 | .vmux = CX23885_VMUX_COMPOSITE1, | |
395 | }, { | |
396 | .type = CX23885_VMUX_SVIDEO, | |
397 | .vmux = CX25840_SVIDEO_LUMA3 | | |
398 | CX25840_SVIDEO_CHROMA4, | |
399 | } }, | |
400 | }, | |
78db8547 IL |
401 | [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = { |
402 | .ci_type = 2, | |
403 | .name = "NetUP Dual DVB-T/C-CI RF", | |
404 | .porta = CX23885_ANALOG_VIDEO, | |
405 | .portb = CX23885_MPEG_DVB, | |
406 | .portc = CX23885_MPEG_DVB, | |
10d0dcd7 IL |
407 | .num_fds_portb = 2, |
408 | .num_fds_portc = 2, | |
78db8547 IL |
409 | .tuner_type = TUNER_XC5000, |
410 | .tuner_addr = 0x64, | |
411 | .input = { { | |
412 | .type = CX23885_VMUX_TELEVISION, | |
413 | .vmux = CX25840_COMPOSITE1, | |
414 | } }, | |
415 | }, | |
2cb9ccd4 ST |
416 | [CX23885_BOARD_MPX885] = { |
417 | .name = "MPX-885", | |
418 | .porta = CX23885_ANALOG_VIDEO, | |
419 | .input = {{ | |
420 | .type = CX23885_VMUX_COMPOSITE1, | |
421 | .vmux = CX25840_COMPOSITE1, | |
422 | .amux = CX25840_AUDIO6, | |
423 | .gpio0 = 0, | |
424 | }, { | |
425 | .type = CX23885_VMUX_COMPOSITE2, | |
426 | .vmux = CX25840_COMPOSITE2, | |
427 | .amux = CX25840_AUDIO6, | |
428 | .gpio0 = 0, | |
429 | }, { | |
430 | .type = CX23885_VMUX_COMPOSITE3, | |
431 | .vmux = CX25840_COMPOSITE3, | |
432 | .amux = CX25840_AUDIO7, | |
433 | .gpio0 = 0, | |
434 | }, { | |
435 | .type = CX23885_VMUX_COMPOSITE4, | |
436 | .vmux = CX25840_COMPOSITE4, | |
437 | .amux = CX25840_AUDIO7, | |
438 | .gpio0 = 0, | |
439 | } }, | |
440 | }, | |
87988753 AJD |
441 | [CX23885_BOARD_MYGICA_X8507] = { |
442 | .name = "Mygica X8507", | |
443 | .tuner_type = TUNER_XC5000, | |
444 | .tuner_addr = 0x61, | |
445 | .tuner_bus = 1, | |
446 | .porta = CX23885_ANALOG_VIDEO, | |
447 | .input = { | |
448 | { | |
449 | .type = CX23885_VMUX_TELEVISION, | |
450 | .vmux = CX25840_COMPOSITE2, | |
451 | .amux = CX25840_AUDIO8, | |
452 | }, | |
453 | { | |
454 | .type = CX23885_VMUX_COMPOSITE1, | |
455 | .vmux = CX25840_COMPOSITE8, | |
456 | }, | |
457 | { | |
458 | .type = CX23885_VMUX_SVIDEO, | |
459 | .vmux = CX25840_SVIDEO_LUMA3 | | |
460 | CX25840_SVIDEO_CHROMA4, | |
461 | }, | |
462 | { | |
463 | .type = CX23885_VMUX_COMPONENT, | |
464 | .vmux = CX25840_COMPONENT_ON | | |
465 | CX25840_VIN1_CH1 | | |
466 | CX25840_VIN6_CH2 | | |
467 | CX25840_VIN7_CH3, | |
468 | }, | |
469 | }, | |
470 | } | |
d19770e5 ST |
471 | }; |
472 | const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); | |
473 | ||
474 | /* ------------------------------------------------------------------ */ | |
475 | /* PCI subsystem IDs */ | |
476 | ||
477 | struct cx23885_subid cx23885_subids[] = { | |
478 | { | |
479 | .subvendor = 0x0070, | |
480 | .subdevice = 0x3400, | |
481 | .card = CX23885_BOARD_UNKNOWN, | |
9c8ced51 | 482 | }, { |
d19770e5 ST |
483 | .subvendor = 0x0070, |
484 | .subdevice = 0x7600, | |
485 | .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp, | |
9c8ced51 | 486 | }, { |
d19770e5 ST |
487 | .subvendor = 0x0070, |
488 | .subdevice = 0x7800, | |
489 | .card = CX23885_BOARD_HAUPPAUGE_HVR1800, | |
9c8ced51 | 490 | }, { |
d19770e5 ST |
491 | .subvendor = 0x0070, |
492 | .subdevice = 0x7801, | |
493 | .card = CX23885_BOARD_HAUPPAUGE_HVR1800, | |
9c8ced51 | 494 | }, { |
6ccb8cfb MK |
495 | .subvendor = 0x0070, |
496 | .subdevice = 0x7809, | |
497 | .card = CX23885_BOARD_HAUPPAUGE_HVR1800, | |
9c8ced51 | 498 | }, { |
a77743bc ST |
499 | .subvendor = 0x0070, |
500 | .subdevice = 0x7911, | |
501 | .card = CX23885_BOARD_HAUPPAUGE_HVR1250, | |
9c8ced51 | 502 | }, { |
9bc37caa MK |
503 | .subvendor = 0x18ac, |
504 | .subdevice = 0xd500, | |
505 | .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, | |
9c8ced51 | 506 | }, { |
b00fff0b MK |
507 | .subvendor = 0x0070, |
508 | .subdevice = 0x7790, | |
509 | .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, | |
9c8ced51 | 510 | }, { |
d1987d55 ST |
511 | .subvendor = 0x0070, |
512 | .subdevice = 0x7797, | |
513 | .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, | |
9c8ced51 | 514 | }, { |
b00fff0b MK |
515 | .subvendor = 0x0070, |
516 | .subdevice = 0x7710, | |
517 | .card = CX23885_BOARD_HAUPPAUGE_HVR1500, | |
9c8ced51 | 518 | }, { |
07b4a835 MK |
519 | .subvendor = 0x0070, |
520 | .subdevice = 0x7717, | |
521 | .card = CX23885_BOARD_HAUPPAUGE_HVR1500, | |
b3ea0166 ST |
522 | }, { |
523 | .subvendor = 0x0070, | |
524 | .subdevice = 0x71d1, | |
525 | .card = CX23885_BOARD_HAUPPAUGE_HVR1200, | |
3c3852cd MK |
526 | }, { |
527 | .subvendor = 0x0070, | |
528 | .subdevice = 0x71d3, | |
529 | .card = CX23885_BOARD_HAUPPAUGE_HVR1200, | |
a780a31c ST |
530 | }, { |
531 | .subvendor = 0x0070, | |
532 | .subdevice = 0x8101, | |
533 | .card = CX23885_BOARD_HAUPPAUGE_HVR1700, | |
66762373 ST |
534 | }, { |
535 | .subvendor = 0x0070, | |
536 | .subdevice = 0x8010, | |
537 | .card = CX23885_BOARD_HAUPPAUGE_HVR1400, | |
9c8ced51 | 538 | }, { |
335377b7 MK |
539 | .subvendor = 0x18ac, |
540 | .subdevice = 0xd618, | |
541 | .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, | |
9c8ced51 | 542 | }, { |
aef2d186 ST |
543 | .subvendor = 0x18ac, |
544 | .subdevice = 0xdb78, | |
545 | .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, | |
4c56b04a ST |
546 | }, { |
547 | .subvendor = 0x107d, | |
548 | .subdevice = 0x6681, | |
549 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, | |
0cf8af57 | 550 | }, { |
551 | .subvendor = 0x107d, | |
552 | .subdevice = 0x6f39, | |
553 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, | |
9bb1b7e8 IL |
554 | }, { |
555 | .subvendor = 0x185b, | |
556 | .subdevice = 0xe800, | |
557 | .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, | |
96318d0c IL |
558 | }, { |
559 | .subvendor = 0x6920, | |
560 | .subdevice = 0x8888, | |
561 | .card = CX23885_BOARD_TBS_6920, | |
579943f5 IL |
562 | }, { |
563 | .subvendor = 0xd470, | |
564 | .subdevice = 0x9022, | |
565 | .card = CX23885_BOARD_TEVII_S470, | |
c9b8b04b IL |
566 | }, { |
567 | .subvendor = 0x0001, | |
568 | .subdevice = 0x2005, | |
569 | .card = CX23885_BOARD_DVBWORLD_2005, | |
5a23b076 IL |
570 | }, { |
571 | .subvendor = 0x1b55, | |
572 | .subdevice = 0x2a2c, | |
573 | .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI, | |
2074dffa ST |
574 | }, { |
575 | .subvendor = 0x0070, | |
576 | .subdevice = 0x2211, | |
577 | .card = CX23885_BOARD_HAUPPAUGE_HVR1270, | |
d099becb MK |
578 | }, { |
579 | .subvendor = 0x0070, | |
580 | .subdevice = 0x2215, | |
581 | .card = CX23885_BOARD_HAUPPAUGE_HVR1275, | |
7d7b5284 MK |
582 | }, { |
583 | .subvendor = 0x0070, | |
584 | .subdevice = 0x221d, | |
585 | .card = CX23885_BOARD_HAUPPAUGE_HVR1275, | |
19bc5796 MK |
586 | }, { |
587 | .subvendor = 0x0070, | |
588 | .subdevice = 0x2251, | |
589 | .card = CX23885_BOARD_HAUPPAUGE_HVR1255, | |
7d7b5284 MK |
590 | }, { |
591 | .subvendor = 0x0070, | |
592 | .subdevice = 0x2259, | |
593 | .card = CX23885_BOARD_HAUPPAUGE_HVR1255, | |
6b926eca MK |
594 | }, { |
595 | .subvendor = 0x0070, | |
596 | .subdevice = 0x2291, | |
597 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, | |
598 | }, { | |
599 | .subvendor = 0x0070, | |
600 | .subdevice = 0x2295, | |
601 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, | |
7d7b5284 MK |
602 | }, { |
603 | .subvendor = 0x0070, | |
604 | .subdevice = 0x2299, | |
605 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, | |
606 | }, { | |
607 | .subvendor = 0x0070, | |
608 | .subdevice = 0x229d, | |
609 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ | |
610 | }, { | |
611 | .subvendor = 0x0070, | |
612 | .subdevice = 0x22f0, | |
613 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, | |
614 | }, { | |
615 | .subvendor = 0x0070, | |
616 | .subdevice = 0x22f1, | |
617 | .card = CX23885_BOARD_HAUPPAUGE_HVR1255, | |
618 | }, { | |
619 | .subvendor = 0x0070, | |
620 | .subdevice = 0x22f2, | |
621 | .card = CX23885_BOARD_HAUPPAUGE_HVR1275, | |
622 | }, { | |
623 | .subvendor = 0x0070, | |
624 | .subdevice = 0x22f3, | |
625 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ | |
626 | }, { | |
627 | .subvendor = 0x0070, | |
628 | .subdevice = 0x22f4, | |
629 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, | |
630 | }, { | |
631 | .subvendor = 0x0070, | |
632 | .subdevice = 0x22f5, | |
633 | .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ | |
493b7127 DW |
634 | }, { |
635 | .subvendor = 0x14f1, | |
636 | .subdevice = 0x8651, | |
637 | .card = CX23885_BOARD_MYGICA_X8506, | |
2365b2d3 DW |
638 | }, { |
639 | .subvendor = 0x14f1, | |
640 | .subdevice = 0x8657, | |
641 | .card = CX23885_BOARD_MAGICPRO_PROHDTVE2, | |
13697380 ST |
642 | }, { |
643 | .subvendor = 0x0070, | |
644 | .subdevice = 0x8541, | |
645 | .card = CX23885_BOARD_HAUPPAUGE_HVR1850, | |
34e383dd VG |
646 | }, { |
647 | .subvendor = 0x1858, | |
648 | .subdevice = 0xe800, | |
649 | .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800, | |
aee0b24c MK |
650 | }, { |
651 | .subvendor = 0x0070, | |
652 | .subdevice = 0x8551, | |
653 | .card = CX23885_BOARD_HAUPPAUGE_HVR1290, | |
ea5697fe DW |
654 | }, { |
655 | .subvendor = 0x14f1, | |
656 | .subdevice = 0x8578, | |
657 | .card = CX23885_BOARD_MYGICA_X8558PRO, | |
0b32d65c KK |
658 | }, { |
659 | .subvendor = 0x107d, | |
660 | .subdevice = 0x6f22, | |
661 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200, | |
9028f58f AC |
662 | }, { |
663 | .subvendor = 0x5654, | |
664 | .subdevice = 0x2390, | |
665 | .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID, | |
78db8547 IL |
666 | }, { |
667 | .subvendor = 0x1b55, | |
668 | .subdevice = 0xe2e4, | |
669 | .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, | |
87988753 AJD |
670 | }, { |
671 | .subvendor = 0x14f1, | |
672 | .subdevice = 0x8502, | |
673 | .card = CX23885_BOARD_MYGICA_X8507, | |
d19770e5 ST |
674 | }, |
675 | }; | |
676 | const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); | |
677 | ||
678 | void cx23885_card_list(struct cx23885_dev *dev) | |
679 | { | |
680 | int i; | |
681 | ||
682 | if (0 == dev->pci->subsystem_vendor && | |
683 | 0 == dev->pci->subsystem_device) { | |
9c8ced51 ST |
684 | printk(KERN_INFO |
685 | "%s: Board has no valid PCIe Subsystem ID and can't\n" | |
686 | "%s: be autodetected. Pass card=<n> insmod option\n" | |
687 | "%s: to workaround that. Redirect complaints to the\n" | |
688 | "%s: vendor of the TV card. Best regards,\n" | |
d19770e5 ST |
689 | "%s: -- tux\n", |
690 | dev->name, dev->name, dev->name, dev->name, dev->name); | |
691 | } else { | |
9c8ced51 ST |
692 | printk(KERN_INFO |
693 | "%s: Your board isn't known (yet) to the driver.\n" | |
694 | "%s: Try to pick one of the existing card configs via\n" | |
d19770e5 ST |
695 | "%s: card=<n> insmod option. Updating to the latest\n" |
696 | "%s: version might help as well.\n", | |
697 | dev->name, dev->name, dev->name, dev->name); | |
698 | } | |
9c8ced51 | 699 | printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n", |
d19770e5 ST |
700 | dev->name); |
701 | for (i = 0; i < cx23885_bcount; i++) | |
9c8ced51 | 702 | printk(KERN_INFO "%s: card=%d -> %s\n", |
d19770e5 ST |
703 | dev->name, i, cx23885_boards[i].name); |
704 | } | |
705 | ||
706 | static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) | |
707 | { | |
708 | struct tveeprom tv; | |
709 | ||
9c8ced51 ST |
710 | tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv, |
711 | eeprom_data); | |
d19770e5 | 712 | |
d19770e5 | 713 | /* Make sure we support the board model */ |
9c8ced51 | 714 | switch (tv.model) { |
5308cf09 MK |
715 | case 22001: |
716 | /* WinTV-HVR1270 (PCIe, Retail, half height) | |
717 | * ATSC/QAM and basic analog, IR Blast */ | |
718 | case 22009: | |
719 | /* WinTV-HVR1210 (PCIe, Retail, half height) | |
720 | * DVB-T and basic analog, IR Blast */ | |
721 | case 22011: | |
722 | /* WinTV-HVR1270 (PCIe, Retail, half height) | |
723 | * ATSC/QAM and basic analog, IR Recv */ | |
724 | case 22019: | |
725 | /* WinTV-HVR1210 (PCIe, Retail, half height) | |
726 | * DVB-T and basic analog, IR Recv */ | |
727 | case 22021: | |
728 | /* WinTV-HVR1275 (PCIe, Retail, half height) | |
729 | * ATSC/QAM and basic analog, IR Recv */ | |
730 | case 22029: | |
731 | /* WinTV-HVR1210 (PCIe, Retail, half height) | |
732 | * DVB-T and basic analog, IR Recv */ | |
733 | case 22101: | |
734 | /* WinTV-HVR1270 (PCIe, Retail, full height) | |
735 | * ATSC/QAM and basic analog, IR Blast */ | |
736 | case 22109: | |
737 | /* WinTV-HVR1210 (PCIe, Retail, full height) | |
738 | * DVB-T and basic analog, IR Blast */ | |
739 | case 22111: | |
740 | /* WinTV-HVR1270 (PCIe, Retail, full height) | |
741 | * ATSC/QAM and basic analog, IR Recv */ | |
742 | case 22119: | |
743 | /* WinTV-HVR1210 (PCIe, Retail, full height) | |
744 | * DVB-T and basic analog, IR Recv */ | |
745 | case 22121: | |
746 | /* WinTV-HVR1275 (PCIe, Retail, full height) | |
747 | * ATSC/QAM and basic analog, IR Recv */ | |
748 | case 22129: | |
749 | /* WinTV-HVR1210 (PCIe, Retail, full height) | |
750 | * DVB-T and basic analog, IR Recv */ | |
36396c89 MK |
751 | case 71009: |
752 | /* WinTV-HVR1200 (PCIe, Retail, full height) | |
753 | * DVB-T and basic analog */ | |
754 | case 71359: | |
755 | /* WinTV-HVR1200 (PCIe, OEM, half height) | |
756 | * DVB-T and basic analog */ | |
757 | case 71439: | |
758 | /* WinTV-HVR1200 (PCIe, OEM, half height) | |
759 | * DVB-T and basic analog */ | |
760 | case 71449: | |
761 | /* WinTV-HVR1200 (PCIe, OEM, full height) | |
762 | * DVB-T and basic analog */ | |
763 | case 71939: | |
764 | /* WinTV-HVR1200 (PCIe, OEM, half height) | |
765 | * DVB-T and basic analog */ | |
766 | case 71949: | |
767 | /* WinTV-HVR1200 (PCIe, OEM, full height) | |
768 | * DVB-T and basic analog */ | |
769 | case 71959: | |
770 | /* WinTV-HVR1200 (PCIe, OEM, full height) | |
771 | * DVB-T and basic analog */ | |
772 | case 71979: | |
773 | /* WinTV-HVR1200 (PCIe, OEM, half height) | |
774 | * DVB-T and basic analog */ | |
775 | case 71999: | |
776 | /* WinTV-HVR1200 (PCIe, OEM, full height) | |
777 | * DVB-T and basic analog */ | |
9c8ced51 ST |
778 | case 76601: |
779 | /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual | |
780 | channel ATSC and MPEG2 HW Encoder */ | |
781 | case 77001: | |
782 | /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC | |
783 | and Basic analog */ | |
784 | case 77011: | |
785 | /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC | |
786 | and Basic analog */ | |
787 | case 77041: | |
788 | /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM | |
789 | and Basic analog */ | |
790 | case 77051: | |
791 | /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM | |
792 | and Basic analog */ | |
793 | case 78011: | |
794 | /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, | |
795 | Dual channel ATSC and MPEG2 HW Encoder */ | |
796 | case 78501: | |
797 | /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, | |
798 | Dual channel ATSC and MPEG2 HW Encoder */ | |
799 | case 78521: | |
800 | /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, | |
801 | Dual channel ATSC and MPEG2 HW Encoder */ | |
802 | case 78531: | |
803 | /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, | |
804 | Dual channel ATSC and MPEG2 HW Encoder */ | |
805 | case 78631: | |
806 | /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, | |
807 | Dual channel ATSC and MPEG2 HW Encoder */ | |
808 | case 79001: | |
809 | /* WinTV-HVR1250 (PCIe, Retail, IR, full height, | |
810 | ATSC and Basic analog */ | |
811 | case 79101: | |
812 | /* WinTV-HVR1250 (PCIe, Retail, IR, half height, | |
813 | ATSC and Basic analog */ | |
ebbeb460 AW |
814 | case 79501: |
815 | /* WinTV-HVR1250 (PCIe, No IR, half height, | |
816 | ATSC [at least] and Basic analog) */ | |
9c8ced51 ST |
817 | case 79561: |
818 | /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, | |
819 | ATSC and Basic analog */ | |
820 | case 79571: | |
821 | /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, | |
822 | ATSC and Basic analog */ | |
823 | case 79671: | |
824 | /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, | |
825 | ATSC and Basic analog */ | |
66762373 ST |
826 | case 80019: |
827 | /* WinTV-HVR1400 (Express Card, Retail, IR, | |
828 | * DVB-T and Basic analog */ | |
36396c89 MK |
829 | case 81509: |
830 | /* WinTV-HVR1700 (PCIe, OEM, No IR, half height) | |
831 | * DVB-T and MPEG2 HW Encoder */ | |
a780a31c | 832 | case 81519: |
36396c89 | 833 | /* WinTV-HVR1700 (PCIe, OEM, No IR, full height) |
a780a31c | 834 | * DVB-T and MPEG2 HW Encoder */ |
d19770e5 | 835 | break; |
13697380 | 836 | case 85021: |
73a5f419 | 837 | /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM, |
13697380 ST |
838 | Dual channel ATSC and MPEG2 HW Encoder */ |
839 | break; | |
73a5f419 MK |
840 | case 85721: |
841 | /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR, | |
842 | Dual channel ATSC and Basic analog */ | |
843 | break; | |
d19770e5 | 844 | default: |
13697380 ST |
845 | printk(KERN_WARNING "%s: warning: " |
846 | "unknown hauppauge model #%d\n", | |
9c8ced51 | 847 | dev->name, tv.model); |
d19770e5 ST |
848 | break; |
849 | } | |
850 | ||
851 | printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n", | |
852 | dev->name, tv.model); | |
853 | } | |
854 | ||
d7cba043 | 855 | int cx23885_tuner_callback(void *priv, int component, int command, int arg) |
8c70017f | 856 | { |
89ce2216 ST |
857 | struct cx23885_tsport *port = priv; |
858 | struct cx23885_dev *dev = port->dev; | |
6df51690 ST |
859 | u32 bitmask = 0; |
860 | ||
89ce2216 ST |
861 | if (command == XC2028_RESET_CLK) |
862 | return 0; | |
863 | ||
6df51690 ST |
864 | if (command != 0) { |
865 | printk(KERN_ERR "%s(): Unknown command 0x%x.\n", | |
866 | __func__, command); | |
867 | return -EINVAL; | |
868 | } | |
8c70017f | 869 | |
9c8ced51 | 870 | switch (dev->board) { |
90a71b1c ST |
871 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
872 | case CX23885_BOARD_HAUPPAUGE_HVR1500: | |
8c70017f | 873 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
4c56b04a | 874 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
0cf8af57 | 875 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
9bb1b7e8 | 876 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
34e383dd | 877 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
0b32d65c | 878 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: |
90a71b1c | 879 | /* Tuner Reset Command */ |
4c56b04a | 880 | bitmask = 0x04; |
6df51690 ST |
881 | break; |
882 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: | |
aef2d186 | 883 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: |
4c56b04a ST |
884 | /* Two identical tuners on two different i2c buses, |
885 | * we need to reset the correct gpio. */ | |
d4dc673d | 886 | if (port->nr == 1) |
4c56b04a | 887 | bitmask = 0x01; |
d4dc673d | 888 | else if (port->nr == 2) |
4c56b04a | 889 | bitmask = 0x04; |
8c70017f | 890 | break; |
9028f58f AC |
891 | case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: |
892 | /* Tuner Reset Command */ | |
893 | bitmask = 0x02; | |
894 | break; | |
78db8547 IL |
895 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
896 | altera_ci_tuner_reset(dev, port->nr); | |
897 | break; | |
8c70017f ST |
898 | } |
899 | ||
6df51690 ST |
900 | if (bitmask) { |
901 | /* Drive the tuner into reset and back out */ | |
902 | cx_clear(GP0_IO, bitmask); | |
903 | mdelay(200); | |
904 | cx_set(GP0_IO, bitmask); | |
905 | } | |
906 | ||
907 | return 0; | |
8c70017f | 908 | } |
73c993a8 | 909 | |
a6a3f140 ST |
910 | void cx23885_gpio_setup(struct cx23885_dev *dev) |
911 | { | |
9c8ced51 | 912 | switch (dev->board) { |
a6a3f140 ST |
913 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
914 | /* GPIO-0 cx24227 demodulator reset */ | |
915 | cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ | |
916 | break; | |
07b4a835 MK |
917 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
918 | /* GPIO-0 cx24227 demodulator */ | |
919 | /* GPIO-2 xc3028 tuner */ | |
920 | ||
921 | /* Put the parts into reset */ | |
922 | cx_set(GP0_IO, 0x00050000); | |
923 | cx_clear(GP0_IO, 0x00000005); | |
924 | msleep(5); | |
925 | ||
926 | /* Bring the parts out of reset */ | |
927 | cx_set(GP0_IO, 0x00050005); | |
928 | break; | |
d1987d55 ST |
929 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
930 | /* GPIO-0 cx24227 demodulator reset */ | |
931 | /* GPIO-2 xc5000 tuner reset */ | |
932 | cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ | |
933 | break; | |
a6a3f140 ST |
934 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
935 | /* GPIO-0 656_CLK */ | |
936 | /* GPIO-1 656_D0 */ | |
937 | /* GPIO-2 8295A Reset */ | |
938 | /* GPIO-3-10 cx23417 data0-7 */ | |
939 | /* GPIO-11-14 cx23417 addr0-3 */ | |
940 | /* GPIO-15-18 cx23417 READY, CS, RD, WR */ | |
941 | /* GPIO-19 IR_RX */ | |
3ba71d21 | 942 | |
a589b665 ST |
943 | /* CX23417 GPIO's */ |
944 | /* EIO15 Zilog Reset */ | |
945 | /* EIO14 S5H1409/CX24227 Reset */ | |
f659c513 ST |
946 | mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1); |
947 | ||
948 | /* Put the demod into reset and protect the eeprom */ | |
949 | mc417_gpio_clear(dev, GPIO_15 | GPIO_14); | |
950 | mdelay(100); | |
951 | ||
952 | /* Bring the demod and blaster out of reset */ | |
953 | mc417_gpio_set(dev, GPIO_15 | GPIO_14); | |
954 | mdelay(100); | |
a589b665 | 955 | |
5206d6ec | 956 | /* Force the TDA8295A into reset and back */ |
21ff3e4f ST |
957 | cx23885_gpio_enable(dev, GPIO_2, 1); |
958 | cx23885_gpio_set(dev, GPIO_2); | |
5206d6ec | 959 | mdelay(20); |
21ff3e4f | 960 | cx23885_gpio_clear(dev, GPIO_2); |
5206d6ec | 961 | mdelay(20); |
21ff3e4f | 962 | cx23885_gpio_set(dev, GPIO_2); |
5206d6ec | 963 | mdelay(20); |
a6a3f140 | 964 | break; |
b3ea0166 ST |
965 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
966 | /* GPIO-0 tda10048 demodulator reset */ | |
967 | /* GPIO-2 tda18271 tuner reset */ | |
968 | ||
a780a31c ST |
969 | /* Put the parts into reset and back */ |
970 | cx_set(GP0_IO, 0x00050000); | |
971 | mdelay(20); | |
972 | cx_clear(GP0_IO, 0x00000005); | |
973 | mdelay(20); | |
974 | cx_set(GP0_IO, 0x00050005); | |
975 | break; | |
976 | case CX23885_BOARD_HAUPPAUGE_HVR1700: | |
977 | /* GPIO-0 TDA10048 demodulator reset */ | |
978 | /* GPIO-2 TDA8295A Reset */ | |
979 | /* GPIO-3-10 cx23417 data0-7 */ | |
980 | /* GPIO-11-14 cx23417 addr0-3 */ | |
981 | /* GPIO-15-18 cx23417 READY, CS, RD, WR */ | |
982 | ||
983 | /* The following GPIO's are on the interna AVCore (cx25840) */ | |
984 | /* GPIO-19 IR_RX */ | |
985 | /* GPIO-20 IR_TX 416/DVBT Select */ | |
986 | /* GPIO-21 IIS DAT */ | |
987 | /* GPIO-22 IIS WCLK */ | |
988 | /* GPIO-23 IIS BCLK */ | |
989 | ||
66762373 ST |
990 | /* Put the parts into reset and back */ |
991 | cx_set(GP0_IO, 0x00050000); | |
992 | mdelay(20); | |
993 | cx_clear(GP0_IO, 0x00000005); | |
994 | mdelay(20); | |
995 | cx_set(GP0_IO, 0x00050005); | |
996 | break; | |
997 | case CX23885_BOARD_HAUPPAUGE_HVR1400: | |
998 | /* GPIO-0 Dibcom7000p demodulator reset */ | |
999 | /* GPIO-2 xc3028L tuner reset */ | |
1000 | /* GPIO-13 LED */ | |
1001 | ||
b3ea0166 ST |
1002 | /* Put the parts into reset and back */ |
1003 | cx_set(GP0_IO, 0x00050000); | |
1004 | mdelay(20); | |
1005 | cx_clear(GP0_IO, 0x00000005); | |
1006 | mdelay(20); | |
1007 | cx_set(GP0_IO, 0x00050005); | |
1008 | break; | |
1ecc5aed ST |
1009 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
1010 | /* GPIO-0 xc5000 tuner reset i2c bus 0 */ | |
1011 | /* GPIO-1 s5h1409 demod reset i2c bus 0 */ | |
1012 | /* GPIO-2 xc5000 tuner reset i2c bus 1 */ | |
1013 | /* GPIO-3 s5h1409 demod reset i2c bus 0 */ | |
1014 | ||
aef2d186 ST |
1015 | /* Put the parts into reset and back */ |
1016 | cx_set(GP0_IO, 0x000f0000); | |
1017 | mdelay(20); | |
1018 | cx_clear(GP0_IO, 0x0000000f); | |
1019 | mdelay(20); | |
1020 | cx_set(GP0_IO, 0x000f000f); | |
1021 | break; | |
1022 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: | |
1023 | /* GPIO-0 portb xc3028 reset */ | |
1024 | /* GPIO-1 portb zl10353 reset */ | |
1025 | /* GPIO-2 portc xc3028 reset */ | |
1026 | /* GPIO-3 portc zl10353 reset */ | |
1027 | ||
1ecc5aed ST |
1028 | /* Put the parts into reset and back */ |
1029 | cx_set(GP0_IO, 0x000f0000); | |
1030 | mdelay(20); | |
1031 | cx_clear(GP0_IO, 0x0000000f); | |
1032 | mdelay(20); | |
1033 | cx_set(GP0_IO, 0x000f000f); | |
1034 | break; | |
4c56b04a | 1035 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
0cf8af57 | 1036 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
9bb1b7e8 | 1037 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
34e383dd | 1038 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
0b32d65c | 1039 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: |
4c56b04a ST |
1040 | /* GPIO-2 xc3028 tuner reset */ |
1041 | ||
1042 | /* The following GPIO's are on the internal AVCore (cx25840) */ | |
1043 | /* GPIO-? zl10353 demod reset */ | |
1044 | ||
1045 | /* Put the parts into reset and back */ | |
1046 | cx_set(GP0_IO, 0x00040000); | |
1047 | mdelay(20); | |
1048 | cx_clear(GP0_IO, 0x00000004); | |
1049 | mdelay(20); | |
1050 | cx_set(GP0_IO, 0x00040004); | |
1051 | break; | |
96318d0c IL |
1052 | case CX23885_BOARD_TBS_6920: |
1053 | cx_write(MC417_CTL, 0x00000036); | |
1054 | cx_write(MC417_OEN, 0x00001000); | |
09ea33e5 IL |
1055 | cx_set(MC417_RWD, 0x00000002); |
1056 | mdelay(200); | |
1057 | cx_clear(MC417_RWD, 0x00000800); | |
1058 | mdelay(200); | |
1059 | cx_set(MC417_RWD, 0x00000800); | |
1060 | mdelay(200); | |
96318d0c | 1061 | break; |
5a23b076 IL |
1062 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
1063 | /* GPIO-0 INTA from CiMax1 | |
1064 | GPIO-1 INTB from CiMax2 | |
1065 | GPIO-2 reset chips | |
1066 | GPIO-3 to GPIO-10 data/addr for CA | |
1067 | GPIO-11 ~CS0 to CiMax1 | |
1068 | GPIO-12 ~CS1 to CiMax2 | |
1069 | GPIO-13 ADL0 load LSB addr | |
1070 | GPIO-14 ADL1 load MSB addr | |
1071 | GPIO-15 ~RDY from CiMax | |
1072 | GPIO-17 ~RD to CiMax | |
1073 | GPIO-18 ~WR to CiMax | |
1074 | */ | |
1075 | cx_set(GP0_IO, 0x00040000); /* GPIO as out */ | |
1076 | /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */ | |
1077 | cx_clear(GP0_IO, 0x00030004); | |
1078 | mdelay(100);/* reset delay */ | |
1079 | cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */ | |
1080 | cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ | |
1081 | /* GPIO-15 IN as ~ACK, rest as OUT */ | |
1082 | cx_write(MC417_OEN, 0x00001000); | |
1083 | /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ | |
1084 | cx_write(MC417_RWD, 0x0000c300); | |
1085 | /* enable irq */ | |
1086 | cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ | |
1087 | break; | |
2074dffa | 1088 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 1089 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
19bc5796 | 1090 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
6b926eca | 1091 | case CX23885_BOARD_HAUPPAUGE_HVR1210: |
d099becb | 1092 | /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ |
6b926eca MK |
1093 | /* GPIO-6 I2C Gate which can isolate the demod from the bus */ |
1094 | /* GPIO-9 Demod reset */ | |
2074dffa ST |
1095 | |
1096 | /* Put the parts into reset and back */ | |
d099becb MK |
1097 | cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1); |
1098 | cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5); | |
2074dffa ST |
1099 | cx23885_gpio_clear(dev, GPIO_9); |
1100 | mdelay(20); | |
1101 | cx23885_gpio_set(dev, GPIO_9); | |
1102 | break; | |
493b7127 | 1103 | case CX23885_BOARD_MYGICA_X8506: |
2365b2d3 | 1104 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
87988753 | 1105 | case CX23885_BOARD_MYGICA_X8507: |
8e069bb9 | 1106 | /* GPIO-0 (0)Analog / (1)Digital TV */ |
493b7127 | 1107 | /* GPIO-1 reset XC5000 */ |
2365b2d3 | 1108 | /* GPIO-2 reset LGS8GL5 / LGS8G75 */ |
8e069bb9 DW |
1109 | cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1); |
1110 | cx23885_gpio_clear(dev, GPIO_1 | GPIO_2); | |
493b7127 | 1111 | mdelay(100); |
8e069bb9 | 1112 | cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2); |
493b7127 DW |
1113 | mdelay(100); |
1114 | break; | |
ea5697fe DW |
1115 | case CX23885_BOARD_MYGICA_X8558PRO: |
1116 | /* GPIO-0 reset first ATBM8830 */ | |
1117 | /* GPIO-1 reset second ATBM8830 */ | |
1118 | cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); | |
1119 | cx23885_gpio_clear(dev, GPIO_0 | GPIO_1); | |
1120 | mdelay(100); | |
1121 | cx23885_gpio_set(dev, GPIO_0 | GPIO_1); | |
1122 | mdelay(100); | |
1123 | break; | |
13697380 | 1124 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
aee0b24c | 1125 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
13697380 ST |
1126 | /* GPIO-0 656_CLK */ |
1127 | /* GPIO-1 656_D0 */ | |
1128 | /* GPIO-2 Wake# */ | |
1129 | /* GPIO-3-10 cx23417 data0-7 */ | |
1130 | /* GPIO-11-14 cx23417 addr0-3 */ | |
1131 | /* GPIO-15-18 cx23417 READY, CS, RD, WR */ | |
1132 | /* GPIO-19 IR_RX */ | |
1133 | /* GPIO-20 C_IR_TX */ | |
1134 | /* GPIO-21 I2S DAT */ | |
1135 | /* GPIO-22 I2S WCLK */ | |
1136 | /* GPIO-23 I2S BCLK */ | |
1137 | /* ALT GPIO: EXP GPIO LATCH */ | |
1138 | ||
1139 | /* CX23417 GPIO's */ | |
1140 | /* GPIO-14 S5H1411/CX24228 Reset */ | |
1141 | /* GPIO-13 EEPROM write protect */ | |
1142 | mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1); | |
1143 | ||
1144 | /* Put the demod into reset and protect the eeprom */ | |
1145 | mc417_gpio_clear(dev, GPIO_14 | GPIO_13); | |
1146 | mdelay(100); | |
1147 | ||
1148 | /* Bring the demod out of reset */ | |
1149 | mc417_gpio_set(dev, GPIO_14); | |
1150 | mdelay(100); | |
1151 | ||
1152 | /* CX24228 GPIO */ | |
1153 | /* Connected to IF / Mux */ | |
1154 | break; | |
9028f58f AC |
1155 | case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: |
1156 | cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ | |
1157 | break; | |
78db8547 IL |
1158 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
1159 | /* GPIO-0 ~INT in | |
1160 | GPIO-1 TMS out | |
1161 | GPIO-2 ~reset chips out | |
1162 | GPIO-3 to GPIO-10 data/addr for CA in/out | |
1163 | GPIO-11 ~CS out | |
1164 | GPIO-12 ADDR out | |
1165 | GPIO-13 ~WR out | |
1166 | GPIO-14 ~RD out | |
1167 | GPIO-15 ~RDY in | |
1168 | GPIO-16 TCK out | |
1169 | GPIO-17 TDO in | |
1170 | GPIO-18 TDI out | |
1171 | */ | |
1172 | cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ | |
1173 | /* GPIO-0 as INT, reset & TMS low */ | |
1174 | cx_clear(GP0_IO, 0x00010006); | |
1175 | mdelay(100);/* reset delay */ | |
1176 | cx_set(GP0_IO, 0x00000004); /* reset high */ | |
1177 | cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ | |
1178 | /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */ | |
1179 | cx_write(MC417_OEN, 0x00005000); | |
1180 | /* ~RD, ~WR high; ADDR low; ~CS high */ | |
1181 | cx_write(MC417_RWD, 0x00000d00); | |
1182 | /* enable irq */ | |
1183 | cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ | |
1184 | break; | |
a6a3f140 ST |
1185 | } |
1186 | } | |
1187 | ||
1188 | int cx23885_ir_init(struct cx23885_dev *dev) | |
1189 | { | |
98d109f9 | 1190 | static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { |
81f287da AW |
1191 | { |
1192 | .flags = V4L2_SUBDEV_IO_PIN_INPUT, | |
1193 | .pin = CX23885_PIN_IR_RX_GPIO19, | |
1194 | .function = CX23885_PAD_IR_RX, | |
1195 | .value = 0, | |
1196 | .strength = CX25840_PIN_DRIVE_MEDIUM, | |
1197 | }, { | |
1198 | .flags = V4L2_SUBDEV_IO_PIN_OUTPUT, | |
1199 | .pin = CX23885_PIN_IR_TX_GPIO20, | |
1200 | .function = CX23885_PAD_IR_TX, | |
1201 | .value = 0, | |
1202 | .strength = CX25840_PIN_DRIVE_MEDIUM, | |
1203 | } | |
1204 | }; | |
98d109f9 AW |
1205 | const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg); |
1206 | ||
1207 | static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = { | |
1208 | { | |
1209 | .flags = V4L2_SUBDEV_IO_PIN_INPUT, | |
1210 | .pin = CX23885_PIN_IR_RX_GPIO19, | |
1211 | .function = CX23885_PAD_IR_RX, | |
1212 | .value = 0, | |
1213 | .strength = CX25840_PIN_DRIVE_MEDIUM, | |
1214 | } | |
1215 | }; | |
1216 | const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg); | |
81f287da AW |
1217 | |
1218 | struct v4l2_subdev_ir_parameters params; | |
29f8a0a5 | 1219 | int ret = 0; |
a6a3f140 | 1220 | switch (dev->board) { |
07b4a835 | 1221 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
d1987d55 | 1222 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
a6a3f140 | 1223 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
b3ea0166 | 1224 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
66762373 | 1225 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
d099becb | 1226 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
19bc5796 | 1227 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
6b926eca | 1228 | case CX23885_BOARD_HAUPPAUGE_HVR1210: |
a6a3f140 ST |
1229 | /* FIXME: Implement me */ |
1230 | break; | |
9b3d8ecc AW |
1231 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
1232 | ret = cx23888_ir_probe(dev); | |
1233 | if (ret) | |
1234 | break; | |
1235 | dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); | |
1236 | v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, | |
1237 | ir_rx_pin_cfg_count, ir_rx_pin_cfg); | |
1238 | break; | |
29f8a0a5 | 1239 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
7fec6fee | 1240 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
29f8a0a5 AW |
1241 | ret = cx23888_ir_probe(dev); |
1242 | if (ret) | |
1243 | break; | |
1244 | dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); | |
81f287da | 1245 | v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, |
98d109f9 | 1246 | ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); |
81f287da AW |
1247 | /* |
1248 | * For these boards we need to invert the Tx output via the | |
1249 | * IR controller to have the LED off while idle | |
1250 | */ | |
1251 | v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms); | |
1252 | params.enable = false; | |
1253 | params.shutdown = false; | |
1254 | params.invert_level = true; | |
1255 | v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); | |
1256 | params.shutdown = true; | |
1257 | v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); | |
29f8a0a5 | 1258 | break; |
98d109f9 | 1259 | case CX23885_BOARD_TEVII_S470: |
fa647f24 AW |
1260 | if (!enable_885_ir) |
1261 | break; | |
98d109f9 AW |
1262 | dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); |
1263 | if (dev->sd_ir == NULL) { | |
1264 | ret = -ENODEV; | |
1265 | break; | |
1266 | } | |
1267 | v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, | |
1268 | ir_rx_pin_cfg_count, ir_rx_pin_cfg); | |
98d109f9 AW |
1269 | break; |
1270 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | |
fa647f24 AW |
1271 | if (!enable_885_ir) |
1272 | break; | |
98d109f9 AW |
1273 | dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); |
1274 | if (dev->sd_ir == NULL) { | |
1275 | ret = -ENODEV; | |
1276 | break; | |
1277 | } | |
1278 | v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, | |
1279 | ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); | |
98d109f9 | 1280 | break; |
12886871 ST |
1281 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: |
1282 | request_module("ir-kbd-i2c"); | |
1283 | break; | |
a6a3f140 ST |
1284 | } |
1285 | ||
29f8a0a5 | 1286 | return ret; |
a6a3f140 ST |
1287 | } |
1288 | ||
f59ad611 AW |
1289 | void cx23885_ir_fini(struct cx23885_dev *dev) |
1290 | { | |
1291 | switch (dev->board) { | |
9b3d8ecc | 1292 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
f59ad611 | 1293 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
7fec6fee | 1294 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
dbe83a3b | 1295 | cx23885_irq_remove(dev, PCI_MSK_IR); |
f59ad611 AW |
1296 | cx23888_ir_remove(dev); |
1297 | dev->sd_ir = NULL; | |
1298 | break; | |
98d109f9 AW |
1299 | case CX23885_BOARD_TEVII_S470: |
1300 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | |
dbe83a3b | 1301 | cx23885_irq_remove(dev, PCI_MSK_AV_CORE); |
98d109f9 AW |
1302 | /* sd_ir is a duplicate pointer to the AV Core, just clear it */ |
1303 | dev->sd_ir = NULL; | |
1304 | break; | |
f59ad611 AW |
1305 | } |
1306 | } | |
1307 | ||
78db8547 IL |
1308 | int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) |
1309 | { | |
1310 | int data; | |
1311 | int tdo = 0; | |
1312 | struct cx23885_dev *dev = (struct cx23885_dev *)device; | |
1313 | /*TMS*/ | |
1314 | data = ((cx_read(GP0_IO)) & (~0x00000002)); | |
1315 | data |= (tms ? 0x00020002 : 0x00020000); | |
1316 | cx_write(GP0_IO, data); | |
1317 | ||
1318 | /*TDI*/ | |
1319 | data = ((cx_read(MC417_RWD)) & (~0x0000a000)); | |
1320 | data |= (tdi ? 0x00008000 : 0); | |
1321 | cx_write(MC417_RWD, data); | |
1322 | if (read_tdo) | |
1323 | tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/ | |
1324 | ||
1325 | cx_write(MC417_RWD, data | 0x00002000); | |
1326 | udelay(1); | |
1327 | /*TCK*/ | |
1328 | cx_write(MC417_RWD, data); | |
1329 | ||
1330 | return tdo; | |
1331 | } | |
1332 | ||
f59ad611 AW |
1333 | void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) |
1334 | { | |
1335 | switch (dev->board) { | |
9b3d8ecc | 1336 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
f59ad611 | 1337 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
7fec6fee | 1338 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
dbe83a3b AW |
1339 | if (dev->sd_ir) |
1340 | cx23885_irq_add_enable(dev, PCI_MSK_IR); | |
f59ad611 | 1341 | break; |
98d109f9 AW |
1342 | case CX23885_BOARD_TEVII_S470: |
1343 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | |
dbe83a3b AW |
1344 | if (dev->sd_ir) |
1345 | cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); | |
98d109f9 | 1346 | break; |
f59ad611 AW |
1347 | } |
1348 | } | |
1349 | ||
d19770e5 ST |
1350 | void cx23885_card_setup(struct cx23885_dev *dev) |
1351 | { | |
a6a3f140 ST |
1352 | struct cx23885_tsport *ts1 = &dev->ts1; |
1353 | struct cx23885_tsport *ts2 = &dev->ts2; | |
1354 | ||
d19770e5 ST |
1355 | static u8 eeprom[256]; |
1356 | ||
1357 | if (dev->i2c_bus[0].i2c_rc == 0) { | |
1358 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
44a6481d MK |
1359 | tveeprom_read(&dev->i2c_bus[0].i2c_client, |
1360 | eeprom, sizeof(eeprom)); | |
d19770e5 ST |
1361 | } |
1362 | ||
1363 | switch (dev->board) { | |
a77743bc | 1364 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
ebbeb460 AW |
1365 | if (dev->i2c_bus[0].i2c_rc == 0) { |
1366 | if (eeprom[0x80] != 0x84) | |
1367 | hauppauge_eeprom(dev, eeprom+0xc0); | |
1368 | else | |
1369 | hauppauge_eeprom(dev, eeprom+0x80); | |
1370 | } | |
1371 | break; | |
07b4a835 | 1372 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
d1987d55 | 1373 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
66762373 | 1374 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
c88133ec ST |
1375 | if (dev->i2c_bus[0].i2c_rc == 0) |
1376 | hauppauge_eeprom(dev, eeprom+0x80); | |
1377 | break; | |
d19770e5 ST |
1378 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
1379 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: | |
b3ea0166 | 1380 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 1381 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
2074dffa | 1382 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 1383 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
19bc5796 | 1384 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
6b926eca | 1385 | case CX23885_BOARD_HAUPPAUGE_HVR1210: |
13697380 | 1386 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
aee0b24c | 1387 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
d19770e5 | 1388 | if (dev->i2c_bus[0].i2c_rc == 0) |
c88133ec | 1389 | hauppauge_eeprom(dev, eeprom+0xc0); |
d19770e5 ST |
1390 | break; |
1391 | } | |
a6a3f140 ST |
1392 | |
1393 | switch (dev->board) { | |
335377b7 | 1394 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
aef2d186 | 1395 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: |
335377b7 MK |
1396 | ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ |
1397 | ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1398 | ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1399 | /* break omitted intentionally */ | |
a6a3f140 ST |
1400 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
1401 | ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ | |
1402 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1403 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1404 | break; | |
a589b665 ST |
1405 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
1406 | /* Defaults for VID B - Analog encoder */ | |
1407 | /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ | |
1408 | ts1->gen_ctrl_val = 0x10e; | |
1409 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1410 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1411 | ||
1412 | /* APB_TSVALERR_POL (active low)*/ | |
1413 | ts1->vld_misc_val = 0x2000; | |
1414 | ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); | |
1415 | ||
1416 | /* Defaults for VID C */ | |
1417 | ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ | |
1418 | ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1419 | ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
96318d0c IL |
1420 | break; |
1421 | case CX23885_BOARD_TBS_6920: | |
09ea33e5 IL |
1422 | ts1->gen_ctrl_val = 0x4; /* Parallel */ |
1423 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1424 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1425 | break; | |
1426 | case CX23885_BOARD_TEVII_S470: | |
c9b8b04b | 1427 | case CX23885_BOARD_DVBWORLD_2005: |
96318d0c IL |
1428 | ts1->gen_ctrl_val = 0x5; /* Parallel */ |
1429 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1430 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
a589b665 | 1431 | break; |
5a23b076 | 1432 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
78db8547 | 1433 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
5a23b076 IL |
1434 | ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ |
1435 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1436 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1437 | ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ | |
1438 | ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1439 | ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1440 | break; | |
493b7127 | 1441 | case CX23885_BOARD_MYGICA_X8506: |
2365b2d3 | 1442 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
493b7127 DW |
1443 | ts1->gen_ctrl_val = 0x5; /* Parallel */ |
1444 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1445 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1446 | break; | |
ea5697fe DW |
1447 | case CX23885_BOARD_MYGICA_X8558PRO: |
1448 | ts1->gen_ctrl_val = 0x5; /* Parallel */ | |
1449 | ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1450 | ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1451 | ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ | |
1452 | ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1453 | ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1454 | break; | |
a6a3f140 | 1455 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
07b4a835 | 1456 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
d1987d55 | 1457 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
a6a3f140 | 1458 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
b3ea0166 | 1459 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 1460 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
66762373 | 1461 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
4c56b04a | 1462 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
0cf8af57 | 1463 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
9bb1b7e8 | 1464 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
2074dffa | 1465 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 1466 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
19bc5796 | 1467 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
6b926eca | 1468 | case CX23885_BOARD_HAUPPAUGE_HVR1210: |
13697380 | 1469 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
34e383dd | 1470 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
aee0b24c | 1471 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
9028f58f | 1472 | case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: |
a6a3f140 ST |
1473 | default: |
1474 | ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ | |
1475 | ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ | |
1476 | ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; | |
1477 | } | |
1478 | ||
ce89cfb4 ST |
1479 | /* Certain boards support analog, or require the avcore to be |
1480 | * loaded, ensure this happens. | |
1481 | */ | |
1482 | switch (dev->board) { | |
fa647f24 AW |
1483 | case CX23885_BOARD_TEVII_S470: |
1484 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | |
1485 | /* Currently only enabled for the integrated IR controller */ | |
1486 | if (!enable_885_ir) | |
1487 | break; | |
ce89cfb4 ST |
1488 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
1489 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: | |
1490 | case CX23885_BOARD_HAUPPAUGE_HVR1700: | |
4c56b04a | 1491 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
0cf8af57 | 1492 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
9bb1b7e8 | 1493 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
5a23b076 | 1494 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
78db8547 | 1495 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
34e383dd | 1496 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
9b3d8ecc | 1497 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
c6b7053b | 1498 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
bc1548ad DW |
1499 | case CX23885_BOARD_MYGICA_X8506: |
1500 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: | |
aee0b24c | 1501 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
0b32d65c | 1502 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: |
9028f58f | 1503 | case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: |
18d64476 | 1504 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
2cb9ccd4 | 1505 | case CX23885_BOARD_MPX885: |
87988753 | 1506 | case CX23885_BOARD_MYGICA_X8507: |
e6574f2f HV |
1507 | dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, |
1508 | &dev->i2c_bus[2].i2c_adap, | |
9a1f8b34 | 1509 | "cx25840", 0x88 >> 1, NULL); |
d6b1850d AW |
1510 | if (dev->sd_cx25840) { |
1511 | dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE; | |
1512 | v4l2_subdev_call(dev->sd_cx25840, core, load_fw); | |
1513 | } | |
ce89cfb4 ST |
1514 | break; |
1515 | } | |
5a23b076 IL |
1516 | |
1517 | /* AUX-PLL 27MHz CLK */ | |
1518 | switch (dev->board) { | |
1519 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
1520 | netup_initialize(dev); | |
1521 | break; | |
78db8547 IL |
1522 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { |
1523 | int ret; | |
1524 | const struct firmware *fw; | |
1525 | const char *filename = "dvb-netup-altera-01.fw"; | |
1526 | char *action = "configure"; | |
b8f0d306 | 1527 | static struct netup_card_info cinfo; |
78db8547 IL |
1528 | struct altera_config netup_config = { |
1529 | .dev = dev, | |
1530 | .action = action, | |
1531 | .jtag_io = netup_jtag_io, | |
1532 | }; | |
1533 | ||
1534 | netup_initialize(dev); | |
1535 | ||
b8f0d306 | 1536 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); |
2d12421d AO |
1537 | if (netup_card_rev) |
1538 | cinfo.rev = netup_card_rev; | |
1539 | ||
b8f0d306 AO |
1540 | switch (cinfo.rev) { |
1541 | case 0x4: | |
1542 | filename = "dvb-netup-altera-04.fw"; | |
1543 | break; | |
1544 | default: | |
1545 | filename = "dvb-netup-altera-01.fw"; | |
1546 | break; | |
1547 | } | |
1548 | printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n", | |
1549 | cinfo.rev, filename); | |
1550 | ||
78db8547 IL |
1551 | ret = request_firmware(&fw, filename, &dev->pci->dev); |
1552 | if (ret != 0) | |
1553 | printk(KERN_ERR "did not find the firmware file. (%s) " | |
1554 | "Please see linux/Documentation/dvb/ for more details " | |
1555 | "on firmware-problems.", filename); | |
1556 | else | |
1557 | altera_init(&netup_config, fw); | |
1558 | ||
3f84a4e1 | 1559 | release_firmware(fw); |
78db8547 IL |
1560 | break; |
1561 | } | |
5a23b076 | 1562 | } |
d19770e5 ST |
1563 | } |
1564 | ||
1565 | /* ------------------------------------------------------------------ */ |