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V4L/DVB: hdpvr-core: make module parameters local
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
29f8a0a5 31#include "cx23888-ir.h"
d19770e5
ST		 32
33/* ------------------------------------------------------------------ */
34/* board config info */
35
36struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
c7712613
ST		 39 /* Ensure safe default for unknown boards */
40 .clk_freq = 0,
d19770e5
ST		 41 .input = {{
42 .type = CX23885_VMUX_COMPOSITE1,
43 .vmux = 0,
9c8ced51 44 }, {
d19770e5
ST		 45 .type = CX23885_VMUX_COMPOSITE2,
46 .vmux = 1,
9c8ced51 47 }, {
d19770e5
ST		 48 .type = CX23885_VMUX_COMPOSITE3,
49 .vmux = 2,
9c8ced51 50 }, {
d19770e5
ST		 51 .type = CX23885_VMUX_COMPOSITE4,
52 .vmux = 3,
9c8ced51 53 } },
d19770e5
ST		 54 },
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 57 .portc = CX23885_MPEG_DVB,
58 .input = {{
59 .type = CX23885_VMUX_TELEVISION,
60 .vmux = 0,
61 .gpio0 = 0xff00,
9c8ced51 62 }, {
d19770e5
ST		 63 .type = CX23885_VMUX_DEBUG,
64 .vmux = 0,
65 .gpio0 = 0xff01,
9c8ced51 66 }, {
d19770e5
ST		 67 .type = CX23885_VMUX_COMPOSITE1,
68 .vmux = 1,
69 .gpio0 = 0xff02,
9c8ced51 70 }, {
d19770e5
ST		 71 .type = CX23885_VMUX_SVIDEO,
72 .vmux = 2,
73 .gpio0 = 0xff02,
9c8ced51 74 } },
d19770e5
ST		 75 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
7b888014 78 .porta = CX23885_ANALOG_VIDEO,
a589b665 79 .portb = CX23885_MPEG_ENCODER,
d19770e5 80 .portc = CX23885_MPEG_DVB,
7b888014
ST		 81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 83 .input = {{
84 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 85 .vmux = CX25840_VIN7_CH3 |
86 CX25840_VIN5_CH2 |
87 CX25840_VIN2_CH1,
88 .gpio0 = 0,
9c8ced51 89 }, {
d19770e5 90 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 91 .vmux = CX25840_VIN7_CH3 |
92 CX25840_VIN4_CH2 |
93 CX25840_VIN6_CH1,
94 .gpio0 = 0,
9c8ced51 95 }, {
d19770e5 96 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 97 .vmux = CX25840_VIN7_CH3 |
98 CX25840_VIN4_CH2 |
99 CX25840_VIN8_CH1 |
100 CX25840_SVIDEO_ON,
101 .gpio0 = 0,
9c8ced51 102 } },
d19770e5 103 },
a77743bc
ST		 104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
107 .input = {{
108 .type = CX23885_VMUX_TELEVISION,
109 .vmux = 0,
110 .gpio0 = 0xff00,
9c8ced51 111 }, {
a77743bc
ST		 112 .type = CX23885_VMUX_DEBUG,
113 .vmux = 0,
114 .gpio0 = 0xff01,
9c8ced51 115 }, {
a77743bc
ST		 116 .type = CX23885_VMUX_COMPOSITE1,
117 .vmux = 1,
118 .gpio0 = 0xff02,
9c8ced51 119 }, {
a77743bc
ST		 120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = 2,
122 .gpio0 = 0xff02,
9c8ced51 123 } },
a77743bc 124 },
9bc37caa
MK		 125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
a6a3f140 127 .portb = CX23885_MPEG_DVB,
9bc37caa 128 },
d1987d55
ST		 129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
132 },
07b4a835
MK		 133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
136 },
b3ea0166
ST		 137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
140 },
a780a31c
ST		 141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
144 },
66762373
ST		 145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
148 },
335377b7
MK		 149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 151 .portb = CX23885_MPEG_DVB,
335377b7
MK		 152 .portc = CX23885_MPEG_DVB,
153 },
aef2d186
ST		 154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
158 },
4c56b04a
ST		 159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
162 },
9bb1b7e8
IL		 163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
166 },
96318d0c
IL		 167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
170 },
579943f5
IL		 171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
174 },
c9b8b04b
IL		 175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
178 },
5a23b076
IL		 179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
180 .cimax = 1,
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
184 },
2074dffa
ST		 185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 187 .portc = CX23885_MPEG_DVB,
2074dffa 188 },
d099becb
MK		 189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
192 },
19bc5796
MK		 193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
196 },
6b926eca
MK		 197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
200 },
493b7127
DW		 201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
6f0d8c02
DW		 203 .tuner_type = TUNER_XC5000,
204 .tuner_addr = 0x61,
bc1548ad 205 .porta = CX23885_ANALOG_VIDEO,
493b7127 206 .portb = CX23885_MPEG_DVB,
bc1548ad 207 .input = {
6f0d8c02
DW		 208 {
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
211 },
bc1548ad
DW		 212 {
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
215 },
216 {
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
220 },
221 {
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
224 CX25840_VIN1_CH1 |
225 CX25840_VIN6_CH2 |
226 CX25840_VIN7_CH3,
227 },
228 },
493b7127 229 },
2365b2d3
DW		 230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
6f0d8c02
DW		 232 .tuner_type = TUNER_XC5000,
233 .tuner_addr = 0x61,
bc1548ad 234 .porta = CX23885_ANALOG_VIDEO,
2365b2d3 235 .portb = CX23885_MPEG_DVB,
bc1548ad 236 .input = {
6f0d8c02
DW		 237 {
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
240 },
bc1548ad
DW		 241 {
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
244 },
245 {
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
249 },
250 {
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
253 CX25840_VIN1_CH1 |
254 CX25840_VIN6_CH2 |
255 CX25840_VIN7_CH3,
256 },
257 },
2365b2d3 258 },
13697380
ST		 259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
263 },
34e383dd
VG		 264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
267 },
aee0b24c
MK		 268 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
269 .name = "Hauppauge WinTV-HVR1290",
270 .portc = CX23885_MPEG_DVB,
271 },
ea5697fe
DW		 272 [CX23885_BOARD_MYGICA_X8558PRO] = {
273 .name = "Mygica X8558 PRO DMB-TH",
274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB,
276 },
d19770e5
ST		 277};
278const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
279
280/* ------------------------------------------------------------------ */
281/* PCI subsystem IDs */
282
283struct cx23885_subid cx23885_subids[] = {
284 {
285 .subvendor = 0x0070,
286 .subdevice = 0x3400,
287 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 288 }, {
d19770e5
ST		 289 .subvendor = 0x0070,
290 .subdevice = 0x7600,
291 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 292 }, {
d19770e5
ST		 293 .subvendor = 0x0070,
294 .subdevice = 0x7800,
295 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 296 }, {
d19770e5
ST		 297 .subvendor = 0x0070,
298 .subdevice = 0x7801,
299 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 300 }, {
6ccb8cfb
MK		 301 .subvendor = 0x0070,
302 .subdevice = 0x7809,
303 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 304 }, {
a77743bc
ST		 305 .subvendor = 0x0070,
306 .subdevice = 0x7911,
307 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 308 }, {
9bc37caa
MK		 309 .subvendor = 0x18ac,
310 .subdevice = 0xd500,
311 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 312 }, {
b00fff0b
MK		 313 .subvendor = 0x0070,
314 .subdevice = 0x7790,
315 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 316 }, {
d1987d55
ST		 317 .subvendor = 0x0070,
318 .subdevice = 0x7797,
319 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 320 }, {
b00fff0b
MK		 321 .subvendor = 0x0070,
322 .subdevice = 0x7710,
323 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 324 }, {
07b4a835
MK		 325 .subvendor = 0x0070,
326 .subdevice = 0x7717,
327 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 328 }, {
329 .subvendor = 0x0070,
330 .subdevice = 0x71d1,
331 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 332 }, {
333 .subvendor = 0x0070,
334 .subdevice = 0x71d3,
335 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 336 }, {
337 .subvendor = 0x0070,
338 .subdevice = 0x8101,
339 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 340 }, {
341 .subvendor = 0x0070,
342 .subdevice = 0x8010,
343 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 344 }, {
335377b7
MK		 345 .subvendor = 0x18ac,
346 .subdevice = 0xd618,
347 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 348 }, {
aef2d186
ST		 349 .subvendor = 0x18ac,
350 .subdevice = 0xdb78,
351 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 352 }, {
353 .subvendor = 0x107d,
354 .subdevice = 0x6681,
355 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 356 }, {
357 .subvendor = 0x185b,
358 .subdevice = 0xe800,
359 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 360 }, {
361 .subvendor = 0x6920,
362 .subdevice = 0x8888,
363 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 364 }, {
365 .subvendor = 0xd470,
366 .subdevice = 0x9022,
367 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 368 }, {
369 .subvendor = 0x0001,
370 .subdevice = 0x2005,
371 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 372 }, {
373 .subvendor = 0x1b55,
374 .subdevice = 0x2a2c,
375 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 376 }, {
377 .subvendor = 0x0070,
378 .subdevice = 0x2211,
379 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 380 }, {
381 .subvendor = 0x0070,
382 .subdevice = 0x2215,
383 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 384 }, {
385 .subvendor = 0x0070,
386 .subdevice = 0x2251,
387 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 388 }, {
389 .subvendor = 0x0070,
390 .subdevice = 0x2291,
391 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
392 }, {
393 .subvendor = 0x0070,
394 .subdevice = 0x2295,
395 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 396 }, {
397 .subvendor = 0x14f1,
398 .subdevice = 0x8651,
399 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 400 }, {
401 .subvendor = 0x14f1,
402 .subdevice = 0x8657,
403 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 404 }, {
405 .subvendor = 0x0070,
406 .subdevice = 0x8541,
407 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 408 }, {
409 .subvendor = 0x1858,
410 .subdevice = 0xe800,
411 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
aee0b24c
MK		 412 }, {
413 .subvendor = 0x0070,
414 .subdevice = 0x8551,
415 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
ea5697fe
DW		 416 }, {
417 .subvendor = 0x14f1,
418 .subdevice = 0x8578,
419 .card = CX23885_BOARD_MYGICA_X8558PRO,
d19770e5
ST		 420 },
421};
422const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
423
424void cx23885_card_list(struct cx23885_dev *dev)
425{
426 int i;
427
428 if (0 == dev->pci->subsystem_vendor &&
429 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 430 printk(KERN_INFO
431 "%s: Board has no valid PCIe Subsystem ID and can't\n"
432 "%s: be autodetected. Pass card=<n> insmod option\n"
433 "%s: to workaround that. Redirect complaints to the\n"
434 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 435 "%s: -- tux\n",
436 dev->name, dev->name, dev->name, dev->name, dev->name);
437 } else {
9c8ced51
ST		 438 printk(KERN_INFO
439 "%s: Your board isn't known (yet) to the driver.\n"
440 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 441 "%s: card=<n> insmod option. Updating to the latest\n"
442 "%s: version might help as well.\n",
443 dev->name, dev->name, dev->name, dev->name);
444 }
9c8ced51 445 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 446 dev->name);
447 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 448 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 449 dev->name, i, cx23885_boards[i].name);
450}
451
452static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
453{
454 struct tveeprom tv;
455
9c8ced51
ST		 456 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
457 eeprom_data);
d19770e5 458
d19770e5 459 /* Make sure we support the board model */
9c8ced51 460 switch (tv.model) {
5308cf09
MK		 461 case 22001:
462 /* WinTV-HVR1270 (PCIe, Retail, half height)
463 * ATSC/QAM and basic analog, IR Blast */
464 case 22009:
465 /* WinTV-HVR1210 (PCIe, Retail, half height)
466 * DVB-T and basic analog, IR Blast */
467 case 22011:
468 /* WinTV-HVR1270 (PCIe, Retail, half height)
469 * ATSC/QAM and basic analog, IR Recv */
470 case 22019:
471 /* WinTV-HVR1210 (PCIe, Retail, half height)
472 * DVB-T and basic analog, IR Recv */
473 case 22021:
474 /* WinTV-HVR1275 (PCIe, Retail, half height)
475 * ATSC/QAM and basic analog, IR Recv */
476 case 22029:
477 /* WinTV-HVR1210 (PCIe, Retail, half height)
478 * DVB-T and basic analog, IR Recv */
479 case 22101:
480 /* WinTV-HVR1270 (PCIe, Retail, full height)
481 * ATSC/QAM and basic analog, IR Blast */
482 case 22109:
483 /* WinTV-HVR1210 (PCIe, Retail, full height)
484 * DVB-T and basic analog, IR Blast */
485 case 22111:
486 /* WinTV-HVR1270 (PCIe, Retail, full height)
487 * ATSC/QAM and basic analog, IR Recv */
488 case 22119:
489 /* WinTV-HVR1210 (PCIe, Retail, full height)
490 * DVB-T and basic analog, IR Recv */
491 case 22121:
492 /* WinTV-HVR1275 (PCIe, Retail, full height)
493 * ATSC/QAM and basic analog, IR Recv */
494 case 22129:
495 /* WinTV-HVR1210 (PCIe, Retail, full height)
496 * DVB-T and basic analog, IR Recv */
36396c89
MK		 497 case 71009:
498 /* WinTV-HVR1200 (PCIe, Retail, full height)
499 * DVB-T and basic analog */
500 case 71359:
501 /* WinTV-HVR1200 (PCIe, OEM, half height)
502 * DVB-T and basic analog */
503 case 71439:
504 /* WinTV-HVR1200 (PCIe, OEM, half height)
505 * DVB-T and basic analog */
506 case 71449:
507 /* WinTV-HVR1200 (PCIe, OEM, full height)
508 * DVB-T and basic analog */
509 case 71939:
510 /* WinTV-HVR1200 (PCIe, OEM, half height)
511 * DVB-T and basic analog */
512 case 71949:
513 /* WinTV-HVR1200 (PCIe, OEM, full height)
514 * DVB-T and basic analog */
515 case 71959:
516 /* WinTV-HVR1200 (PCIe, OEM, full height)
517 * DVB-T and basic analog */
518 case 71979:
519 /* WinTV-HVR1200 (PCIe, OEM, half height)
520 * DVB-T and basic analog */
521 case 71999:
522 /* WinTV-HVR1200 (PCIe, OEM, full height)
523 * DVB-T and basic analog */
9c8ced51
ST		 524 case 76601:
525 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
526 channel ATSC and MPEG2 HW Encoder */
527 case 77001:
528 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
529 and Basic analog */
530 case 77011:
531 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
532 and Basic analog */
533 case 77041:
534 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
535 and Basic analog */
536 case 77051:
537 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
538 and Basic analog */
539 case 78011:
540 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
541 Dual channel ATSC and MPEG2 HW Encoder */
542 case 78501:
543 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
544 Dual channel ATSC and MPEG2 HW Encoder */
545 case 78521:
546 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
547 Dual channel ATSC and MPEG2 HW Encoder */
548 case 78531:
549 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
550 Dual channel ATSC and MPEG2 HW Encoder */
551 case 78631:
552 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
553 Dual channel ATSC and MPEG2 HW Encoder */
554 case 79001:
555 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
556 ATSC and Basic analog */
557 case 79101:
558 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
559 ATSC and Basic analog */
560 case 79561:
561 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
562 ATSC and Basic analog */
563 case 79571:
564 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
565 ATSC and Basic analog */
566 case 79671:
567 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
568 ATSC and Basic analog */
66762373
ST		 569 case 80019:
570 /* WinTV-HVR1400 (Express Card, Retail, IR,
571 * DVB-T and Basic analog */
36396c89
MK		 572 case 81509:
573 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
574 * DVB-T and MPEG2 HW Encoder */
a780a31c 575 case 81519:
36396c89 576 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 577 * DVB-T and MPEG2 HW Encoder */
d19770e5 578 break;
13697380 579 case 85021:
73a5f419 580 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
13697380
ST		 581 Dual channel ATSC and MPEG2 HW Encoder */
582 break;
73a5f419
MK		 583 case 85721:
584 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
585 Dual channel ATSC and Basic analog */
586 break;
d19770e5 587 default:
13697380
ST		 588 printk(KERN_WARNING "%s: warning: "
589 "unknown hauppauge model #%d\n",
9c8ced51 590 dev->name, tv.model);
d19770e5
ST		 591 break;
592 }
593
594 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
595 dev->name, tv.model);
596}
597
d7cba043 598int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 599{
89ce2216
ST		 600 struct cx23885_tsport *port = priv;
601 struct cx23885_dev *dev = port->dev;
6df51690
ST		 602 u32 bitmask = 0;
603
89ce2216
ST		 604 if (command == XC2028_RESET_CLK)
605 return 0;
606
6df51690
ST		 607 if (command != 0) {
608 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
609 __func__, command);
610 return -EINVAL;
611 }
8c70017f 612
9c8ced51 613 switch (dev->board) {
90a71b1c
ST		 614 case CX23885_BOARD_HAUPPAUGE_HVR1400:
615 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 616 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 617 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 618 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 619 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
90a71b1c 620 /* Tuner Reset Command */
4c56b04a 621 bitmask = 0x04;
6df51690
ST		 622 break;
623 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 624 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 625 /* Two identical tuners on two different i2c buses,
626 * we need to reset the correct gpio. */
d4dc673d 627 if (port->nr == 1)
4c56b04a 628 bitmask = 0x01;
d4dc673d 629 else if (port->nr == 2)
4c56b04a 630 bitmask = 0x04;
8c70017f
ST		 631 break;
632 }
633
6df51690
ST		 634 if (bitmask) {
635 /* Drive the tuner into reset and back out */
636 cx_clear(GP0_IO, bitmask);
637 mdelay(200);
638 cx_set(GP0_IO, bitmask);
639 }
640
641 return 0;
8c70017f 642}
73c993a8 643
a6a3f140
ST		 644void cx23885_gpio_setup(struct cx23885_dev *dev)
645{
9c8ced51 646 switch (dev->board) {
a6a3f140
ST		 647 case CX23885_BOARD_HAUPPAUGE_HVR1250:
648 /* GPIO-0 cx24227 demodulator reset */
649 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
650 break;
07b4a835
MK		 651 case CX23885_BOARD_HAUPPAUGE_HVR1500:
652 /* GPIO-0 cx24227 demodulator */
653 /* GPIO-2 xc3028 tuner */
654
655 /* Put the parts into reset */
656 cx_set(GP0_IO, 0x00050000);
657 cx_clear(GP0_IO, 0x00000005);
658 msleep(5);
659
660 /* Bring the parts out of reset */
661 cx_set(GP0_IO, 0x00050005);
662 break;
d1987d55
ST		 663 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
664 /* GPIO-0 cx24227 demodulator reset */
665 /* GPIO-2 xc5000 tuner reset */
666 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
667 break;
a6a3f140
ST		 668 case CX23885_BOARD_HAUPPAUGE_HVR1800:
669 /* GPIO-0 656_CLK */
670 /* GPIO-1 656_D0 */
671 /* GPIO-2 8295A Reset */
672 /* GPIO-3-10 cx23417 data0-7 */
673 /* GPIO-11-14 cx23417 addr0-3 */
674 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
675 /* GPIO-19 IR_RX */
3ba71d21 676
a589b665
ST		 677 /* CX23417 GPIO's */
678 /* EIO15 Zilog Reset */
679 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 680 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
681
682 /* Put the demod into reset and protect the eeprom */
683 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
684 mdelay(100);
685
686 /* Bring the demod and blaster out of reset */
687 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
688 mdelay(100);
a589b665 689
5206d6ec 690 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 691 cx23885_gpio_enable(dev, GPIO_2, 1);
692 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 693 mdelay(20);
21ff3e4f 694 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 695 mdelay(20);
21ff3e4f 696 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 697 mdelay(20);
a6a3f140 698 break;
b3ea0166
ST		 699 case CX23885_BOARD_HAUPPAUGE_HVR1200:
700 /* GPIO-0 tda10048 demodulator reset */
701 /* GPIO-2 tda18271 tuner reset */
702
a780a31c
ST		 703 /* Put the parts into reset and back */
704 cx_set(GP0_IO, 0x00050000);
705 mdelay(20);
706 cx_clear(GP0_IO, 0x00000005);
707 mdelay(20);
708 cx_set(GP0_IO, 0x00050005);
709 break;
710 case CX23885_BOARD_HAUPPAUGE_HVR1700:
711 /* GPIO-0 TDA10048 demodulator reset */
712 /* GPIO-2 TDA8295A Reset */
713 /* GPIO-3-10 cx23417 data0-7 */
714 /* GPIO-11-14 cx23417 addr0-3 */
715 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
716
717 /* The following GPIO's are on the interna AVCore (cx25840) */
718 /* GPIO-19 IR_RX */
719 /* GPIO-20 IR_TX 416/DVBT Select */
720 /* GPIO-21 IIS DAT */
721 /* GPIO-22 IIS WCLK */
722 /* GPIO-23 IIS BCLK */
723
66762373
ST		 724 /* Put the parts into reset and back */
725 cx_set(GP0_IO, 0x00050000);
726 mdelay(20);
727 cx_clear(GP0_IO, 0x00000005);
728 mdelay(20);
729 cx_set(GP0_IO, 0x00050005);
730 break;
731 case CX23885_BOARD_HAUPPAUGE_HVR1400:
732 /* GPIO-0 Dibcom7000p demodulator reset */
733 /* GPIO-2 xc3028L tuner reset */
734 /* GPIO-13 LED */
735
b3ea0166
ST		 736 /* Put the parts into reset and back */
737 cx_set(GP0_IO, 0x00050000);
738 mdelay(20);
739 cx_clear(GP0_IO, 0x00000005);
740 mdelay(20);
741 cx_set(GP0_IO, 0x00050005);
742 break;
1ecc5aed
ST		 743 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
744 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
745 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
746 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
747 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
748
aef2d186
ST		 749 /* Put the parts into reset and back */
750 cx_set(GP0_IO, 0x000f0000);
751 mdelay(20);
752 cx_clear(GP0_IO, 0x0000000f);
753 mdelay(20);
754 cx_set(GP0_IO, 0x000f000f);
755 break;
756 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
757 /* GPIO-0 portb xc3028 reset */
758 /* GPIO-1 portb zl10353 reset */
759 /* GPIO-2 portc xc3028 reset */
760 /* GPIO-3 portc zl10353 reset */
761
1ecc5aed
ST		 762 /* Put the parts into reset and back */
763 cx_set(GP0_IO, 0x000f0000);
764 mdelay(20);
765 cx_clear(GP0_IO, 0x0000000f);
766 mdelay(20);
767 cx_set(GP0_IO, 0x000f000f);
768 break;
4c56b04a 769 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 770 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 771 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 772 /* GPIO-2 xc3028 tuner reset */
773
774 /* The following GPIO's are on the internal AVCore (cx25840) */
775 /* GPIO-? zl10353 demod reset */
776
777 /* Put the parts into reset and back */
778 cx_set(GP0_IO, 0x00040000);
779 mdelay(20);
780 cx_clear(GP0_IO, 0x00000004);
781 mdelay(20);
782 cx_set(GP0_IO, 0x00040004);
783 break;
96318d0c
IL		 784 case CX23885_BOARD_TBS_6920:
785 cx_write(MC417_CTL, 0x00000036);
786 cx_write(MC417_OEN, 0x00001000);
09ea33e5
IL		 787 cx_set(MC417_RWD, 0x00000002);
788 mdelay(200);
789 cx_clear(MC417_RWD, 0x00000800);
790 mdelay(200);
791 cx_set(MC417_RWD, 0x00000800);
792 mdelay(200);
96318d0c 793 break;
5a23b076
IL		 794 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
795 /* GPIO-0 INTA from CiMax1
796 GPIO-1 INTB from CiMax2
797 GPIO-2 reset chips
798 GPIO-3 to GPIO-10 data/addr for CA
799 GPIO-11 ~CS0 to CiMax1
800 GPIO-12 ~CS1 to CiMax2
801 GPIO-13 ADL0 load LSB addr
802 GPIO-14 ADL1 load MSB addr
803 GPIO-15 ~RDY from CiMax
804 GPIO-17 ~RD to CiMax
805 GPIO-18 ~WR to CiMax
806 */
807 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
808 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
809 cx_clear(GP0_IO, 0x00030004);
810 mdelay(100);/* reset delay */
811 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
812 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
813 /* GPIO-15 IN as ~ACK, rest as OUT */
814 cx_write(MC417_OEN, 0x00001000);
815 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
816 cx_write(MC417_RWD, 0x0000c300);
817 /* enable irq */
818 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
819 break;
2074dffa 820 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 821 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 822 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 823 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 824 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 825 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
826 /* GPIO-9 Demod reset */
2074dffa
ST		 827
828 /* Put the parts into reset and back */
d099becb
MK		 829 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
830 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 831 cx23885_gpio_clear(dev, GPIO_9);
832 mdelay(20);
833 cx23885_gpio_set(dev, GPIO_9);
834 break;
493b7127 835 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 836 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
8e069bb9 837 /* GPIO-0 (0)Analog / (1)Digital TV */
493b7127 838 /* GPIO-1 reset XC5000 */
2365b2d3 839 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
8e069bb9
DW		 840 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
841 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
493b7127 842 mdelay(100);
8e069bb9 843 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
493b7127
DW		 844 mdelay(100);
845 break;
ea5697fe
DW		 846 case CX23885_BOARD_MYGICA_X8558PRO:
847 /* GPIO-0 reset first ATBM8830 */
848 /* GPIO-1 reset second ATBM8830 */
849 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
850 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
851 mdelay(100);
852 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
853 mdelay(100);
854 break;
13697380 855 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 856 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 857 /* GPIO-0 656_CLK */
858 /* GPIO-1 656_D0 */
859 /* GPIO-2 Wake# */
860 /* GPIO-3-10 cx23417 data0-7 */
861 /* GPIO-11-14 cx23417 addr0-3 */
862 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
863 /* GPIO-19 IR_RX */
864 /* GPIO-20 C_IR_TX */
865 /* GPIO-21 I2S DAT */
866 /* GPIO-22 I2S WCLK */
867 /* GPIO-23 I2S BCLK */
868 /* ALT GPIO: EXP GPIO LATCH */
869
870 /* CX23417 GPIO's */
871 /* GPIO-14 S5H1411/CX24228 Reset */
872 /* GPIO-13 EEPROM write protect */
873 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
874
875 /* Put the demod into reset and protect the eeprom */
876 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
877 mdelay(100);
878
879 /* Bring the demod out of reset */
880 mc417_gpio_set(dev, GPIO_14);
881 mdelay(100);
882
883 /* CX24228 GPIO */
884 /* Connected to IF / Mux */
885 break;
a6a3f140
ST		 886 }
887}
888
889int cx23885_ir_init(struct cx23885_dev *dev)
890{
29f8a0a5 891 int ret = 0;
a6a3f140
ST		 892 switch (dev->board) {
893 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 894 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 895 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 896 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 897 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 898 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 899 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 900 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 901 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 902 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 903 /* FIXME: Implement me */
904 break;
29f8a0a5 905 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 906 case CX23885_BOARD_HAUPPAUGE_HVR1290:
29f8a0a5
AW		 907 ret = cx23888_ir_probe(dev);
908 if (ret)
909 break;
910 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
f59ad611 911 dev->pci_irqmask |= PCI_MSK_IR;
29f8a0a5 912 break;
12886871
ST		 913 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
914 request_module("ir-kbd-i2c");
915 break;
a6a3f140
ST		 916 }
917
29f8a0a5 918 return ret;
a6a3f140
ST		 919}
920
f59ad611
AW		 921void cx23885_ir_fini(struct cx23885_dev *dev)
922{
923 switch (dev->board) {
924 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 925 case CX23885_BOARD_HAUPPAUGE_HVR1290:
f59ad611
AW		 926 dev->pci_irqmask &= ~PCI_MSK_IR;
927 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
928 cx23888_ir_remove(dev);
929 dev->sd_ir = NULL;
930 break;
931 }
932}
933
934void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
935{
936 switch (dev->board) {
937 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 938 case CX23885_BOARD_HAUPPAUGE_HVR1290:
f59ad611
AW		 939 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
940 cx_set(PCI_INT_MSK, PCI_MSK_IR);
941 break;
942 }
943}
944
d19770e5
ST		 945void cx23885_card_setup(struct cx23885_dev *dev)
946{
a6a3f140
ST		 947 struct cx23885_tsport *ts1 = &dev->ts1;
948 struct cx23885_tsport *ts2 = &dev->ts2;
949
d19770e5
ST		 950 static u8 eeprom[256];
951
952 if (dev->i2c_bus[0].i2c_rc == 0) {
953 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 954 tveeprom_read(&dev->i2c_bus[0].i2c_client,
955 eeprom, sizeof(eeprom));
d19770e5
ST		 956 }
957
958 switch (dev->board) {
a77743bc 959 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 960 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 961 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 962 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 963 if (dev->i2c_bus[0].i2c_rc == 0)
964 hauppauge_eeprom(dev, eeprom+0x80);
965 break;
d19770e5
ST		 966 case CX23885_BOARD_HAUPPAUGE_HVR1800:
967 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 968 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 969 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 970 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 971 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 972 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 973 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 974 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 975 case CX23885_BOARD_HAUPPAUGE_HVR1290:
d19770e5 976 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 977 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 978 break;
979 }
a6a3f140
ST		 980
981 switch (dev->board) {
335377b7 982 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 983 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 984 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
985 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
986 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
987 /* break omitted intentionally */
a6a3f140
ST		 988 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
989 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
990 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
991 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
992 break;
a589b665
ST		 993 case CX23885_BOARD_HAUPPAUGE_HVR1800:
994 /* Defaults for VID B - Analog encoder */
995 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
996 ts1->gen_ctrl_val = 0x10e;
997 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
998 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
999
1000 /* APB_TSVALERR_POL (active low)*/
1001 ts1->vld_misc_val = 0x2000;
1002 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1003
1004 /* Defaults for VID C */
1005 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1006 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1007 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c
IL		 1008 break;
1009 case CX23885_BOARD_TBS_6920:
09ea33e5
IL		 1010 ts1->gen_ctrl_val = 0x4; /* Parallel */
1011 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1012 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1013 break;
1014 case CX23885_BOARD_TEVII_S470:
c9b8b04b 1015 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 1016 ts1->gen_ctrl_val = 0x5; /* Parallel */
1017 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1018 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 1019 break;
5a23b076
IL		 1020 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1021 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1022 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1023 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1024 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1025 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1026 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1027 break;
493b7127 1028 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 1029 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 1030 ts1->gen_ctrl_val = 0x5; /* Parallel */
1031 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1032 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1033 break;
ea5697fe
DW		 1034 case CX23885_BOARD_MYGICA_X8558PRO:
1035 ts1->gen_ctrl_val = 0x5; /* Parallel */
1036 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1037 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1038 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1039 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1040 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1041 break;
a6a3f140 1042 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 1043 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 1044 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 1045 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 1046 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1047 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 1048 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 1049 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1050 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 1051 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1052 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1053 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 1054 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 1055 case CX23885_BOARD_HAUPPAUGE_HVR1850:
34e383dd 1056 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
aee0b24c 1057 case CX23885_BOARD_HAUPPAUGE_HVR1290:
a6a3f140
ST		 1058 default:
1059 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1060 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1061 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1062 }
1063
ce89cfb4
ST		 1064 /* Certain boards support analog, or require the avcore to be
1065 * loaded, ensure this happens.
1066 */
1067 switch (dev->board) {
1068 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1069 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1070 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 1071 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1072 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 1073 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
34e383dd 1074 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
c6b7053b 1075 case CX23885_BOARD_HAUPPAUGE_HVR1850:
bc1548ad
DW		 1076 case CX23885_BOARD_MYGICA_X8506:
1077 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
aee0b24c 1078 case CX23885_BOARD_HAUPPAUGE_HVR1290:
e6574f2f
HV		 1079 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1080 &dev->i2c_bus[2].i2c_adap,
53dacb15 1081 "cx25840", "cx25840", 0x88 >> 1, NULL);
cc26b076 1082 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 1083 break;
1084 }
5a23b076
IL		 1085
1086 /* AUX-PLL 27MHz CLK */
1087 switch (dev->board) {
1088 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1089 netup_initialize(dev);
1090 break;
1091 }
d19770e5
ST		 1092}
1093
1094/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
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