V4L/DVB (11769): cx23885: add ATSC/QAM tuning support for Hauppauge WinTV-HVR1275
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
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27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
d19770e5
ST
31
32/* ------------------------------------------------------------------ */
33/* board config info */
34
35struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
c7712613
ST
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
d19770e5
ST
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
9c8ced51 43 }, {
d19770e5
ST
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
9c8ced51 46 }, {
d19770e5
ST
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
9c8ced51 49 }, {
d19770e5
ST
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
9c8ced51 52 } },
d19770e5
ST
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
9c8ced51 61 }, {
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ST
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
9c8ced51 65 }, {
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66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
9c8ced51 69 }, {
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70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
9c8ced51 73 } },
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ST
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
7b888014 77 .porta = CX23885_ANALOG_VIDEO,
a589b665 78 .portb = CX23885_MPEG_ENCODER,
d19770e5 79 .portc = CX23885_MPEG_DVB,
7b888014
ST
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
7b888014
ST
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
9c8ced51 88 }, {
d19770e5 89 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
9c8ced51 94 }, {
d19770e5 95 .type = CX23885_VMUX_SVIDEO,
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ST
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
9c8ced51 101 } },
d19770e5 102 },
a77743bc
ST
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
9c8ced51 110 }, {
a77743bc
ST
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
9c8ced51 114 }, {
a77743bc
ST
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
9c8ced51 118 }, {
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ST
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
9c8ced51 122 } },
a77743bc 123 },
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MK
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
a6a3f140 126 .portb = CX23885_MPEG_DVB,
9bc37caa 127 },
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ST
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
07b4a835
MK
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
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ST
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
a780a31c
ST
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
66762373
ST
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
335377b7
MK
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 150 .portb = CX23885_MPEG_DVB,
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MK
151 .portc = CX23885_MPEG_DVB,
152 },
aef2d186
ST
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
4c56b04a
ST
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
9bb1b7e8
IL
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
96318d0c
IL
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
579943f5
IL
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
c9b8b04b
IL
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
5a23b076
IL
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
2074dffa
ST
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 186 .portc = CX23885_MPEG_DVB,
2074dffa 187 },
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MK
188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
d19770e5
ST
192};
193const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
194
195/* ------------------------------------------------------------------ */
196/* PCI subsystem IDs */
197
198struct cx23885_subid cx23885_subids[] = {
199 {
200 .subvendor = 0x0070,
201 .subdevice = 0x3400,
202 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 203 }, {
d19770e5
ST
204 .subvendor = 0x0070,
205 .subdevice = 0x7600,
206 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 207 }, {
d19770e5
ST
208 .subvendor = 0x0070,
209 .subdevice = 0x7800,
210 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 211 }, {
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ST
212 .subvendor = 0x0070,
213 .subdevice = 0x7801,
214 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 215 }, {
6ccb8cfb
MK
216 .subvendor = 0x0070,
217 .subdevice = 0x7809,
218 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 219 }, {
a77743bc
ST
220 .subvendor = 0x0070,
221 .subdevice = 0x7911,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 223 }, {
9bc37caa
MK
224 .subvendor = 0x18ac,
225 .subdevice = 0xd500,
226 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 227 }, {
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MK
228 .subvendor = 0x0070,
229 .subdevice = 0x7790,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 231 }, {
d1987d55
ST
232 .subvendor = 0x0070,
233 .subdevice = 0x7797,
234 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 235 }, {
b00fff0b
MK
236 .subvendor = 0x0070,
237 .subdevice = 0x7710,
238 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 239 }, {
07b4a835
MK
240 .subvendor = 0x0070,
241 .subdevice = 0x7717,
242 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST
243 }, {
244 .subvendor = 0x0070,
245 .subdevice = 0x71d1,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK
247 }, {
248 .subvendor = 0x0070,
249 .subdevice = 0x71d3,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST
251 }, {
252 .subvendor = 0x0070,
253 .subdevice = 0x8101,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST
255 }, {
256 .subvendor = 0x0070,
257 .subdevice = 0x8010,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 259 }, {
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MK
260 .subvendor = 0x18ac,
261 .subdevice = 0xd618,
262 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 263 }, {
aef2d186
ST
264 .subvendor = 0x18ac,
265 .subdevice = 0xdb78,
266 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST
267 }, {
268 .subvendor = 0x107d,
269 .subdevice = 0x6681,
270 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL
271 }, {
272 .subvendor = 0x185b,
273 .subdevice = 0xe800,
274 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL
275 }, {
276 .subvendor = 0x6920,
277 .subdevice = 0x8888,
278 .card = CX23885_BOARD_TBS_6920,
579943f5
IL
279 }, {
280 .subvendor = 0xd470,
281 .subdevice = 0x9022,
282 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL
283 }, {
284 .subvendor = 0x0001,
285 .subdevice = 0x2005,
286 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL
287 }, {
288 .subvendor = 0x1b55,
289 .subdevice = 0x2a2c,
290 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST
291 }, {
292 .subvendor = 0x0070,
293 .subdevice = 0x2211,
294 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK
295 }, {
296 .subvendor = 0x0070,
297 .subdevice = 0x2215,
298 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
d19770e5
ST
299 },
300};
301const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
302
303void cx23885_card_list(struct cx23885_dev *dev)
304{
305 int i;
306
307 if (0 == dev->pci->subsystem_vendor &&
308 0 == dev->pci->subsystem_device) {
9c8ced51
ST
309 printk(KERN_INFO
310 "%s: Board has no valid PCIe Subsystem ID and can't\n"
311 "%s: be autodetected. Pass card=<n> insmod option\n"
312 "%s: to workaround that. Redirect complaints to the\n"
313 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST
314 "%s: -- tux\n",
315 dev->name, dev->name, dev->name, dev->name, dev->name);
316 } else {
9c8ced51
ST
317 printk(KERN_INFO
318 "%s: Your board isn't known (yet) to the driver.\n"
319 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST
320 "%s: card=<n> insmod option. Updating to the latest\n"
321 "%s: version might help as well.\n",
322 dev->name, dev->name, dev->name, dev->name);
323 }
9c8ced51 324 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST
325 dev->name);
326 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 327 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST
328 dev->name, i, cx23885_boards[i].name);
329}
330
331static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
332{
333 struct tveeprom tv;
334
9c8ced51
ST
335 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
336 eeprom_data);
d19770e5 337
d19770e5 338 /* Make sure we support the board model */
9c8ced51 339 switch (tv.model) {
36396c89
MK
340 case 71009:
341 /* WinTV-HVR1200 (PCIe, Retail, full height)
342 * DVB-T and basic analog */
343 case 71359:
344 /* WinTV-HVR1200 (PCIe, OEM, half height)
345 * DVB-T and basic analog */
346 case 71439:
347 /* WinTV-HVR1200 (PCIe, OEM, half height)
348 * DVB-T and basic analog */
349 case 71449:
350 /* WinTV-HVR1200 (PCIe, OEM, full height)
351 * DVB-T and basic analog */
352 case 71939:
353 /* WinTV-HVR1200 (PCIe, OEM, half height)
354 * DVB-T and basic analog */
355 case 71949:
356 /* WinTV-HVR1200 (PCIe, OEM, full height)
357 * DVB-T and basic analog */
358 case 71959:
359 /* WinTV-HVR1200 (PCIe, OEM, full height)
360 * DVB-T and basic analog */
361 case 71979:
362 /* WinTV-HVR1200 (PCIe, OEM, half height)
363 * DVB-T and basic analog */
364 case 71999:
365 /* WinTV-HVR1200 (PCIe, OEM, full height)
366 * DVB-T and basic analog */
9c8ced51
ST
367 case 76601:
368 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
369 channel ATSC and MPEG2 HW Encoder */
370 case 77001:
371 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
372 and Basic analog */
373 case 77011:
374 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
375 and Basic analog */
376 case 77041:
377 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
378 and Basic analog */
379 case 77051:
380 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
381 and Basic analog */
382 case 78011:
383 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
384 Dual channel ATSC and MPEG2 HW Encoder */
385 case 78501:
386 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
387 Dual channel ATSC and MPEG2 HW Encoder */
388 case 78521:
389 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
390 Dual channel ATSC and MPEG2 HW Encoder */
391 case 78531:
392 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
393 Dual channel ATSC and MPEG2 HW Encoder */
394 case 78631:
395 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
396 Dual channel ATSC and MPEG2 HW Encoder */
397 case 79001:
398 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
399 ATSC and Basic analog */
400 case 79101:
401 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
402 ATSC and Basic analog */
403 case 79561:
404 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
405 ATSC and Basic analog */
406 case 79571:
407 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
408 ATSC and Basic analog */
409 case 79671:
410 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
411 ATSC and Basic analog */
66762373
ST
412 case 80019:
413 /* WinTV-HVR1400 (Express Card, Retail, IR,
414 * DVB-T and Basic analog */
36396c89
MK
415 case 81509:
416 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
417 * DVB-T and MPEG2 HW Encoder */
a780a31c 418 case 81519:
36396c89 419 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 420 * DVB-T and MPEG2 HW Encoder */
d19770e5
ST
421 break;
422 default:
9c8ced51
ST
423 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
424 dev->name, tv.model);
d19770e5
ST
425 break;
426 }
427
428 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
429 dev->name, tv.model);
430}
431
d7cba043 432int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 433{
89ce2216
ST
434 struct cx23885_tsport *port = priv;
435 struct cx23885_dev *dev = port->dev;
6df51690
ST
436 u32 bitmask = 0;
437
89ce2216
ST
438 if (command == XC2028_RESET_CLK)
439 return 0;
440
6df51690
ST
441 if (command != 0) {
442 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
443 __func__, command);
444 return -EINVAL;
445 }
8c70017f 446
9c8ced51 447 switch (dev->board) {
90a71b1c
ST
448 case CX23885_BOARD_HAUPPAUGE_HVR1400:
449 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 450 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 451 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 452 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
90a71b1c 453 /* Tuner Reset Command */
4c56b04a 454 bitmask = 0x04;
6df51690
ST
455 break;
456 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 457 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST
458 /* Two identical tuners on two different i2c buses,
459 * we need to reset the correct gpio. */
d4dc673d 460 if (port->nr == 1)
4c56b04a 461 bitmask = 0x01;
d4dc673d 462 else if (port->nr == 2)
4c56b04a 463 bitmask = 0x04;
8c70017f
ST
464 break;
465 }
466
6df51690
ST
467 if (bitmask) {
468 /* Drive the tuner into reset and back out */
469 cx_clear(GP0_IO, bitmask);
470 mdelay(200);
471 cx_set(GP0_IO, bitmask);
472 }
473
474 return 0;
8c70017f 475}
73c993a8 476
a6a3f140
ST
477void cx23885_gpio_setup(struct cx23885_dev *dev)
478{
9c8ced51 479 switch (dev->board) {
a6a3f140
ST
480 case CX23885_BOARD_HAUPPAUGE_HVR1250:
481 /* GPIO-0 cx24227 demodulator reset */
482 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
483 break;
07b4a835
MK
484 case CX23885_BOARD_HAUPPAUGE_HVR1500:
485 /* GPIO-0 cx24227 demodulator */
486 /* GPIO-2 xc3028 tuner */
487
488 /* Put the parts into reset */
489 cx_set(GP0_IO, 0x00050000);
490 cx_clear(GP0_IO, 0x00000005);
491 msleep(5);
492
493 /* Bring the parts out of reset */
494 cx_set(GP0_IO, 0x00050005);
495 break;
d1987d55
ST
496 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
497 /* GPIO-0 cx24227 demodulator reset */
498 /* GPIO-2 xc5000 tuner reset */
499 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
500 break;
a6a3f140
ST
501 case CX23885_BOARD_HAUPPAUGE_HVR1800:
502 /* GPIO-0 656_CLK */
503 /* GPIO-1 656_D0 */
504 /* GPIO-2 8295A Reset */
505 /* GPIO-3-10 cx23417 data0-7 */
506 /* GPIO-11-14 cx23417 addr0-3 */
507 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
508 /* GPIO-19 IR_RX */
3ba71d21 509
a589b665
ST
510 /* CX23417 GPIO's */
511 /* EIO15 Zilog Reset */
512 /* EIO14 S5H1409/CX24227 Reset */
513
5206d6ec
ST
514 /* Force the TDA8295A into reset and back */
515 cx_set(GP0_IO, 0x00040004);
516 mdelay(20);
517 cx_clear(GP0_IO, 0x00000004);
518 mdelay(20);
519 cx_set(GP0_IO, 0x00040004);
520 mdelay(20);
a6a3f140 521 break;
b3ea0166
ST
522 case CX23885_BOARD_HAUPPAUGE_HVR1200:
523 /* GPIO-0 tda10048 demodulator reset */
524 /* GPIO-2 tda18271 tuner reset */
525
a780a31c
ST
526 /* Put the parts into reset and back */
527 cx_set(GP0_IO, 0x00050000);
528 mdelay(20);
529 cx_clear(GP0_IO, 0x00000005);
530 mdelay(20);
531 cx_set(GP0_IO, 0x00050005);
532 break;
533 case CX23885_BOARD_HAUPPAUGE_HVR1700:
534 /* GPIO-0 TDA10048 demodulator reset */
535 /* GPIO-2 TDA8295A Reset */
536 /* GPIO-3-10 cx23417 data0-7 */
537 /* GPIO-11-14 cx23417 addr0-3 */
538 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
539
540 /* The following GPIO's are on the interna AVCore (cx25840) */
541 /* GPIO-19 IR_RX */
542 /* GPIO-20 IR_TX 416/DVBT Select */
543 /* GPIO-21 IIS DAT */
544 /* GPIO-22 IIS WCLK */
545 /* GPIO-23 IIS BCLK */
546
66762373
ST
547 /* Put the parts into reset and back */
548 cx_set(GP0_IO, 0x00050000);
549 mdelay(20);
550 cx_clear(GP0_IO, 0x00000005);
551 mdelay(20);
552 cx_set(GP0_IO, 0x00050005);
553 break;
554 case CX23885_BOARD_HAUPPAUGE_HVR1400:
555 /* GPIO-0 Dibcom7000p demodulator reset */
556 /* GPIO-2 xc3028L tuner reset */
557 /* GPIO-13 LED */
558
b3ea0166
ST
559 /* Put the parts into reset and back */
560 cx_set(GP0_IO, 0x00050000);
561 mdelay(20);
562 cx_clear(GP0_IO, 0x00000005);
563 mdelay(20);
564 cx_set(GP0_IO, 0x00050005);
565 break;
1ecc5aed
ST
566 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
567 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
568 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
569 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
570 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
571
aef2d186
ST
572 /* Put the parts into reset and back */
573 cx_set(GP0_IO, 0x000f0000);
574 mdelay(20);
575 cx_clear(GP0_IO, 0x0000000f);
576 mdelay(20);
577 cx_set(GP0_IO, 0x000f000f);
578 break;
579 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
580 /* GPIO-0 portb xc3028 reset */
581 /* GPIO-1 portb zl10353 reset */
582 /* GPIO-2 portc xc3028 reset */
583 /* GPIO-3 portc zl10353 reset */
584
1ecc5aed
ST
585 /* Put the parts into reset and back */
586 cx_set(GP0_IO, 0x000f0000);
587 mdelay(20);
588 cx_clear(GP0_IO, 0x0000000f);
589 mdelay(20);
590 cx_set(GP0_IO, 0x000f000f);
591 break;
4c56b04a 592 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 593 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST
594 /* GPIO-2 xc3028 tuner reset */
595
596 /* The following GPIO's are on the internal AVCore (cx25840) */
597 /* GPIO-? zl10353 demod reset */
598
599 /* Put the parts into reset and back */
600 cx_set(GP0_IO, 0x00040000);
601 mdelay(20);
602 cx_clear(GP0_IO, 0x00000004);
603 mdelay(20);
604 cx_set(GP0_IO, 0x00040004);
605 break;
96318d0c 606 case CX23885_BOARD_TBS_6920:
579943f5 607 case CX23885_BOARD_TEVII_S470:
96318d0c
IL
608 cx_write(MC417_CTL, 0x00000036);
609 cx_write(MC417_OEN, 0x00001000);
610 cx_write(MC417_RWD, 0x00001800);
611 break;
5a23b076
IL
612 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
613 /* GPIO-0 INTA from CiMax1
614 GPIO-1 INTB from CiMax2
615 GPIO-2 reset chips
616 GPIO-3 to GPIO-10 data/addr for CA
617 GPIO-11 ~CS0 to CiMax1
618 GPIO-12 ~CS1 to CiMax2
619 GPIO-13 ADL0 load LSB addr
620 GPIO-14 ADL1 load MSB addr
621 GPIO-15 ~RDY from CiMax
622 GPIO-17 ~RD to CiMax
623 GPIO-18 ~WR to CiMax
624 */
625 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
626 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
627 cx_clear(GP0_IO, 0x00030004);
628 mdelay(100);/* reset delay */
629 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
630 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
631 /* GPIO-15 IN as ~ACK, rest as OUT */
632 cx_write(MC417_OEN, 0x00001000);
633 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
634 cx_write(MC417_RWD, 0x0000c300);
635 /* enable irq */
636 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
637 break;
2074dffa 638 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb
MK
639 case CX23885_BOARD_HAUPPAUGE_HVR1275:
640 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
2074dffa
ST
641 /* GPIO-6 I2C Gate which can isolate the 3305 from the bus */
642 /* GPIO-9 LG3305 reset */
643
644 /* Put the parts into reset and back */
d099becb
MK
645 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
646 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST
647 cx23885_gpio_clear(dev, GPIO_9);
648 mdelay(20);
649 cx23885_gpio_set(dev, GPIO_9);
650 break;
a6a3f140
ST
651 }
652}
653
654int cx23885_ir_init(struct cx23885_dev *dev)
655{
656 switch (dev->board) {
657 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 658 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 659 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 660 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 661 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 662 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 663 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 664 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a6a3f140
ST
665 /* FIXME: Implement me */
666 break;
12886871
ST
667 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
668 request_module("ir-kbd-i2c");
669 break;
a6a3f140
ST
670 }
671
672 return 0;
673}
674
d19770e5
ST
675void cx23885_card_setup(struct cx23885_dev *dev)
676{
a6a3f140
ST
677 struct cx23885_tsport *ts1 = &dev->ts1;
678 struct cx23885_tsport *ts2 = &dev->ts2;
679
d19770e5
ST
680 static u8 eeprom[256];
681
682 if (dev->i2c_bus[0].i2c_rc == 0) {
683 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK
684 tveeprom_read(&dev->i2c_bus[0].i2c_client,
685 eeprom, sizeof(eeprom));
d19770e5
ST
686 }
687
688 switch (dev->board) {
a77743bc 689 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 690 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 691 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 692 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST
693 if (dev->i2c_bus[0].i2c_rc == 0)
694 hauppauge_eeprom(dev, eeprom+0x80);
695 break;
d19770e5
ST
696 case CX23885_BOARD_HAUPPAUGE_HVR1800:
697 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 698 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 699 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 700 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 701 case CX23885_BOARD_HAUPPAUGE_HVR1275:
d19770e5 702 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 703 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST
704 break;
705 }
a6a3f140
ST
706
707 switch (dev->board) {
335377b7 708 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 709 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK
710 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
711 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
712 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
713 /* break omitted intentionally */
a6a3f140
ST
714 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
715 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
716 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
717 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
718 break;
a589b665
ST
719 case CX23885_BOARD_HAUPPAUGE_HVR1800:
720 /* Defaults for VID B - Analog encoder */
721 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
722 ts1->gen_ctrl_val = 0x10e;
723 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
724 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
725
726 /* APB_TSVALERR_POL (active low)*/
727 ts1->vld_misc_val = 0x2000;
728 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
729
730 /* Defaults for VID C */
731 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
732 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
733 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 734 break;
579943f5 735 case CX23885_BOARD_TEVII_S470:
96318d0c 736 case CX23885_BOARD_TBS_6920:
c9b8b04b 737 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL
738 ts1->gen_ctrl_val = 0x5; /* Parallel */
739 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
740 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 741 break;
5a23b076
IL
742 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
743 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
744 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
745 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
746 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
747 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
748 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
749 break;
a6a3f140 750 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 751 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 752 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 753 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 754 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 755 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 756 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 757 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 758 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 759 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 760 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a6a3f140
ST
761 default:
762 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
763 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
764 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
765 }
766
ce89cfb4
ST
767 /* Certain boards support analog, or require the avcore to be
768 * loaded, ensure this happens.
769 */
770 switch (dev->board) {
771 case CX23885_BOARD_HAUPPAUGE_HVR1800:
772 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
773 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 774 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 775 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 776 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
e6574f2f
HV
777 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
778 &dev->i2c_bus[2].i2c_adap,
0d5a19f1 779 "cx25840", "cx25840", 0x88 >> 1);
cc26b076 780 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST
781 break;
782 }
5a23b076
IL
783
784 /* AUX-PLL 27MHz CLK */
785 switch (dev->board) {
786 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
787 netup_initialize(dev);
788 break;
789 }
d19770e5
ST
790}
791
792/* ------------------------------------------------------------------ */
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