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V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
7b888014 26#include <media/cx25840.h>
d19770e5
ST		 27
28#include "cx23885.h"
90a71b1c 29#include "tuner-xc2028.h"
5a23b076 30#include "netup-init.h"
29f8a0a5 31#include "cx23888-ir.h"
d19770e5
ST		 32
33/* ------------------------------------------------------------------ */
34/* board config info */
35
36struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
c7712613
ST		 39 /* Ensure safe default for unknown boards */
40 .clk_freq = 0,
d19770e5
ST		 41 .input = {{
42 .type = CX23885_VMUX_COMPOSITE1,
43 .vmux = 0,
9c8ced51 44 }, {
d19770e5
ST		 45 .type = CX23885_VMUX_COMPOSITE2,
46 .vmux = 1,
9c8ced51 47 }, {
d19770e5
ST		 48 .type = CX23885_VMUX_COMPOSITE3,
49 .vmux = 2,
9c8ced51 50 }, {
d19770e5
ST		 51 .type = CX23885_VMUX_COMPOSITE4,
52 .vmux = 3,
9c8ced51 53 } },
d19770e5
ST		 54 },
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 57 .portc = CX23885_MPEG_DVB,
58 .input = {{
59 .type = CX23885_VMUX_TELEVISION,
60 .vmux = 0,
61 .gpio0 = 0xff00,
9c8ced51 62 }, {
d19770e5
ST		 63 .type = CX23885_VMUX_DEBUG,
64 .vmux = 0,
65 .gpio0 = 0xff01,
9c8ced51 66 }, {
d19770e5
ST		 67 .type = CX23885_VMUX_COMPOSITE1,
68 .vmux = 1,
69 .gpio0 = 0xff02,
9c8ced51 70 }, {
d19770e5
ST		 71 .type = CX23885_VMUX_SVIDEO,
72 .vmux = 2,
73 .gpio0 = 0xff02,
9c8ced51 74 } },
d19770e5
ST		 75 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
7b888014 78 .porta = CX23885_ANALOG_VIDEO,
a589b665 79 .portb = CX23885_MPEG_ENCODER,
d19770e5 80 .portc = CX23885_MPEG_DVB,
7b888014
ST		 81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
d19770e5
ST		 83 .input = {{
84 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 85 .vmux = CX25840_VIN7_CH3 |
86 CX25840_VIN5_CH2 |
87 CX25840_VIN2_CH1,
88 .gpio0 = 0,
9c8ced51 89 }, {
d19770e5 90 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 91 .vmux = CX25840_VIN7_CH3 |
92 CX25840_VIN4_CH2 |
93 CX25840_VIN6_CH1,
94 .gpio0 = 0,
9c8ced51 95 }, {
d19770e5 96 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 97 .vmux = CX25840_VIN7_CH3 |
98 CX25840_VIN4_CH2 |
99 CX25840_VIN8_CH1 |
100 CX25840_SVIDEO_ON,
101 .gpio0 = 0,
9c8ced51 102 } },
d19770e5 103 },
a77743bc
ST		 104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
107 .input = {{
108 .type = CX23885_VMUX_TELEVISION,
109 .vmux = 0,
110 .gpio0 = 0xff00,
9c8ced51 111 }, {
a77743bc
ST		 112 .type = CX23885_VMUX_DEBUG,
113 .vmux = 0,
114 .gpio0 = 0xff01,
9c8ced51 115 }, {
a77743bc
ST		 116 .type = CX23885_VMUX_COMPOSITE1,
117 .vmux = 1,
118 .gpio0 = 0xff02,
9c8ced51 119 }, {
a77743bc
ST		 120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = 2,
122 .gpio0 = 0xff02,
9c8ced51 123 } },
a77743bc 124 },
9bc37caa
MK		 125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
a6a3f140 127 .portb = CX23885_MPEG_DVB,
9bc37caa 128 },
d1987d55
ST		 129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
132 },
07b4a835
MK		 133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
136 },
b3ea0166
ST		 137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
140 },
a780a31c
ST		 141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
144 },
66762373
ST		 145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
148 },
335377b7
MK		 149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 151 .portb = CX23885_MPEG_DVB,
335377b7
MK		 152 .portc = CX23885_MPEG_DVB,
153 },
aef2d186
ST		 154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
158 },
4c56b04a
ST		 159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
162 },
9bb1b7e8
IL		 163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
166 },
96318d0c
IL		 167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
170 },
579943f5
IL		 171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
174 },
c9b8b04b
IL		 175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
178 },
5a23b076
IL		 179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
180 .cimax = 1,
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
184 },
2074dffa
ST		 185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 187 .portc = CX23885_MPEG_DVB,
2074dffa 188 },
d099becb
MK		 189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
192 },
19bc5796
MK		 193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
196 },
6b926eca
MK		 197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
200 },
493b7127
DW		 201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
203 .portb = CX23885_MPEG_DVB,
204 },
2365b2d3
DW		 205 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
206 .name = "Magic-Pro ProHDTV Extreme 2",
207 .portb = CX23885_MPEG_DVB,
208 },
13697380
ST		 209 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
210 .name = "Hauppauge WinTV-HVR1850",
211 .portb = CX23885_MPEG_ENCODER,
212 .portc = CX23885_MPEG_DVB,
213 },
34e383dd
VG		 214 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
215 .name = "Compro VideoMate E800",
216 .portc = CX23885_MPEG_DVB,
217 },
d19770e5
ST		 218};
219const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
220
221/* ------------------------------------------------------------------ */
222/* PCI subsystem IDs */
223
224struct cx23885_subid cx23885_subids[] = {
225 {
226 .subvendor = 0x0070,
227 .subdevice = 0x3400,
228 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 229 }, {
d19770e5
ST		 230 .subvendor = 0x0070,
231 .subdevice = 0x7600,
232 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 233 }, {
d19770e5
ST		 234 .subvendor = 0x0070,
235 .subdevice = 0x7800,
236 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 237 }, {
d19770e5
ST		 238 .subvendor = 0x0070,
239 .subdevice = 0x7801,
240 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 241 }, {
6ccb8cfb
MK		 242 .subvendor = 0x0070,
243 .subdevice = 0x7809,
244 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 245 }, {
a77743bc
ST		 246 .subvendor = 0x0070,
247 .subdevice = 0x7911,
248 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 249 }, {
9bc37caa
MK		 250 .subvendor = 0x18ac,
251 .subdevice = 0xd500,
252 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 253 }, {
b00fff0b
MK		 254 .subvendor = 0x0070,
255 .subdevice = 0x7790,
256 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 257 }, {
d1987d55
ST		 258 .subvendor = 0x0070,
259 .subdevice = 0x7797,
260 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 261 }, {
b00fff0b
MK		 262 .subvendor = 0x0070,
263 .subdevice = 0x7710,
264 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 265 }, {
07b4a835
MK		 266 .subvendor = 0x0070,
267 .subdevice = 0x7717,
268 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 269 }, {
270 .subvendor = 0x0070,
271 .subdevice = 0x71d1,
272 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 273 }, {
274 .subvendor = 0x0070,
275 .subdevice = 0x71d3,
276 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 277 }, {
278 .subvendor = 0x0070,
279 .subdevice = 0x8101,
280 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 281 }, {
282 .subvendor = 0x0070,
283 .subdevice = 0x8010,
284 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 285 }, {
335377b7
MK		 286 .subvendor = 0x18ac,
287 .subdevice = 0xd618,
288 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 289 }, {
aef2d186
ST		 290 .subvendor = 0x18ac,
291 .subdevice = 0xdb78,
292 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 293 }, {
294 .subvendor = 0x107d,
295 .subdevice = 0x6681,
296 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
9bb1b7e8
IL		 297 }, {
298 .subvendor = 0x185b,
299 .subdevice = 0xe800,
300 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 301 }, {
302 .subvendor = 0x6920,
303 .subdevice = 0x8888,
304 .card = CX23885_BOARD_TBS_6920,
579943f5
IL		 305 }, {
306 .subvendor = 0xd470,
307 .subdevice = 0x9022,
308 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 309 }, {
310 .subvendor = 0x0001,
311 .subdevice = 0x2005,
312 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 313 }, {
314 .subvendor = 0x1b55,
315 .subdevice = 0x2a2c,
316 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 317 }, {
318 .subvendor = 0x0070,
319 .subdevice = 0x2211,
320 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 321 }, {
322 .subvendor = 0x0070,
323 .subdevice = 0x2215,
324 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 325 }, {
326 .subvendor = 0x0070,
327 .subdevice = 0x2251,
328 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
6b926eca
MK		 329 }, {
330 .subvendor = 0x0070,
331 .subdevice = 0x2291,
332 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
333 }, {
334 .subvendor = 0x0070,
335 .subdevice = 0x2295,
336 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493b7127
DW		 337 }, {
338 .subvendor = 0x14f1,
339 .subdevice = 0x8651,
340 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 341 }, {
342 .subvendor = 0x14f1,
343 .subdevice = 0x8657,
344 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 345 }, {
346 .subvendor = 0x0070,
347 .subdevice = 0x8541,
348 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 349 }, {
350 .subvendor = 0x1858,
351 .subdevice = 0xe800,
352 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
d19770e5
ST		 353 },
354};
355const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
356
357void cx23885_card_list(struct cx23885_dev *dev)
358{
359 int i;
360
361 if (0 == dev->pci->subsystem_vendor &&
362 0 == dev->pci->subsystem_device) {
9c8ced51
ST		 363 printk(KERN_INFO
364 "%s: Board has no valid PCIe Subsystem ID and can't\n"
365 "%s: be autodetected. Pass card=<n> insmod option\n"
366 "%s: to workaround that. Redirect complaints to the\n"
367 "%s: vendor of the TV card. Best regards,\n"
d19770e5
ST		 368 "%s: -- tux\n",
369 dev->name, dev->name, dev->name, dev->name, dev->name);
370 } else {
9c8ced51
ST		 371 printk(KERN_INFO
372 "%s: Your board isn't known (yet) to the driver.\n"
373 "%s: Try to pick one of the existing card configs via\n"
d19770e5
ST		 374 "%s: card=<n> insmod option. Updating to the latest\n"
375 "%s: version might help as well.\n",
376 dev->name, dev->name, dev->name, dev->name);
377 }
9c8ced51 378 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 379 dev->name);
380 for (i = 0; i < cx23885_bcount; i++)
9c8ced51 381 printk(KERN_INFO "%s: card=%d -> %s\n",
d19770e5
ST		 382 dev->name, i, cx23885_boards[i].name);
383}
384
385static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
386{
387 struct tveeprom tv;
388
9c8ced51
ST		 389 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
390 eeprom_data);
d19770e5 391
d19770e5 392 /* Make sure we support the board model */
9c8ced51 393 switch (tv.model) {
5308cf09
MK		 394 case 22001:
395 /* WinTV-HVR1270 (PCIe, Retail, half height)
396 * ATSC/QAM and basic analog, IR Blast */
397 case 22009:
398 /* WinTV-HVR1210 (PCIe, Retail, half height)
399 * DVB-T and basic analog, IR Blast */
400 case 22011:
401 /* WinTV-HVR1270 (PCIe, Retail, half height)
402 * ATSC/QAM and basic analog, IR Recv */
403 case 22019:
404 /* WinTV-HVR1210 (PCIe, Retail, half height)
405 * DVB-T and basic analog, IR Recv */
406 case 22021:
407 /* WinTV-HVR1275 (PCIe, Retail, half height)
408 * ATSC/QAM and basic analog, IR Recv */
409 case 22029:
410 /* WinTV-HVR1210 (PCIe, Retail, half height)
411 * DVB-T and basic analog, IR Recv */
412 case 22101:
413 /* WinTV-HVR1270 (PCIe, Retail, full height)
414 * ATSC/QAM and basic analog, IR Blast */
415 case 22109:
416 /* WinTV-HVR1210 (PCIe, Retail, full height)
417 * DVB-T and basic analog, IR Blast */
418 case 22111:
419 /* WinTV-HVR1270 (PCIe, Retail, full height)
420 * ATSC/QAM and basic analog, IR Recv */
421 case 22119:
422 /* WinTV-HVR1210 (PCIe, Retail, full height)
423 * DVB-T and basic analog, IR Recv */
424 case 22121:
425 /* WinTV-HVR1275 (PCIe, Retail, full height)
426 * ATSC/QAM and basic analog, IR Recv */
427 case 22129:
428 /* WinTV-HVR1210 (PCIe, Retail, full height)
429 * DVB-T and basic analog, IR Recv */
36396c89
MK		 430 case 71009:
431 /* WinTV-HVR1200 (PCIe, Retail, full height)
432 * DVB-T and basic analog */
433 case 71359:
434 /* WinTV-HVR1200 (PCIe, OEM, half height)
435 * DVB-T and basic analog */
436 case 71439:
437 /* WinTV-HVR1200 (PCIe, OEM, half height)
438 * DVB-T and basic analog */
439 case 71449:
440 /* WinTV-HVR1200 (PCIe, OEM, full height)
441 * DVB-T and basic analog */
442 case 71939:
443 /* WinTV-HVR1200 (PCIe, OEM, half height)
444 * DVB-T and basic analog */
445 case 71949:
446 /* WinTV-HVR1200 (PCIe, OEM, full height)
447 * DVB-T and basic analog */
448 case 71959:
449 /* WinTV-HVR1200 (PCIe, OEM, full height)
450 * DVB-T and basic analog */
451 case 71979:
452 /* WinTV-HVR1200 (PCIe, OEM, half height)
453 * DVB-T and basic analog */
454 case 71999:
455 /* WinTV-HVR1200 (PCIe, OEM, full height)
456 * DVB-T and basic analog */
9c8ced51
ST		 457 case 76601:
458 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
459 channel ATSC and MPEG2 HW Encoder */
460 case 77001:
461 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
462 and Basic analog */
463 case 77011:
464 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
465 and Basic analog */
466 case 77041:
467 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
468 and Basic analog */
469 case 77051:
470 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
471 and Basic analog */
472 case 78011:
473 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
474 Dual channel ATSC and MPEG2 HW Encoder */
475 case 78501:
476 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
477 Dual channel ATSC and MPEG2 HW Encoder */
478 case 78521:
479 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
480 Dual channel ATSC and MPEG2 HW Encoder */
481 case 78531:
482 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
483 Dual channel ATSC and MPEG2 HW Encoder */
484 case 78631:
485 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
486 Dual channel ATSC and MPEG2 HW Encoder */
487 case 79001:
488 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
489 ATSC and Basic analog */
490 case 79101:
491 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
492 ATSC and Basic analog */
493 case 79561:
494 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
495 ATSC and Basic analog */
496 case 79571:
497 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
498 ATSC and Basic analog */
499 case 79671:
500 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
501 ATSC and Basic analog */
66762373
ST		 502 case 80019:
503 /* WinTV-HVR1400 (Express Card, Retail, IR,
504 * DVB-T and Basic analog */
36396c89
MK		 505 case 81509:
506 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
507 * DVB-T and MPEG2 HW Encoder */
a780a31c 508 case 81519:
36396c89 509 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 510 * DVB-T and MPEG2 HW Encoder */
d19770e5 511 break;
13697380
ST		 512 case 85021:
513 /* WinTV-HVR1850 (PCIe, OEM, RCA in, IR, FM,
514 Dual channel ATSC and MPEG2 HW Encoder */
515 break;
d19770e5 516 default:
13697380
ST		 517 printk(KERN_WARNING "%s: warning: "
518 "unknown hauppauge model #%d\n",
9c8ced51 519 dev->name, tv.model);
d19770e5
ST		 520 break;
521 }
522
523 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
524 dev->name, tv.model);
525}
526
d7cba043 527int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 528{
89ce2216
ST		 529 struct cx23885_tsport *port = priv;
530 struct cx23885_dev *dev = port->dev;
6df51690
ST		 531 u32 bitmask = 0;
532
89ce2216
ST		 533 if (command == XC2028_RESET_CLK)
534 return 0;
535
6df51690
ST		 536 if (command != 0) {
537 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
538 __func__, command);
539 return -EINVAL;
540 }
8c70017f 541
9c8ced51 542 switch (dev->board) {
90a71b1c
ST		 543 case CX23885_BOARD_HAUPPAUGE_HVR1400:
544 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 545 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 546 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 547 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 548 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
90a71b1c 549 /* Tuner Reset Command */
4c56b04a 550 bitmask = 0x04;
6df51690
ST		 551 break;
552 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 553 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
4c56b04a
ST		 554 /* Two identical tuners on two different i2c buses,
555 * we need to reset the correct gpio. */
d4dc673d 556 if (port->nr == 1)
4c56b04a 557 bitmask = 0x01;
d4dc673d 558 else if (port->nr == 2)
4c56b04a 559 bitmask = 0x04;
8c70017f
ST		 560 break;
561 }
562
6df51690
ST		 563 if (bitmask) {
564 /* Drive the tuner into reset and back out */
565 cx_clear(GP0_IO, bitmask);
566 mdelay(200);
567 cx_set(GP0_IO, bitmask);
568 }
569
570 return 0;
8c70017f 571}
73c993a8 572
a6a3f140
ST		 573void cx23885_gpio_setup(struct cx23885_dev *dev)
574{
9c8ced51 575 switch (dev->board) {
a6a3f140
ST		 576 case CX23885_BOARD_HAUPPAUGE_HVR1250:
577 /* GPIO-0 cx24227 demodulator reset */
578 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
579 break;
07b4a835
MK		 580 case CX23885_BOARD_HAUPPAUGE_HVR1500:
581 /* GPIO-0 cx24227 demodulator */
582 /* GPIO-2 xc3028 tuner */
583
584 /* Put the parts into reset */
585 cx_set(GP0_IO, 0x00050000);
586 cx_clear(GP0_IO, 0x00000005);
587 msleep(5);
588
589 /* Bring the parts out of reset */
590 cx_set(GP0_IO, 0x00050005);
591 break;
d1987d55
ST		 592 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
593 /* GPIO-0 cx24227 demodulator reset */
594 /* GPIO-2 xc5000 tuner reset */
595 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
596 break;
a6a3f140
ST		 597 case CX23885_BOARD_HAUPPAUGE_HVR1800:
598 /* GPIO-0 656_CLK */
599 /* GPIO-1 656_D0 */
600 /* GPIO-2 8295A Reset */
601 /* GPIO-3-10 cx23417 data0-7 */
602 /* GPIO-11-14 cx23417 addr0-3 */
603 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
604 /* GPIO-19 IR_RX */
3ba71d21 605
a589b665
ST		 606 /* CX23417 GPIO's */
607 /* EIO15 Zilog Reset */
608 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 609 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
610
611 /* Put the demod into reset and protect the eeprom */
612 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
613 mdelay(100);
614
615 /* Bring the demod and blaster out of reset */
616 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
617 mdelay(100);
a589b665 618
5206d6ec 619 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 620 cx23885_gpio_enable(dev, GPIO_2, 1);
621 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 622 mdelay(20);
21ff3e4f 623 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 624 mdelay(20);
21ff3e4f 625 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 626 mdelay(20);
a6a3f140 627 break;
b3ea0166
ST		 628 case CX23885_BOARD_HAUPPAUGE_HVR1200:
629 /* GPIO-0 tda10048 demodulator reset */
630 /* GPIO-2 tda18271 tuner reset */
631
a780a31c
ST		 632 /* Put the parts into reset and back */
633 cx_set(GP0_IO, 0x00050000);
634 mdelay(20);
635 cx_clear(GP0_IO, 0x00000005);
636 mdelay(20);
637 cx_set(GP0_IO, 0x00050005);
638 break;
639 case CX23885_BOARD_HAUPPAUGE_HVR1700:
640 /* GPIO-0 TDA10048 demodulator reset */
641 /* GPIO-2 TDA8295A Reset */
642 /* GPIO-3-10 cx23417 data0-7 */
643 /* GPIO-11-14 cx23417 addr0-3 */
644 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
645
646 /* The following GPIO's are on the interna AVCore (cx25840) */
647 /* GPIO-19 IR_RX */
648 /* GPIO-20 IR_TX 416/DVBT Select */
649 /* GPIO-21 IIS DAT */
650 /* GPIO-22 IIS WCLK */
651 /* GPIO-23 IIS BCLK */
652
66762373
ST		 653 /* Put the parts into reset and back */
654 cx_set(GP0_IO, 0x00050000);
655 mdelay(20);
656 cx_clear(GP0_IO, 0x00000005);
657 mdelay(20);
658 cx_set(GP0_IO, 0x00050005);
659 break;
660 case CX23885_BOARD_HAUPPAUGE_HVR1400:
661 /* GPIO-0 Dibcom7000p demodulator reset */
662 /* GPIO-2 xc3028L tuner reset */
663 /* GPIO-13 LED */
664
b3ea0166
ST		 665 /* Put the parts into reset and back */
666 cx_set(GP0_IO, 0x00050000);
667 mdelay(20);
668 cx_clear(GP0_IO, 0x00000005);
669 mdelay(20);
670 cx_set(GP0_IO, 0x00050005);
671 break;
1ecc5aed
ST		 672 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
673 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
674 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
675 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
676 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
677
aef2d186
ST		 678 /* Put the parts into reset and back */
679 cx_set(GP0_IO, 0x000f0000);
680 mdelay(20);
681 cx_clear(GP0_IO, 0x0000000f);
682 mdelay(20);
683 cx_set(GP0_IO, 0x000f000f);
684 break;
685 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
686 /* GPIO-0 portb xc3028 reset */
687 /* GPIO-1 portb zl10353 reset */
688 /* GPIO-2 portc xc3028 reset */
689 /* GPIO-3 portc zl10353 reset */
690
1ecc5aed
ST		 691 /* Put the parts into reset and back */
692 cx_set(GP0_IO, 0x000f0000);
693 mdelay(20);
694 cx_clear(GP0_IO, 0x0000000f);
695 mdelay(20);
696 cx_set(GP0_IO, 0x000f000f);
697 break;
4c56b04a 698 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 699 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 700 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 701 /* GPIO-2 xc3028 tuner reset */
702
703 /* The following GPIO's are on the internal AVCore (cx25840) */
704 /* GPIO-? zl10353 demod reset */
705
706 /* Put the parts into reset and back */
707 cx_set(GP0_IO, 0x00040000);
708 mdelay(20);
709 cx_clear(GP0_IO, 0x00000004);
710 mdelay(20);
711 cx_set(GP0_IO, 0x00040004);
712 break;
96318d0c 713 case CX23885_BOARD_TBS_6920:
579943f5 714 case CX23885_BOARD_TEVII_S470:
96318d0c
IL		 715 cx_write(MC417_CTL, 0x00000036);
716 cx_write(MC417_OEN, 0x00001000);
717 cx_write(MC417_RWD, 0x00001800);
718 break;
5a23b076
IL		 719 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
720 /* GPIO-0 INTA from CiMax1
721 GPIO-1 INTB from CiMax2
722 GPIO-2 reset chips
723 GPIO-3 to GPIO-10 data/addr for CA
724 GPIO-11 ~CS0 to CiMax1
725 GPIO-12 ~CS1 to CiMax2
726 GPIO-13 ADL0 load LSB addr
727 GPIO-14 ADL1 load MSB addr
728 GPIO-15 ~RDY from CiMax
729 GPIO-17 ~RD to CiMax
730 GPIO-18 ~WR to CiMax
731 */
732 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
733 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
734 cx_clear(GP0_IO, 0x00030004);
735 mdelay(100);/* reset delay */
736 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
737 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
738 /* GPIO-15 IN as ~ACK, rest as OUT */
739 cx_write(MC417_OEN, 0x00001000);
740 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
741 cx_write(MC417_RWD, 0x0000c300);
742 /* enable irq */
743 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
744 break;
2074dffa 745 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 746 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 747 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 748 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 749 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 750 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
751 /* GPIO-9 Demod reset */
2074dffa
ST		 752
753 /* Put the parts into reset and back */
d099becb
MK		 754 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
755 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 756 cx23885_gpio_clear(dev, GPIO_9);
757 mdelay(20);
758 cx23885_gpio_set(dev, GPIO_9);
759 break;
493b7127 760 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 761 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127 762 /* GPIO-1 reset XC5000 */
2365b2d3 763 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
493b7127
DW		 764 cx_set(GP0_IO, 0x00060000);
765 cx_clear(GP0_IO, 0x00000006);
766 mdelay(100);
767 cx_set(GP0_IO, 0x00060006);
768 mdelay(100);
769 break;
13697380
ST		 770 case CX23885_BOARD_HAUPPAUGE_HVR1850:
771 /* GPIO-0 656_CLK */
772 /* GPIO-1 656_D0 */
773 /* GPIO-2 Wake# */
774 /* GPIO-3-10 cx23417 data0-7 */
775 /* GPIO-11-14 cx23417 addr0-3 */
776 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
777 /* GPIO-19 IR_RX */
778 /* GPIO-20 C_IR_TX */
779 /* GPIO-21 I2S DAT */
780 /* GPIO-22 I2S WCLK */
781 /* GPIO-23 I2S BCLK */
782 /* ALT GPIO: EXP GPIO LATCH */
783
784 /* CX23417 GPIO's */
785 /* GPIO-14 S5H1411/CX24228 Reset */
786 /* GPIO-13 EEPROM write protect */
787 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
788
789 /* Put the demod into reset and protect the eeprom */
790 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
791 mdelay(100);
792
793 /* Bring the demod out of reset */
794 mc417_gpio_set(dev, GPIO_14);
795 mdelay(100);
796
797 /* CX24228 GPIO */
798 /* Connected to IF / Mux */
799 break;
a6a3f140
ST		 800 }
801}
802
803int cx23885_ir_init(struct cx23885_dev *dev)
804{
29f8a0a5 805 int ret = 0;
a6a3f140
ST		 806 switch (dev->board) {
807 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 808 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 809 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 810 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 811 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 812 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2074dffa 813 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 814 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 815 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 816 case CX23885_BOARD_HAUPPAUGE_HVR1210:
a6a3f140
ST		 817 /* FIXME: Implement me */
818 break;
29f8a0a5
AW		 819 case CX23885_BOARD_HAUPPAUGE_HVR1850:
820 ret = cx23888_ir_probe(dev);
821 if (ret)
822 break;
823 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
824 break;
12886871
ST		 825 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
826 request_module("ir-kbd-i2c");
827 break;
a6a3f140
ST		 828 }
829
29f8a0a5 830 return ret;
a6a3f140
ST		 831}
832
d19770e5
ST		 833void cx23885_card_setup(struct cx23885_dev *dev)
834{
a6a3f140
ST		 835 struct cx23885_tsport *ts1 = &dev->ts1;
836 struct cx23885_tsport *ts2 = &dev->ts2;
837
d19770e5
ST		 838 static u8 eeprom[256];
839
840 if (dev->i2c_bus[0].i2c_rc == 0) {
841 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 842 tveeprom_read(&dev->i2c_bus[0].i2c_client,
843 eeprom, sizeof(eeprom));
d19770e5
ST		 844 }
845
846 switch (dev->board) {
a77743bc 847 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 848 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 849 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 850 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 851 if (dev->i2c_bus[0].i2c_rc == 0)
852 hauppauge_eeprom(dev, eeprom+0x80);
853 break;
d19770e5
ST		 854 case CX23885_BOARD_HAUPPAUGE_HVR1800:
855 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 856 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 857 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 858 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 859 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 860 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 861 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 862 case CX23885_BOARD_HAUPPAUGE_HVR1850:
d19770e5 863 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 864 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5
ST		 865 break;
866 }
a6a3f140
ST		 867
868 switch (dev->board) {
335377b7 869 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 870 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
335377b7
MK		 871 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
872 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
873 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
874 /* break omitted intentionally */
a6a3f140
ST		 875 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
876 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
877 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
878 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
879 break;
a589b665
ST		 880 case CX23885_BOARD_HAUPPAUGE_HVR1800:
881 /* Defaults for VID B - Analog encoder */
882 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
883 ts1->gen_ctrl_val = 0x10e;
884 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
885 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
886
887 /* APB_TSVALERR_POL (active low)*/
888 ts1->vld_misc_val = 0x2000;
889 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
890
891 /* Defaults for VID C */
892 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
893 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
894 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c 895 break;
579943f5 896 case CX23885_BOARD_TEVII_S470:
96318d0c 897 case CX23885_BOARD_TBS_6920:
c9b8b04b 898 case CX23885_BOARD_DVBWORLD_2005:
96318d0c
IL		 899 ts1->gen_ctrl_val = 0x5; /* Parallel */
900 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
901 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 902 break;
5a23b076
IL		 903 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
904 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
905 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
906 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
907 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
908 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
909 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
910 break;
493b7127 911 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 912 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
493b7127
DW		 913 ts1->gen_ctrl_val = 0x5; /* Parallel */
914 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
915 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
916 break;
a6a3f140 917 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 918 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 919 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 920 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 921 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 922 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 923 case CX23885_BOARD_HAUPPAUGE_HVR1400:
4c56b04a 924 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 925 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 926 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 927 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 928 case CX23885_BOARD_HAUPPAUGE_HVR1255:
6b926eca 929 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 930 case CX23885_BOARD_HAUPPAUGE_HVR1850:
34e383dd 931 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
a6a3f140
ST		 932 default:
933 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
934 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
935 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
936 }
937
ce89cfb4
ST		 938 /* Certain boards support analog, or require the avcore to be
939 * loaded, ensure this happens.
940 */
941 switch (dev->board) {
942 case CX23885_BOARD_HAUPPAUGE_HVR1800:
943 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
944 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 945 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 946 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 947 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
34e383dd 948 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
e6574f2f
HV		 949 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
950 &dev->i2c_bus[2].i2c_adap,
53dacb15 951 "cx25840", "cx25840", 0x88 >> 1, NULL);
cc26b076 952 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
ce89cfb4
ST		 953 break;
954 }
5a23b076
IL		 955
956 /* AUX-PLL 27MHz CLK */
957 switch (dev->board) {
958 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
959 netup_initialize(dev);
960 break;
961 }
d19770e5
ST		 962}
963
964/* ------------------------------------------------------------------ */
Linux kernel - Deliverables
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