Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/fs.h> | |
26 | #include <linux/kthread.h> | |
27 | #include <linux/file.h> | |
28 | #include <linux/suspend.h> | |
29 | ||
30 | #include "cx23885.h" | |
d19770e5 ST |
31 | #include <media/v4l2-common.h> |
32 | ||
5a23b076 | 33 | #include "dvb_ca_en50221.h" |
d19770e5 | 34 | #include "s5h1409.h" |
52b50450 | 35 | #include "s5h1411.h" |
d19770e5 | 36 | #include "mt2131.h" |
3ba71d21 | 37 | #include "tda8290.h" |
4041f1a5 | 38 | #include "tda18271.h" |
9bc37caa | 39 | #include "lgdt330x.h" |
d1987d55 | 40 | #include "xc5000.h" |
b3ea0166 | 41 | #include "tda10048.h" |
07b4a835 | 42 | #include "tuner-xc2028.h" |
827855d3 | 43 | #include "tuner-simple.h" |
66762373 ST |
44 | #include "dib7000p.h" |
45 | #include "dibx000_common.h" | |
aef2d186 | 46 | #include "zl10353.h" |
5a23b076 IL |
47 | #include "stv0900.h" |
48 | #include "stv6110.h" | |
49 | #include "lnbh24.h" | |
96318d0c | 50 | #include "cx24116.h" |
5a23b076 IL |
51 | #include "cimax2.h" |
52 | #include "netup-eeprom.h" | |
53 | #include "netup-init.h" | |
d19770e5 | 54 | |
4513fc69 | 55 | static unsigned int debug; |
d19770e5 | 56 | |
4513fc69 ST |
57 | #define dprintk(level, fmt, arg...)\ |
58 | do { if (debug >= level)\ | |
59 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
60 | } while (0) | |
d19770e5 ST |
61 | |
62 | /* ------------------------------------------------------------------ */ | |
63 | ||
3ba71d21 MK |
64 | static unsigned int alt_tuner; |
65 | module_param(alt_tuner, int, 0644); | |
66 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
67 | ||
78e92006 JG |
68 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
69 | ||
3ba71d21 MK |
70 | /* ------------------------------------------------------------------ */ |
71 | ||
d19770e5 ST |
72 | static int dvb_buf_setup(struct videobuf_queue *q, |
73 | unsigned int *count, unsigned int *size) | |
74 | { | |
75 | struct cx23885_tsport *port = q->priv_data; | |
76 | ||
77 | port->ts_packet_size = 188 * 4; | |
78 | port->ts_packet_count = 32; | |
79 | ||
80 | *size = port->ts_packet_size * port->ts_packet_count; | |
81 | *count = 32; | |
82 | return 0; | |
83 | } | |
84 | ||
44a6481d MK |
85 | static int dvb_buf_prepare(struct videobuf_queue *q, |
86 | struct videobuf_buffer *vb, enum v4l2_field field) | |
d19770e5 ST |
87 | { |
88 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 89 | return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field); |
d19770e5 ST |
90 | } |
91 | ||
92 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
93 | { | |
94 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 95 | cx23885_buf_queue(port, (struct cx23885_buffer *)vb); |
d19770e5 ST |
96 | } |
97 | ||
44a6481d MK |
98 | static void dvb_buf_release(struct videobuf_queue *q, |
99 | struct videobuf_buffer *vb) | |
d19770e5 | 100 | { |
9c8ced51 | 101 | cx23885_free_buffer(q, (struct cx23885_buffer *)vb); |
d19770e5 ST |
102 | } |
103 | ||
104 | static struct videobuf_queue_ops dvb_qops = { | |
105 | .buf_setup = dvb_buf_setup, | |
106 | .buf_prepare = dvb_buf_prepare, | |
107 | .buf_queue = dvb_buf_queue, | |
108 | .buf_release = dvb_buf_release, | |
109 | }; | |
110 | ||
86184e06 | 111 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
112 | .demod_address = 0x32 >> 1, |
113 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
114 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 115 | .qam_if = 44000, |
fc959bef | 116 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
117 | .status_mode = S5H1409_DEMODLOCKING, |
118 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
119 | }; |
120 | ||
b3ea0166 ST |
121 | static struct tda10048_config hauppauge_hvr1200_config = { |
122 | .demod_address = 0x10 >> 1, | |
123 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
124 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
125 | .inversion = TDA10048_INVERSION_ON | |
126 | }; | |
127 | ||
3ba71d21 MK |
128 | static struct s5h1409_config hauppauge_ezqam_config = { |
129 | .demod_address = 0x32 >> 1, | |
130 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
131 | .gpio = S5H1409_GPIO_OFF, | |
132 | .qam_if = 4000, | |
133 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
134 | .status_mode = S5H1409_DEMODLOCKING, |
135 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
136 | }; |
137 | ||
fc959bef | 138 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
139 | .demod_address = 0x32 >> 1, |
140 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
141 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 142 | .qam_if = 44000, |
fe475163 | 143 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
144 | .status_mode = S5H1409_DEMODLOCKING, |
145 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
146 | }; |
147 | ||
07b4a835 MK |
148 | static struct s5h1409_config hauppauge_hvr1500_config = { |
149 | .demod_address = 0x32 >> 1, | |
150 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
151 | .gpio = S5H1409_GPIO_OFF, | |
152 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
153 | .status_mode = S5H1409_DEMODLOCKING, |
154 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
155 | }; |
156 | ||
86184e06 | 157 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
158 | 0x61 |
159 | }; | |
160 | ||
9bc37caa MK |
161 | static struct lgdt330x_config fusionhdtv_5_express = { |
162 | .demod_address = 0x0e, | |
163 | .demod_chip = LGDT3303, | |
164 | .serial_mpeg = 0x40, | |
165 | }; | |
166 | ||
d1987d55 ST |
167 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
168 | .demod_address = 0x32 >> 1, | |
169 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
170 | .gpio = S5H1409_GPIO_ON, | |
171 | .qam_if = 44000, | |
172 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
173 | .status_mode = S5H1409_DEMODLOCKING, |
174 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
175 | }; |
176 | ||
335377b7 MK |
177 | static struct s5h1409_config dvico_s5h1409_config = { |
178 | .demod_address = 0x32 >> 1, | |
179 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
180 | .gpio = S5H1409_GPIO_ON, | |
181 | .qam_if = 44000, | |
182 | .inversion = S5H1409_INVERSION_OFF, | |
183 | .status_mode = S5H1409_DEMODLOCKING, | |
184 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
185 | }; | |
186 | ||
52b50450 MK |
187 | static struct s5h1411_config dvico_s5h1411_config = { |
188 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
189 | .gpio = S5H1411_GPIO_ON, | |
190 | .qam_if = S5H1411_IF_44000, | |
191 | .vsb_if = S5H1411_IF_44000, | |
192 | .inversion = S5H1411_INVERSION_OFF, | |
193 | .status_mode = S5H1411_DEMODLOCKING, | |
194 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
195 | }; | |
196 | ||
d1987d55 | 197 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
198 | .i2c_address = 0x61, |
199 | .if_khz = 5380, | |
d1987d55 ST |
200 | }; |
201 | ||
335377b7 MK |
202 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
203 | .i2c_address = 0x64, | |
204 | .if_khz = 5380, | |
335377b7 MK |
205 | }; |
206 | ||
4041f1a5 MK |
207 | static struct tda829x_config tda829x_no_probe = { |
208 | .probe_tuner = TDA829X_DONT_PROBE, | |
209 | }; | |
210 | ||
f21e0d7f | 211 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
212 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
213 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
214 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
215 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
216 | }; |
217 | ||
218 | static struct tda18271_config hauppauge_tda18271_config = { | |
219 | .std_map = &hauppauge_tda18271_std_map, | |
220 | .gate = TDA18271_GATE_ANALOG, | |
221 | }; | |
222 | ||
b3ea0166 ST |
223 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
224 | .gate = TDA18271_GATE_ANALOG, | |
225 | }; | |
226 | ||
b1721d0d | 227 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
228 | BAND_VHF | BAND_UHF, /* band_caps */ |
229 | ||
230 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
231 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
232 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
233 | * P_agc_nb_est=2, P_agc_write=0 | |
234 | */ | |
235 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
236 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
237 | ||
238 | 712, /* inv_gain */ | |
239 | 21, /* time_stabiliz */ | |
240 | ||
241 | 0, /* alpha_level */ | |
242 | 118, /* thlock */ | |
243 | ||
244 | 0, /* wbd_inv */ | |
245 | 2867, /* wbd_ref */ | |
246 | 0, /* wbd_sel */ | |
247 | 2, /* wbd_alpha */ | |
248 | ||
249 | 0, /* agc1_max */ | |
250 | 0, /* agc1_min */ | |
251 | 39718, /* agc2_max */ | |
252 | 9930, /* agc2_min */ | |
253 | 0, /* agc1_pt1 */ | |
254 | 0, /* agc1_pt2 */ | |
255 | 0, /* agc1_pt3 */ | |
256 | 0, /* agc1_slope1 */ | |
257 | 0, /* agc1_slope2 */ | |
258 | 0, /* agc2_pt1 */ | |
259 | 128, /* agc2_pt2 */ | |
260 | 29, /* agc2_slope1 */ | |
261 | 29, /* agc2_slope2 */ | |
262 | ||
263 | 17, /* alpha_mant */ | |
264 | 27, /* alpha_exp */ | |
265 | 23, /* beta_mant */ | |
266 | 51, /* beta_exp */ | |
267 | ||
268 | 1, /* perform_agc_softsplit */ | |
269 | }; | |
270 | ||
271 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
272 | * With external clock = 30.000000 */ | |
b1721d0d | 273 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
274 | 60000, /* internal */ |
275 | 30000, /* sampling */ | |
276 | 1, /* pll_cfg: prediv */ | |
277 | 8, /* pll_cfg: ratio */ | |
278 | 3, /* pll_cfg: range */ | |
279 | 1, /* pll_cfg: reset */ | |
280 | 0, /* pll_cfg: bypass */ | |
281 | 0, /* misc: refdiv */ | |
282 | 0, /* misc: bypclk_div */ | |
283 | 1, /* misc: IO_CLK_en_core */ | |
284 | 1, /* misc: ADClkSrc */ | |
285 | 0, /* misc: modulo */ | |
286 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
287 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
288 | 20452225, /* timf */ | |
289 | 30000000 /* xtal_hz */ | |
290 | }; | |
291 | ||
292 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
293 | .output_mpeg2_in_188_bytes = 1, | |
294 | .hostbus_diversity = 1, | |
295 | .tuner_is_baseband = 0, | |
296 | .update_lna = NULL, | |
297 | ||
298 | .agc_config_count = 1, | |
299 | .agc = &xc3028_agc_config, | |
300 | .bw = &xc3028_bw_config, | |
301 | ||
302 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
303 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
304 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
305 | ||
306 | .pwm_freq_div = 0, | |
307 | .agc_control = NULL, | |
308 | .spur_protect = 0, | |
309 | ||
310 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
311 | }; | |
312 | ||
aef2d186 ST |
313 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
314 | .demod_address = 0x0f, | |
315 | .if2 = 45600, | |
316 | .no_tuner = 1, | |
317 | }; | |
318 | ||
5a23b076 IL |
319 | static struct stv0900_config netup_stv0900_config = { |
320 | .demod_address = 0x68, | |
321 | .xtal = 27000000, | |
322 | .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ | |
323 | .diseqc_mode = 2,/* 2/3 PWM */ | |
324 | .path1_mode = 2,/*Serial continues clock */ | |
325 | .path2_mode = 2,/*Serial continues clock */ | |
326 | .tun1_maddress = 0,/* 0x60 */ | |
327 | .tun2_maddress = 3,/* 0x63 */ | |
328 | .tun1_adc = 1,/* 1 Vpp */ | |
329 | .tun2_adc = 1,/* 1 Vpp */ | |
330 | }; | |
331 | ||
332 | static struct stv6110_config netup_stv6110_tunerconfig_a = { | |
333 | .i2c_address = 0x60, | |
334 | .mclk = 27000000, | |
335 | .iq_wiring = 0, | |
336 | }; | |
337 | ||
338 | static struct stv6110_config netup_stv6110_tunerconfig_b = { | |
339 | .i2c_address = 0x63, | |
340 | .mclk = 27000000, | |
341 | .iq_wiring = 1, | |
342 | }; | |
343 | ||
96318d0c IL |
344 | static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
345 | { | |
346 | struct cx23885_tsport *port = fe->dvb->priv; | |
347 | struct cx23885_dev *dev = port->dev; | |
348 | ||
349 | if (voltage == SEC_VOLTAGE_18) | |
350 | cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */ | |
351 | else if (voltage == SEC_VOLTAGE_13) | |
352 | cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */ | |
353 | else | |
354 | cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */ | |
355 | return 0; | |
356 | } | |
357 | ||
358 | static struct cx24116_config tbs_cx24116_config = { | |
359 | .demod_address = 0x05, | |
360 | }; | |
361 | ||
579943f5 IL |
362 | static struct cx24116_config tevii_cx24116_config = { |
363 | .demod_address = 0x55, | |
364 | }; | |
365 | ||
c9b8b04b IL |
366 | static struct cx24116_config dvbworld_cx24116_config = { |
367 | .demod_address = 0x05, | |
368 | }; | |
369 | ||
d19770e5 ST |
370 | static int dvb_register(struct cx23885_tsport *port) |
371 | { | |
372 | struct cx23885_dev *dev = port->dev; | |
f139fa71 | 373 | struct cx23885_i2c *i2c_bus = NULL; |
363c35fc | 374 | struct videobuf_dvb_frontend *fe0; |
5a23b076 | 375 | int ret; |
363c35fc | 376 | |
f972e0bd | 377 | /* Get the first frontend */ |
92abe9ee | 378 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
379 | if (!fe0) |
380 | return -EINVAL; | |
d19770e5 ST |
381 | |
382 | /* init struct videobuf_dvb */ | |
363c35fc | 383 | fe0->dvb.name = dev->name; |
d19770e5 ST |
384 | |
385 | /* init frontend */ | |
386 | switch (dev->board) { | |
a77743bc | 387 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 388 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 389 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 390 | &hauppauge_generic_config, |
f139fa71 | 391 | &i2c_bus->i2c_adap); |
363c35fc ST |
392 | if (fe0->dvb.frontend != NULL) { |
393 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 394 | &i2c_bus->i2c_adap, |
86184e06 | 395 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
396 | } |
397 | break; | |
3ba71d21 MK |
398 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
399 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 400 | switch (alt_tuner) { |
3ba71d21 | 401 | case 1: |
363c35fc | 402 | fe0->dvb.frontend = |
3ba71d21 MK |
403 | dvb_attach(s5h1409_attach, |
404 | &hauppauge_ezqam_config, | |
405 | &i2c_bus->i2c_adap); | |
363c35fc ST |
406 | if (fe0->dvb.frontend != NULL) { |
407 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 408 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 409 | &tda829x_no_probe); |
363c35fc | 410 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 411 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 412 | &hauppauge_tda18271_config); |
3ba71d21 MK |
413 | } |
414 | break; | |
415 | case 0: | |
416 | default: | |
363c35fc | 417 | fe0->dvb.frontend = |
3ba71d21 MK |
418 | dvb_attach(s5h1409_attach, |
419 | &hauppauge_generic_config, | |
420 | &i2c_bus->i2c_adap); | |
363c35fc ST |
421 | if (fe0->dvb.frontend != NULL) |
422 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
423 | &i2c_bus->i2c_adap, |
424 | &hauppauge_generic_tunerconfig, 0); | |
425 | break; | |
426 | } | |
427 | break; | |
fc959bef | 428 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 429 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 430 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 431 | &hauppauge_hvr1800lp_config, |
f139fa71 | 432 | &i2c_bus->i2c_adap); |
363c35fc ST |
433 | if (fe0->dvb.frontend != NULL) { |
434 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 435 | &i2c_bus->i2c_adap, |
fc959bef ST |
436 | &hauppauge_generic_tunerconfig, 0); |
437 | } | |
438 | break; | |
9bc37caa | 439 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 440 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 441 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 442 | &fusionhdtv_5_express, |
f139fa71 | 443 | &i2c_bus->i2c_adap); |
363c35fc ST |
444 | if (fe0->dvb.frontend != NULL) { |
445 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
446 | &i2c_bus->i2c_adap, 0x61, |
447 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
448 | } |
449 | break; | |
d1987d55 ST |
450 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
451 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 452 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
453 | &hauppauge_hvr1500q_config, |
454 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
455 | if (fe0->dvb.frontend != NULL) |
456 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
457 | &i2c_bus->i2c_adap, |
458 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 459 | break; |
07b4a835 MK |
460 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
461 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 462 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
463 | &hauppauge_hvr1500_config, |
464 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 465 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
466 | struct dvb_frontend *fe; |
467 | struct xc2028_config cfg = { | |
468 | .i2c_adap = &i2c_bus->i2c_adap, | |
469 | .i2c_addr = 0x61, | |
07b4a835 MK |
470 | }; |
471 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 472 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 473 | .max_len = 64, |
33e53161 | 474 | .scode_table = XC3028_FE_OREN538, |
07b4a835 MK |
475 | }; |
476 | ||
477 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 478 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
479 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
480 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
481 | } | |
482 | break; | |
b3ea0166 | 483 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 484 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 485 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 486 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
487 | &hauppauge_hvr1200_config, |
488 | &i2c_bus->i2c_adap); | |
363c35fc ST |
489 | if (fe0->dvb.frontend != NULL) { |
490 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
491 | &dev->i2c_bus[1].i2c_adap, 0x42, |
492 | &tda829x_no_probe); | |
363c35fc | 493 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
494 | 0x60, &dev->i2c_bus[1].i2c_adap, |
495 | &hauppauge_hvr1200_tuner_config); | |
496 | } | |
497 | break; | |
66762373 ST |
498 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
499 | i2c_bus = &dev->i2c_bus[0]; | |
363c35fc | 500 | fe0->dvb.frontend = dvb_attach(dib7000p_attach, |
66762373 ST |
501 | &i2c_bus->i2c_adap, |
502 | 0x12, &hauppauge_hvr1400_dib7000_config); | |
363c35fc | 503 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
504 | struct dvb_frontend *fe; |
505 | struct xc2028_config cfg = { | |
506 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
507 | .i2c_addr = 0x64, | |
66762373 ST |
508 | }; |
509 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 510 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 ST |
511 | .max_len = 64, |
512 | .demod = 5000, | |
9c8ced51 ST |
513 | /* This is true for all demods with |
514 | v36 firmware? */ | |
0975fc68 | 515 | .type = XC2028_D2633, |
66762373 ST |
516 | }; |
517 | ||
518 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 519 | fe0->dvb.frontend, &cfg); |
66762373 ST |
520 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
521 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
522 | } | |
523 | break; | |
335377b7 MK |
524 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
525 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
526 | ||
363c35fc | 527 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
528 | &dvico_s5h1409_config, |
529 | &i2c_bus->i2c_adap); | |
363c35fc ST |
530 | if (fe0->dvb.frontend == NULL) |
531 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
532 | &dvico_s5h1411_config, |
533 | &i2c_bus->i2c_adap); | |
363c35fc ST |
534 | if (fe0->dvb.frontend != NULL) |
535 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
536 | &i2c_bus->i2c_adap, |
537 | &dvico_xc5000_tunerconfig); | |
335377b7 | 538 | break; |
aef2d186 ST |
539 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
540 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
541 | ||
363c35fc | 542 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
543 | &dvico_fusionhdtv_xc3028, |
544 | &i2c_bus->i2c_adap); | |
363c35fc | 545 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
546 | struct dvb_frontend *fe; |
547 | struct xc2028_config cfg = { | |
548 | .i2c_adap = &i2c_bus->i2c_adap, | |
549 | .i2c_addr = 0x61, | |
aef2d186 ST |
550 | }; |
551 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 552 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
553 | .max_len = 64, |
554 | .demod = XC3028_FE_ZARLINK456, | |
555 | }; | |
556 | ||
363c35fc | 557 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
558 | &cfg); |
559 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
560 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
561 | } | |
562 | break; | |
563 | } | |
4c56b04a | 564 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
9bb1b7e8 | 565 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
4c56b04a ST |
566 | i2c_bus = &dev->i2c_bus[0]; |
567 | ||
363c35fc | 568 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
569 | &dvico_fusionhdtv_xc3028, |
570 | &i2c_bus->i2c_adap); | |
363c35fc | 571 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
572 | struct dvb_frontend *fe; |
573 | struct xc2028_config cfg = { | |
574 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
575 | .i2c_addr = 0x61, | |
4c56b04a ST |
576 | }; |
577 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 578 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
579 | .max_len = 64, |
580 | .demod = XC3028_FE_ZARLINK456, | |
581 | }; | |
582 | ||
363c35fc | 583 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
584 | &cfg); |
585 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
586 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
587 | } | |
96318d0c IL |
588 | break; |
589 | case CX23885_BOARD_TBS_6920: | |
590 | i2c_bus = &dev->i2c_bus[0]; | |
591 | ||
592 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
593 | &tbs_cx24116_config, | |
594 | &i2c_bus->i2c_adap); | |
595 | if (fe0->dvb.frontend != NULL) | |
596 | fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; | |
597 | ||
579943f5 IL |
598 | break; |
599 | case CX23885_BOARD_TEVII_S470: | |
600 | i2c_bus = &dev->i2c_bus[1]; | |
601 | ||
602 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
603 | &tevii_cx24116_config, | |
604 | &i2c_bus->i2c_adap); | |
605 | if (fe0->dvb.frontend != NULL) | |
606 | fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; | |
607 | ||
4c56b04a | 608 | break; |
c9b8b04b IL |
609 | case CX23885_BOARD_DVBWORLD_2005: |
610 | i2c_bus = &dev->i2c_bus[1]; | |
611 | ||
612 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
613 | &dvbworld_cx24116_config, | |
614 | &i2c_bus->i2c_adap); | |
615 | break; | |
5a23b076 IL |
616 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
617 | i2c_bus = &dev->i2c_bus[0]; | |
618 | switch (port->nr) { | |
619 | /* port B */ | |
620 | case 1: | |
621 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
622 | &netup_stv0900_config, | |
623 | &i2c_bus->i2c_adap, 0); | |
624 | if (fe0->dvb.frontend != NULL) { | |
625 | if (dvb_attach(stv6110_attach, | |
626 | fe0->dvb.frontend, | |
627 | &netup_stv6110_tunerconfig_a, | |
628 | &i2c_bus->i2c_adap)) { | |
629 | if (!dvb_attach(lnbh24_attach, | |
630 | fe0->dvb.frontend, | |
631 | &i2c_bus->i2c_adap, | |
632 | LNBH24_PCL, 0, 0x09)) | |
633 | printk(KERN_ERR | |
634 | "No LNBH24 found!\n"); | |
635 | ||
636 | } | |
637 | } | |
638 | break; | |
639 | /* port C */ | |
640 | case 2: | |
641 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
642 | &netup_stv0900_config, | |
643 | &i2c_bus->i2c_adap, 1); | |
644 | if (fe0->dvb.frontend != NULL) { | |
645 | if (dvb_attach(stv6110_attach, | |
646 | fe0->dvb.frontend, | |
647 | &netup_stv6110_tunerconfig_b, | |
648 | &i2c_bus->i2c_adap)) { | |
649 | if (!dvb_attach(lnbh24_attach, | |
650 | fe0->dvb.frontend, | |
651 | &i2c_bus->i2c_adap, | |
652 | LNBH24_PCL, 0, 0x0a)) | |
653 | printk(KERN_ERR | |
654 | "No LNBH24 found!\n"); | |
655 | ||
656 | } | |
657 | } | |
658 | break; | |
659 | } | |
660 | break; | |
d19770e5 | 661 | default: |
9c8ced51 ST |
662 | printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " |
663 | " isn't supported yet\n", | |
d19770e5 ST |
664 | dev->name); |
665 | break; | |
666 | } | |
363c35fc | 667 | if (NULL == fe0->dvb.frontend) { |
9c8ced51 ST |
668 | printk(KERN_ERR "%s: frontend initialization failed\n", |
669 | dev->name); | |
d19770e5 ST |
670 | return -1; |
671 | } | |
d7cba043 | 672 | /* define general-purpose callback pointer */ |
363c35fc | 673 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
d19770e5 ST |
674 | |
675 | /* Put the analog decoder in standby to keep it quiet */ | |
7c9fc9d5 | 676 | call_all(dev, tuner, s_standby); |
d19770e5 | 677 | |
363c35fc ST |
678 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
679 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 680 | |
d19770e5 | 681 | /* register everything */ |
5a23b076 | 682 | ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
59b1842d | 683 | &dev->pci->dev, adapter_nr, 0); |
363c35fc | 684 | |
5a23b076 IL |
685 | /* init CI & MAC */ |
686 | switch (dev->board) { | |
687 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { | |
688 | static struct netup_card_info cinfo; | |
689 | ||
690 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | |
691 | memcpy(port->frontends.adapter.proposed_mac, | |
692 | cinfo.port[port->nr - 1].mac, 6); | |
693 | printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=" | |
694 | "%02X:%02X:%02X:%02X:%02X:%02X\n", | |
695 | port->nr, | |
696 | port->frontends.adapter.proposed_mac[0], | |
697 | port->frontends.adapter.proposed_mac[1], | |
698 | port->frontends.adapter.proposed_mac[2], | |
699 | port->frontends.adapter.proposed_mac[3], | |
700 | port->frontends.adapter.proposed_mac[4], | |
701 | port->frontends.adapter.proposed_mac[5]); | |
702 | ||
703 | netup_ci_init(port); | |
704 | break; | |
705 | } | |
706 | } | |
707 | ||
708 | return ret; | |
d19770e5 ST |
709 | } |
710 | ||
711 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
712 | { | |
363c35fc ST |
713 | |
714 | struct videobuf_dvb_frontend *fe0; | |
d19770e5 | 715 | struct cx23885_dev *dev = port->dev; |
eb0c58bb ST |
716 | int err, i; |
717 | ||
718 | /* Here we need to allocate the correct number of frontends, | |
719 | * as reflected in the cards struct. The reality is that currrently | |
720 | * no cx23885 boards support this - yet. But, if we don't modify this | |
721 | * code then the second frontend would never be allocated (later) | |
722 | * and fail with error before the attach in dvb_register(). | |
723 | * Without these changes we risk an OOPS later. The changes here | |
724 | * are for safety, and should provide a good foundation for the | |
725 | * future addition of any multi-frontend cx23885 based boards. | |
726 | */ | |
727 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, | |
728 | port->num_frontends); | |
d19770e5 | 729 | |
eb0c58bb | 730 | for (i = 1; i <= port->num_frontends; i++) { |
96b7a1a8 | 731 | if (videobuf_dvb_alloc_frontend( |
9c8ced51 | 732 | &port->frontends, i) == NULL) { |
eb0c58bb ST |
733 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
734 | return -ENOMEM; | |
735 | } | |
736 | ||
737 | fe0 = videobuf_dvb_get_frontend(&port->frontends, i); | |
738 | if (!fe0) | |
739 | err = -EINVAL; | |
363c35fc | 740 | |
eb0c58bb | 741 | dprintk(1, "%s\n", __func__); |
9c8ced51 | 742 | dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", |
eb0c58bb ST |
743 | dev->board, |
744 | dev->name, | |
745 | dev->pci_bus, | |
746 | dev->pci_slot); | |
d19770e5 | 747 | |
eb0c58bb | 748 | err = -ENODEV; |
d19770e5 | 749 | |
eb0c58bb ST |
750 | /* dvb stuff */ |
751 | /* We have to init the queue for each frontend on a port. */ | |
9c8ced51 ST |
752 | printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); |
753 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, | |
754 | &dev->pci->dev, &port->slock, | |
44a6481d MK |
755 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, |
756 | sizeof(struct cx23885_buffer), port); | |
eb0c58bb | 757 | } |
d19770e5 ST |
758 | err = dvb_register(port); |
759 | if (err != 0) | |
9c8ced51 ST |
760 | printk(KERN_ERR "%s() dvb_register failed err = %d\n", |
761 | __func__, err); | |
d19770e5 | 762 | |
d19770e5 ST |
763 | return err; |
764 | } | |
765 | ||
766 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
767 | { | |
363c35fc ST |
768 | struct videobuf_dvb_frontend *fe0; |
769 | ||
eb0c58bb ST |
770 | /* FIXME: in an error condition where the we have |
771 | * an expected number of frontends (attach problem) | |
772 | * then this might not clean up correctly, if 1 | |
773 | * is invalid. | |
774 | * This comment only applies to future boards IF they | |
775 | * implement MFE support. | |
776 | */ | |
92abe9ee | 777 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
9c8ced51 | 778 | if (fe0->dvb.frontend) |
363c35fc | 779 | videobuf_dvb_unregister_bus(&port->frontends); |
d19770e5 | 780 | |
afd96668 HV |
781 | switch (port->dev->board) { |
782 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
783 | netup_ci_exit(port); | |
784 | break; | |
785 | } | |
5a23b076 | 786 | |
d19770e5 ST |
787 | return 0; |
788 | } | |
44a6481d | 789 |