Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/fs.h> | |
26 | #include <linux/kthread.h> | |
27 | #include <linux/file.h> | |
28 | #include <linux/suspend.h> | |
29 | ||
30 | #include "cx23885.h" | |
d19770e5 ST |
31 | #include <media/v4l2-common.h> |
32 | ||
5a23b076 | 33 | #include "dvb_ca_en50221.h" |
d19770e5 | 34 | #include "s5h1409.h" |
52b50450 | 35 | #include "s5h1411.h" |
d19770e5 | 36 | #include "mt2131.h" |
3ba71d21 | 37 | #include "tda8290.h" |
4041f1a5 | 38 | #include "tda18271.h" |
9bc37caa | 39 | #include "lgdt330x.h" |
d1987d55 | 40 | #include "xc5000.h" |
b3ea0166 | 41 | #include "tda10048.h" |
07b4a835 | 42 | #include "tuner-xc2028.h" |
827855d3 | 43 | #include "tuner-simple.h" |
66762373 ST |
44 | #include "dib7000p.h" |
45 | #include "dibx000_common.h" | |
aef2d186 | 46 | #include "zl10353.h" |
5a23b076 IL |
47 | #include "stv0900.h" |
48 | #include "stv6110.h" | |
49 | #include "lnbh24.h" | |
96318d0c | 50 | #include "cx24116.h" |
5a23b076 IL |
51 | #include "cimax2.h" |
52 | #include "netup-eeprom.h" | |
53 | #include "netup-init.h" | |
a5dbf457 | 54 | #include "lgdt3305.h" |
d19770e5 | 55 | |
4513fc69 | 56 | static unsigned int debug; |
d19770e5 | 57 | |
4513fc69 ST |
58 | #define dprintk(level, fmt, arg...)\ |
59 | do { if (debug >= level)\ | |
60 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
61 | } while (0) | |
d19770e5 ST |
62 | |
63 | /* ------------------------------------------------------------------ */ | |
64 | ||
3ba71d21 MK |
65 | static unsigned int alt_tuner; |
66 | module_param(alt_tuner, int, 0644); | |
67 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
68 | ||
78e92006 JG |
69 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
70 | ||
3ba71d21 MK |
71 | /* ------------------------------------------------------------------ */ |
72 | ||
d19770e5 ST |
73 | static int dvb_buf_setup(struct videobuf_queue *q, |
74 | unsigned int *count, unsigned int *size) | |
75 | { | |
76 | struct cx23885_tsport *port = q->priv_data; | |
77 | ||
78 | port->ts_packet_size = 188 * 4; | |
79 | port->ts_packet_count = 32; | |
80 | ||
81 | *size = port->ts_packet_size * port->ts_packet_count; | |
82 | *count = 32; | |
83 | return 0; | |
84 | } | |
85 | ||
44a6481d MK |
86 | static int dvb_buf_prepare(struct videobuf_queue *q, |
87 | struct videobuf_buffer *vb, enum v4l2_field field) | |
d19770e5 ST |
88 | { |
89 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 90 | return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field); |
d19770e5 ST |
91 | } |
92 | ||
93 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
94 | { | |
95 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 96 | cx23885_buf_queue(port, (struct cx23885_buffer *)vb); |
d19770e5 ST |
97 | } |
98 | ||
44a6481d MK |
99 | static void dvb_buf_release(struct videobuf_queue *q, |
100 | struct videobuf_buffer *vb) | |
d19770e5 | 101 | { |
9c8ced51 | 102 | cx23885_free_buffer(q, (struct cx23885_buffer *)vb); |
d19770e5 ST |
103 | } |
104 | ||
105 | static struct videobuf_queue_ops dvb_qops = { | |
106 | .buf_setup = dvb_buf_setup, | |
107 | .buf_prepare = dvb_buf_prepare, | |
108 | .buf_queue = dvb_buf_queue, | |
109 | .buf_release = dvb_buf_release, | |
110 | }; | |
111 | ||
86184e06 | 112 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
113 | .demod_address = 0x32 >> 1, |
114 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
115 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 116 | .qam_if = 44000, |
fc959bef | 117 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
118 | .status_mode = S5H1409_DEMODLOCKING, |
119 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
120 | }; |
121 | ||
b3ea0166 ST |
122 | static struct tda10048_config hauppauge_hvr1200_config = { |
123 | .demod_address = 0x10 >> 1, | |
124 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
125 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
484d9e05 ST |
126 | .inversion = TDA10048_INVERSION_ON, |
127 | .if_freq_khz = TDA10048_IF_4300, | |
128 | .clk_freq_khz = TDA10048_CLK_16000, | |
b3ea0166 ST |
129 | }; |
130 | ||
3ba71d21 MK |
131 | static struct s5h1409_config hauppauge_ezqam_config = { |
132 | .demod_address = 0x32 >> 1, | |
133 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
134 | .gpio = S5H1409_GPIO_OFF, | |
135 | .qam_if = 4000, | |
136 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
137 | .status_mode = S5H1409_DEMODLOCKING, |
138 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
139 | }; |
140 | ||
fc959bef | 141 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
142 | .demod_address = 0x32 >> 1, |
143 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
144 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 145 | .qam_if = 44000, |
fe475163 | 146 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
147 | .status_mode = S5H1409_DEMODLOCKING, |
148 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
149 | }; |
150 | ||
07b4a835 MK |
151 | static struct s5h1409_config hauppauge_hvr1500_config = { |
152 | .demod_address = 0x32 >> 1, | |
153 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
154 | .gpio = S5H1409_GPIO_OFF, | |
155 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
156 | .status_mode = S5H1409_DEMODLOCKING, |
157 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
158 | }; |
159 | ||
86184e06 | 160 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
161 | 0x61 |
162 | }; | |
163 | ||
9bc37caa MK |
164 | static struct lgdt330x_config fusionhdtv_5_express = { |
165 | .demod_address = 0x0e, | |
166 | .demod_chip = LGDT3303, | |
167 | .serial_mpeg = 0x40, | |
168 | }; | |
169 | ||
d1987d55 ST |
170 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
171 | .demod_address = 0x32 >> 1, | |
172 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
173 | .gpio = S5H1409_GPIO_ON, | |
174 | .qam_if = 44000, | |
175 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
176 | .status_mode = S5H1409_DEMODLOCKING, |
177 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
178 | }; |
179 | ||
335377b7 MK |
180 | static struct s5h1409_config dvico_s5h1409_config = { |
181 | .demod_address = 0x32 >> 1, | |
182 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
183 | .gpio = S5H1409_GPIO_ON, | |
184 | .qam_if = 44000, | |
185 | .inversion = S5H1409_INVERSION_OFF, | |
186 | .status_mode = S5H1409_DEMODLOCKING, | |
187 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
188 | }; | |
189 | ||
52b50450 MK |
190 | static struct s5h1411_config dvico_s5h1411_config = { |
191 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
192 | .gpio = S5H1411_GPIO_ON, | |
193 | .qam_if = S5H1411_IF_44000, | |
194 | .vsb_if = S5H1411_IF_44000, | |
195 | .inversion = S5H1411_INVERSION_OFF, | |
196 | .status_mode = S5H1411_DEMODLOCKING, | |
197 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
198 | }; | |
199 | ||
19bc5796 MK |
200 | static struct s5h1411_config hcw_s5h1411_config = { |
201 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
202 | .gpio = S5H1411_GPIO_OFF, | |
203 | .vsb_if = S5H1411_IF_44000, | |
204 | .qam_if = S5H1411_IF_4000, | |
205 | .inversion = S5H1411_INVERSION_ON, | |
206 | .status_mode = S5H1411_DEMODLOCKING, | |
207 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
208 | }; | |
209 | ||
d1987d55 | 210 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
211 | .i2c_address = 0x61, |
212 | .if_khz = 5380, | |
d1987d55 ST |
213 | }; |
214 | ||
335377b7 MK |
215 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
216 | .i2c_address = 0x64, | |
217 | .if_khz = 5380, | |
335377b7 MK |
218 | }; |
219 | ||
4041f1a5 MK |
220 | static struct tda829x_config tda829x_no_probe = { |
221 | .probe_tuner = TDA829X_DONT_PROBE, | |
222 | }; | |
223 | ||
f21e0d7f | 224 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
225 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
226 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
227 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
228 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
229 | }; |
230 | ||
231 | static struct tda18271_config hauppauge_tda18271_config = { | |
232 | .std_map = &hauppauge_tda18271_std_map, | |
233 | .gate = TDA18271_GATE_ANALOG, | |
234 | }; | |
235 | ||
b3ea0166 ST |
236 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
237 | .gate = TDA18271_GATE_ANALOG, | |
238 | }; | |
239 | ||
a5dbf457 MK |
240 | static struct tda18271_std_map hcw_lgdt3305_tda18271_std_map = { |
241 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
242 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
243 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
244 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
245 | }; | |
246 | ||
247 | static struct tda18271_config hcw_lgdt3305_tda18271_config = { | |
248 | .std_map = &hcw_lgdt3305_tda18271_std_map, | |
249 | }; | |
250 | ||
251 | static struct lgdt3305_config hcw_lgdt3305_config = { | |
252 | .i2c_addr = 0x0e, | |
253 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
254 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
255 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
256 | .deny_i2c_rptr = 1, | |
257 | .spectral_inversion = 1, | |
258 | .qam_if_khz = 4000, | |
259 | .vsb_if_khz = 3250, | |
260 | }; | |
261 | ||
b1721d0d | 262 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
263 | BAND_VHF | BAND_UHF, /* band_caps */ |
264 | ||
265 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
266 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
267 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
268 | * P_agc_nb_est=2, P_agc_write=0 | |
269 | */ | |
270 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
271 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
272 | ||
273 | 712, /* inv_gain */ | |
274 | 21, /* time_stabiliz */ | |
275 | ||
276 | 0, /* alpha_level */ | |
277 | 118, /* thlock */ | |
278 | ||
279 | 0, /* wbd_inv */ | |
280 | 2867, /* wbd_ref */ | |
281 | 0, /* wbd_sel */ | |
282 | 2, /* wbd_alpha */ | |
283 | ||
284 | 0, /* agc1_max */ | |
285 | 0, /* agc1_min */ | |
286 | 39718, /* agc2_max */ | |
287 | 9930, /* agc2_min */ | |
288 | 0, /* agc1_pt1 */ | |
289 | 0, /* agc1_pt2 */ | |
290 | 0, /* agc1_pt3 */ | |
291 | 0, /* agc1_slope1 */ | |
292 | 0, /* agc1_slope2 */ | |
293 | 0, /* agc2_pt1 */ | |
294 | 128, /* agc2_pt2 */ | |
295 | 29, /* agc2_slope1 */ | |
296 | 29, /* agc2_slope2 */ | |
297 | ||
298 | 17, /* alpha_mant */ | |
299 | 27, /* alpha_exp */ | |
300 | 23, /* beta_mant */ | |
301 | 51, /* beta_exp */ | |
302 | ||
303 | 1, /* perform_agc_softsplit */ | |
304 | }; | |
305 | ||
306 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
307 | * With external clock = 30.000000 */ | |
b1721d0d | 308 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
309 | 60000, /* internal */ |
310 | 30000, /* sampling */ | |
311 | 1, /* pll_cfg: prediv */ | |
312 | 8, /* pll_cfg: ratio */ | |
313 | 3, /* pll_cfg: range */ | |
314 | 1, /* pll_cfg: reset */ | |
315 | 0, /* pll_cfg: bypass */ | |
316 | 0, /* misc: refdiv */ | |
317 | 0, /* misc: bypclk_div */ | |
318 | 1, /* misc: IO_CLK_en_core */ | |
319 | 1, /* misc: ADClkSrc */ | |
320 | 0, /* misc: modulo */ | |
321 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
322 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
323 | 20452225, /* timf */ | |
324 | 30000000 /* xtal_hz */ | |
325 | }; | |
326 | ||
327 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
328 | .output_mpeg2_in_188_bytes = 1, | |
329 | .hostbus_diversity = 1, | |
330 | .tuner_is_baseband = 0, | |
331 | .update_lna = NULL, | |
332 | ||
333 | .agc_config_count = 1, | |
334 | .agc = &xc3028_agc_config, | |
335 | .bw = &xc3028_bw_config, | |
336 | ||
337 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
338 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
339 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
340 | ||
341 | .pwm_freq_div = 0, | |
342 | .agc_control = NULL, | |
343 | .spur_protect = 0, | |
344 | ||
345 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
346 | }; | |
347 | ||
aef2d186 ST |
348 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
349 | .demod_address = 0x0f, | |
350 | .if2 = 45600, | |
351 | .no_tuner = 1, | |
d4dc673d | 352 | .disable_i2c_gate_ctrl = 1, |
aef2d186 ST |
353 | }; |
354 | ||
5a23b076 IL |
355 | static struct stv0900_config netup_stv0900_config = { |
356 | .demod_address = 0x68, | |
357 | .xtal = 27000000, | |
358 | .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ | |
359 | .diseqc_mode = 2,/* 2/3 PWM */ | |
360 | .path1_mode = 2,/*Serial continues clock */ | |
361 | .path2_mode = 2,/*Serial continues clock */ | |
362 | .tun1_maddress = 0,/* 0x60 */ | |
363 | .tun2_maddress = 3,/* 0x63 */ | |
364 | .tun1_adc = 1,/* 1 Vpp */ | |
365 | .tun2_adc = 1,/* 1 Vpp */ | |
366 | }; | |
367 | ||
368 | static struct stv6110_config netup_stv6110_tunerconfig_a = { | |
369 | .i2c_address = 0x60, | |
370 | .mclk = 27000000, | |
371 | .iq_wiring = 0, | |
372 | }; | |
373 | ||
374 | static struct stv6110_config netup_stv6110_tunerconfig_b = { | |
375 | .i2c_address = 0x63, | |
376 | .mclk = 27000000, | |
377 | .iq_wiring = 1, | |
378 | }; | |
379 | ||
96318d0c IL |
380 | static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
381 | { | |
382 | struct cx23885_tsport *port = fe->dvb->priv; | |
383 | struct cx23885_dev *dev = port->dev; | |
384 | ||
385 | if (voltage == SEC_VOLTAGE_18) | |
386 | cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */ | |
387 | else if (voltage == SEC_VOLTAGE_13) | |
388 | cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */ | |
389 | else | |
390 | cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */ | |
391 | return 0; | |
392 | } | |
393 | ||
394 | static struct cx24116_config tbs_cx24116_config = { | |
395 | .demod_address = 0x05, | |
396 | }; | |
397 | ||
579943f5 IL |
398 | static struct cx24116_config tevii_cx24116_config = { |
399 | .demod_address = 0x55, | |
400 | }; | |
401 | ||
c9b8b04b IL |
402 | static struct cx24116_config dvbworld_cx24116_config = { |
403 | .demod_address = 0x05, | |
404 | }; | |
405 | ||
d19770e5 ST |
406 | static int dvb_register(struct cx23885_tsport *port) |
407 | { | |
408 | struct cx23885_dev *dev = port->dev; | |
f139fa71 | 409 | struct cx23885_i2c *i2c_bus = NULL; |
363c35fc | 410 | struct videobuf_dvb_frontend *fe0; |
5a23b076 | 411 | int ret; |
363c35fc | 412 | |
f972e0bd | 413 | /* Get the first frontend */ |
92abe9ee | 414 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
415 | if (!fe0) |
416 | return -EINVAL; | |
d19770e5 ST |
417 | |
418 | /* init struct videobuf_dvb */ | |
363c35fc | 419 | fe0->dvb.name = dev->name; |
d19770e5 ST |
420 | |
421 | /* init frontend */ | |
422 | switch (dev->board) { | |
a77743bc | 423 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 424 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 425 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 426 | &hauppauge_generic_config, |
f139fa71 | 427 | &i2c_bus->i2c_adap); |
363c35fc ST |
428 | if (fe0->dvb.frontend != NULL) { |
429 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 430 | &i2c_bus->i2c_adap, |
86184e06 | 431 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
432 | } |
433 | break; | |
a5dbf457 | 434 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 435 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
a5dbf457 MK |
436 | i2c_bus = &dev->i2c_bus[0]; |
437 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, | |
438 | &hcw_lgdt3305_config, | |
439 | &i2c_bus->i2c_adap); | |
440 | if (fe0->dvb.frontend != NULL) { | |
441 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
442 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
443 | &hcw_lgdt3305_tda18271_config); | |
444 | } | |
445 | break; | |
19bc5796 MK |
446 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
447 | i2c_bus = &dev->i2c_bus[0]; | |
448 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
449 | &hcw_s5h1411_config, | |
450 | &i2c_bus->i2c_adap); | |
451 | if (fe0->dvb.frontend != NULL) { | |
452 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
453 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
454 | &hauppauge_tda18271_config); | |
455 | } | |
456 | break; | |
3ba71d21 MK |
457 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
458 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 459 | switch (alt_tuner) { |
3ba71d21 | 460 | case 1: |
363c35fc | 461 | fe0->dvb.frontend = |
3ba71d21 MK |
462 | dvb_attach(s5h1409_attach, |
463 | &hauppauge_ezqam_config, | |
464 | &i2c_bus->i2c_adap); | |
363c35fc ST |
465 | if (fe0->dvb.frontend != NULL) { |
466 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 467 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 468 | &tda829x_no_probe); |
363c35fc | 469 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 470 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 471 | &hauppauge_tda18271_config); |
3ba71d21 MK |
472 | } |
473 | break; | |
474 | case 0: | |
475 | default: | |
363c35fc | 476 | fe0->dvb.frontend = |
3ba71d21 MK |
477 | dvb_attach(s5h1409_attach, |
478 | &hauppauge_generic_config, | |
479 | &i2c_bus->i2c_adap); | |
363c35fc ST |
480 | if (fe0->dvb.frontend != NULL) |
481 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
482 | &i2c_bus->i2c_adap, |
483 | &hauppauge_generic_tunerconfig, 0); | |
484 | break; | |
485 | } | |
486 | break; | |
fc959bef | 487 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 488 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 489 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 490 | &hauppauge_hvr1800lp_config, |
f139fa71 | 491 | &i2c_bus->i2c_adap); |
363c35fc ST |
492 | if (fe0->dvb.frontend != NULL) { |
493 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 494 | &i2c_bus->i2c_adap, |
fc959bef ST |
495 | &hauppauge_generic_tunerconfig, 0); |
496 | } | |
497 | break; | |
9bc37caa | 498 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 499 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 500 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 501 | &fusionhdtv_5_express, |
f139fa71 | 502 | &i2c_bus->i2c_adap); |
363c35fc ST |
503 | if (fe0->dvb.frontend != NULL) { |
504 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
505 | &i2c_bus->i2c_adap, 0x61, |
506 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
507 | } |
508 | break; | |
d1987d55 ST |
509 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
510 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 511 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
512 | &hauppauge_hvr1500q_config, |
513 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
514 | if (fe0->dvb.frontend != NULL) |
515 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
516 | &i2c_bus->i2c_adap, |
517 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 518 | break; |
07b4a835 MK |
519 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
520 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 521 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
522 | &hauppauge_hvr1500_config, |
523 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 524 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
525 | struct dvb_frontend *fe; |
526 | struct xc2028_config cfg = { | |
527 | .i2c_adap = &i2c_bus->i2c_adap, | |
528 | .i2c_addr = 0x61, | |
07b4a835 MK |
529 | }; |
530 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 531 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 532 | .max_len = 64, |
52c3d29c | 533 | .demod = XC3028_FE_OREN538, |
07b4a835 MK |
534 | }; |
535 | ||
536 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 537 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
538 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
539 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
540 | } | |
541 | break; | |
b3ea0166 | 542 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 543 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 544 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 545 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
546 | &hauppauge_hvr1200_config, |
547 | &i2c_bus->i2c_adap); | |
363c35fc ST |
548 | if (fe0->dvb.frontend != NULL) { |
549 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
550 | &dev->i2c_bus[1].i2c_adap, 0x42, |
551 | &tda829x_no_probe); | |
363c35fc | 552 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
553 | 0x60, &dev->i2c_bus[1].i2c_adap, |
554 | &hauppauge_hvr1200_tuner_config); | |
555 | } | |
556 | break; | |
66762373 ST |
557 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
558 | i2c_bus = &dev->i2c_bus[0]; | |
363c35fc | 559 | fe0->dvb.frontend = dvb_attach(dib7000p_attach, |
66762373 ST |
560 | &i2c_bus->i2c_adap, |
561 | 0x12, &hauppauge_hvr1400_dib7000_config); | |
363c35fc | 562 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
563 | struct dvb_frontend *fe; |
564 | struct xc2028_config cfg = { | |
565 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
566 | .i2c_addr = 0x64, | |
66762373 ST |
567 | }; |
568 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 569 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 ST |
570 | .max_len = 64, |
571 | .demod = 5000, | |
9c8ced51 ST |
572 | /* This is true for all demods with |
573 | v36 firmware? */ | |
0975fc68 | 574 | .type = XC2028_D2633, |
66762373 ST |
575 | }; |
576 | ||
577 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 578 | fe0->dvb.frontend, &cfg); |
66762373 ST |
579 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
580 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
581 | } | |
582 | break; | |
335377b7 MK |
583 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
584 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
585 | ||
363c35fc | 586 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
587 | &dvico_s5h1409_config, |
588 | &i2c_bus->i2c_adap); | |
363c35fc ST |
589 | if (fe0->dvb.frontend == NULL) |
590 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
591 | &dvico_s5h1411_config, |
592 | &i2c_bus->i2c_adap); | |
363c35fc ST |
593 | if (fe0->dvb.frontend != NULL) |
594 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
595 | &i2c_bus->i2c_adap, |
596 | &dvico_xc5000_tunerconfig); | |
335377b7 | 597 | break; |
aef2d186 ST |
598 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
599 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
600 | ||
363c35fc | 601 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
602 | &dvico_fusionhdtv_xc3028, |
603 | &i2c_bus->i2c_adap); | |
363c35fc | 604 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
605 | struct dvb_frontend *fe; |
606 | struct xc2028_config cfg = { | |
607 | .i2c_adap = &i2c_bus->i2c_adap, | |
608 | .i2c_addr = 0x61, | |
aef2d186 ST |
609 | }; |
610 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 611 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
612 | .max_len = 64, |
613 | .demod = XC3028_FE_ZARLINK456, | |
614 | }; | |
615 | ||
363c35fc | 616 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
617 | &cfg); |
618 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
619 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
620 | } | |
621 | break; | |
622 | } | |
4c56b04a | 623 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
9bb1b7e8 | 624 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
4c56b04a ST |
625 | i2c_bus = &dev->i2c_bus[0]; |
626 | ||
363c35fc | 627 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
628 | &dvico_fusionhdtv_xc3028, |
629 | &i2c_bus->i2c_adap); | |
363c35fc | 630 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
631 | struct dvb_frontend *fe; |
632 | struct xc2028_config cfg = { | |
633 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
634 | .i2c_addr = 0x61, | |
4c56b04a ST |
635 | }; |
636 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 637 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
638 | .max_len = 64, |
639 | .demod = XC3028_FE_ZARLINK456, | |
640 | }; | |
641 | ||
363c35fc | 642 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
643 | &cfg); |
644 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
645 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
646 | } | |
96318d0c IL |
647 | break; |
648 | case CX23885_BOARD_TBS_6920: | |
649 | i2c_bus = &dev->i2c_bus[0]; | |
650 | ||
651 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
652 | &tbs_cx24116_config, | |
653 | &i2c_bus->i2c_adap); | |
654 | if (fe0->dvb.frontend != NULL) | |
655 | fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; | |
656 | ||
579943f5 IL |
657 | break; |
658 | case CX23885_BOARD_TEVII_S470: | |
659 | i2c_bus = &dev->i2c_bus[1]; | |
660 | ||
661 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
662 | &tevii_cx24116_config, | |
663 | &i2c_bus->i2c_adap); | |
664 | if (fe0->dvb.frontend != NULL) | |
665 | fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage; | |
666 | ||
4c56b04a | 667 | break; |
c9b8b04b IL |
668 | case CX23885_BOARD_DVBWORLD_2005: |
669 | i2c_bus = &dev->i2c_bus[1]; | |
670 | ||
671 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
672 | &dvbworld_cx24116_config, | |
673 | &i2c_bus->i2c_adap); | |
674 | break; | |
5a23b076 IL |
675 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
676 | i2c_bus = &dev->i2c_bus[0]; | |
677 | switch (port->nr) { | |
678 | /* port B */ | |
679 | case 1: | |
680 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
681 | &netup_stv0900_config, | |
682 | &i2c_bus->i2c_adap, 0); | |
683 | if (fe0->dvb.frontend != NULL) { | |
684 | if (dvb_attach(stv6110_attach, | |
685 | fe0->dvb.frontend, | |
686 | &netup_stv6110_tunerconfig_a, | |
687 | &i2c_bus->i2c_adap)) { | |
688 | if (!dvb_attach(lnbh24_attach, | |
689 | fe0->dvb.frontend, | |
690 | &i2c_bus->i2c_adap, | |
691 | LNBH24_PCL, 0, 0x09)) | |
692 | printk(KERN_ERR | |
693 | "No LNBH24 found!\n"); | |
694 | ||
695 | } | |
696 | } | |
697 | break; | |
698 | /* port C */ | |
699 | case 2: | |
700 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
701 | &netup_stv0900_config, | |
702 | &i2c_bus->i2c_adap, 1); | |
703 | if (fe0->dvb.frontend != NULL) { | |
704 | if (dvb_attach(stv6110_attach, | |
705 | fe0->dvb.frontend, | |
706 | &netup_stv6110_tunerconfig_b, | |
707 | &i2c_bus->i2c_adap)) { | |
708 | if (!dvb_attach(lnbh24_attach, | |
709 | fe0->dvb.frontend, | |
710 | &i2c_bus->i2c_adap, | |
711 | LNBH24_PCL, 0, 0x0a)) | |
712 | printk(KERN_ERR | |
713 | "No LNBH24 found!\n"); | |
714 | ||
715 | } | |
716 | } | |
717 | break; | |
718 | } | |
719 | break; | |
d19770e5 | 720 | default: |
9c8ced51 ST |
721 | printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " |
722 | " isn't supported yet\n", | |
d19770e5 ST |
723 | dev->name); |
724 | break; | |
725 | } | |
363c35fc | 726 | if (NULL == fe0->dvb.frontend) { |
9c8ced51 ST |
727 | printk(KERN_ERR "%s: frontend initialization failed\n", |
728 | dev->name); | |
d19770e5 ST |
729 | return -1; |
730 | } | |
d7cba043 | 731 | /* define general-purpose callback pointer */ |
363c35fc | 732 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
d19770e5 ST |
733 | |
734 | /* Put the analog decoder in standby to keep it quiet */ | |
7c9fc9d5 | 735 | call_all(dev, tuner, s_standby); |
d19770e5 | 736 | |
363c35fc ST |
737 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
738 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 739 | |
d19770e5 | 740 | /* register everything */ |
5a23b076 | 741 | ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
59b1842d | 742 | &dev->pci->dev, adapter_nr, 0); |
363c35fc | 743 | |
5a23b076 IL |
744 | /* init CI & MAC */ |
745 | switch (dev->board) { | |
746 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { | |
747 | static struct netup_card_info cinfo; | |
748 | ||
749 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | |
750 | memcpy(port->frontends.adapter.proposed_mac, | |
751 | cinfo.port[port->nr - 1].mac, 6); | |
752 | printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=" | |
753 | "%02X:%02X:%02X:%02X:%02X:%02X\n", | |
754 | port->nr, | |
755 | port->frontends.adapter.proposed_mac[0], | |
756 | port->frontends.adapter.proposed_mac[1], | |
757 | port->frontends.adapter.proposed_mac[2], | |
758 | port->frontends.adapter.proposed_mac[3], | |
759 | port->frontends.adapter.proposed_mac[4], | |
760 | port->frontends.adapter.proposed_mac[5]); | |
761 | ||
762 | netup_ci_init(port); | |
763 | break; | |
764 | } | |
765 | } | |
766 | ||
767 | return ret; | |
d19770e5 ST |
768 | } |
769 | ||
770 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
771 | { | |
363c35fc ST |
772 | |
773 | struct videobuf_dvb_frontend *fe0; | |
d19770e5 | 774 | struct cx23885_dev *dev = port->dev; |
eb0c58bb ST |
775 | int err, i; |
776 | ||
777 | /* Here we need to allocate the correct number of frontends, | |
778 | * as reflected in the cards struct. The reality is that currrently | |
779 | * no cx23885 boards support this - yet. But, if we don't modify this | |
780 | * code then the second frontend would never be allocated (later) | |
781 | * and fail with error before the attach in dvb_register(). | |
782 | * Without these changes we risk an OOPS later. The changes here | |
783 | * are for safety, and should provide a good foundation for the | |
784 | * future addition of any multi-frontend cx23885 based boards. | |
785 | */ | |
786 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, | |
787 | port->num_frontends); | |
d19770e5 | 788 | |
eb0c58bb | 789 | for (i = 1; i <= port->num_frontends; i++) { |
96b7a1a8 | 790 | if (videobuf_dvb_alloc_frontend( |
9c8ced51 | 791 | &port->frontends, i) == NULL) { |
eb0c58bb ST |
792 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
793 | return -ENOMEM; | |
794 | } | |
795 | ||
796 | fe0 = videobuf_dvb_get_frontend(&port->frontends, i); | |
797 | if (!fe0) | |
798 | err = -EINVAL; | |
363c35fc | 799 | |
eb0c58bb | 800 | dprintk(1, "%s\n", __func__); |
9c8ced51 | 801 | dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", |
eb0c58bb ST |
802 | dev->board, |
803 | dev->name, | |
804 | dev->pci_bus, | |
805 | dev->pci_slot); | |
d19770e5 | 806 | |
eb0c58bb | 807 | err = -ENODEV; |
d19770e5 | 808 | |
eb0c58bb ST |
809 | /* dvb stuff */ |
810 | /* We have to init the queue for each frontend on a port. */ | |
9c8ced51 ST |
811 | printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); |
812 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, | |
813 | &dev->pci->dev, &port->slock, | |
44a6481d MK |
814 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, |
815 | sizeof(struct cx23885_buffer), port); | |
eb0c58bb | 816 | } |
d19770e5 ST |
817 | err = dvb_register(port); |
818 | if (err != 0) | |
9c8ced51 ST |
819 | printk(KERN_ERR "%s() dvb_register failed err = %d\n", |
820 | __func__, err); | |
d19770e5 | 821 | |
d19770e5 ST |
822 | return err; |
823 | } | |
824 | ||
825 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
826 | { | |
363c35fc ST |
827 | struct videobuf_dvb_frontend *fe0; |
828 | ||
eb0c58bb ST |
829 | /* FIXME: in an error condition where the we have |
830 | * an expected number of frontends (attach problem) | |
831 | * then this might not clean up correctly, if 1 | |
832 | * is invalid. | |
833 | * This comment only applies to future boards IF they | |
834 | * implement MFE support. | |
835 | */ | |
92abe9ee | 836 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
9c8ced51 | 837 | if (fe0->dvb.frontend) |
363c35fc | 838 | videobuf_dvb_unregister_bus(&port->frontends); |
d19770e5 | 839 | |
afd96668 HV |
840 | switch (port->dev->board) { |
841 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
842 | netup_ci_exit(port); | |
843 | break; | |
844 | } | |
5a23b076 | 845 | |
d19770e5 ST |
846 | return 0; |
847 | } | |
44a6481d | 848 |