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V4L/DVB (11772): cx23885: update model matrix for "k2c2" retail boards
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/fs.h>
26#include <linux/kthread.h>
27#include <linux/file.h>
28#include <linux/suspend.h>
29
30#include "cx23885.h"
d19770e5
ST		 31#include <media/v4l2-common.h>
32
5a23b076 33#include "dvb_ca_en50221.h"
d19770e5 34#include "s5h1409.h"
52b50450 35#include "s5h1411.h"
d19770e5 36#include "mt2131.h"
3ba71d21 37#include "tda8290.h"
4041f1a5 38#include "tda18271.h"
9bc37caa 39#include "lgdt330x.h"
d1987d55 40#include "xc5000.h"
b3ea0166 41#include "tda10048.h"
07b4a835 42#include "tuner-xc2028.h"
827855d3 43#include "tuner-simple.h"
66762373
ST		 44#include "dib7000p.h"
45#include "dibx000_common.h"
aef2d186 46#include "zl10353.h"
5a23b076
IL		 47#include "stv0900.h"
48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
5a23b076
IL		 51#include "cimax2.h"
52#include "netup-eeprom.h"
53#include "netup-init.h"
a5dbf457 54#include "lgdt3305.h"
d19770e5 55
4513fc69 56static unsigned int debug;
d19770e5 57
4513fc69
ST		 58#define dprintk(level, fmt, arg...)\
59 do { if (debug >= level)\
60 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
61 } while (0)
d19770e5
ST		 62
63/* ------------------------------------------------------------------ */
64
3ba71d21
MK		 65static unsigned int alt_tuner;
66module_param(alt_tuner, int, 0644);
67MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
68
78e92006
JG		 69DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
70
3ba71d21
MK		 71/* ------------------------------------------------------------------ */
72
d19770e5
ST		 73static int dvb_buf_setup(struct videobuf_queue *q,
74 unsigned int *count, unsigned int *size)
75{
76 struct cx23885_tsport *port = q->priv_data;
77
78 port->ts_packet_size = 188 * 4;
79 port->ts_packet_count = 32;
80
81 *size = port->ts_packet_size * port->ts_packet_count;
82 *count = 32;
83 return 0;
84}
85
44a6481d
MK		 86static int dvb_buf_prepare(struct videobuf_queue *q,
87 struct videobuf_buffer *vb, enum v4l2_field field)
d19770e5
ST		 88{
89 struct cx23885_tsport *port = q->priv_data;
9c8ced51 90 return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
d19770e5
ST		 91}
92
93static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
94{
95 struct cx23885_tsport *port = q->priv_data;
9c8ced51 96 cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
d19770e5
ST		 97}
98
44a6481d
MK		 99static void dvb_buf_release(struct videobuf_queue *q,
100 struct videobuf_buffer *vb)
d19770e5 101{
9c8ced51 102 cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
d19770e5
ST		 103}
104
105static struct videobuf_queue_ops dvb_qops = {
106 .buf_setup = dvb_buf_setup,
107 .buf_prepare = dvb_buf_prepare,
108 .buf_queue = dvb_buf_queue,
109 .buf_release = dvb_buf_release,
110};
111
86184e06 112static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 113 .demod_address = 0x32 >> 1,
114 .output_mode = S5H1409_SERIAL_OUTPUT,
115 .gpio = S5H1409_GPIO_ON,
2b03238a 116 .qam_if = 44000,
fc959bef 117 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 118 .status_mode = S5H1409_DEMODLOCKING,
119 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 120};
121
b3ea0166
ST		 122static struct tda10048_config hauppauge_hvr1200_config = {
123 .demod_address = 0x10 >> 1,
124 .output_mode = TDA10048_SERIAL_OUTPUT,
125 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05
ST		 126 .inversion = TDA10048_INVERSION_ON,
127 .if_freq_khz = TDA10048_IF_4300,
128 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 129};
130
6b926eca
MK		 131static struct tda10048_config hauppauge_hvr1210_config = {
132 .demod_address = 0x10 >> 1,
133 .output_mode = TDA10048_SERIAL_OUTPUT,
134 .fwbulkwritelen = TDA10048_BULKWRITE_200,
135 .inversion = TDA10048_INVERSION_ON,
136 .if_freq_khz = TDA10048_IF_4000,
137 .clk_freq_khz = TDA10048_CLK_16000,
138};
139
3ba71d21
MK		 140static struct s5h1409_config hauppauge_ezqam_config = {
141 .demod_address = 0x32 >> 1,
142 .output_mode = S5H1409_SERIAL_OUTPUT,
143 .gpio = S5H1409_GPIO_OFF,
144 .qam_if = 4000,
145 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 146 .status_mode = S5H1409_DEMODLOCKING,
147 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 148};
149
fc959bef 150static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 151 .demod_address = 0x32 >> 1,
152 .output_mode = S5H1409_SERIAL_OUTPUT,
153 .gpio = S5H1409_GPIO_OFF,
2b03238a 154 .qam_if = 44000,
fe475163 155 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 156 .status_mode = S5H1409_DEMODLOCKING,
157 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 158};
159
07b4a835
MK		 160static struct s5h1409_config hauppauge_hvr1500_config = {
161 .demod_address = 0x32 >> 1,
162 .output_mode = S5H1409_SERIAL_OUTPUT,
163 .gpio = S5H1409_GPIO_OFF,
164 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 165 .status_mode = S5H1409_DEMODLOCKING,
166 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 167};
168
86184e06 169static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 170 0x61
171};
172
9bc37caa
MK		 173static struct lgdt330x_config fusionhdtv_5_express = {
174 .demod_address = 0x0e,
175 .demod_chip = LGDT3303,
176 .serial_mpeg = 0x40,
177};
178
d1987d55
ST		 179static struct s5h1409_config hauppauge_hvr1500q_config = {
180 .demod_address = 0x32 >> 1,
181 .output_mode = S5H1409_SERIAL_OUTPUT,
182 .gpio = S5H1409_GPIO_ON,
183 .qam_if = 44000,
184 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 185 .status_mode = S5H1409_DEMODLOCKING,
186 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 187};
188
335377b7
MK		 189static struct s5h1409_config dvico_s5h1409_config = {
190 .demod_address = 0x32 >> 1,
191 .output_mode = S5H1409_SERIAL_OUTPUT,
192 .gpio = S5H1409_GPIO_ON,
193 .qam_if = 44000,
194 .inversion = S5H1409_INVERSION_OFF,
195 .status_mode = S5H1409_DEMODLOCKING,
196 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
197};
198
52b50450
MK		 199static struct s5h1411_config dvico_s5h1411_config = {
200 .output_mode = S5H1411_SERIAL_OUTPUT,
201 .gpio = S5H1411_GPIO_ON,
202 .qam_if = S5H1411_IF_44000,
203 .vsb_if = S5H1411_IF_44000,
204 .inversion = S5H1411_INVERSION_OFF,
205 .status_mode = S5H1411_DEMODLOCKING,
206 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
207};
208
19bc5796
MK		 209static struct s5h1411_config hcw_s5h1411_config = {
210 .output_mode = S5H1411_SERIAL_OUTPUT,
211 .gpio = S5H1411_GPIO_OFF,
212 .vsb_if = S5H1411_IF_44000,
213 .qam_if = S5H1411_IF_4000,
214 .inversion = S5H1411_INVERSION_ON,
215 .status_mode = S5H1411_DEMODLOCKING,
216 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
217};
218
d1987d55 219static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 220 .i2c_address = 0x61,
221 .if_khz = 5380,
d1987d55
ST		 222};
223
335377b7
MK		 224static struct xc5000_config dvico_xc5000_tunerconfig = {
225 .i2c_address = 0x64,
226 .if_khz = 5380,
335377b7
MK		 227};
228
4041f1a5
MK		 229static struct tda829x_config tda829x_no_probe = {
230 .probe_tuner = TDA829X_DONT_PROBE,
231};
232
f21e0d7f 233static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 234 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
235 .if_lvl = 6, .rfagc_top = 0x37 },
236 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
237 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 238};
239
240static struct tda18271_config hauppauge_tda18271_config = {
241 .std_map = &hauppauge_tda18271_std_map,
242 .gate = TDA18271_GATE_ANALOG,
243};
244
b3ea0166
ST		 245static struct tda18271_config hauppauge_hvr1200_tuner_config = {
246 .gate = TDA18271_GATE_ANALOG,
247};
248
6b926eca
MK		 249static struct tda18271_config hauppauge_hvr1210_tuner_config = {
250 .gate = TDA18271_GATE_DIGITAL,
251};
252
a5dbf457
MK		 253static struct tda18271_std_map hcw_lgdt3305_tda18271_std_map = {
254 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
255 .if_lvl = 1, .rfagc_top = 0x58 },
256 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
257 .if_lvl = 1, .rfagc_top = 0x58 },
258};
259
260static struct tda18271_config hcw_lgdt3305_tda18271_config = {
261 .std_map = &hcw_lgdt3305_tda18271_std_map,
262};
263
264static struct lgdt3305_config hcw_lgdt3305_config = {
265 .i2c_addr = 0x0e,
266 .mpeg_mode = LGDT3305_MPEG_SERIAL,
267 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
268 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
269 .deny_i2c_rptr = 1,
270 .spectral_inversion = 1,
271 .qam_if_khz = 4000,
272 .vsb_if_khz = 3250,
273};
274
b1721d0d 275static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 276 BAND_VHF | BAND_UHF, /* band_caps */
277
278 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
279 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
280 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
281 * P_agc_nb_est=2, P_agc_write=0
282 */
283 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
284 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
285
286 712, /* inv_gain */
287 21, /* time_stabiliz */
288
289 0, /* alpha_level */
290 118, /* thlock */
291
292 0, /* wbd_inv */
293 2867, /* wbd_ref */
294 0, /* wbd_sel */
295 2, /* wbd_alpha */
296
297 0, /* agc1_max */
298 0, /* agc1_min */
299 39718, /* agc2_max */
300 9930, /* agc2_min */
301 0, /* agc1_pt1 */
302 0, /* agc1_pt2 */
303 0, /* agc1_pt3 */
304 0, /* agc1_slope1 */
305 0, /* agc1_slope2 */
306 0, /* agc2_pt1 */
307 128, /* agc2_pt2 */
308 29, /* agc2_slope1 */
309 29, /* agc2_slope2 */
310
311 17, /* alpha_mant */
312 27, /* alpha_exp */
313 23, /* beta_mant */
314 51, /* beta_exp */
315
316 1, /* perform_agc_softsplit */
317};
318
319/* PLL Configuration for COFDM BW_MHz = 8.000000
320 * With external clock = 30.000000 */
b1721d0d 321static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 322 60000, /* internal */
323 30000, /* sampling */
324 1, /* pll_cfg: prediv */
325 8, /* pll_cfg: ratio */
326 3, /* pll_cfg: range */
327 1, /* pll_cfg: reset */
328 0, /* pll_cfg: bypass */
329 0, /* misc: refdiv */
330 0, /* misc: bypclk_div */
331 1, /* misc: IO_CLK_en_core */
332 1, /* misc: ADClkSrc */
333 0, /* misc: modulo */
334 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
335 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
336 20452225, /* timf */
337 30000000 /* xtal_hz */
338};
339
340static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
341 .output_mpeg2_in_188_bytes = 1,
342 .hostbus_diversity = 1,
343 .tuner_is_baseband = 0,
344 .update_lna = NULL,
345
346 .agc_config_count = 1,
347 .agc = &xc3028_agc_config,
348 .bw = &xc3028_bw_config,
349
350 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
351 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
352 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
353
354 .pwm_freq_div = 0,
355 .agc_control = NULL,
356 .spur_protect = 0,
357
358 .output_mode = OUTMODE_MPEG2_SERIAL,
359};
360
aef2d186
ST		 361static struct zl10353_config dvico_fusionhdtv_xc3028 = {
362 .demod_address = 0x0f,
363 .if2 = 45600,
364 .no_tuner = 1,
d4dc673d 365 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 366};
367
5a23b076
IL		 368static struct stv0900_config netup_stv0900_config = {
369 .demod_address = 0x68,
370 .xtal = 27000000,
371 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
372 .diseqc_mode = 2,/* 2/3 PWM */
373 .path1_mode = 2,/*Serial continues clock */
374 .path2_mode = 2,/*Serial continues clock */
375 .tun1_maddress = 0,/* 0x60 */
376 .tun2_maddress = 3,/* 0x63 */
377 .tun1_adc = 1,/* 1 Vpp */
378 .tun2_adc = 1,/* 1 Vpp */
379};
380
381static struct stv6110_config netup_stv6110_tunerconfig_a = {
382 .i2c_address = 0x60,
383 .mclk = 27000000,
384 .iq_wiring = 0,
385};
386
387static struct stv6110_config netup_stv6110_tunerconfig_b = {
388 .i2c_address = 0x63,
389 .mclk = 27000000,
390 .iq_wiring = 1,
391};
392
96318d0c
IL		 393static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
394{
395 struct cx23885_tsport *port = fe->dvb->priv;
396 struct cx23885_dev *dev = port->dev;
397
398 if (voltage == SEC_VOLTAGE_18)
399 cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
400 else if (voltage == SEC_VOLTAGE_13)
401 cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
402 else
403 cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
404 return 0;
405}
406
407static struct cx24116_config tbs_cx24116_config = {
408 .demod_address = 0x05,
409};
410
579943f5
IL		 411static struct cx24116_config tevii_cx24116_config = {
412 .demod_address = 0x55,
413};
414
c9b8b04b
IL		 415static struct cx24116_config dvbworld_cx24116_config = {
416 .demod_address = 0x05,
417};
418
d19770e5
ST		 419static int dvb_register(struct cx23885_tsport *port)
420{
421 struct cx23885_dev *dev = port->dev;
f139fa71 422 struct cx23885_i2c *i2c_bus = NULL;
363c35fc 423 struct videobuf_dvb_frontend *fe0;
5a23b076 424 int ret;
363c35fc 425
f972e0bd 426 /* Get the first frontend */
92abe9ee 427 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 428 if (!fe0)
429 return -EINVAL;
d19770e5
ST		 430
431 /* init struct videobuf_dvb */
363c35fc 432 fe0->dvb.name = dev->name;
d19770e5
ST		 433
434 /* init frontend */
435 switch (dev->board) {
a77743bc 436 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 437 i2c_bus = &dev->i2c_bus[0];
363c35fc 438 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 439 &hauppauge_generic_config,
f139fa71 440 &i2c_bus->i2c_adap);
363c35fc
ST		 441 if (fe0->dvb.frontend != NULL) {
442 dvb_attach(mt2131_attach, fe0->dvb.frontend,
f139fa71 443 &i2c_bus->i2c_adap,
86184e06 444 &hauppauge_generic_tunerconfig, 0);
d19770e5
ST		 445 }
446 break;
a5dbf457 447 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 448 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 449 i2c_bus = &dev->i2c_bus[0];
450 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
451 &hcw_lgdt3305_config,
452 &i2c_bus->i2c_adap);
453 if (fe0->dvb.frontend != NULL) {
454 dvb_attach(tda18271_attach, fe0->dvb.frontend,
455 0x60, &dev->i2c_bus[1].i2c_adap,
456 &hcw_lgdt3305_tda18271_config);
457 }
458 break;
19bc5796
MK		 459 case CX23885_BOARD_HAUPPAUGE_HVR1255:
460 i2c_bus = &dev->i2c_bus[0];
461 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
462 &hcw_s5h1411_config,
463 &i2c_bus->i2c_adap);
464 if (fe0->dvb.frontend != NULL) {
465 dvb_attach(tda18271_attach, fe0->dvb.frontend,
466 0x60, &dev->i2c_bus[1].i2c_adap,
467 &hauppauge_tda18271_config);
468 }
469 break;
3ba71d21
MK		 470 case CX23885_BOARD_HAUPPAUGE_HVR1800:
471 i2c_bus = &dev->i2c_bus[0];
92abe9ee 472 switch (alt_tuner) {
3ba71d21 473 case 1:
363c35fc 474 fe0->dvb.frontend =
3ba71d21
MK		 475 dvb_attach(s5h1409_attach,
476 &hauppauge_ezqam_config,
477 &i2c_bus->i2c_adap);
363c35fc
ST		 478 if (fe0->dvb.frontend != NULL) {
479 dvb_attach(tda829x_attach, fe0->dvb.frontend,
3ba71d21 480 &dev->i2c_bus[1].i2c_adap, 0x42,
4041f1a5 481 &tda829x_no_probe);
363c35fc 482 dvb_attach(tda18271_attach, fe0->dvb.frontend,
4041f1a5 483 0x60, &dev->i2c_bus[1].i2c_adap,
f21e0d7f 484 &hauppauge_tda18271_config);
3ba71d21
MK		 485 }
486 break;
487 case 0:
488 default:
363c35fc 489 fe0->dvb.frontend =
3ba71d21
MK		 490 dvb_attach(s5h1409_attach,
491 &hauppauge_generic_config,
492 &i2c_bus->i2c_adap);
363c35fc
ST		 493 if (fe0->dvb.frontend != NULL)
494 dvb_attach(mt2131_attach, fe0->dvb.frontend,
3ba71d21
MK		 495 &i2c_bus->i2c_adap,
496 &hauppauge_generic_tunerconfig, 0);
497 break;
498 }
499 break;
fc959bef 500 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 501 i2c_bus = &dev->i2c_bus[0];
363c35fc 502 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 503 &hauppauge_hvr1800lp_config,
f139fa71 504 &i2c_bus->i2c_adap);
363c35fc
ST		 505 if (fe0->dvb.frontend != NULL) {
506 dvb_attach(mt2131_attach, fe0->dvb.frontend,
f139fa71 507 &i2c_bus->i2c_adap,
fc959bef
ST		 508 &hauppauge_generic_tunerconfig, 0);
509 }
510 break;
9bc37caa 511 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 512 i2c_bus = &dev->i2c_bus[0];
363c35fc 513 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 514 &fusionhdtv_5_express,
f139fa71 515 &i2c_bus->i2c_adap);
363c35fc
ST		 516 if (fe0->dvb.frontend != NULL) {
517 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
827855d3
MK		 518 &i2c_bus->i2c_adap, 0x61,
519 TUNER_LG_TDVS_H06XF);
9bc37caa
MK		 520 }
521 break;
d1987d55
ST		 522 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
523 i2c_bus = &dev->i2c_bus[1];
363c35fc 524 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 525 &hauppauge_hvr1500q_config,
526 &dev->i2c_bus[0].i2c_adap);
363c35fc
ST		 527 if (fe0->dvb.frontend != NULL)
528 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 529 &i2c_bus->i2c_adap,
530 &hauppauge_hvr1500q_tunerconfig);
d1987d55 531 break;
07b4a835
MK		 532 case CX23885_BOARD_HAUPPAUGE_HVR1500:
533 i2c_bus = &dev->i2c_bus[1];
363c35fc 534 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 535 &hauppauge_hvr1500_config,
536 &dev->i2c_bus[0].i2c_adap);
363c35fc 537 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 538 struct dvb_frontend *fe;
539 struct xc2028_config cfg = {
540 .i2c_adap = &i2c_bus->i2c_adap,
541 .i2c_addr = 0x61,
07b4a835
MK		 542 };
543 static struct xc2028_ctrl ctl = {
ef80bfeb 544 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 545 .max_len = 64,
52c3d29c 546 .demod = XC3028_FE_OREN538,
07b4a835
MK		 547 };
548
549 fe = dvb_attach(xc2028_attach,
363c35fc 550 fe0->dvb.frontend, &cfg);
07b4a835
MK		 551 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
552 fe->ops.tuner_ops.set_config(fe, &ctl);
553 }
554 break;
b3ea0166 555 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 556 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 557 i2c_bus = &dev->i2c_bus[0];
363c35fc 558 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 559 &hauppauge_hvr1200_config,
560 &i2c_bus->i2c_adap);
363c35fc
ST		 561 if (fe0->dvb.frontend != NULL) {
562 dvb_attach(tda829x_attach, fe0->dvb.frontend,
b3ea0166
ST		 563 &dev->i2c_bus[1].i2c_adap, 0x42,
564 &tda829x_no_probe);
363c35fc 565 dvb_attach(tda18271_attach, fe0->dvb.frontend,
b3ea0166
ST		 566 0x60, &dev->i2c_bus[1].i2c_adap,
567 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 568 }
569 break;
570 case CX23885_BOARD_HAUPPAUGE_HVR1210:
571 i2c_bus = &dev->i2c_bus[0];
572 fe0->dvb.frontend = dvb_attach(tda10048_attach,
573 &hauppauge_hvr1210_config,
574 &i2c_bus->i2c_adap);
575 if (fe0->dvb.frontend != NULL) {
576 dvb_attach(tda18271_attach, fe0->dvb.frontend,
577 0x60, &dev->i2c_bus[1].i2c_adap,
578 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 579 }
580 break;
66762373
ST		 581 case CX23885_BOARD_HAUPPAUGE_HVR1400:
582 i2c_bus = &dev->i2c_bus[0];
363c35fc 583 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
66762373
ST		 584 &i2c_bus->i2c_adap,
585 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 586 if (fe0->dvb.frontend != NULL) {
66762373
ST		 587 struct dvb_frontend *fe;
588 struct xc2028_config cfg = {
589 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
590 .i2c_addr = 0x64,
66762373
ST		 591 };
592 static struct xc2028_ctrl ctl = {
ef80bfeb 593 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373
ST		 594 .max_len = 64,
595 .demod = 5000,
9c8ced51
ST		 596 /* This is true for all demods with
597 v36 firmware? */
0975fc68 598 .type = XC2028_D2633,
66762373
ST		 599 };
600
601 fe = dvb_attach(xc2028_attach,
363c35fc 602 fe0->dvb.frontend, &cfg);
66762373
ST		 603 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
604 fe->ops.tuner_ops.set_config(fe, &ctl);
605 }
606 break;
335377b7
MK		 607 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
608 i2c_bus = &dev->i2c_bus[port->nr - 1];
609
363c35fc 610 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 611 &dvico_s5h1409_config,
612 &i2c_bus->i2c_adap);
363c35fc
ST		 613 if (fe0->dvb.frontend == NULL)
614 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 615 &dvico_s5h1411_config,
616 &i2c_bus->i2c_adap);
363c35fc
ST		 617 if (fe0->dvb.frontend != NULL)
618 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 619 &i2c_bus->i2c_adap,
620 &dvico_xc5000_tunerconfig);
335377b7 621 break;
aef2d186
ST		 622 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
623 i2c_bus = &dev->i2c_bus[port->nr - 1];
624
363c35fc 625 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 626 &dvico_fusionhdtv_xc3028,
627 &i2c_bus->i2c_adap);
363c35fc 628 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 629 struct dvb_frontend *fe;
630 struct xc2028_config cfg = {
631 .i2c_adap = &i2c_bus->i2c_adap,
632 .i2c_addr = 0x61,
aef2d186
ST		 633 };
634 static struct xc2028_ctrl ctl = {
ef80bfeb 635 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 636 .max_len = 64,
637 .demod = XC3028_FE_ZARLINK456,
638 };
639
363c35fc 640 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 641 &cfg);
642 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
643 fe->ops.tuner_ops.set_config(fe, &ctl);
644 }
645 break;
646 }
4c56b04a 647 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 648 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
4c56b04a
ST		 649 i2c_bus = &dev->i2c_bus[0];
650
363c35fc 651 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 652 &dvico_fusionhdtv_xc3028,
653 &i2c_bus->i2c_adap);
363c35fc 654 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 655 struct dvb_frontend *fe;
656 struct xc2028_config cfg = {
657 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
658 .i2c_addr = 0x61,
4c56b04a
ST		 659 };
660 static struct xc2028_ctrl ctl = {
ef80bfeb 661 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 662 .max_len = 64,
663 .demod = XC3028_FE_ZARLINK456,
664 };
665
363c35fc 666 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 667 &cfg);
668 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
669 fe->ops.tuner_ops.set_config(fe, &ctl);
670 }
96318d0c
IL		 671 break;
672 case CX23885_BOARD_TBS_6920:
673 i2c_bus = &dev->i2c_bus[0];
674
675 fe0->dvb.frontend = dvb_attach(cx24116_attach,
676 &tbs_cx24116_config,
677 &i2c_bus->i2c_adap);
678 if (fe0->dvb.frontend != NULL)
679 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
680
579943f5
IL		 681 break;
682 case CX23885_BOARD_TEVII_S470:
683 i2c_bus = &dev->i2c_bus[1];
684
685 fe0->dvb.frontend = dvb_attach(cx24116_attach,
686 &tevii_cx24116_config,
687 &i2c_bus->i2c_adap);
688 if (fe0->dvb.frontend != NULL)
689 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
690
4c56b04a 691 break;
c9b8b04b
IL		 692 case CX23885_BOARD_DVBWORLD_2005:
693 i2c_bus = &dev->i2c_bus[1];
694
695 fe0->dvb.frontend = dvb_attach(cx24116_attach,
696 &dvbworld_cx24116_config,
697 &i2c_bus->i2c_adap);
698 break;
5a23b076
IL		 699 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
700 i2c_bus = &dev->i2c_bus[0];
701 switch (port->nr) {
702 /* port B */
703 case 1:
704 fe0->dvb.frontend = dvb_attach(stv0900_attach,
705 &netup_stv0900_config,
706 &i2c_bus->i2c_adap, 0);
707 if (fe0->dvb.frontend != NULL) {
708 if (dvb_attach(stv6110_attach,
709 fe0->dvb.frontend,
710 &netup_stv6110_tunerconfig_a,
711 &i2c_bus->i2c_adap)) {
712 if (!dvb_attach(lnbh24_attach,
713 fe0->dvb.frontend,
714 &i2c_bus->i2c_adap,
715 LNBH24_PCL, 0, 0x09))
716 printk(KERN_ERR
717 "No LNBH24 found!\n");
718
719 }
720 }
721 break;
722 /* port C */
723 case 2:
724 fe0->dvb.frontend = dvb_attach(stv0900_attach,
725 &netup_stv0900_config,
726 &i2c_bus->i2c_adap, 1);
727 if (fe0->dvb.frontend != NULL) {
728 if (dvb_attach(stv6110_attach,
729 fe0->dvb.frontend,
730 &netup_stv6110_tunerconfig_b,
731 &i2c_bus->i2c_adap)) {
732 if (!dvb_attach(lnbh24_attach,
733 fe0->dvb.frontend,
734 &i2c_bus->i2c_adap,
735 LNBH24_PCL, 0, 0x0a))
736 printk(KERN_ERR
737 "No LNBH24 found!\n");
738
739 }
740 }
741 break;
742 }
743 break;
d19770e5 744 default:
9c8ced51
ST		 745 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
746 " isn't supported yet\n",
d19770e5
ST		 747 dev->name);
748 break;
749 }
363c35fc 750 if (NULL == fe0->dvb.frontend) {
9c8ced51
ST		 751 printk(KERN_ERR "%s: frontend initialization failed\n",
752 dev->name);
d19770e5
ST		 753 return -1;
754 }
d7cba043 755 /* define general-purpose callback pointer */
363c35fc 756 fe0->dvb.frontend->callback = cx23885_tuner_callback;
d19770e5
ST		 757
758 /* Put the analog decoder in standby to keep it quiet */
7c9fc9d5 759 call_all(dev, tuner, s_standby);
d19770e5 760
363c35fc
ST		 761 if (fe0->dvb.frontend->ops.analog_ops.standby)
762 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 763
d19770e5 764 /* register everything */
5a23b076 765 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
59b1842d 766 &dev->pci->dev, adapter_nr, 0);
363c35fc 767
5a23b076
IL		 768 /* init CI & MAC */
769 switch (dev->board) {
770 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
771 static struct netup_card_info cinfo;
772
773 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
774 memcpy(port->frontends.adapter.proposed_mac,
775 cinfo.port[port->nr - 1].mac, 6);
776 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
777 "%02X:%02X:%02X:%02X:%02X:%02X\n",
778 port->nr,
779 port->frontends.adapter.proposed_mac[0],
780 port->frontends.adapter.proposed_mac[1],
781 port->frontends.adapter.proposed_mac[2],
782 port->frontends.adapter.proposed_mac[3],
783 port->frontends.adapter.proposed_mac[4],
784 port->frontends.adapter.proposed_mac[5]);
785
786 netup_ci_init(port);
787 break;
788 }
789 }
790
791 return ret;
d19770e5
ST		 792}
793
794int cx23885_dvb_register(struct cx23885_tsport *port)
795{
363c35fc
ST		 796
797 struct videobuf_dvb_frontend *fe0;
d19770e5 798 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 799 int err, i;
800
801 /* Here we need to allocate the correct number of frontends,
802 * as reflected in the cards struct. The reality is that currrently
803 * no cx23885 boards support this - yet. But, if we don't modify this
804 * code then the second frontend would never be allocated (later)
805 * and fail with error before the attach in dvb_register().
806 * Without these changes we risk an OOPS later. The changes here
807 * are for safety, and should provide a good foundation for the
808 * future addition of any multi-frontend cx23885 based boards.
809 */
810 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
811 port->num_frontends);
d19770e5 812
eb0c58bb 813 for (i = 1; i <= port->num_frontends; i++) {
96b7a1a8 814 if (videobuf_dvb_alloc_frontend(
9c8ced51 815 &port->frontends, i) == NULL) {
eb0c58bb
ST		 816 printk(KERN_ERR "%s() failed to alloc\n", __func__);
817 return -ENOMEM;
818 }
819
820 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
821 if (!fe0)
822 err = -EINVAL;
363c35fc 823
eb0c58bb 824 dprintk(1, "%s\n", __func__);
9c8ced51 825 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 826 dev->board,
827 dev->name,
828 dev->pci_bus,
829 dev->pci_slot);
d19770e5 830
eb0c58bb 831 err = -ENODEV;
d19770e5 832
eb0c58bb
ST		 833 /* dvb stuff */
834 /* We have to init the queue for each frontend on a port. */
9c8ced51
ST		 835 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
836 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
837 &dev->pci->dev, &port->slock,
44a6481d
MK		 838 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
839 sizeof(struct cx23885_buffer), port);
eb0c58bb 840 }
d19770e5
ST		 841 err = dvb_register(port);
842 if (err != 0)
9c8ced51
ST		 843 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
844 __func__, err);
d19770e5 845
d19770e5
ST		 846 return err;
847}
848
849int cx23885_dvb_unregister(struct cx23885_tsport *port)
850{
363c35fc
ST		 851 struct videobuf_dvb_frontend *fe0;
852
eb0c58bb
ST		 853 /* FIXME: in an error condition where the we have
854 * an expected number of frontends (attach problem)
855 * then this might not clean up correctly, if 1
856 * is invalid.
857 * This comment only applies to future boards IF they
858 * implement MFE support.
859 */
92abe9ee 860 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
9c8ced51 861 if (fe0->dvb.frontend)
363c35fc 862 videobuf_dvb_unregister_bus(&port->frontends);
d19770e5 863
afd96668
HV		 864 switch (port->dev->board) {
865 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
866 netup_ci_exit(port);
867 break;
868 }
5a23b076 869
d19770e5
ST		 870 return 0;
871}
44a6481d 872
Linux kernel - Deliverables
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