Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
4 | * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/fs.h> | |
26 | #include <linux/kthread.h> | |
27 | #include <linux/file.h> | |
28 | #include <linux/suspend.h> | |
29 | ||
30 | #include "cx23885.h" | |
d19770e5 ST |
31 | #include <media/v4l2-common.h> |
32 | ||
33 | #include "s5h1409.h" | |
34 | #include "mt2131.h" | |
3ba71d21 | 35 | #include "tda8290.h" |
4041f1a5 | 36 | #include "tda18271.h" |
9bc37caa | 37 | #include "lgdt330x.h" |
d1987d55 | 38 | #include "xc5000.h" |
b3ea0166 | 39 | #include "tda10048.h" |
9bc37caa | 40 | #include "dvb-pll.h" |
07b4a835 | 41 | #include "tuner-xc2028.h" |
827855d3 | 42 | #include "tuner-simple.h" |
66762373 ST |
43 | #include "dib7000p.h" |
44 | #include "dibx000_common.h" | |
d19770e5 | 45 | |
4513fc69 | 46 | static unsigned int debug; |
d19770e5 | 47 | |
4513fc69 ST |
48 | #define dprintk(level, fmt, arg...)\ |
49 | do { if (debug >= level)\ | |
50 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
51 | } while (0) | |
d19770e5 ST |
52 | |
53 | /* ------------------------------------------------------------------ */ | |
54 | ||
3ba71d21 MK |
55 | static unsigned int alt_tuner; |
56 | module_param(alt_tuner, int, 0644); | |
57 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
58 | ||
78e92006 JG |
59 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
60 | ||
3ba71d21 MK |
61 | /* ------------------------------------------------------------------ */ |
62 | ||
d19770e5 ST |
63 | static int dvb_buf_setup(struct videobuf_queue *q, |
64 | unsigned int *count, unsigned int *size) | |
65 | { | |
66 | struct cx23885_tsport *port = q->priv_data; | |
67 | ||
68 | port->ts_packet_size = 188 * 4; | |
69 | port->ts_packet_count = 32; | |
70 | ||
71 | *size = port->ts_packet_size * port->ts_packet_count; | |
72 | *count = 32; | |
73 | return 0; | |
74 | } | |
75 | ||
44a6481d MK |
76 | static int dvb_buf_prepare(struct videobuf_queue *q, |
77 | struct videobuf_buffer *vb, enum v4l2_field field) | |
d19770e5 ST |
78 | { |
79 | struct cx23885_tsport *port = q->priv_data; | |
44a6481d | 80 | return cx23885_buf_prepare(q, port, (struct cx23885_buffer*)vb, field); |
d19770e5 ST |
81 | } |
82 | ||
83 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
84 | { | |
85 | struct cx23885_tsport *port = q->priv_data; | |
86 | cx23885_buf_queue(port, (struct cx23885_buffer*)vb); | |
87 | } | |
88 | ||
44a6481d MK |
89 | static void dvb_buf_release(struct videobuf_queue *q, |
90 | struct videobuf_buffer *vb) | |
d19770e5 ST |
91 | { |
92 | cx23885_free_buffer(q, (struct cx23885_buffer*)vb); | |
93 | } | |
94 | ||
95 | static struct videobuf_queue_ops dvb_qops = { | |
96 | .buf_setup = dvb_buf_setup, | |
97 | .buf_prepare = dvb_buf_prepare, | |
98 | .buf_queue = dvb_buf_queue, | |
99 | .buf_release = dvb_buf_release, | |
100 | }; | |
101 | ||
86184e06 | 102 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
103 | .demod_address = 0x32 >> 1, |
104 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
105 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 106 | .qam_if = 44000, |
fc959bef | 107 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
108 | .status_mode = S5H1409_DEMODLOCKING, |
109 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
110 | }; |
111 | ||
b3ea0166 ST |
112 | static struct tda10048_config hauppauge_hvr1200_config = { |
113 | .demod_address = 0x10 >> 1, | |
114 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
115 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
116 | .inversion = TDA10048_INVERSION_ON | |
117 | }; | |
118 | ||
3ba71d21 MK |
119 | static struct s5h1409_config hauppauge_ezqam_config = { |
120 | .demod_address = 0x32 >> 1, | |
121 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
122 | .gpio = S5H1409_GPIO_OFF, | |
123 | .qam_if = 4000, | |
124 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
125 | .status_mode = S5H1409_DEMODLOCKING, |
126 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
127 | }; |
128 | ||
fc959bef | 129 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
130 | .demod_address = 0x32 >> 1, |
131 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
132 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 133 | .qam_if = 44000, |
fe475163 | 134 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
135 | .status_mode = S5H1409_DEMODLOCKING, |
136 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
137 | }; |
138 | ||
07b4a835 MK |
139 | static struct s5h1409_config hauppauge_hvr1500_config = { |
140 | .demod_address = 0x32 >> 1, | |
141 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
142 | .gpio = S5H1409_GPIO_OFF, | |
143 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
144 | .status_mode = S5H1409_DEMODLOCKING, |
145 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
146 | }; |
147 | ||
86184e06 | 148 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
149 | 0x61 |
150 | }; | |
151 | ||
9bc37caa MK |
152 | static struct lgdt330x_config fusionhdtv_5_express = { |
153 | .demod_address = 0x0e, | |
154 | .demod_chip = LGDT3303, | |
155 | .serial_mpeg = 0x40, | |
156 | }; | |
157 | ||
d1987d55 ST |
158 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
159 | .demod_address = 0x32 >> 1, | |
160 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
161 | .gpio = S5H1409_GPIO_ON, | |
162 | .qam_if = 44000, | |
163 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
164 | .status_mode = S5H1409_DEMODLOCKING, |
165 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
166 | }; |
167 | ||
168 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { | |
e12671cf ST |
169 | .i2c_address = 0x61, |
170 | .if_khz = 5380, | |
8c70017f | 171 | .tuner_callback = cx23885_tuner_callback |
d1987d55 ST |
172 | }; |
173 | ||
4041f1a5 MK |
174 | static struct tda829x_config tda829x_no_probe = { |
175 | .probe_tuner = TDA829X_DONT_PROBE, | |
176 | }; | |
177 | ||
f21e0d7f | 178 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
179 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
180 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
181 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
182 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
183 | }; |
184 | ||
185 | static struct tda18271_config hauppauge_tda18271_config = { | |
186 | .std_map = &hauppauge_tda18271_std_map, | |
187 | .gate = TDA18271_GATE_ANALOG, | |
188 | }; | |
189 | ||
b3ea0166 ST |
190 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
191 | .gate = TDA18271_GATE_ANALOG, | |
192 | }; | |
193 | ||
66762373 ST |
194 | struct dibx000_agc_config xc3028_agc_config = { |
195 | BAND_VHF | BAND_UHF, /* band_caps */ | |
196 | ||
197 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
198 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
199 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
200 | * P_agc_nb_est=2, P_agc_write=0 | |
201 | */ | |
202 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
203 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
204 | ||
205 | 712, /* inv_gain */ | |
206 | 21, /* time_stabiliz */ | |
207 | ||
208 | 0, /* alpha_level */ | |
209 | 118, /* thlock */ | |
210 | ||
211 | 0, /* wbd_inv */ | |
212 | 2867, /* wbd_ref */ | |
213 | 0, /* wbd_sel */ | |
214 | 2, /* wbd_alpha */ | |
215 | ||
216 | 0, /* agc1_max */ | |
217 | 0, /* agc1_min */ | |
218 | 39718, /* agc2_max */ | |
219 | 9930, /* agc2_min */ | |
220 | 0, /* agc1_pt1 */ | |
221 | 0, /* agc1_pt2 */ | |
222 | 0, /* agc1_pt3 */ | |
223 | 0, /* agc1_slope1 */ | |
224 | 0, /* agc1_slope2 */ | |
225 | 0, /* agc2_pt1 */ | |
226 | 128, /* agc2_pt2 */ | |
227 | 29, /* agc2_slope1 */ | |
228 | 29, /* agc2_slope2 */ | |
229 | ||
230 | 17, /* alpha_mant */ | |
231 | 27, /* alpha_exp */ | |
232 | 23, /* beta_mant */ | |
233 | 51, /* beta_exp */ | |
234 | ||
235 | 1, /* perform_agc_softsplit */ | |
236 | }; | |
237 | ||
238 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
239 | * With external clock = 30.000000 */ | |
240 | struct dibx000_bandwidth_config xc3028_bw_config = { | |
241 | 60000, /* internal */ | |
242 | 30000, /* sampling */ | |
243 | 1, /* pll_cfg: prediv */ | |
244 | 8, /* pll_cfg: ratio */ | |
245 | 3, /* pll_cfg: range */ | |
246 | 1, /* pll_cfg: reset */ | |
247 | 0, /* pll_cfg: bypass */ | |
248 | 0, /* misc: refdiv */ | |
249 | 0, /* misc: bypclk_div */ | |
250 | 1, /* misc: IO_CLK_en_core */ | |
251 | 1, /* misc: ADClkSrc */ | |
252 | 0, /* misc: modulo */ | |
253 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
254 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
255 | 20452225, /* timf */ | |
256 | 30000000 /* xtal_hz */ | |
257 | }; | |
258 | ||
259 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
260 | .output_mpeg2_in_188_bytes = 1, | |
261 | .hostbus_diversity = 1, | |
262 | .tuner_is_baseband = 0, | |
263 | .update_lna = NULL, | |
264 | ||
265 | .agc_config_count = 1, | |
266 | .agc = &xc3028_agc_config, | |
267 | .bw = &xc3028_bw_config, | |
268 | ||
269 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
270 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
271 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
272 | ||
273 | .pwm_freq_div = 0, | |
274 | .agc_control = NULL, | |
275 | .spur_protect = 0, | |
276 | ||
277 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
278 | }; | |
279 | ||
07b4a835 MK |
280 | static int cx23885_hvr1500_xc3028_callback(void *ptr, int command, int arg) |
281 | { | |
282 | struct cx23885_tsport *port = ptr; | |
283 | struct cx23885_dev *dev = port->dev; | |
284 | ||
285 | switch (command) { | |
286 | case XC2028_TUNER_RESET: | |
287 | /* Send the tuner in then out of reset */ | |
288 | /* GPIO-2 xc3028 tuner */ | |
22b4e64f | 289 | dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg); |
07b4a835 MK |
290 | |
291 | cx_set(GP0_IO, 0x00040000); | |
292 | cx_clear(GP0_IO, 0x00000004); | |
293 | msleep(5); | |
294 | ||
295 | cx_set(GP0_IO, 0x00040004); | |
296 | msleep(5); | |
297 | break; | |
298 | case XC2028_RESET_CLK: | |
22b4e64f | 299 | dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg); |
07b4a835 MK |
300 | break; |
301 | default: | |
22b4e64f | 302 | dprintk(1, "%s: unknown command %d, arg %d\n", __func__, |
07b4a835 MK |
303 | command, arg); |
304 | return -EINVAL; | |
305 | } | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
d19770e5 ST |
310 | static int dvb_register(struct cx23885_tsport *port) |
311 | { | |
312 | struct cx23885_dev *dev = port->dev; | |
f139fa71 | 313 | struct cx23885_i2c *i2c_bus = NULL; |
d19770e5 ST |
314 | |
315 | /* init struct videobuf_dvb */ | |
316 | port->dvb.name = dev->name; | |
317 | ||
318 | /* init frontend */ | |
319 | switch (dev->board) { | |
a77743bc | 320 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 321 | i2c_bus = &dev->i2c_bus[0]; |
d19770e5 | 322 | port->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 323 | &hauppauge_generic_config, |
f139fa71 | 324 | &i2c_bus->i2c_adap); |
d19770e5 | 325 | if (port->dvb.frontend != NULL) { |
44a6481d | 326 | dvb_attach(mt2131_attach, port->dvb.frontend, |
f139fa71 | 327 | &i2c_bus->i2c_adap, |
86184e06 | 328 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
329 | } |
330 | break; | |
3ba71d21 MK |
331 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
332 | i2c_bus = &dev->i2c_bus[0]; | |
333 | switch (alt_tuner) { | |
334 | case 1: | |
335 | port->dvb.frontend = | |
336 | dvb_attach(s5h1409_attach, | |
337 | &hauppauge_ezqam_config, | |
338 | &i2c_bus->i2c_adap); | |
339 | if (port->dvb.frontend != NULL) { | |
340 | dvb_attach(tda829x_attach, port->dvb.frontend, | |
341 | &dev->i2c_bus[1].i2c_adap, 0x42, | |
4041f1a5 MK |
342 | &tda829x_no_probe); |
343 | dvb_attach(tda18271_attach, port->dvb.frontend, | |
344 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
f21e0d7f | 345 | &hauppauge_tda18271_config); |
3ba71d21 MK |
346 | } |
347 | break; | |
348 | case 0: | |
349 | default: | |
350 | port->dvb.frontend = | |
351 | dvb_attach(s5h1409_attach, | |
352 | &hauppauge_generic_config, | |
353 | &i2c_bus->i2c_adap); | |
354 | if (port->dvb.frontend != NULL) | |
355 | dvb_attach(mt2131_attach, port->dvb.frontend, | |
356 | &i2c_bus->i2c_adap, | |
357 | &hauppauge_generic_tunerconfig, 0); | |
358 | break; | |
359 | } | |
360 | break; | |
fc959bef | 361 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 362 | i2c_bus = &dev->i2c_bus[0]; |
fc959bef ST |
363 | port->dvb.frontend = dvb_attach(s5h1409_attach, |
364 | &hauppauge_hvr1800lp_config, | |
f139fa71 | 365 | &i2c_bus->i2c_adap); |
fc959bef ST |
366 | if (port->dvb.frontend != NULL) { |
367 | dvb_attach(mt2131_attach, port->dvb.frontend, | |
f139fa71 | 368 | &i2c_bus->i2c_adap, |
fc959bef ST |
369 | &hauppauge_generic_tunerconfig, 0); |
370 | } | |
371 | break; | |
9bc37caa | 372 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 373 | i2c_bus = &dev->i2c_bus[0]; |
9bc37caa MK |
374 | port->dvb.frontend = dvb_attach(lgdt330x_attach, |
375 | &fusionhdtv_5_express, | |
f139fa71 | 376 | &i2c_bus->i2c_adap); |
9bc37caa | 377 | if (port->dvb.frontend != NULL) { |
827855d3 MK |
378 | dvb_attach(simple_tuner_attach, port->dvb.frontend, |
379 | &i2c_bus->i2c_adap, 0x61, | |
380 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
381 | } |
382 | break; | |
d1987d55 ST |
383 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
384 | i2c_bus = &dev->i2c_bus[1]; | |
385 | port->dvb.frontend = dvb_attach(s5h1409_attach, | |
386 | &hauppauge_hvr1500q_config, | |
387 | &dev->i2c_bus[0].i2c_adap); | |
388 | if (port->dvb.frontend != NULL) { | |
73c993a8 | 389 | hauppauge_hvr1500q_tunerconfig.priv = i2c_bus; |
d1987d55 ST |
390 | dvb_attach(xc5000_attach, port->dvb.frontend, |
391 | &i2c_bus->i2c_adap, | |
392 | &hauppauge_hvr1500q_tunerconfig); | |
393 | } | |
394 | break; | |
07b4a835 MK |
395 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
396 | i2c_bus = &dev->i2c_bus[1]; | |
397 | port->dvb.frontend = dvb_attach(s5h1409_attach, | |
398 | &hauppauge_hvr1500_config, | |
399 | &dev->i2c_bus[0].i2c_adap); | |
400 | if (port->dvb.frontend != NULL) { | |
401 | struct dvb_frontend *fe; | |
402 | struct xc2028_config cfg = { | |
403 | .i2c_adap = &i2c_bus->i2c_adap, | |
404 | .i2c_addr = 0x61, | |
07b4a835 MK |
405 | .callback = cx23885_hvr1500_xc3028_callback, |
406 | }; | |
407 | static struct xc2028_ctrl ctl = { | |
408 | .fname = "xc3028-v27.fw", | |
409 | .max_len = 64, | |
33e53161 | 410 | .scode_table = XC3028_FE_OREN538, |
07b4a835 MK |
411 | }; |
412 | ||
413 | fe = dvb_attach(xc2028_attach, | |
414 | port->dvb.frontend, &cfg); | |
415 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
416 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
417 | } | |
418 | break; | |
b3ea0166 | 419 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 420 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 ST |
421 | i2c_bus = &dev->i2c_bus[0]; |
422 | port->dvb.frontend = dvb_attach(tda10048_attach, | |
423 | &hauppauge_hvr1200_config, | |
424 | &i2c_bus->i2c_adap); | |
425 | if (port->dvb.frontend != NULL) { | |
426 | dvb_attach(tda829x_attach, port->dvb.frontend, | |
427 | &dev->i2c_bus[1].i2c_adap, 0x42, | |
428 | &tda829x_no_probe); | |
429 | dvb_attach(tda18271_attach, port->dvb.frontend, | |
430 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
431 | &hauppauge_hvr1200_tuner_config); | |
432 | } | |
433 | break; | |
66762373 ST |
434 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
435 | i2c_bus = &dev->i2c_bus[0]; | |
436 | port->dvb.frontend = dvb_attach(dib7000p_attach, | |
437 | &i2c_bus->i2c_adap, | |
438 | 0x12, &hauppauge_hvr1400_dib7000_config); | |
439 | if (port->dvb.frontend != NULL) { | |
440 | struct dvb_frontend *fe; | |
441 | struct xc2028_config cfg = { | |
442 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
443 | .i2c_addr = 0x64, | |
444 | .callback = cx23885_hvr1500_xc3028_callback, | |
445 | }; | |
446 | static struct xc2028_ctrl ctl = { | |
447 | .fname = "xc3028L-v36.fw", | |
448 | .max_len = 64, | |
449 | .demod = 5000, | |
450 | .d2633 = 1 | |
451 | }; | |
452 | ||
453 | fe = dvb_attach(xc2028_attach, | |
454 | port->dvb.frontend, &cfg); | |
455 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
456 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
457 | } | |
458 | break; | |
d19770e5 ST |
459 | default: |
460 | printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", | |
461 | dev->name); | |
462 | break; | |
463 | } | |
464 | if (NULL == port->dvb.frontend) { | |
465 | printk("%s: frontend initialization failed\n", dev->name); | |
466 | return -1; | |
467 | } | |
468 | ||
469 | /* Put the analog decoder in standby to keep it quiet */ | |
f139fa71 | 470 | cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL); |
d19770e5 | 471 | |
3ba71d21 MK |
472 | if (port->dvb.frontend->ops.analog_ops.standby) |
473 | port->dvb.frontend->ops.analog_ops.standby(port->dvb.frontend); | |
474 | ||
d19770e5 | 475 | /* register everything */ |
44a6481d | 476 | return videobuf_dvb_register(&port->dvb, THIS_MODULE, port, |
78e92006 | 477 | &dev->pci->dev, adapter_nr); |
d19770e5 ST |
478 | } |
479 | ||
480 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
481 | { | |
482 | struct cx23885_dev *dev = port->dev; | |
483 | int err; | |
484 | ||
22b4e64f | 485 | dprintk(1, "%s\n", __func__); |
44a6481d | 486 | dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", |
d19770e5 ST |
487 | dev->board, |
488 | dev->name, | |
489 | dev->pci_bus, | |
490 | dev->pci_slot); | |
491 | ||
492 | err = -ENODEV; | |
d19770e5 ST |
493 | |
494 | /* dvb stuff */ | |
495 | printk("%s: cx23885 based dvb card\n", dev->name); | |
0705135e | 496 | videobuf_queue_sg_init(&port->dvb.dvbq, &dvb_qops, &dev->pci->dev, &port->slock, |
44a6481d MK |
497 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, |
498 | sizeof(struct cx23885_buffer), port); | |
d19770e5 ST |
499 | err = dvb_register(port); |
500 | if (err != 0) | |
22b4e64f | 501 | printk("%s() dvb_register failed err = %d\n", __func__, err); |
d19770e5 | 502 | |
d19770e5 ST |
503 | return err; |
504 | } | |
505 | ||
506 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
507 | { | |
508 | /* dvb */ | |
509 | if(port->dvb.frontend) | |
510 | videobuf_dvb_unregister(&port->dvb); | |
511 | ||
512 | return 0; | |
513 | } | |
44a6481d MK |
514 | |
515 | /* | |
516 | * Local variables: | |
517 | * c-basic-offset: 8 | |
518 | * End: | |
519 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off | |
520 | */ |