Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/fs.h> | |
26 | #include <linux/kthread.h> | |
27 | #include <linux/file.h> | |
28 | #include <linux/suspend.h> | |
29 | ||
30 | #include "cx23885.h" | |
d19770e5 ST |
31 | #include <media/v4l2-common.h> |
32 | ||
33 | #include "s5h1409.h" | |
52b50450 | 34 | #include "s5h1411.h" |
d19770e5 | 35 | #include "mt2131.h" |
3ba71d21 | 36 | #include "tda8290.h" |
4041f1a5 | 37 | #include "tda18271.h" |
9bc37caa | 38 | #include "lgdt330x.h" |
d1987d55 | 39 | #include "xc5000.h" |
b3ea0166 | 40 | #include "tda10048.h" |
07b4a835 | 41 | #include "tuner-xc2028.h" |
827855d3 | 42 | #include "tuner-simple.h" |
66762373 ST |
43 | #include "dib7000p.h" |
44 | #include "dibx000_common.h" | |
aef2d186 | 45 | #include "zl10353.h" |
d19770e5 | 46 | |
4513fc69 | 47 | static unsigned int debug; |
d19770e5 | 48 | |
4513fc69 ST |
49 | #define dprintk(level, fmt, arg...)\ |
50 | do { if (debug >= level)\ | |
51 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
52 | } while (0) | |
d19770e5 ST |
53 | |
54 | /* ------------------------------------------------------------------ */ | |
55 | ||
3ba71d21 MK |
56 | static unsigned int alt_tuner; |
57 | module_param(alt_tuner, int, 0644); | |
58 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
59 | ||
78e92006 JG |
60 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
61 | ||
3ba71d21 MK |
62 | /* ------------------------------------------------------------------ */ |
63 | ||
d19770e5 ST |
64 | static int dvb_buf_setup(struct videobuf_queue *q, |
65 | unsigned int *count, unsigned int *size) | |
66 | { | |
67 | struct cx23885_tsport *port = q->priv_data; | |
68 | ||
69 | port->ts_packet_size = 188 * 4; | |
70 | port->ts_packet_count = 32; | |
71 | ||
72 | *size = port->ts_packet_size * port->ts_packet_count; | |
73 | *count = 32; | |
74 | return 0; | |
75 | } | |
76 | ||
44a6481d MK |
77 | static int dvb_buf_prepare(struct videobuf_queue *q, |
78 | struct videobuf_buffer *vb, enum v4l2_field field) | |
d19770e5 ST |
79 | { |
80 | struct cx23885_tsport *port = q->priv_data; | |
44a6481d | 81 | return cx23885_buf_prepare(q, port, (struct cx23885_buffer*)vb, field); |
d19770e5 ST |
82 | } |
83 | ||
84 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
85 | { | |
86 | struct cx23885_tsport *port = q->priv_data; | |
87 | cx23885_buf_queue(port, (struct cx23885_buffer*)vb); | |
88 | } | |
89 | ||
44a6481d MK |
90 | static void dvb_buf_release(struct videobuf_queue *q, |
91 | struct videobuf_buffer *vb) | |
d19770e5 ST |
92 | { |
93 | cx23885_free_buffer(q, (struct cx23885_buffer*)vb); | |
94 | } | |
95 | ||
96 | static struct videobuf_queue_ops dvb_qops = { | |
97 | .buf_setup = dvb_buf_setup, | |
98 | .buf_prepare = dvb_buf_prepare, | |
99 | .buf_queue = dvb_buf_queue, | |
100 | .buf_release = dvb_buf_release, | |
101 | }; | |
102 | ||
86184e06 | 103 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
104 | .demod_address = 0x32 >> 1, |
105 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
106 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 107 | .qam_if = 44000, |
fc959bef | 108 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
109 | .status_mode = S5H1409_DEMODLOCKING, |
110 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
111 | }; |
112 | ||
b3ea0166 ST |
113 | static struct tda10048_config hauppauge_hvr1200_config = { |
114 | .demod_address = 0x10 >> 1, | |
115 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
116 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
117 | .inversion = TDA10048_INVERSION_ON | |
118 | }; | |
119 | ||
3ba71d21 MK |
120 | static struct s5h1409_config hauppauge_ezqam_config = { |
121 | .demod_address = 0x32 >> 1, | |
122 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
123 | .gpio = S5H1409_GPIO_OFF, | |
124 | .qam_if = 4000, | |
125 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
126 | .status_mode = S5H1409_DEMODLOCKING, |
127 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
128 | }; |
129 | ||
fc959bef | 130 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
131 | .demod_address = 0x32 >> 1, |
132 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
133 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 134 | .qam_if = 44000, |
fe475163 | 135 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
136 | .status_mode = S5H1409_DEMODLOCKING, |
137 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
138 | }; |
139 | ||
07b4a835 MK |
140 | static struct s5h1409_config hauppauge_hvr1500_config = { |
141 | .demod_address = 0x32 >> 1, | |
142 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
143 | .gpio = S5H1409_GPIO_OFF, | |
144 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
145 | .status_mode = S5H1409_DEMODLOCKING, |
146 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
147 | }; |
148 | ||
86184e06 | 149 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
150 | 0x61 |
151 | }; | |
152 | ||
9bc37caa MK |
153 | static struct lgdt330x_config fusionhdtv_5_express = { |
154 | .demod_address = 0x0e, | |
155 | .demod_chip = LGDT3303, | |
156 | .serial_mpeg = 0x40, | |
157 | }; | |
158 | ||
d1987d55 ST |
159 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
160 | .demod_address = 0x32 >> 1, | |
161 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
162 | .gpio = S5H1409_GPIO_ON, | |
163 | .qam_if = 44000, | |
164 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
165 | .status_mode = S5H1409_DEMODLOCKING, |
166 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
167 | }; |
168 | ||
335377b7 MK |
169 | static struct s5h1409_config dvico_s5h1409_config = { |
170 | .demod_address = 0x32 >> 1, | |
171 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
172 | .gpio = S5H1409_GPIO_ON, | |
173 | .qam_if = 44000, | |
174 | .inversion = S5H1409_INVERSION_OFF, | |
175 | .status_mode = S5H1409_DEMODLOCKING, | |
176 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
177 | }; | |
178 | ||
52b50450 MK |
179 | static struct s5h1411_config dvico_s5h1411_config = { |
180 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
181 | .gpio = S5H1411_GPIO_ON, | |
182 | .qam_if = S5H1411_IF_44000, | |
183 | .vsb_if = S5H1411_IF_44000, | |
184 | .inversion = S5H1411_INVERSION_OFF, | |
185 | .status_mode = S5H1411_DEMODLOCKING, | |
186 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
187 | }; | |
188 | ||
d1987d55 | 189 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
190 | .i2c_address = 0x61, |
191 | .if_khz = 5380, | |
d1987d55 ST |
192 | }; |
193 | ||
335377b7 MK |
194 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
195 | .i2c_address = 0x64, | |
196 | .if_khz = 5380, | |
335377b7 MK |
197 | }; |
198 | ||
4041f1a5 MK |
199 | static struct tda829x_config tda829x_no_probe = { |
200 | .probe_tuner = TDA829X_DONT_PROBE, | |
201 | }; | |
202 | ||
f21e0d7f | 203 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
204 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
205 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
206 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
207 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
208 | }; |
209 | ||
210 | static struct tda18271_config hauppauge_tda18271_config = { | |
211 | .std_map = &hauppauge_tda18271_std_map, | |
212 | .gate = TDA18271_GATE_ANALOG, | |
213 | }; | |
214 | ||
b3ea0166 ST |
215 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
216 | .gate = TDA18271_GATE_ANALOG, | |
217 | }; | |
218 | ||
b1721d0d | 219 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
220 | BAND_VHF | BAND_UHF, /* band_caps */ |
221 | ||
222 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
223 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
224 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
225 | * P_agc_nb_est=2, P_agc_write=0 | |
226 | */ | |
227 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
228 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
229 | ||
230 | 712, /* inv_gain */ | |
231 | 21, /* time_stabiliz */ | |
232 | ||
233 | 0, /* alpha_level */ | |
234 | 118, /* thlock */ | |
235 | ||
236 | 0, /* wbd_inv */ | |
237 | 2867, /* wbd_ref */ | |
238 | 0, /* wbd_sel */ | |
239 | 2, /* wbd_alpha */ | |
240 | ||
241 | 0, /* agc1_max */ | |
242 | 0, /* agc1_min */ | |
243 | 39718, /* agc2_max */ | |
244 | 9930, /* agc2_min */ | |
245 | 0, /* agc1_pt1 */ | |
246 | 0, /* agc1_pt2 */ | |
247 | 0, /* agc1_pt3 */ | |
248 | 0, /* agc1_slope1 */ | |
249 | 0, /* agc1_slope2 */ | |
250 | 0, /* agc2_pt1 */ | |
251 | 128, /* agc2_pt2 */ | |
252 | 29, /* agc2_slope1 */ | |
253 | 29, /* agc2_slope2 */ | |
254 | ||
255 | 17, /* alpha_mant */ | |
256 | 27, /* alpha_exp */ | |
257 | 23, /* beta_mant */ | |
258 | 51, /* beta_exp */ | |
259 | ||
260 | 1, /* perform_agc_softsplit */ | |
261 | }; | |
262 | ||
263 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
264 | * With external clock = 30.000000 */ | |
b1721d0d | 265 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
266 | 60000, /* internal */ |
267 | 30000, /* sampling */ | |
268 | 1, /* pll_cfg: prediv */ | |
269 | 8, /* pll_cfg: ratio */ | |
270 | 3, /* pll_cfg: range */ | |
271 | 1, /* pll_cfg: reset */ | |
272 | 0, /* pll_cfg: bypass */ | |
273 | 0, /* misc: refdiv */ | |
274 | 0, /* misc: bypclk_div */ | |
275 | 1, /* misc: IO_CLK_en_core */ | |
276 | 1, /* misc: ADClkSrc */ | |
277 | 0, /* misc: modulo */ | |
278 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
279 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
280 | 20452225, /* timf */ | |
281 | 30000000 /* xtal_hz */ | |
282 | }; | |
283 | ||
284 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
285 | .output_mpeg2_in_188_bytes = 1, | |
286 | .hostbus_diversity = 1, | |
287 | .tuner_is_baseband = 0, | |
288 | .update_lna = NULL, | |
289 | ||
290 | .agc_config_count = 1, | |
291 | .agc = &xc3028_agc_config, | |
292 | .bw = &xc3028_bw_config, | |
293 | ||
294 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
295 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
296 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
297 | ||
298 | .pwm_freq_div = 0, | |
299 | .agc_control = NULL, | |
300 | .spur_protect = 0, | |
301 | ||
302 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
303 | }; | |
304 | ||
aef2d186 ST |
305 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
306 | .demod_address = 0x0f, | |
307 | .if2 = 45600, | |
308 | .no_tuner = 1, | |
309 | }; | |
310 | ||
d19770e5 ST |
311 | static int dvb_register(struct cx23885_tsport *port) |
312 | { | |
313 | struct cx23885_dev *dev = port->dev; | |
f139fa71 | 314 | struct cx23885_i2c *i2c_bus = NULL; |
363c35fc ST |
315 | struct videobuf_dvb_frontend *fe0; |
316 | ||
f972e0bd DB |
317 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); |
318 | ||
319 | if (videobuf_dvb_alloc_frontend(dev, &port->frontends, 1) == NULL) { | |
320 | printk(KERN_ERR "%s() failed to alloc\n", __func__); | |
321 | return -ENOMEM; | |
322 | } | |
323 | ||
324 | /* Get the first frontend */ | |
92abe9ee | 325 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
326 | if (!fe0) |
327 | return -EINVAL; | |
d19770e5 ST |
328 | |
329 | /* init struct videobuf_dvb */ | |
363c35fc | 330 | fe0->dvb.name = dev->name; |
d19770e5 ST |
331 | |
332 | /* init frontend */ | |
333 | switch (dev->board) { | |
a77743bc | 334 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 335 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 336 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 337 | &hauppauge_generic_config, |
f139fa71 | 338 | &i2c_bus->i2c_adap); |
363c35fc ST |
339 | if (fe0->dvb.frontend != NULL) { |
340 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 341 | &i2c_bus->i2c_adap, |
86184e06 | 342 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
343 | } |
344 | break; | |
3ba71d21 MK |
345 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
346 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 347 | switch (alt_tuner) { |
3ba71d21 | 348 | case 1: |
363c35fc | 349 | fe0->dvb.frontend = |
3ba71d21 MK |
350 | dvb_attach(s5h1409_attach, |
351 | &hauppauge_ezqam_config, | |
352 | &i2c_bus->i2c_adap); | |
363c35fc ST |
353 | if (fe0->dvb.frontend != NULL) { |
354 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 355 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 356 | &tda829x_no_probe); |
363c35fc | 357 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 358 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 359 | &hauppauge_tda18271_config); |
3ba71d21 MK |
360 | } |
361 | break; | |
362 | case 0: | |
363 | default: | |
363c35fc | 364 | fe0->dvb.frontend = |
3ba71d21 MK |
365 | dvb_attach(s5h1409_attach, |
366 | &hauppauge_generic_config, | |
367 | &i2c_bus->i2c_adap); | |
363c35fc ST |
368 | if (fe0->dvb.frontend != NULL) |
369 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
370 | &i2c_bus->i2c_adap, |
371 | &hauppauge_generic_tunerconfig, 0); | |
372 | break; | |
373 | } | |
374 | break; | |
fc959bef | 375 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 376 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 377 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 378 | &hauppauge_hvr1800lp_config, |
f139fa71 | 379 | &i2c_bus->i2c_adap); |
363c35fc ST |
380 | if (fe0->dvb.frontend != NULL) { |
381 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 382 | &i2c_bus->i2c_adap, |
fc959bef ST |
383 | &hauppauge_generic_tunerconfig, 0); |
384 | } | |
385 | break; | |
9bc37caa | 386 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 387 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 388 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 389 | &fusionhdtv_5_express, |
f139fa71 | 390 | &i2c_bus->i2c_adap); |
363c35fc ST |
391 | if (fe0->dvb.frontend != NULL) { |
392 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
393 | &i2c_bus->i2c_adap, 0x61, |
394 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
395 | } |
396 | break; | |
d1987d55 ST |
397 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
398 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 399 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
400 | &hauppauge_hvr1500q_config, |
401 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
402 | if (fe0->dvb.frontend != NULL) |
403 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
404 | &i2c_bus->i2c_adap, |
405 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 406 | break; |
07b4a835 MK |
407 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
408 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 409 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
410 | &hauppauge_hvr1500_config, |
411 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 412 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
413 | struct dvb_frontend *fe; |
414 | struct xc2028_config cfg = { | |
415 | .i2c_adap = &i2c_bus->i2c_adap, | |
416 | .i2c_addr = 0x61, | |
07b4a835 MK |
417 | }; |
418 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 419 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 420 | .max_len = 64, |
33e53161 | 421 | .scode_table = XC3028_FE_OREN538, |
07b4a835 MK |
422 | }; |
423 | ||
424 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 425 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
426 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
427 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
428 | } | |
429 | break; | |
b3ea0166 | 430 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 431 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 432 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 433 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
434 | &hauppauge_hvr1200_config, |
435 | &i2c_bus->i2c_adap); | |
363c35fc ST |
436 | if (fe0->dvb.frontend != NULL) { |
437 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
438 | &dev->i2c_bus[1].i2c_adap, 0x42, |
439 | &tda829x_no_probe); | |
363c35fc | 440 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
441 | 0x60, &dev->i2c_bus[1].i2c_adap, |
442 | &hauppauge_hvr1200_tuner_config); | |
443 | } | |
444 | break; | |
66762373 ST |
445 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
446 | i2c_bus = &dev->i2c_bus[0]; | |
363c35fc | 447 | fe0->dvb.frontend = dvb_attach(dib7000p_attach, |
66762373 ST |
448 | &i2c_bus->i2c_adap, |
449 | 0x12, &hauppauge_hvr1400_dib7000_config); | |
363c35fc | 450 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
451 | struct dvb_frontend *fe; |
452 | struct xc2028_config cfg = { | |
453 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
454 | .i2c_addr = 0x64, | |
66762373 ST |
455 | }; |
456 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 457 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 ST |
458 | .max_len = 64, |
459 | .demod = 5000, | |
0975fc68 MCC |
460 | /* This is true for all demods with v36 firmware? */ |
461 | .type = XC2028_D2633, | |
66762373 ST |
462 | }; |
463 | ||
464 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 465 | fe0->dvb.frontend, &cfg); |
66762373 ST |
466 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
467 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
468 | } | |
469 | break; | |
335377b7 MK |
470 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
471 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
472 | ||
363c35fc | 473 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
474 | &dvico_s5h1409_config, |
475 | &i2c_bus->i2c_adap); | |
363c35fc ST |
476 | if (fe0->dvb.frontend == NULL) |
477 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
478 | &dvico_s5h1411_config, |
479 | &i2c_bus->i2c_adap); | |
363c35fc ST |
480 | if (fe0->dvb.frontend != NULL) |
481 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
482 | &i2c_bus->i2c_adap, |
483 | &dvico_xc5000_tunerconfig); | |
335377b7 | 484 | break; |
aef2d186 ST |
485 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
486 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
487 | ||
363c35fc | 488 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
489 | &dvico_fusionhdtv_xc3028, |
490 | &i2c_bus->i2c_adap); | |
363c35fc | 491 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
492 | struct dvb_frontend *fe; |
493 | struct xc2028_config cfg = { | |
494 | .i2c_adap = &i2c_bus->i2c_adap, | |
495 | .i2c_addr = 0x61, | |
aef2d186 ST |
496 | }; |
497 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 498 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
499 | .max_len = 64, |
500 | .demod = XC3028_FE_ZARLINK456, | |
501 | }; | |
502 | ||
363c35fc | 503 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
504 | &cfg); |
505 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
506 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
507 | } | |
508 | break; | |
509 | } | |
4c56b04a ST |
510 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
511 | i2c_bus = &dev->i2c_bus[0]; | |
512 | ||
363c35fc | 513 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
514 | &dvico_fusionhdtv_xc3028, |
515 | &i2c_bus->i2c_adap); | |
363c35fc | 516 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
517 | struct dvb_frontend *fe; |
518 | struct xc2028_config cfg = { | |
519 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
520 | .i2c_addr = 0x61, | |
4c56b04a ST |
521 | }; |
522 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 523 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
524 | .max_len = 64, |
525 | .demod = XC3028_FE_ZARLINK456, | |
526 | }; | |
527 | ||
363c35fc | 528 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
529 | &cfg); |
530 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
531 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
532 | } | |
533 | break; | |
d19770e5 ST |
534 | default: |
535 | printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", | |
536 | dev->name); | |
537 | break; | |
538 | } | |
363c35fc | 539 | if (NULL == fe0->dvb.frontend) { |
d19770e5 ST |
540 | printk("%s: frontend initialization failed\n", dev->name); |
541 | return -1; | |
542 | } | |
d7cba043 | 543 | /* define general-purpose callback pointer */ |
363c35fc | 544 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
d19770e5 ST |
545 | |
546 | /* Put the analog decoder in standby to keep it quiet */ | |
f139fa71 | 547 | cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL); |
d19770e5 | 548 | |
363c35fc ST |
549 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
550 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 551 | |
d19770e5 | 552 | /* register everything */ |
363c35fc | 553 | return videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
59b1842d | 554 | &dev->pci->dev, adapter_nr, 0); |
363c35fc | 555 | |
d19770e5 ST |
556 | } |
557 | ||
558 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
559 | { | |
363c35fc ST |
560 | |
561 | struct videobuf_dvb_frontend *fe0; | |
d19770e5 ST |
562 | struct cx23885_dev *dev = port->dev; |
563 | int err; | |
564 | ||
92abe9ee | 565 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
566 | if (!fe0) |
567 | err = -EINVAL; | |
568 | ||
22b4e64f | 569 | dprintk(1, "%s\n", __func__); |
44a6481d | 570 | dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", |
d19770e5 ST |
571 | dev->board, |
572 | dev->name, | |
573 | dev->pci_bus, | |
574 | dev->pci_slot); | |
575 | ||
576 | err = -ENODEV; | |
d19770e5 ST |
577 | |
578 | /* dvb stuff */ | |
579 | printk("%s: cx23885 based dvb card\n", dev->name); | |
363c35fc | 580 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, &dev->pci->dev, &port->slock, |
44a6481d MK |
581 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, |
582 | sizeof(struct cx23885_buffer), port); | |
d19770e5 ST |
583 | err = dvb_register(port); |
584 | if (err != 0) | |
22b4e64f | 585 | printk("%s() dvb_register failed err = %d\n", __func__, err); |
d19770e5 | 586 | |
d19770e5 ST |
587 | return err; |
588 | } | |
589 | ||
590 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
591 | { | |
363c35fc ST |
592 | struct videobuf_dvb_frontend *fe0; |
593 | ||
92abe9ee | 594 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
d19770e5 | 595 | /* dvb */ |
363c35fc ST |
596 | if(fe0->dvb.frontend) |
597 | videobuf_dvb_unregister_bus(&port->frontends); | |
d19770e5 ST |
598 | |
599 | return 0; | |
600 | } | |
44a6481d MK |
601 | |
602 | /* | |
603 | * Local variables: | |
604 | * c-basic-offset: 8 | |
605 | * End: | |
606 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off | |
607 | */ |