Commit | Line | Data |
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d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/fs.h> | |
26 | #include <linux/kthread.h> | |
27 | #include <linux/file.h> | |
28 | #include <linux/suspend.h> | |
29 | ||
30 | #include "cx23885.h" | |
d19770e5 ST |
31 | #include <media/v4l2-common.h> |
32 | ||
5a23b076 | 33 | #include "dvb_ca_en50221.h" |
d19770e5 | 34 | #include "s5h1409.h" |
52b50450 | 35 | #include "s5h1411.h" |
d19770e5 | 36 | #include "mt2131.h" |
3ba71d21 | 37 | #include "tda8290.h" |
4041f1a5 | 38 | #include "tda18271.h" |
9bc37caa | 39 | #include "lgdt330x.h" |
d1987d55 | 40 | #include "xc5000.h" |
ea5697fe | 41 | #include "max2165.h" |
b3ea0166 | 42 | #include "tda10048.h" |
07b4a835 | 43 | #include "tuner-xc2028.h" |
827855d3 | 44 | #include "tuner-simple.h" |
66762373 ST |
45 | #include "dib7000p.h" |
46 | #include "dibx000_common.h" | |
aef2d186 | 47 | #include "zl10353.h" |
5a23b076 | 48 | #include "stv0900.h" |
f867c3f4 | 49 | #include "stv0900_reg.h" |
5a23b076 IL |
50 | #include "stv6110.h" |
51 | #include "lnbh24.h" | |
96318d0c | 52 | #include "cx24116.h" |
5a23b076 | 53 | #include "cimax2.h" |
493b7127 | 54 | #include "lgs8gxx.h" |
5a23b076 IL |
55 | #include "netup-eeprom.h" |
56 | #include "netup-init.h" | |
a5dbf457 | 57 | #include "lgdt3305.h" |
ea5697fe | 58 | #include "atbm8830.h" |
09ea33e5 IL |
59 | #include "ds3000.h" |
60 | #include "cx23885-f300.h" | |
d19770e5 | 61 | |
4513fc69 | 62 | static unsigned int debug; |
d19770e5 | 63 | |
4513fc69 ST |
64 | #define dprintk(level, fmt, arg...)\ |
65 | do { if (debug >= level)\ | |
66 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
67 | } while (0) | |
d19770e5 ST |
68 | |
69 | /* ------------------------------------------------------------------ */ | |
70 | ||
3ba71d21 MK |
71 | static unsigned int alt_tuner; |
72 | module_param(alt_tuner, int, 0644); | |
73 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
74 | ||
78e92006 JG |
75 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
76 | ||
3ba71d21 MK |
77 | /* ------------------------------------------------------------------ */ |
78 | ||
d19770e5 ST |
79 | static int dvb_buf_setup(struct videobuf_queue *q, |
80 | unsigned int *count, unsigned int *size) | |
81 | { | |
82 | struct cx23885_tsport *port = q->priv_data; | |
83 | ||
84 | port->ts_packet_size = 188 * 4; | |
85 | port->ts_packet_count = 32; | |
86 | ||
87 | *size = port->ts_packet_size * port->ts_packet_count; | |
88 | *count = 32; | |
89 | return 0; | |
90 | } | |
91 | ||
44a6481d MK |
92 | static int dvb_buf_prepare(struct videobuf_queue *q, |
93 | struct videobuf_buffer *vb, enum v4l2_field field) | |
d19770e5 ST |
94 | { |
95 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 96 | return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field); |
d19770e5 ST |
97 | } |
98 | ||
99 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
100 | { | |
101 | struct cx23885_tsport *port = q->priv_data; | |
9c8ced51 | 102 | cx23885_buf_queue(port, (struct cx23885_buffer *)vb); |
d19770e5 ST |
103 | } |
104 | ||
44a6481d MK |
105 | static void dvb_buf_release(struct videobuf_queue *q, |
106 | struct videobuf_buffer *vb) | |
d19770e5 | 107 | { |
9c8ced51 | 108 | cx23885_free_buffer(q, (struct cx23885_buffer *)vb); |
d19770e5 ST |
109 | } |
110 | ||
111 | static struct videobuf_queue_ops dvb_qops = { | |
112 | .buf_setup = dvb_buf_setup, | |
113 | .buf_prepare = dvb_buf_prepare, | |
114 | .buf_queue = dvb_buf_queue, | |
115 | .buf_release = dvb_buf_release, | |
116 | }; | |
117 | ||
86184e06 | 118 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
119 | .demod_address = 0x32 >> 1, |
120 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
121 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 122 | .qam_if = 44000, |
fc959bef | 123 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
124 | .status_mode = S5H1409_DEMODLOCKING, |
125 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
126 | }; |
127 | ||
b3ea0166 ST |
128 | static struct tda10048_config hauppauge_hvr1200_config = { |
129 | .demod_address = 0x10 >> 1, | |
130 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
131 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
484d9e05 | 132 | .inversion = TDA10048_INVERSION_ON, |
8816bef5 ST |
133 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
134 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
135 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
484d9e05 | 136 | .clk_freq_khz = TDA10048_CLK_16000, |
b3ea0166 ST |
137 | }; |
138 | ||
6b926eca MK |
139 | static struct tda10048_config hauppauge_hvr1210_config = { |
140 | .demod_address = 0x10 >> 1, | |
141 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
142 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
143 | .inversion = TDA10048_INVERSION_ON, | |
c27586e4 MK |
144 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
145 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
146 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
6b926eca MK |
147 | .clk_freq_khz = TDA10048_CLK_16000, |
148 | }; | |
149 | ||
3ba71d21 MK |
150 | static struct s5h1409_config hauppauge_ezqam_config = { |
151 | .demod_address = 0x32 >> 1, | |
152 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
153 | .gpio = S5H1409_GPIO_OFF, | |
154 | .qam_if = 4000, | |
155 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
156 | .status_mode = S5H1409_DEMODLOCKING, |
157 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
158 | }; |
159 | ||
fc959bef | 160 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
161 | .demod_address = 0x32 >> 1, |
162 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
163 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 164 | .qam_if = 44000, |
fe475163 | 165 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
166 | .status_mode = S5H1409_DEMODLOCKING, |
167 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
168 | }; |
169 | ||
07b4a835 MK |
170 | static struct s5h1409_config hauppauge_hvr1500_config = { |
171 | .demod_address = 0x32 >> 1, | |
172 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
173 | .gpio = S5H1409_GPIO_OFF, | |
174 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
175 | .status_mode = S5H1409_DEMODLOCKING, |
176 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
177 | }; |
178 | ||
86184e06 | 179 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
180 | 0x61 |
181 | }; | |
182 | ||
9bc37caa MK |
183 | static struct lgdt330x_config fusionhdtv_5_express = { |
184 | .demod_address = 0x0e, | |
185 | .demod_chip = LGDT3303, | |
186 | .serial_mpeg = 0x40, | |
187 | }; | |
188 | ||
d1987d55 ST |
189 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
190 | .demod_address = 0x32 >> 1, | |
191 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
192 | .gpio = S5H1409_GPIO_ON, | |
193 | .qam_if = 44000, | |
194 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
195 | .status_mode = S5H1409_DEMODLOCKING, |
196 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
197 | }; |
198 | ||
335377b7 MK |
199 | static struct s5h1409_config dvico_s5h1409_config = { |
200 | .demod_address = 0x32 >> 1, | |
201 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
202 | .gpio = S5H1409_GPIO_ON, | |
203 | .qam_if = 44000, | |
204 | .inversion = S5H1409_INVERSION_OFF, | |
205 | .status_mode = S5H1409_DEMODLOCKING, | |
206 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
207 | }; | |
208 | ||
52b50450 MK |
209 | static struct s5h1411_config dvico_s5h1411_config = { |
210 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
211 | .gpio = S5H1411_GPIO_ON, | |
212 | .qam_if = S5H1411_IF_44000, | |
213 | .vsb_if = S5H1411_IF_44000, | |
214 | .inversion = S5H1411_INVERSION_OFF, | |
215 | .status_mode = S5H1411_DEMODLOCKING, | |
216 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
217 | }; | |
218 | ||
19bc5796 MK |
219 | static struct s5h1411_config hcw_s5h1411_config = { |
220 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
221 | .gpio = S5H1411_GPIO_OFF, | |
222 | .vsb_if = S5H1411_IF_44000, | |
223 | .qam_if = S5H1411_IF_4000, | |
224 | .inversion = S5H1411_INVERSION_ON, | |
225 | .status_mode = S5H1411_DEMODLOCKING, | |
226 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
227 | }; | |
228 | ||
d1987d55 | 229 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
230 | .i2c_address = 0x61, |
231 | .if_khz = 5380, | |
d1987d55 ST |
232 | }; |
233 | ||
335377b7 MK |
234 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
235 | .i2c_address = 0x64, | |
236 | .if_khz = 5380, | |
335377b7 MK |
237 | }; |
238 | ||
4041f1a5 MK |
239 | static struct tda829x_config tda829x_no_probe = { |
240 | .probe_tuner = TDA829X_DONT_PROBE, | |
241 | }; | |
242 | ||
f21e0d7f | 243 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
244 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
245 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
246 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
247 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
248 | }; |
249 | ||
b34cdc36 MK |
250 | static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = { |
251 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
252 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
253 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
254 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
255 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
256 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
257 | }; | |
258 | ||
f21e0d7f MK |
259 | static struct tda18271_config hauppauge_tda18271_config = { |
260 | .std_map = &hauppauge_tda18271_std_map, | |
261 | .gate = TDA18271_GATE_ANALOG, | |
04a68baa | 262 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
f21e0d7f MK |
263 | }; |
264 | ||
b3ea0166 | 265 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
b34cdc36 | 266 | .std_map = &hauppauge_hvr1200_tda18271_std_map, |
b3ea0166 | 267 | .gate = TDA18271_GATE_ANALOG, |
04a68baa | 268 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
b3ea0166 ST |
269 | }; |
270 | ||
6b926eca MK |
271 | static struct tda18271_config hauppauge_hvr1210_tuner_config = { |
272 | .gate = TDA18271_GATE_DIGITAL, | |
04a68baa | 273 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
6b926eca MK |
274 | }; |
275 | ||
247bc540 | 276 | static struct tda18271_std_map hauppauge_hvr127x_std_map = { |
a5dbf457 MK |
277 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, |
278 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
279 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
280 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
281 | }; | |
282 | ||
247bc540 MK |
283 | static struct tda18271_config hauppauge_hvr127x_config = { |
284 | .std_map = &hauppauge_hvr127x_std_map, | |
04a68baa | 285 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
a5dbf457 MK |
286 | }; |
287 | ||
247bc540 | 288 | static struct lgdt3305_config hauppauge_lgdt3305_config = { |
a5dbf457 MK |
289 | .i2c_addr = 0x0e, |
290 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
291 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
292 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
293 | .deny_i2c_rptr = 1, | |
294 | .spectral_inversion = 1, | |
295 | .qam_if_khz = 4000, | |
296 | .vsb_if_khz = 3250, | |
297 | }; | |
298 | ||
b1721d0d | 299 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
300 | BAND_VHF | BAND_UHF, /* band_caps */ |
301 | ||
302 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
303 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
304 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
305 | * P_agc_nb_est=2, P_agc_write=0 | |
306 | */ | |
307 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
308 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
309 | ||
310 | 712, /* inv_gain */ | |
311 | 21, /* time_stabiliz */ | |
312 | ||
313 | 0, /* alpha_level */ | |
314 | 118, /* thlock */ | |
315 | ||
316 | 0, /* wbd_inv */ | |
317 | 2867, /* wbd_ref */ | |
318 | 0, /* wbd_sel */ | |
319 | 2, /* wbd_alpha */ | |
320 | ||
321 | 0, /* agc1_max */ | |
322 | 0, /* agc1_min */ | |
323 | 39718, /* agc2_max */ | |
324 | 9930, /* agc2_min */ | |
325 | 0, /* agc1_pt1 */ | |
326 | 0, /* agc1_pt2 */ | |
327 | 0, /* agc1_pt3 */ | |
328 | 0, /* agc1_slope1 */ | |
329 | 0, /* agc1_slope2 */ | |
330 | 0, /* agc2_pt1 */ | |
331 | 128, /* agc2_pt2 */ | |
332 | 29, /* agc2_slope1 */ | |
333 | 29, /* agc2_slope2 */ | |
334 | ||
335 | 17, /* alpha_mant */ | |
336 | 27, /* alpha_exp */ | |
337 | 23, /* beta_mant */ | |
338 | 51, /* beta_exp */ | |
339 | ||
340 | 1, /* perform_agc_softsplit */ | |
341 | }; | |
342 | ||
343 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
344 | * With external clock = 30.000000 */ | |
b1721d0d | 345 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
346 | 60000, /* internal */ |
347 | 30000, /* sampling */ | |
348 | 1, /* pll_cfg: prediv */ | |
349 | 8, /* pll_cfg: ratio */ | |
350 | 3, /* pll_cfg: range */ | |
351 | 1, /* pll_cfg: reset */ | |
352 | 0, /* pll_cfg: bypass */ | |
353 | 0, /* misc: refdiv */ | |
354 | 0, /* misc: bypclk_div */ | |
355 | 1, /* misc: IO_CLK_en_core */ | |
356 | 1, /* misc: ADClkSrc */ | |
357 | 0, /* misc: modulo */ | |
358 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
359 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
360 | 20452225, /* timf */ | |
361 | 30000000 /* xtal_hz */ | |
362 | }; | |
363 | ||
364 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
365 | .output_mpeg2_in_188_bytes = 1, | |
366 | .hostbus_diversity = 1, | |
367 | .tuner_is_baseband = 0, | |
368 | .update_lna = NULL, | |
369 | ||
370 | .agc_config_count = 1, | |
371 | .agc = &xc3028_agc_config, | |
372 | .bw = &xc3028_bw_config, | |
373 | ||
374 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
375 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
376 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
377 | ||
378 | .pwm_freq_div = 0, | |
379 | .agc_control = NULL, | |
380 | .spur_protect = 0, | |
381 | ||
382 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
383 | }; | |
384 | ||
aef2d186 ST |
385 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
386 | .demod_address = 0x0f, | |
387 | .if2 = 45600, | |
388 | .no_tuner = 1, | |
d4dc673d | 389 | .disable_i2c_gate_ctrl = 1, |
aef2d186 ST |
390 | }; |
391 | ||
f867c3f4 IL |
392 | static struct stv0900_reg stv0900_ts_regs[] = { |
393 | { R0900_TSGENERAL, 0x00 }, | |
394 | { R0900_P1_TSSPEED, 0x40 }, | |
395 | { R0900_P2_TSSPEED, 0x40 }, | |
396 | { R0900_P1_TSCFGM, 0xc0 }, | |
397 | { R0900_P2_TSCFGM, 0xc0 }, | |
398 | { R0900_P1_TSCFGH, 0xe0 }, | |
399 | { R0900_P2_TSCFGH, 0xe0 }, | |
400 | { R0900_P1_TSCFGL, 0x20 }, | |
401 | { R0900_P2_TSCFGL, 0x20 }, | |
402 | { 0xffff, 0xff }, /* terminate */ | |
403 | }; | |
404 | ||
5a23b076 IL |
405 | static struct stv0900_config netup_stv0900_config = { |
406 | .demod_address = 0x68, | |
29372a8d | 407 | .demod_mode = 1, /* dual */ |
644c7ef0 | 408 | .xtal = 8000000, |
5a23b076 IL |
409 | .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ |
410 | .diseqc_mode = 2,/* 2/3 PWM */ | |
f867c3f4 | 411 | .ts_config_regs = stv0900_ts_regs, |
5a23b076 IL |
412 | .tun1_maddress = 0,/* 0x60 */ |
413 | .tun2_maddress = 3,/* 0x63 */ | |
414 | .tun1_adc = 1,/* 1 Vpp */ | |
415 | .tun2_adc = 1,/* 1 Vpp */ | |
416 | }; | |
417 | ||
418 | static struct stv6110_config netup_stv6110_tunerconfig_a = { | |
419 | .i2c_address = 0x60, | |
644c7ef0 AO |
420 | .mclk = 16000000, |
421 | .clk_div = 1, | |
873688cd | 422 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
423 | }; |
424 | ||
425 | static struct stv6110_config netup_stv6110_tunerconfig_b = { | |
426 | .i2c_address = 0x63, | |
644c7ef0 AO |
427 | .mclk = 16000000, |
428 | .clk_div = 1, | |
873688cd | 429 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
430 | }; |
431 | ||
96318d0c | 432 | static struct cx24116_config tbs_cx24116_config = { |
09ea33e5 | 433 | .demod_address = 0x55, |
96318d0c IL |
434 | }; |
435 | ||
09ea33e5 IL |
436 | static struct ds3000_config tevii_ds3000_config = { |
437 | .demod_address = 0x68, | |
579943f5 IL |
438 | }; |
439 | ||
c9b8b04b IL |
440 | static struct cx24116_config dvbworld_cx24116_config = { |
441 | .demod_address = 0x05, | |
442 | }; | |
443 | ||
493b7127 DW |
444 | static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = { |
445 | .prod = LGS8GXX_PROD_LGS8GL5, | |
446 | .demod_address = 0x19, | |
447 | .serial_ts = 0, | |
448 | .ts_clk_pol = 1, | |
449 | .ts_clk_gated = 1, | |
450 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
451 | .if_freq = 5380, /* 5.38 MHz */ | |
452 | .if_neg_center = 1, | |
453 | .ext_adc = 0, | |
454 | .adc_signed = 0, | |
455 | .if_neg_edge = 0, | |
456 | }; | |
457 | ||
458 | static struct xc5000_config mygica_x8506_xc5000_config = { | |
459 | .i2c_address = 0x61, | |
460 | .if_khz = 5380, | |
461 | }; | |
462 | ||
f35b9e80 MK |
463 | static int cx23885_dvb_set_frontend(struct dvb_frontend *fe, |
464 | struct dvb_frontend_parameters *param) | |
465 | { | |
466 | struct cx23885_tsport *port = fe->dvb->priv; | |
467 | struct cx23885_dev *dev = port->dev; | |
468 | ||
469 | switch (dev->board) { | |
470 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | |
471 | switch (param->u.vsb.modulation) { | |
472 | case VSB_8: | |
473 | cx23885_gpio_clear(dev, GPIO_5); | |
474 | break; | |
475 | case QAM_64: | |
476 | case QAM_256: | |
477 | default: | |
478 | cx23885_gpio_set(dev, GPIO_5); | |
479 | break; | |
480 | } | |
481 | break; | |
6f0d8c02 DW |
482 | case CX23885_BOARD_MYGICA_X8506: |
483 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: | |
484 | /* Select Digital TV */ | |
485 | cx23885_gpio_set(dev, GPIO_0); | |
486 | break; | |
f35b9e80 | 487 | } |
5bdd3962 | 488 | return 0; |
f35b9e80 MK |
489 | } |
490 | ||
5bdd3962 MK |
491 | static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe, |
492 | unsigned int cmd, void *parg, | |
493 | unsigned int stage) | |
494 | { | |
495 | int err = 0; | |
496 | ||
497 | switch (stage) { | |
498 | case DVB_FE_IOCTL_PRE: | |
499 | ||
500 | switch (cmd) { | |
501 | case FE_SET_FRONTEND: | |
502 | err = cx23885_dvb_set_frontend(fe, | |
503 | (struct dvb_frontend_parameters *) parg); | |
504 | break; | |
505 | } | |
506 | break; | |
507 | ||
508 | case DVB_FE_IOCTL_POST: | |
509 | /* no post-ioctl handling required */ | |
510 | break; | |
511 | } | |
512 | return err; | |
513 | }; | |
514 | ||
515 | ||
2365b2d3 DW |
516 | static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { |
517 | .prod = LGS8GXX_PROD_LGS8G75, | |
518 | .demod_address = 0x19, | |
519 | .serial_ts = 0, | |
520 | .ts_clk_pol = 1, | |
521 | .ts_clk_gated = 1, | |
522 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
523 | .if_freq = 6500, /* 6.50 MHz */ | |
524 | .if_neg_center = 1, | |
525 | .ext_adc = 0, | |
526 | .adc_signed = 1, | |
527 | .adc_vpp = 2, /* 1.6 Vpp */ | |
528 | .if_neg_edge = 1, | |
529 | }; | |
530 | ||
531 | static struct xc5000_config magicpro_prohdtve2_xc5000_config = { | |
532 | .i2c_address = 0x61, | |
533 | .if_khz = 6500, | |
534 | }; | |
535 | ||
ea5697fe DW |
536 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = { |
537 | .prod = ATBM8830_PROD_8830, | |
538 | .demod_address = 0x44, | |
539 | .serial_ts = 0, | |
540 | .ts_sampling_edge = 1, | |
541 | .ts_clk_gated = 0, | |
542 | .osc_clk_freq = 30400, /* in kHz */ | |
543 | .if_freq = 0, /* zero IF */ | |
544 | .zif_swap_iq = 1, | |
c245c75c DW |
545 | .agc_min = 0x2E, |
546 | .agc_max = 0xFF, | |
547 | .agc_hold_loop = 0, | |
ea5697fe DW |
548 | }; |
549 | ||
550 | static struct max2165_config mygic_x8558pro_max2165_cfg1 = { | |
551 | .i2c_address = 0x60, | |
552 | .osc_clk = 20 | |
553 | }; | |
554 | ||
555 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = { | |
556 | .prod = ATBM8830_PROD_8830, | |
557 | .demod_address = 0x44, | |
558 | .serial_ts = 1, | |
559 | .ts_sampling_edge = 1, | |
560 | .ts_clk_gated = 0, | |
561 | .osc_clk_freq = 30400, /* in kHz */ | |
562 | .if_freq = 0, /* zero IF */ | |
563 | .zif_swap_iq = 1, | |
c245c75c DW |
564 | .agc_min = 0x2E, |
565 | .agc_max = 0xFF, | |
566 | .agc_hold_loop = 0, | |
ea5697fe DW |
567 | }; |
568 | ||
569 | static struct max2165_config mygic_x8558pro_max2165_cfg2 = { | |
570 | .i2c_address = 0x60, | |
571 | .osc_clk = 20 | |
572 | }; | |
573 | ||
d19770e5 ST |
574 | static int dvb_register(struct cx23885_tsport *port) |
575 | { | |
576 | struct cx23885_dev *dev = port->dev; | |
493b7127 | 577 | struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; |
363c35fc | 578 | struct videobuf_dvb_frontend *fe0; |
5a23b076 | 579 | int ret; |
363c35fc | 580 | |
f972e0bd | 581 | /* Get the first frontend */ |
92abe9ee | 582 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
583 | if (!fe0) |
584 | return -EINVAL; | |
d19770e5 ST |
585 | |
586 | /* init struct videobuf_dvb */ | |
363c35fc | 587 | fe0->dvb.name = dev->name; |
d19770e5 ST |
588 | |
589 | /* init frontend */ | |
590 | switch (dev->board) { | |
a77743bc | 591 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 592 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 593 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 594 | &hauppauge_generic_config, |
f139fa71 | 595 | &i2c_bus->i2c_adap); |
363c35fc ST |
596 | if (fe0->dvb.frontend != NULL) { |
597 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 598 | &i2c_bus->i2c_adap, |
86184e06 | 599 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
600 | } |
601 | break; | |
a5dbf457 | 602 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 603 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
a5dbf457 MK |
604 | i2c_bus = &dev->i2c_bus[0]; |
605 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, | |
247bc540 | 606 | &hauppauge_lgdt3305_config, |
a5dbf457 MK |
607 | &i2c_bus->i2c_adap); |
608 | if (fe0->dvb.frontend != NULL) { | |
609 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
610 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
247bc540 | 611 | &hauppauge_hvr127x_config); |
a5dbf457 MK |
612 | } |
613 | break; | |
19bc5796 MK |
614 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
615 | i2c_bus = &dev->i2c_bus[0]; | |
616 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
617 | &hcw_s5h1411_config, | |
618 | &i2c_bus->i2c_adap); | |
619 | if (fe0->dvb.frontend != NULL) { | |
620 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
621 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
622 | &hauppauge_tda18271_config); | |
623 | } | |
624 | break; | |
3ba71d21 MK |
625 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
626 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 627 | switch (alt_tuner) { |
3ba71d21 | 628 | case 1: |
363c35fc | 629 | fe0->dvb.frontend = |
3ba71d21 MK |
630 | dvb_attach(s5h1409_attach, |
631 | &hauppauge_ezqam_config, | |
632 | &i2c_bus->i2c_adap); | |
363c35fc ST |
633 | if (fe0->dvb.frontend != NULL) { |
634 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 635 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 636 | &tda829x_no_probe); |
363c35fc | 637 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 638 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 639 | &hauppauge_tda18271_config); |
3ba71d21 MK |
640 | } |
641 | break; | |
642 | case 0: | |
643 | default: | |
363c35fc | 644 | fe0->dvb.frontend = |
3ba71d21 MK |
645 | dvb_attach(s5h1409_attach, |
646 | &hauppauge_generic_config, | |
647 | &i2c_bus->i2c_adap); | |
363c35fc ST |
648 | if (fe0->dvb.frontend != NULL) |
649 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
650 | &i2c_bus->i2c_adap, |
651 | &hauppauge_generic_tunerconfig, 0); | |
652 | break; | |
653 | } | |
654 | break; | |
fc959bef | 655 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 656 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 657 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 658 | &hauppauge_hvr1800lp_config, |
f139fa71 | 659 | &i2c_bus->i2c_adap); |
363c35fc ST |
660 | if (fe0->dvb.frontend != NULL) { |
661 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 662 | &i2c_bus->i2c_adap, |
fc959bef ST |
663 | &hauppauge_generic_tunerconfig, 0); |
664 | } | |
665 | break; | |
9bc37caa | 666 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 667 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 668 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 669 | &fusionhdtv_5_express, |
f139fa71 | 670 | &i2c_bus->i2c_adap); |
363c35fc ST |
671 | if (fe0->dvb.frontend != NULL) { |
672 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
673 | &i2c_bus->i2c_adap, 0x61, |
674 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
675 | } |
676 | break; | |
d1987d55 ST |
677 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
678 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 679 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
680 | &hauppauge_hvr1500q_config, |
681 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
682 | if (fe0->dvb.frontend != NULL) |
683 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
684 | &i2c_bus->i2c_adap, |
685 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 686 | break; |
07b4a835 MK |
687 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
688 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 689 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
690 | &hauppauge_hvr1500_config, |
691 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 692 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
693 | struct dvb_frontend *fe; |
694 | struct xc2028_config cfg = { | |
695 | .i2c_adap = &i2c_bus->i2c_adap, | |
696 | .i2c_addr = 0x61, | |
07b4a835 MK |
697 | }; |
698 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 699 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 700 | .max_len = 64, |
52c3d29c | 701 | .demod = XC3028_FE_OREN538, |
07b4a835 MK |
702 | }; |
703 | ||
704 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 705 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
706 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
707 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
708 | } | |
709 | break; | |
b3ea0166 | 710 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 711 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 712 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 713 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
714 | &hauppauge_hvr1200_config, |
715 | &i2c_bus->i2c_adap); | |
363c35fc ST |
716 | if (fe0->dvb.frontend != NULL) { |
717 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
718 | &dev->i2c_bus[1].i2c_adap, 0x42, |
719 | &tda829x_no_probe); | |
363c35fc | 720 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
721 | 0x60, &dev->i2c_bus[1].i2c_adap, |
722 | &hauppauge_hvr1200_tuner_config); | |
6b926eca MK |
723 | } |
724 | break; | |
725 | case CX23885_BOARD_HAUPPAUGE_HVR1210: | |
726 | i2c_bus = &dev->i2c_bus[0]; | |
727 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
728 | &hauppauge_hvr1210_config, | |
729 | &i2c_bus->i2c_adap); | |
730 | if (fe0->dvb.frontend != NULL) { | |
731 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
732 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
733 | &hauppauge_hvr1210_tuner_config); | |
b3ea0166 ST |
734 | } |
735 | break; | |
66762373 ST |
736 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
737 | i2c_bus = &dev->i2c_bus[0]; | |
363c35fc | 738 | fe0->dvb.frontend = dvb_attach(dib7000p_attach, |
66762373 ST |
739 | &i2c_bus->i2c_adap, |
740 | 0x12, &hauppauge_hvr1400_dib7000_config); | |
363c35fc | 741 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
742 | struct dvb_frontend *fe; |
743 | struct xc2028_config cfg = { | |
744 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
745 | .i2c_addr = 0x64, | |
66762373 ST |
746 | }; |
747 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 748 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 ST |
749 | .max_len = 64, |
750 | .demod = 5000, | |
9c8ced51 ST |
751 | /* This is true for all demods with |
752 | v36 firmware? */ | |
0975fc68 | 753 | .type = XC2028_D2633, |
66762373 ST |
754 | }; |
755 | ||
756 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 757 | fe0->dvb.frontend, &cfg); |
66762373 ST |
758 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
759 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
760 | } | |
761 | break; | |
335377b7 MK |
762 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
763 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
764 | ||
363c35fc | 765 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
766 | &dvico_s5h1409_config, |
767 | &i2c_bus->i2c_adap); | |
363c35fc ST |
768 | if (fe0->dvb.frontend == NULL) |
769 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
770 | &dvico_s5h1411_config, |
771 | &i2c_bus->i2c_adap); | |
363c35fc ST |
772 | if (fe0->dvb.frontend != NULL) |
773 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
774 | &i2c_bus->i2c_adap, |
775 | &dvico_xc5000_tunerconfig); | |
335377b7 | 776 | break; |
aef2d186 ST |
777 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
778 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
779 | ||
363c35fc | 780 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
781 | &dvico_fusionhdtv_xc3028, |
782 | &i2c_bus->i2c_adap); | |
363c35fc | 783 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
784 | struct dvb_frontend *fe; |
785 | struct xc2028_config cfg = { | |
786 | .i2c_adap = &i2c_bus->i2c_adap, | |
787 | .i2c_addr = 0x61, | |
aef2d186 ST |
788 | }; |
789 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 790 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
791 | .max_len = 64, |
792 | .demod = XC3028_FE_ZARLINK456, | |
793 | }; | |
794 | ||
363c35fc | 795 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
796 | &cfg); |
797 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
798 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
799 | } | |
800 | break; | |
801 | } | |
4c56b04a | 802 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
9bb1b7e8 | 803 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
34e383dd | 804 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
4c56b04a ST |
805 | i2c_bus = &dev->i2c_bus[0]; |
806 | ||
363c35fc | 807 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
808 | &dvico_fusionhdtv_xc3028, |
809 | &i2c_bus->i2c_adap); | |
363c35fc | 810 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
811 | struct dvb_frontend *fe; |
812 | struct xc2028_config cfg = { | |
813 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
814 | .i2c_addr = 0x61, | |
4c56b04a ST |
815 | }; |
816 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 817 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
818 | .max_len = 64, |
819 | .demod = XC3028_FE_ZARLINK456, | |
820 | }; | |
821 | ||
363c35fc | 822 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
823 | &cfg); |
824 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
825 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
826 | } | |
96318d0c IL |
827 | break; |
828 | case CX23885_BOARD_TBS_6920: | |
09ea33e5 | 829 | i2c_bus = &dev->i2c_bus[1]; |
96318d0c IL |
830 | |
831 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
09ea33e5 IL |
832 | &tbs_cx24116_config, |
833 | &i2c_bus->i2c_adap); | |
96318d0c | 834 | if (fe0->dvb.frontend != NULL) |
09ea33e5 | 835 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
96318d0c | 836 | |
579943f5 IL |
837 | break; |
838 | case CX23885_BOARD_TEVII_S470: | |
839 | i2c_bus = &dev->i2c_bus[1]; | |
840 | ||
09ea33e5 IL |
841 | fe0->dvb.frontend = dvb_attach(ds3000_attach, |
842 | &tevii_ds3000_config, | |
843 | &i2c_bus->i2c_adap); | |
579943f5 | 844 | if (fe0->dvb.frontend != NULL) |
09ea33e5 | 845 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
579943f5 | 846 | |
4c56b04a | 847 | break; |
c9b8b04b IL |
848 | case CX23885_BOARD_DVBWORLD_2005: |
849 | i2c_bus = &dev->i2c_bus[1]; | |
850 | ||
851 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
852 | &dvbworld_cx24116_config, | |
853 | &i2c_bus->i2c_adap); | |
854 | break; | |
5a23b076 IL |
855 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
856 | i2c_bus = &dev->i2c_bus[0]; | |
857 | switch (port->nr) { | |
858 | /* port B */ | |
859 | case 1: | |
860 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
861 | &netup_stv0900_config, | |
862 | &i2c_bus->i2c_adap, 0); | |
863 | if (fe0->dvb.frontend != NULL) { | |
864 | if (dvb_attach(stv6110_attach, | |
865 | fe0->dvb.frontend, | |
866 | &netup_stv6110_tunerconfig_a, | |
867 | &i2c_bus->i2c_adap)) { | |
868 | if (!dvb_attach(lnbh24_attach, | |
869 | fe0->dvb.frontend, | |
870 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
871 | LNBH24_PCL | LNBH24_TTX, |
872 | LNBH24_TEN, 0x09)) | |
5a23b076 IL |
873 | printk(KERN_ERR |
874 | "No LNBH24 found!\n"); | |
875 | ||
876 | } | |
877 | } | |
878 | break; | |
879 | /* port C */ | |
880 | case 2: | |
881 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
882 | &netup_stv0900_config, | |
883 | &i2c_bus->i2c_adap, 1); | |
884 | if (fe0->dvb.frontend != NULL) { | |
885 | if (dvb_attach(stv6110_attach, | |
886 | fe0->dvb.frontend, | |
887 | &netup_stv6110_tunerconfig_b, | |
888 | &i2c_bus->i2c_adap)) { | |
889 | if (!dvb_attach(lnbh24_attach, | |
890 | fe0->dvb.frontend, | |
891 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
892 | LNBH24_PCL | LNBH24_TTX, |
893 | LNBH24_TEN, 0x0a)) | |
5a23b076 IL |
894 | printk(KERN_ERR |
895 | "No LNBH24 found!\n"); | |
896 | ||
897 | } | |
898 | } | |
899 | break; | |
900 | } | |
901 | break; | |
493b7127 DW |
902 | case CX23885_BOARD_MYGICA_X8506: |
903 | i2c_bus = &dev->i2c_bus[0]; | |
904 | i2c_bus2 = &dev->i2c_bus[1]; | |
905 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
906 | &mygica_x8506_lgs8gl5_config, | |
907 | &i2c_bus->i2c_adap); | |
908 | if (fe0->dvb.frontend != NULL) { | |
909 | dvb_attach(xc5000_attach, | |
910 | fe0->dvb.frontend, | |
911 | &i2c_bus2->i2c_adap, | |
912 | &mygica_x8506_xc5000_config); | |
913 | } | |
914 | break; | |
2365b2d3 DW |
915 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
916 | i2c_bus = &dev->i2c_bus[0]; | |
917 | i2c_bus2 = &dev->i2c_bus[1]; | |
918 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
919 | &magicpro_prohdtve2_lgs8g75_config, | |
920 | &i2c_bus->i2c_adap); | |
921 | if (fe0->dvb.frontend != NULL) { | |
922 | dvb_attach(xc5000_attach, | |
923 | fe0->dvb.frontend, | |
924 | &i2c_bus2->i2c_adap, | |
925 | &magicpro_prohdtve2_xc5000_config); | |
926 | } | |
927 | break; | |
13697380 | 928 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
aee0b24c | 929 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
13697380 ST |
930 | i2c_bus = &dev->i2c_bus[0]; |
931 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
932 | &hcw_s5h1411_config, | |
933 | &i2c_bus->i2c_adap); | |
934 | if (fe0->dvb.frontend != NULL) | |
935 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
936 | 0x60, &dev->i2c_bus[0].i2c_adap, | |
937 | &hauppauge_tda18271_config); | |
938 | break; | |
ea5697fe DW |
939 | case CX23885_BOARD_MYGICA_X8558PRO: |
940 | switch (port->nr) { | |
941 | /* port B */ | |
942 | case 1: | |
943 | i2c_bus = &dev->i2c_bus[0]; | |
944 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
945 | &mygica_x8558pro_atbm8830_cfg1, | |
946 | &i2c_bus->i2c_adap); | |
947 | if (fe0->dvb.frontend != NULL) { | |
948 | dvb_attach(max2165_attach, | |
949 | fe0->dvb.frontend, | |
950 | &i2c_bus->i2c_adap, | |
951 | &mygic_x8558pro_max2165_cfg1); | |
952 | } | |
953 | break; | |
954 | /* port C */ | |
955 | case 2: | |
956 | i2c_bus = &dev->i2c_bus[1]; | |
957 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
958 | &mygica_x8558pro_atbm8830_cfg2, | |
959 | &i2c_bus->i2c_adap); | |
960 | if (fe0->dvb.frontend != NULL) { | |
961 | dvb_attach(max2165_attach, | |
962 | fe0->dvb.frontend, | |
963 | &i2c_bus->i2c_adap, | |
964 | &mygic_x8558pro_max2165_cfg2); | |
965 | } | |
966 | break; | |
967 | } | |
968 | break; | |
13697380 | 969 | |
d19770e5 | 970 | default: |
9c8ced51 ST |
971 | printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " |
972 | " isn't supported yet\n", | |
d19770e5 ST |
973 | dev->name); |
974 | break; | |
975 | } | |
363c35fc | 976 | if (NULL == fe0->dvb.frontend) { |
9c8ced51 ST |
977 | printk(KERN_ERR "%s: frontend initialization failed\n", |
978 | dev->name); | |
d19770e5 ST |
979 | return -1; |
980 | } | |
d7cba043 | 981 | /* define general-purpose callback pointer */ |
363c35fc | 982 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
d19770e5 ST |
983 | |
984 | /* Put the analog decoder in standby to keep it quiet */ | |
622b828a | 985 | call_all(dev, core, s_power, 0); |
d19770e5 | 986 | |
363c35fc ST |
987 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
988 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 989 | |
d19770e5 | 990 | /* register everything */ |
5a23b076 | 991 | ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
5bdd3962 MK |
992 | &dev->pci->dev, adapter_nr, 0, |
993 | cx23885_dvb_fe_ioctl_override); | |
bee30192 | 994 | if (ret) |
e4425eab | 995 | return ret; |
363c35fc | 996 | |
5a23b076 IL |
997 | /* init CI & MAC */ |
998 | switch (dev->board) { | |
999 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { | |
1000 | static struct netup_card_info cinfo; | |
1001 | ||
1002 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | |
1003 | memcpy(port->frontends.adapter.proposed_mac, | |
1004 | cinfo.port[port->nr - 1].mac, 6); | |
be395157 | 1005 | printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", |
1006 | port->nr, port->frontends.adapter.proposed_mac); | |
5a23b076 IL |
1007 | |
1008 | netup_ci_init(port); | |
1009 | break; | |
1010 | } | |
16bfdaa4 PG |
1011 | case CX23885_BOARD_TEVII_S470: { |
1012 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1013 | ||
1014 | if (port->nr != 1) | |
1015 | break; | |
1016 | ||
1017 | /* Read entire EEPROM */ | |
1018 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1019 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); | |
5cac1f66 | 1020 | printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0); |
16bfdaa4 PG |
1021 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); |
1022 | break; | |
1023 | } | |
5a23b076 IL |
1024 | } |
1025 | ||
1026 | return ret; | |
d19770e5 ST |
1027 | } |
1028 | ||
1029 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
1030 | { | |
363c35fc ST |
1031 | |
1032 | struct videobuf_dvb_frontend *fe0; | |
d19770e5 | 1033 | struct cx23885_dev *dev = port->dev; |
eb0c58bb ST |
1034 | int err, i; |
1035 | ||
1036 | /* Here we need to allocate the correct number of frontends, | |
af901ca1 | 1037 | * as reflected in the cards struct. The reality is that currently |
eb0c58bb ST |
1038 | * no cx23885 boards support this - yet. But, if we don't modify this |
1039 | * code then the second frontend would never be allocated (later) | |
1040 | * and fail with error before the attach in dvb_register(). | |
1041 | * Without these changes we risk an OOPS later. The changes here | |
1042 | * are for safety, and should provide a good foundation for the | |
1043 | * future addition of any multi-frontend cx23885 based boards. | |
1044 | */ | |
1045 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, | |
1046 | port->num_frontends); | |
d19770e5 | 1047 | |
eb0c58bb | 1048 | for (i = 1; i <= port->num_frontends; i++) { |
96b7a1a8 | 1049 | if (videobuf_dvb_alloc_frontend( |
9c8ced51 | 1050 | &port->frontends, i) == NULL) { |
eb0c58bb ST |
1051 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1052 | return -ENOMEM; | |
1053 | } | |
1054 | ||
1055 | fe0 = videobuf_dvb_get_frontend(&port->frontends, i); | |
1056 | if (!fe0) | |
1057 | err = -EINVAL; | |
363c35fc | 1058 | |
eb0c58bb | 1059 | dprintk(1, "%s\n", __func__); |
9c8ced51 | 1060 | dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", |
eb0c58bb ST |
1061 | dev->board, |
1062 | dev->name, | |
1063 | dev->pci_bus, | |
1064 | dev->pci_slot); | |
d19770e5 | 1065 | |
eb0c58bb | 1066 | err = -ENODEV; |
d19770e5 | 1067 | |
eb0c58bb ST |
1068 | /* dvb stuff */ |
1069 | /* We have to init the queue for each frontend on a port. */ | |
9c8ced51 ST |
1070 | printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); |
1071 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, | |
1072 | &dev->pci->dev, &port->slock, | |
44a6481d | 1073 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, |
08bff03e | 1074 | sizeof(struct cx23885_buffer), port, NULL); |
eb0c58bb | 1075 | } |
d19770e5 ST |
1076 | err = dvb_register(port); |
1077 | if (err != 0) | |
9c8ced51 ST |
1078 | printk(KERN_ERR "%s() dvb_register failed err = %d\n", |
1079 | __func__, err); | |
d19770e5 | 1080 | |
d19770e5 ST |
1081 | return err; |
1082 | } | |
1083 | ||
1084 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
1085 | { | |
363c35fc ST |
1086 | struct videobuf_dvb_frontend *fe0; |
1087 | ||
eb0c58bb ST |
1088 | /* FIXME: in an error condition where the we have |
1089 | * an expected number of frontends (attach problem) | |
1090 | * then this might not clean up correctly, if 1 | |
1091 | * is invalid. | |
1092 | * This comment only applies to future boards IF they | |
1093 | * implement MFE support. | |
1094 | */ | |
92abe9ee | 1095 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
9c8ced51 | 1096 | if (fe0->dvb.frontend) |
363c35fc | 1097 | videobuf_dvb_unregister_bus(&port->frontends); |
d19770e5 | 1098 | |
afd96668 HV |
1099 | switch (port->dev->board) { |
1100 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
1101 | netup_ci_exit(port); | |
1102 | break; | |
1103 | } | |
5a23b076 | 1104 | |
d19770e5 ST |
1105 | return 0; |
1106 | } | |
44a6481d | 1107 |