projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[media] video: Drop undue references to i2c-algo-bit
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885.h
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h>
25#include <linux/kdev_t.h>
5a0e3ad6 26#include <linux/slab.h>
d19770e5 27
c0714f6c 28#include <media/v4l2-device.h>
d19770e5
ST		 29#include <media/tuner.h>
30#include <media/tveeprom.h>
409d84f8
TP		 31#include <media/videobuf-dma-sg.h>
32#include <media/videobuf-dvb.h>
6bda9644 33#include <media/rc-core.h>
d19770e5
ST		 34
35#include "btcx-risc.h"
36#include "cx23885-reg.h"
b1b81f1d 37#include "media/cx2341x.h"
d19770e5 38
d19770e5
ST		 39#include <linux/mutex.h>
40
1990d50b 41#define CX23885_VERSION "0.0.3"
d19770e5
ST		 42
43#define UNSET (-1U)
44
45#define CX23885_MAXBOARDS 8
46
d19770e5
ST		 47/* Max number of inputs by card */
48#define MAX_CX23885_INPUT 8
7b888014
ST		 49#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
50#define RESOURCE_OVERLAY 1
51#define RESOURCE_VIDEO 2
52#define RESOURCE_VBI 4
d19770e5 53
d19770e5
ST		 54#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
55
56#define CX23885_BOARD_NOAUTO UNSET
57#define CX23885_BOARD_UNKNOWN 0
58#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
59#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
a77743bc 60#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
9bc37caa 61#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
d1987d55 62#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
07b4a835 63#define CX23885_BOARD_HAUPPAUGE_HVR1500 6
b3ea0166 64#define CX23885_BOARD_HAUPPAUGE_HVR1200 7
a780a31c 65#define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66762373 66#define CX23885_BOARD_HAUPPAUGE_HVR1400 9
335377b7 67#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
aef2d186 68#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
4c56b04a 69#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
9bb1b7e8 70#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
96318d0c 71#define CX23885_BOARD_TBS_6920 14
579943f5 72#define CX23885_BOARD_TEVII_S470 15
c9b8b04b 73#define CX23885_BOARD_DVBWORLD_2005 16
5a23b076 74#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
2074dffa 75#define CX23885_BOARD_HAUPPAUGE_HVR1270 18
d099becb 76#define CX23885_BOARD_HAUPPAUGE_HVR1275 19
19bc5796 77#define CX23885_BOARD_HAUPPAUGE_HVR1255 20
6b926eca 78#define CX23885_BOARD_HAUPPAUGE_HVR1210 21
493b7127 79#define CX23885_BOARD_MYGICA_X8506 22
2365b2d3 80#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
13697380 81#define CX23885_BOARD_HAUPPAUGE_HVR1850 24
34e383dd 82#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
aee0b24c 83#define CX23885_BOARD_HAUPPAUGE_HVR1290 26
ea5697fe 84#define CX23885_BOARD_MYGICA_X8558PRO 27
0b32d65c 85#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
9028f58f 86#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
78db8547 87#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
0cf8af57 88#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
2cb9ccd4 89#define CX23885_BOARD_MPX885 32
d19770e5 90
6f8bee9b
ST		 91#define GPIO_0 0x00000001
92#define GPIO_1 0x00000002
93#define GPIO_2 0x00000004
94#define GPIO_3 0x00000008
95#define GPIO_4 0x00000010
96#define GPIO_5 0x00000020
97#define GPIO_6 0x00000040
98#define GPIO_7 0x00000080
99#define GPIO_8 0x00000100
100#define GPIO_9 0x00000200
f659c513
ST		 101#define GPIO_10 0x00000400
102#define GPIO_11 0x00000800
103#define GPIO_12 0x00001000
104#define GPIO_13 0x00002000
105#define GPIO_14 0x00004000
106#define GPIO_15 0x00008000
6f8bee9b 107
7b888014
ST		 108/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
109#define CX23885_NORMS (\
110 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
111 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
112 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
113 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
114
115struct cx23885_fmt {
116 char *name;
117 u32 fourcc; /* v4l2 format id */
118 int depth;
119 int flags;
120 u32 cxformat;
121};
122
123struct cx23885_ctrl {
124 struct v4l2_queryctrl v;
125 u32 off;
126 u32 reg;
127 u32 mask;
128 u32 shift;
129};
130
131struct cx23885_tvnorm {
132 char *name;
133 v4l2_std_id id;
134 u32 cxiformat;
135 u32 cxoformat;
136};
137
138struct cx23885_fh {
139 struct cx23885_dev *dev;
140 enum v4l2_buf_type type;
141 int radio;
142 u32 resources;
143
144 /* video overlay */
145 struct v4l2_window win;
146 struct v4l2_clip *clips;
147 unsigned int nclips;
148
149 /* video capture */
150 struct cx23885_fmt *fmt;
151 unsigned int width, height;
152
153 /* vbi capture */
154 struct videobuf_queue vidq;
155 struct videobuf_queue vbiq;
156
157 /* MPEG Encoder specifics ONLY */
158 struct videobuf_queue mpegq;
159 atomic_t v4l_reading;
160};
161
d19770e5
ST		 162enum cx23885_itype {
163 CX23885_VMUX_COMPOSITE1 = 1,
164 CX23885_VMUX_COMPOSITE2,
165 CX23885_VMUX_COMPOSITE3,
166 CX23885_VMUX_COMPOSITE4,
167 CX23885_VMUX_SVIDEO,
dac65fa1 168 CX23885_VMUX_COMPONENT,
d19770e5
ST		 169 CX23885_VMUX_TELEVISION,
170 CX23885_VMUX_CABLE,
171 CX23885_VMUX_DVB,
172 CX23885_VMUX_DEBUG,
173 CX23885_RADIO,
174};
175
579f1163
ST		 176enum cx23885_src_sel_type {
177 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
178 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
179};
180
d19770e5
ST		 181/* buffer for one video frame */
182struct cx23885_buffer {
183 /* common v4l buffer stuff -- must be first */
184 struct videobuf_buffer vb;
185
186 /* cx23885 specific */
187 unsigned int bpl;
188 struct btcx_riscmem risc;
189 struct cx23885_fmt *fmt;
190 u32 count;
191};
192
193struct cx23885_input {
194 enum cx23885_itype type;
195 unsigned int vmux;
8304be88 196 unsigned int amux;
d19770e5
ST		 197 u32 gpio0, gpio1, gpio2, gpio3;
198};
199
661c7e44
ST		 200typedef enum {
201 CX23885_MPEG_UNDEFINED = 0,
7b888014
ST		 202 CX23885_MPEG_DVB,
203 CX23885_ANALOG_VIDEO,
b1b81f1d 204 CX23885_MPEG_ENCODER,
661c7e44
ST		 205} port_t;
206
d19770e5
ST		 207struct cx23885_board {
208 char *name;
7b888014 209 port_t porta, portb, portc;
10d0dcd7 210 int num_fds_portb, num_fds_portc;
7b888014
ST		 211 unsigned int tuner_type;
212 unsigned int radio_type;
213 unsigned char tuner_addr;
214 unsigned char radio_addr;
557f48d5 215 unsigned int tuner_bus;
c7712613
ST		 216
217 /* Vendors can and do run the PCIe bridge at different
218 * clock rates, driven physically by crystals on the PCBs.
25985edc 219 * The core has to accommodate this. This allows the user
c7712613
ST		 220 * to add new boards with new frequencys. The value is
221 * expressed in Hz.
222 *
223 * The core framework will default this value based on
224 * current designs, but it can vary.
225 */
226 u32 clk_freq;
d19770e5 227 struct cx23885_input input[MAX_CX23885_INPUT];
78db8547 228 int ci_type; /* for NetUP */
d19770e5
ST		 229};
230
231struct cx23885_subid {
232 u16 subvendor;
233 u16 subdevice;
234 u32 card;
235};
236
237struct cx23885_i2c {
238 struct cx23885_dev *dev;
239
240 int nr;
241
242 /* i2c i/o */
243 struct i2c_adapter i2c_adap;
244 struct i2c_algo_bit_data i2c_algo;
245 struct i2c_client i2c_client;
246 u32 i2c_rc;
247
248 /* 885 registers used for raw addess */
249 u32 i2c_period;
250 u32 reg_ctrl;
251 u32 reg_stat;
252 u32 reg_addr;
253 u32 reg_rdata;
254 u32 reg_wdata;
255};
256
257struct cx23885_dmaqueue {
258 struct list_head active;
259 struct list_head queued;
260 struct timer_list timeout;
261 struct btcx_riscmem stopper;
262 u32 count;
263};
264
265struct cx23885_tsport {
266 struct cx23885_dev *dev;
267
268 int nr;
269 int sram_chno;
270
363c35fc 271 struct videobuf_dvb_frontends frontends;
d19770e5
ST		 272
273 /* dma queues */
274 struct cx23885_dmaqueue mpegq;
275 u32 ts_packet_size;
276 u32 ts_packet_count;
277
278 int width;
279 int height;
280
281 spinlock_t slock;
282
283 /* registers */
284 u32 reg_gpcnt;
285 u32 reg_gpcnt_ctl;
286 u32 reg_dma_ctl;
287 u32 reg_lngth;
288 u32 reg_hw_sop_ctrl;
289 u32 reg_gen_ctrl;
290 u32 reg_bd_pkt_status;
291 u32 reg_sop_status;
292 u32 reg_fifo_ovfl_stat;
293 u32 reg_vld_misc;
294 u32 reg_ts_clk_en;
295 u32 reg_ts_int_msk;
a6a3f140 296 u32 reg_ts_int_stat;
579f1163 297 u32 reg_src_sel;
d19770e5
ST		 298
299 /* Default register vals */
300 int pci_irqmask;
301 u32 dma_ctl_val;
302 u32 ts_int_msk_val;
303 u32 gen_ctrl_val;
304 u32 ts_clk_en_val;
579f1163 305 u32 src_sel_val;
b1b81f1d
ST		 306 u32 vld_misc_val;
307 u32 hw_sop_ctrl_val;
a739a7e4
ST		 308
309 /* Allow a single tsport to have multiple frontends */
310 u32 num_frontends;
78db8547 311 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
5a23b076 312 void *port_priv;
d19770e5
ST		 313};
314
43c24078
AW		 315struct cx23885_kernel_ir {
316 struct cx23885_dev *cx;
eeefae53
AW		 317 char *name;
318 char *phys;
319
d8b4b582 320 struct rc_dev *rc;
eeefae53
AW		 321};
322
9e44d632
MM		 323struct cx23885_audio_buffer {
324 unsigned int bpl;
325 struct btcx_riscmem risc;
326 struct videobuf_dmabuf dma;
327};
328
329struct cx23885_audio_dev {
330 struct cx23885_dev *dev;
331
332 struct pci_dev *pci;
333
334 struct snd_card *card;
335
336 spinlock_t lock;
337
338 atomic_t count;
339
340 unsigned int dma_size;
341 unsigned int period_size;
342 unsigned int num_periods;
343
344 struct videobuf_dmabuf *dma_risc;
345
346 struct cx23885_audio_buffer *buf;
347
348 struct snd_pcm_substream *substream;
349};
350
d19770e5 351struct cx23885_dev {
d19770e5 352 atomic_t refcount;
c0714f6c 353 struct v4l2_device v4l2_dev;
d19770e5
ST		 354
355 /* pci stuff */
356 struct pci_dev *pci;
357 unsigned char pci_rev, pci_lat;
358 int pci_bus, pci_slot;
359 u32 __iomem *lmmio;
360 u8 __iomem *bmmio;
d19770e5 361 int pci_irqmask;
dbe83a3b 362 spinlock_t pci_irqmask_lock; /* protects mask reg too */
0ac5881a 363 int hwrevision;
d19770e5 364
c7712613
ST		 365 /* This valud is board specific and is used to configure the
366 * AV core so we see nice clean and stable video and audio. */
367 u32 clk_freq;
368
44a6481d 369 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
d19770e5
ST		 370 struct cx23885_i2c i2c_bus[3];
371
372 int nr;
373 struct mutex lock;
8386c27f 374 struct mutex gpio_lock;
d19770e5
ST		 375
376 /* board details */
377 unsigned int board;
378 char name[32];
379
a6a3f140 380 struct cx23885_tsport ts1, ts2;
d19770e5
ST		 381
382 /* sram configuration */
383 struct sram_channel *sram_channels;
e133be0f
ST		 384
385 enum {
386 CX23885_BRIDGE_UNDEFINED = 0,
387 CX23885_BRIDGE_885 = 885,
388 CX23885_BRIDGE_887 = 887,
25ea66e2 389 CX23885_BRIDGE_888 = 888,
e133be0f 390 } bridge;
7b888014
ST		 391
392 /* Analog video */
393 u32 resources;
394 unsigned int input;
fc1a889d 395 unsigned int audinput; /* Selectable audio input */
7b888014
ST		 396 u32 tvaudio;
397 v4l2_std_id tvnorm;
398 unsigned int tuner_type;
399 unsigned char tuner_addr;
557f48d5 400 unsigned int tuner_bus;
7b888014
ST		 401 unsigned int radio_type;
402 unsigned char radio_addr;
403 unsigned int has_radio;
0d5a19f1 404 struct v4l2_subdev *sd_cx25840;
e5514f10 405 struct work_struct cx25840_work;
f59ad611
AW		 406
407 /* Infrared */
408 struct v4l2_subdev *sd_ir;
409 struct work_struct ir_rx_work;
410 unsigned long ir_rx_notifications;
411 struct work_struct ir_tx_work;
412 unsigned long ir_tx_notifications;
7b888014 413
43c24078 414 struct cx23885_kernel_ir *kernel_ir;
dbda8f70
AW		 415 atomic_t ir_input_stopping;
416
7b888014
ST		 417 /* V4l */
418 u32 freq;
419 struct video_device *video_dev;
420 struct video_device *vbi_dev;
421 struct video_device *radio_dev;
422
423 struct cx23885_dmaqueue vidq;
424 struct cx23885_dmaqueue vbiq;
425 spinlock_t slock;
b1b81f1d
ST		 426
427 /* MPEG Encoder ONLY settings */
428 u32 cx23417_mailbox;
429 struct cx2341x_mpeg_params mpeg_params;
430 struct video_device *v4l_device;
431 atomic_t v4l_reader_count;
432 struct cx23885_tvnorm encodernorm;
433
9e44d632
MM		 434 /* Analog raw audio */
435 struct cx23885_audio_dev *audio_dev;
436
d19770e5
ST		 437};
438
c0714f6c
HV		 439static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
440{
441 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
442}
443
0d5a19f1
HV		 444#define call_all(dev, o, f, args...) \
445 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
446
d6b1850d
AW		 447#define CX23885_HW_888_IR (1 << 0)
448#define CX23885_HW_AV_CORE (1 << 1)
29f8a0a5
AW		 449
450#define call_hw(dev, grpid, o, f, args...) \
451 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
452
453extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
454
d19770e5
ST		 455#define SRAM_CH01 0 /* Video A */
456#define SRAM_CH02 1 /* VBI A */
457#define SRAM_CH03 2 /* Video B */
458#define SRAM_CH04 3 /* Transport via B */
459#define SRAM_CH05 4 /* VBI B */
460#define SRAM_CH06 5 /* Video C */
461#define SRAM_CH07 6 /* Transport via C */
462#define SRAM_CH08 7 /* Audio Internal A */
463#define SRAM_CH09 8 /* Audio Internal B */
464#define SRAM_CH10 9 /* Audio External */
465#define SRAM_CH11 10 /* COMB_3D_N */
466#define SRAM_CH12 11 /* Comb 3D N1 */
467#define SRAM_CH13 12 /* Comb 3D N2 */
468#define SRAM_CH14 13 /* MOE Vid */
469#define SRAM_CH15 14 /* MOE RSLT */
470
471struct sram_channel {
472 char *name;
473 u32 cmds_start;
474 u32 ctrl_start;
475 u32 cdt;
1ebcad77 476 u32 fifo_start;
d19770e5
ST		 477 u32 fifo_size;
478 u32 ptr1_reg;
479 u32 ptr2_reg;
480 u32 cnt1_reg;
481 u32 cnt2_reg;
482 u32 jumponly;
483};
484
485/* ----------------------------------------------------------- */
486
487#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
9c8ced51 488#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
d19770e5 489
9c8ced51 490#define cx_andor(reg, mask, value) \
d19770e5
ST		 491 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
492 ((value) & (mask)), dev->lmmio+((reg)>>2))
493
9c8ced51
ST		 494#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
495#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
d19770e5 496
d19770e5 497/* ----------------------------------------------------------- */
7b888014
ST		 498/* cx23885-core.c */
499
500extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
501 struct sram_channel *ch,
502 unsigned int bpl, u32 risc);
503
504extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
505 struct sram_channel *ch);
d19770e5 506
7b888014
ST		 507extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
508 u32 reg, u32 mask, u32 value);
509
510extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
511 struct scatterlist *sglist,
512 unsigned int top_offset, unsigned int bottom_offset,
513 unsigned int bpl, unsigned int padding, unsigned int lines);
514
5ab27e6d
ST		 515extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
516 struct btcx_riscmem *risc, struct scatterlist *sglist,
517 unsigned int top_offset, unsigned int bottom_offset,
518 unsigned int bpl, unsigned int padding, unsigned int lines);
519
7b888014
ST		 520void cx23885_cancel_buffers(struct cx23885_tsport *port);
521
522extern int cx23885_restart_queue(struct cx23885_tsport *port,
523 struct cx23885_dmaqueue *q);
524
525extern void cx23885_wakeup(struct cx23885_tsport *port,
526 struct cx23885_dmaqueue *q, u32 count);
527
6f8bee9b
ST		 528extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
529extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
09ea33e5 530extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
6f8bee9b
ST		 531extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
532 int asoutput);
533
dbe83a3b
AW		 534extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
535extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
536extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
537extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
7b888014
ST		 538
539/* ----------------------------------------------------------- */
540/* cx23885-cards.c */
d19770e5
ST		 541extern struct cx23885_board cx23885_boards[];
542extern const unsigned int cx23885_bcount;
543
544extern struct cx23885_subid cx23885_subids[];
545extern const unsigned int cx23885_idcount;
546
9c8ced51
ST		 547extern int cx23885_tuner_callback(void *priv, int component,
548 int command, int arg);
d19770e5 549extern void cx23885_card_list(struct cx23885_dev *dev);
a6a3f140 550extern int cx23885_ir_init(struct cx23885_dev *dev);
f59ad611
AW		 551extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
552extern void cx23885_ir_fini(struct cx23885_dev *dev);
a6a3f140 553extern void cx23885_gpio_setup(struct cx23885_dev *dev);
d19770e5
ST		 554extern void cx23885_card_setup(struct cx23885_dev *dev);
555extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
556
557extern int cx23885_dvb_register(struct cx23885_tsport *port);
558extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
559
44a6481d
MK		 560extern int cx23885_buf_prepare(struct videobuf_queue *q,
561 struct cx23885_tsport *port,
562 struct cx23885_buffer *buf,
563 enum v4l2_field field);
44a6481d
MK		 564extern void cx23885_buf_queue(struct cx23885_tsport *port,
565 struct cx23885_buffer *buf);
566extern void cx23885_free_buffer(struct videobuf_queue *q,
567 struct cx23885_buffer *buf);
d19770e5
ST		 568
569/* ----------------------------------------------------------- */
7b888014
ST		 570/* cx23885-video.c */
571/* Video */
572extern int cx23885_video_register(struct cx23885_dev *dev);
573extern void cx23885_video_unregister(struct cx23885_dev *dev);
574extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
b5f74050
ST		 575extern void cx23885_video_wakeup(struct cx23885_dev *dev,
576 struct cx23885_dmaqueue *q, u32 count);
7b888014
ST		 577
578/* ----------------------------------------------------------- */
579/* cx23885-vbi.c */
580extern int cx23885_vbi_fmt(struct file *file, void *priv,
581 struct v4l2_format *f);
582extern void cx23885_vbi_timeout(unsigned long data);
583extern struct videobuf_queue_ops cx23885_vbi_qops;
b5f74050
ST		 584extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
585 struct cx23885_dmaqueue *q);
586extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
7b888014 587
d19770e5
ST		 588/* cx23885-i2c.c */
589extern int cx23885_i2c_register(struct cx23885_i2c *bus);
590extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
a589b665 591extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
d19770e5 592
b1b81f1d
ST		 593/* ----------------------------------------------------------- */
594/* cx23885-417.c */
595extern int cx23885_417_register(struct cx23885_dev *dev);
596extern void cx23885_417_unregister(struct cx23885_dev *dev);
597extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
598extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
599extern void cx23885_mc417_init(struct cx23885_dev *dev);
600extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
601extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
74618244
AW		 602extern int mc417_register_read(struct cx23885_dev *dev,
603 u16 address, u32 *value);
604extern int mc417_register_write(struct cx23885_dev *dev,
605 u16 address, u32 value);
f659c513
ST		 606extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
607extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
608extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
b1b81f1d 609
9e44d632
MM		 610/* ----------------------------------------------------------- */
611/* cx23885-alsa.c */
efa762f5
ST		 612extern struct cx23885_audio_dev *cx23885_audio_register(
613 struct cx23885_dev *dev);
614extern void cx23885_audio_unregister(struct cx23885_dev *dev);
9e44d632
MM		 615extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
616extern int cx23885_risc_databuffer(struct pci_dev *pci,
617 struct btcx_riscmem *risc,
618 struct scatterlist *sglist,
619 unsigned int bpl,
620 unsigned int lines,
621 unsigned int lpi);
b1b81f1d 622
7b888014
ST		 623/* ----------------------------------------------------------- */
624/* tv norms */
625
626static inline unsigned int norm_maxw(v4l2_std_id norm)
627{
628 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
629}
630
631static inline unsigned int norm_maxh(v4l2_std_id norm)
632{
633 return (norm & V4L2_STD_625_50) ? 576 : 480;
634}
635
636static inline unsigned int norm_swidth(v4l2_std_id norm)
637{
638 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
639}
Linux kernel - Deliverables
This page took 0.61119 seconds and 5 git commands to generate.