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[deliverable/linux.git] / drivers / media / video / cx25821 / cx25821-alsa.c
CommitLineData
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MCC
1/*
2 * Driver for the Conexant CX25821 PCIe bridge
3 *
4 * Copyright (C) 2009 Conexant Systems Inc.
5 * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
6 * Based on SAA713x ALSA driver and CX88 driver
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, version 2
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
36d89f7d
JP
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
02b20b0b
MCC
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/device.h>
28#include <linux/interrupt.h>
29#include <linux/vmalloc.h>
30#include <linux/dma-mapping.h>
31#include <linux/pci.h>
5a0e3ad6 32#include <linux/slab.h>
02b20b0b 33
8889a8a5 34#include <linux/delay.h>
02b20b0b
MCC
35#include <sound/core.h>
36#include <sound/pcm.h>
37#include <sound/pcm_params.h>
38#include <sound/control.h>
39#include <sound/initval.h>
40#include <sound/tlv.h>
41
02b20b0b
MCC
42#include "cx25821.h"
43#include "cx25821-reg.h"
44
45#define AUDIO_SRAM_CHANNEL SRAM_CH08
46
36d89f7d
JP
47#define dprintk(level, fmt, arg...) \
48do { \
49 if (debug >= level) \
50 pr_info("%s/1: " fmt, chip->dev->name, ##arg); \
51} while (0)
52#define dprintk_core(level, fmt, arg...) \
53do { \
54 if (debug >= level) \
55 printk(KERN_DEBUG "%s/1: " fmt, chip->dev->name, ##arg); \
56} while (0)
02b20b0b 57
02b20b0b
MCC
58/****************************************************************************
59 Data type declarations - Can be moded to a header file later
60 ****************************************************************************/
61
02b20b0b
MCC
62static struct snd_card *snd_cx25821_cards[SNDRV_CARDS];
63static int devno;
64
fecfedeb
LP
65struct cx25821_audio_buffer {
66 unsigned int bpl;
67 struct btcx_riscmem risc;
68 struct videobuf_dmabuf dma;
69};
70
02b20b0b 71struct cx25821_audio_dev {
1a9fc855
MCC
72 struct cx25821_dev *dev;
73 struct cx25821_dmaqueue q;
02b20b0b
MCC
74
75 /* pci i/o */
1a9fc855 76 struct pci_dev *pci;
02b20b0b
MCC
77
78 /* audio controls */
1a9fc855 79 int irq;
02b20b0b 80
1a9fc855 81 struct snd_card *card;
02b20b0b
MCC
82
83 unsigned long iobase;
1a9fc855
MCC
84 spinlock_t reg_lock;
85 atomic_t count;
02b20b0b 86
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MCC
87 unsigned int dma_size;
88 unsigned int period_size;
89 unsigned int num_periods;
02b20b0b 90
1a9fc855 91 struct videobuf_dmabuf *dma_risc;
02b20b0b 92
fecfedeb 93 struct cx25821_audio_buffer *buf;
02b20b0b 94
1a9fc855 95 struct snd_pcm_substream *substream;
02b20b0b 96};
02b20b0b
MCC
97
98
02b20b0b
MCC
99/****************************************************************************
100 Module global static vars
101 ****************************************************************************/
102
103static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
104static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
8889a8a5 105static int enable[SNDRV_CARDS] = { 1, [1 ... (SNDRV_CARDS - 1)] = 1 };
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MCC
106
107module_param_array(enable, bool, NULL, 0444);
108MODULE_PARM_DESC(enable, "Enable cx25821 soundcard. default enabled.");
109
110module_param_array(index, int, NULL, 0444);
111MODULE_PARM_DESC(index, "Index value for cx25821 capture interface(s).");
112
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MCC
113/****************************************************************************
114 Module macros
115 ****************************************************************************/
116
117MODULE_DESCRIPTION("ALSA driver module for cx25821 based capture cards");
118MODULE_AUTHOR("Hiep Huynh");
119MODULE_LICENSE("GPL");
8889a8a5 120MODULE_SUPPORTED_DEVICE("{{Conexant,25821}"); /* "{{Conexant,23881}," */
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MCC
121
122static unsigned int debug;
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MCC
123module_param(debug, int, 0644);
124MODULE_PARM_DESC(debug, "enable debug messages");
02b20b0b
MCC
125
126/****************************************************************************
127 Module specific funtions
128 ****************************************************************************/
129/* Constants taken from cx88-reg.h */
130#define AUD_INT_DN_RISCI1 (1 << 0)
131#define AUD_INT_UP_RISCI1 (1 << 1)
132#define AUD_INT_RDS_DN_RISCI1 (1 << 2)
1a9fc855 133#define AUD_INT_DN_RISCI2 (1 << 4) /* yes, 3 is skipped */
02b20b0b
MCC
134#define AUD_INT_UP_RISCI2 (1 << 5)
135#define AUD_INT_RDS_DN_RISCI2 (1 << 6)
136#define AUD_INT_DN_SYNC (1 << 12)
137#define AUD_INT_UP_SYNC (1 << 13)
138#define AUD_INT_RDS_DN_SYNC (1 << 14)
139#define AUD_INT_OPC_ERR (1 << 16)
140#define AUD_INT_BER_IRQ (1 << 20)
141#define AUD_INT_MCHG_IRQ (1 << 21)
142#define GP_COUNT_CONTROL_RESET 0x3
143
144#define PCI_MSK_AUD_EXT (1 << 4)
145#define PCI_MSK_AUD_INT (1 << 3)
146/*
147 * BOARD Specific: Sets audio DMA
148 */
149
8889a8a5 150static int _cx25821_start_audio_dma(struct cx25821_audio_dev *chip)
02b20b0b 151{
fecfedeb 152 struct cx25821_audio_buffer *buf = chip->buf;
1a9fc855
MCC
153 struct cx25821_dev *dev = chip->dev;
154 struct sram_channel *audio_ch =
155 &cx25821_sram_channels[AUDIO_SRAM_CHANNEL];
02b20b0b
MCC
156 u32 tmp = 0;
157
8889a8a5 158 /* enable output on the GPIO 0 for the MCLK ADC (Audio) */
1a9fc855 159 cx25821_set_gpiopin_direction(chip->dev, 0, 0);
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MCC
160
161 /* Make sure RISC/FIFO are off before changing FIFO/RISC settings */
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MCC
162 cx_clear(AUD_INT_DMA_CTL,
163 FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN);
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MCC
164
165 /* setup fifo + format - out channel */
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MCC
166 cx25821_sram_channel_setup_audio(chip->dev, audio_ch, buf->bpl,
167 buf->risc.dma);
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MCC
168
169 /* sets bpl size */
170 cx_write(AUD_A_LNGTH, buf->bpl);
171
172 /* reset counter */
8889a8a5
OP
173 /* GP_COUNT_CONTROL_RESET = 0x3 */
174 cx_write(AUD_A_GPCNT_CTL, GP_COUNT_CONTROL_RESET);
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MCC
175 atomic_set(&chip->count, 0);
176
8889a8a5 177 /* Set the input mode to 16-bit */
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MCC
178 tmp = cx_read(AUD_A_CFG);
179 cx_write(AUD_A_CFG,
180 tmp | FLD_AUD_DST_PK_MODE | FLD_AUD_DST_ENABLE |
181 FLD_AUD_CLK_ENABLE);
02b20b0b 182
36d89f7d
JP
183 /*
184 pr_info("DEBUG: Start audio DMA, %d B/line, cmds_start(0x%x)= %d lines/FIFO, %d periods, %d byte buffer\n",
185 buf->bpl, audio_ch->cmds_start,
186 cx_read(audio_ch->cmds_start + 12)>>1,
187 chip->num_periods, buf->bpl * chip->num_periods);
8889a8a5 188 */
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MCC
189
190 /* Enables corresponding bits at AUD_INT_STAT */
1a9fc855
MCC
191 cx_write(AUD_A_INT_MSK,
192 FLD_AUD_DST_RISCI1 | FLD_AUD_DST_OF | FLD_AUD_DST_SYNC |
193 FLD_AUD_DST_OPC_ERR);
02b20b0b
MCC
194
195 /* Clean any pending interrupt bits already set */
196 cx_write(AUD_A_INT_STAT, ~0);
197
198 /* enable audio irqs */
199 cx_set(PCI_INT_MSK, chip->dev->pci_irqmask | PCI_MSK_AUD_INT);
200
8889a8a5 201 /* Turn on audio downstream fifo and risc enable 0x101 */
1a9fc855
MCC
202 tmp = cx_read(AUD_INT_DMA_CTL);
203 cx_set(AUD_INT_DMA_CTL,
204 tmp | (FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN));
02b20b0b
MCC
205
206 mdelay(100);
207 return 0;
208}
209
210/*
211 * BOARD Specific: Resets audio DMA
212 */
8889a8a5 213static int _cx25821_stop_audio_dma(struct cx25821_audio_dev *chip)
02b20b0b
MCC
214{
215 struct cx25821_dev *dev = chip->dev;
216
217 /* stop dma */
1a9fc855
MCC
218 cx_clear(AUD_INT_DMA_CTL,
219 FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN);
02b20b0b
MCC
220
221 /* disable irqs */
222 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
1a9fc855
MCC
223 cx_clear(AUD_A_INT_MSK,
224 AUD_INT_OPC_ERR | AUD_INT_DN_SYNC | AUD_INT_DN_RISCI2 |
225 AUD_INT_DN_RISCI1);
02b20b0b
MCC
226
227 return 0;
228}
229
230#define MAX_IRQ_LOOP 50
231
232/*
233 * BOARD Specific: IRQ dma bits
234 */
235static char *cx25821_aud_irqs[32] = {
1a9fc855
MCC
236 "dn_risci1", "up_risci1", "rds_dn_risc1", /* 0-2 */
237 NULL, /* reserved */
238 "dn_risci2", "up_risci2", "rds_dn_risc2", /* 4-6 */
239 NULL, /* reserved */
240 "dnf_of", "upf_uf", "rds_dnf_uf", /* 8-10 */
241 NULL, /* reserved */
242 "dn_sync", "up_sync", "rds_dn_sync", /* 12-14 */
243 NULL, /* reserved */
244 "opc_err", "par_err", "rip_err", /* 16-18 */
245 "pci_abort", "ber_irq", "mchg_irq" /* 19-21 */
02b20b0b
MCC
246};
247
248/*
249 * BOARD Specific: Threats IRQ audio specific calls
250 */
8889a8a5
OP
251static void cx25821_aud_irq(struct cx25821_audio_dev *chip, u32 status,
252 u32 mask)
02b20b0b
MCC
253{
254 struct cx25821_dev *dev = chip->dev;
255
8889a8a5 256 if (0 == (status & mask))
02b20b0b 257 return;
02b20b0b
MCC
258
259 cx_write(AUD_A_INT_STAT, status);
1a9fc855 260 if (debug > 1 || (status & mask & ~0xff))
02b20b0b 261 cx25821_print_irqbits(dev->name, "irq aud",
1a9fc855
MCC
262 cx25821_aud_irqs,
263 ARRAY_SIZE(cx25821_aud_irqs), status,
264 mask);
02b20b0b
MCC
265
266 /* risc op code error */
267 if (status & AUD_INT_OPC_ERR) {
36d89f7d 268 pr_warn("WARNING %s/1: Audio risc op code error\n", dev->name);
1a9fc855
MCC
269
270 cx_clear(AUD_INT_DMA_CTL,
271 FLD_AUD_DST_A_RISC_EN | FLD_AUD_DST_A_FIFO_EN);
272 cx25821_sram_channel_dump_audio(dev,
273 &cx25821_sram_channels
274 [AUDIO_SRAM_CHANNEL]);
02b20b0b
MCC
275 }
276 if (status & AUD_INT_DN_SYNC) {
36d89f7d 277 pr_warn("WARNING %s: Downstream sync error!\n", dev->name);
02b20b0b
MCC
278 cx_write(AUD_A_GPCNT_CTL, GP_COUNT_CONTROL_RESET);
279 return;
280 }
281
02b20b0b
MCC
282 /* risc1 downstream */
283 if (status & AUD_INT_DN_RISCI1) {
284 atomic_set(&chip->count, cx_read(AUD_A_GPCNT));
285 snd_pcm_period_elapsed(chip->substream);
286 }
287}
288
02b20b0b
MCC
289/*
290 * BOARD Specific: Handles IRQ calls
291 */
292static irqreturn_t cx25821_irq(int irq, void *dev_id)
293{
8889a8a5 294 struct cx25821_audio_dev *chip = dev_id;
02b20b0b
MCC
295 struct cx25821_dev *dev = chip->dev;
296 u32 status, pci_status;
297 u32 audint_status, audint_mask;
298 int loop, handled = 0;
299 int audint_count = 0;
300
02b20b0b 301 audint_status = cx_read(AUD_A_INT_STAT);
1a9fc855 302 audint_mask = cx_read(AUD_A_INT_MSK);
02b20b0b
MCC
303 audint_count = cx_read(AUD_A_GPCNT);
304 status = cx_read(PCI_INT_STAT);
305
1a9fc855 306 for (loop = 0; loop < 1; loop++) {
02b20b0b 307 status = cx_read(PCI_INT_STAT);
1a9fc855 308 if (0 == status) {
02b20b0b
MCC
309 status = cx_read(PCI_INT_STAT);
310 audint_status = cx_read(AUD_A_INT_STAT);
311 audint_mask = cx_read(AUD_A_INT_MSK);
312
1a9fc855 313 if (status) {
02b20b0b
MCC
314 handled = 1;
315 cx_write(PCI_INT_STAT, status);
316
1a9fc855
MCC
317 cx25821_aud_irq(chip, audint_status,
318 audint_mask);
02b20b0b 319 break;
1a9fc855 320 } else
02b20b0b
MCC
321 goto out;
322 }
323
324 handled = 1;
325 cx_write(PCI_INT_STAT, status);
326
327 cx25821_aud_irq(chip, audint_status, audint_mask);
328 }
329
330 pci_status = cx_read(PCI_INT_STAT);
331
332 if (handled)
333 cx_write(PCI_INT_STAT, pci_status);
334
8889a8a5 335out:
02b20b0b
MCC
336 return IRQ_RETVAL(handled);
337}
338
8889a8a5 339static int dsp_buffer_free(struct cx25821_audio_dev *chip)
02b20b0b
MCC
340{
341 BUG_ON(!chip->dma_size);
342
1a9fc855 343 dprintk(2, "Freeing buffer\n");
95268403 344 videobuf_dma_unmap(&chip->pci->dev, chip->dma_risc);
02b20b0b 345 videobuf_dma_free(chip->dma_risc);
1a9fc855 346 btcx_riscmem_free(chip->pci, &chip->buf->risc);
02b20b0b
MCC
347 kfree(chip->buf);
348
349 chip->dma_risc = NULL;
350 chip->dma_size = 0;
351
352 return 0;
353}
354
355/****************************************************************************
356 ALSA PCM Interface
357 ****************************************************************************/
358
359/*
360 * Digital hardware definition
361 */
362#define DEFAULT_FIFO_SIZE 384
363static struct snd_pcm_hardware snd_cx25821_digital_hw = {
364 .info = SNDRV_PCM_INFO_MMAP |
1a9fc855
MCC
365 SNDRV_PCM_INFO_INTERLEAVED |
366 SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID,
02b20b0b
MCC
367 .formats = SNDRV_PCM_FMTBIT_S16_LE,
368
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MCC
369 .rates = SNDRV_PCM_RATE_48000,
370 .rate_min = 48000,
371 .rate_max = 48000,
02b20b0b
MCC
372 .channels_min = 2,
373 .channels_max = 2,
374 /* Analog audio output will be full of clicks and pops if there
375 are not exactly four lines in the SRAM FIFO buffer. */
1a9fc855
MCC
376 .period_bytes_min = DEFAULT_FIFO_SIZE / 3,
377 .period_bytes_max = DEFAULT_FIFO_SIZE / 3,
02b20b0b
MCC
378 .periods_min = 1,
379 .periods_max = AUDIO_LINE_SIZE,
8889a8a5
OP
380 /* 128 * 128 = 16384 = 1024 * 16 */
381 .buffer_bytes_max = (AUDIO_LINE_SIZE * AUDIO_LINE_SIZE),
02b20b0b
MCC
382};
383
02b20b0b
MCC
384/*
385 * audio pcm capture open callback
386 */
387static int snd_cx25821_pcm_open(struct snd_pcm_substream *substream)
388{
8889a8a5 389 struct cx25821_audio_dev *chip = snd_pcm_substream_chip(substream);
02b20b0b
MCC
390 struct snd_pcm_runtime *runtime = substream->runtime;
391 int err;
392 unsigned int bpl = 0;
393
394 if (!chip) {
36d89f7d 395 pr_err("DEBUG: cx25821 can't find device struct. Can't proceed with open\n");
02b20b0b
MCC
396 return -ENODEV;
397 }
398
1a9fc855
MCC
399 err =
400 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS);
02b20b0b
MCC
401 if (err < 0)
402 goto _error;
403
404 chip->substream = substream;
405
406 runtime->hw = snd_cx25821_digital_hw;
407
1a9fc855
MCC
408 if (cx25821_sram_channels[AUDIO_SRAM_CHANNEL].fifo_size !=
409 DEFAULT_FIFO_SIZE) {
8889a8a5
OP
410 /* since there are 3 audio Clusters */
411 bpl = cx25821_sram_channels[AUDIO_SRAM_CHANNEL].fifo_size / 3;
1a9fc855 412 bpl &= ~7; /* must be multiple of 8 */
02b20b0b 413
8889a8a5 414 if (bpl > AUDIO_LINE_SIZE)
02b20b0b 415 bpl = AUDIO_LINE_SIZE;
8889a8a5 416
02b20b0b
MCC
417 runtime->hw.period_bytes_min = bpl;
418 runtime->hw.period_bytes_max = bpl;
419 }
420
421 return 0;
8889a8a5 422_error:
1a9fc855 423 dprintk(1, "Error opening PCM!\n");
02b20b0b
MCC
424 return err;
425}
426
427/*
428 * audio close callback
429 */
430static int snd_cx25821_close(struct snd_pcm_substream *substream)
431{
432 return 0;
433}
434
435/*
436 * hw_params callback
437 */
1a9fc855
MCC
438static int snd_cx25821_hw_params(struct snd_pcm_substream *substream,
439 struct snd_pcm_hw_params *hw_params)
02b20b0b 440{
8889a8a5 441 struct cx25821_audio_dev *chip = snd_pcm_substream_chip(substream);
02b20b0b
MCC
442 struct videobuf_dmabuf *dma;
443
fecfedeb 444 struct cx25821_audio_buffer *buf;
02b20b0b
MCC
445 int ret;
446
447 if (substream->runtime->dma_area) {
448 dsp_buffer_free(chip);
449 substream->runtime->dma_area = NULL;
450 }
451
02b20b0b
MCC
452 chip->period_size = params_period_bytes(hw_params);
453 chip->num_periods = params_periods(hw_params);
454 chip->dma_size = chip->period_size * params_periods(hw_params);
455
456 BUG_ON(!chip->dma_size);
1a9fc855 457 BUG_ON(chip->num_periods & (chip->num_periods - 1));
02b20b0b 458
fecfedeb 459 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
02b20b0b
MCC
460 if (NULL == buf)
461 return -ENOMEM;
462
8889a8a5 463 if (chip->period_size > AUDIO_LINE_SIZE)
02b20b0b 464 chip->period_size = AUDIO_LINE_SIZE;
02b20b0b 465
1a9fc855 466 buf->bpl = chip->period_size;
02b20b0b 467
fecfedeb 468 dma = &buf->dma;
02b20b0b 469 videobuf_dma_init(dma);
02b20b0b 470 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE,
fecfedeb 471 (PAGE_ALIGN(chip->dma_size) >>
1a9fc855 472 PAGE_SHIFT));
02b20b0b
MCC
473 if (ret < 0)
474 goto error;
475
95268403 476 ret = videobuf_dma_map(&chip->pci->dev, dma);
02b20b0b
MCC
477 if (ret < 0)
478 goto error;
479
1a9fc855
MCC
480 ret =
481 cx25821_risc_databuffer_audio(chip->pci, &buf->risc, dma->sglist,
fecfedeb
LP
482 chip->period_size, chip->num_periods,
483 1);
1a9fc855 484 if (ret < 0) {
36d89f7d 485 pr_info("DEBUG: ERROR after cx25821_risc_databuffer_audio()\n");
02b20b0b
MCC
486 goto error;
487 }
488
02b20b0b 489 /* Loop back to start of program */
1a9fc855 490 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
02b20b0b 491 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
1a9fc855 492 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
02b20b0b 493
02b20b0b
MCC
494 chip->buf = buf;
495 chip->dma_risc = dma;
496
bb6dbe74 497 substream->runtime->dma_area = chip->dma_risc->vaddr;
02b20b0b
MCC
498 substream->runtime->dma_bytes = chip->dma_size;
499 substream->runtime->dma_addr = 0;
500
501 return 0;
502
8889a8a5 503error:
02b20b0b
MCC
504 kfree(buf);
505 return ret;
506}
507
508/*
509 * hw free callback
510 */
1a9fc855 511static int snd_cx25821_hw_free(struct snd_pcm_substream *substream)
02b20b0b 512{
8889a8a5 513 struct cx25821_audio_dev *chip = snd_pcm_substream_chip(substream);
02b20b0b
MCC
514
515 if (substream->runtime->dma_area) {
516 dsp_buffer_free(chip);
517 substream->runtime->dma_area = NULL;
518 }
519
520 return 0;
521}
522
523/*
524 * prepare callback
525 */
526static int snd_cx25821_prepare(struct snd_pcm_substream *substream)
527{
528 return 0;
529}
530
531/*
532 * trigger callback
533 */
1a9fc855
MCC
534static int snd_cx25821_card_trigger(struct snd_pcm_substream *substream,
535 int cmd)
02b20b0b 536{
8889a8a5 537 struct cx25821_audio_dev *chip = snd_pcm_substream_chip(substream);
02b20b0b
MCC
538 int err = 0;
539
540 /* Local interrupts are already disabled by ALSA */
541 spin_lock(&chip->reg_lock);
542
1a9fc855
MCC
543 switch (cmd) {
544 case SNDRV_PCM_TRIGGER_START:
545 err = _cx25821_start_audio_dma(chip);
546 break;
547 case SNDRV_PCM_TRIGGER_STOP:
548 err = _cx25821_stop_audio_dma(chip);
549 break;
550 default:
551 err = -EINVAL;
552 break;
02b20b0b
MCC
553 }
554
555 spin_unlock(&chip->reg_lock);
556
557 return err;
558}
559
560/*
561 * pointer callback
562 */
1a9fc855
MCC
563static snd_pcm_uframes_t snd_cx25821_pointer(struct snd_pcm_substream
564 *substream)
02b20b0b 565{
8889a8a5 566 struct cx25821_audio_dev *chip = snd_pcm_substream_chip(substream);
02b20b0b
MCC
567 struct snd_pcm_runtime *runtime = substream->runtime;
568 u16 count;
569
570 count = atomic_read(&chip->count);
571
1a9fc855 572 return runtime->period_size * (count & (runtime->periods - 1));
02b20b0b
MCC
573}
574
575/*
576 * page callback (needed for mmap)
577 */
578static struct page *snd_cx25821_page(struct snd_pcm_substream *substream,
1a9fc855 579 unsigned long offset)
02b20b0b
MCC
580{
581 void *pageptr = substream->runtime->dma_area + offset;
582
583 return vmalloc_to_page(pageptr);
584}
585
586/*
587 * operators
588 */
589static struct snd_pcm_ops snd_cx25821_pcm_ops = {
590 .open = snd_cx25821_pcm_open,
591 .close = snd_cx25821_close,
592 .ioctl = snd_pcm_lib_ioctl,
593 .hw_params = snd_cx25821_hw_params,
594 .hw_free = snd_cx25821_hw_free,
595 .prepare = snd_cx25821_prepare,
596 .trigger = snd_cx25821_card_trigger,
597 .pointer = snd_cx25821_pointer,
598 .page = snd_cx25821_page,
599};
600
02b20b0b 601/*
8889a8a5
OP
602 * ALSA create a PCM device: Called when initializing the board.
603 * Sets up the name and hooks up the callbacks
02b20b0b 604 */
8889a8a5
OP
605static int snd_cx25821_pcm(struct cx25821_audio_dev *chip, int device,
606 char *name)
02b20b0b
MCC
607{
608 struct snd_pcm *pcm;
609 int err;
610
611 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
1a9fc855 612 if (err < 0) {
36d89f7d 613 pr_info("ERROR: FAILED snd_pcm_new() in %s\n", __func__);
02b20b0b
MCC
614 return err;
615 }
616 pcm->private_data = chip;
617 pcm->info_flags = 0;
618 strcpy(pcm->name, name);
619 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cx25821_pcm_ops);
620
621 return 0;
622}
623
02b20b0b
MCC
624/****************************************************************************
625 Basic Flow for Sound Devices
626 ****************************************************************************/
627
628/*
629 * PCI ID Table - 14f1:8801 and 14f1:8811 means function 1: Audio
630 * Only boards with eeprom and byte 1 at eeprom=1 have it
631 */
632
94ab8963 633static DEFINE_PCI_DEVICE_TABLE(cx25821_audio_pci_tbl) = {
1a9fc855
MCC
634 {0x14f1, 0x0920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
635 {0,}
02b20b0b 636};
1a9fc855 637
02b20b0b
MCC
638MODULE_DEVICE_TABLE(pci, cx25821_audio_pci_tbl);
639
1a9fc855
MCC
640/*
641 * Not used in the function snd_cx25821_dev_free so removing
642 * from the file.
643 */
02b20b0b 644/*
8889a8a5 645static int snd_cx25821_free(struct cx25821_audio_dev *chip)
02b20b0b
MCC
646{
647 if (chip->irq >= 0)
648 free_irq(chip->irq, chip);
649
650 cx25821_dev_unregister(chip->dev);
651 pci_disable_device(chip->pci);
652
653 return 0;
654}
1a9fc855 655*/
02b20b0b
MCC
656
657/*
658 * Component Destructor
659 */
1a9fc855 660static void snd_cx25821_dev_free(struct snd_card *card)
02b20b0b 661{
8889a8a5 662 struct cx25821_audio_dev *chip = card->private_data;
02b20b0b 663
8889a8a5 664 /* snd_cx25821_free(chip); */
02b20b0b
MCC
665 snd_card_free(chip->card);
666}
667
02b20b0b
MCC
668/*
669 * Alsa Constructor - Component probe
670 */
671static int cx25821_audio_initdev(struct cx25821_dev *dev)
672{
1a9fc855 673 struct snd_card *card;
8889a8a5 674 struct cx25821_audio_dev *chip;
1a9fc855 675 int err;
02b20b0b 676
1a9fc855 677 if (devno >= SNDRV_CARDS) {
36d89f7d 678 pr_info("DEBUG ERROR: devno >= SNDRV_CARDS %s\n", __func__);
8889a8a5 679 return -ENODEV;
02b20b0b
MCC
680 }
681
682 if (!enable[devno]) {
683 ++devno;
36d89f7d 684 pr_info("DEBUG ERROR: !enable[devno] %s\n", __func__);
8889a8a5 685 return -ENOENT;
02b20b0b
MCC
686 }
687
53e712d0 688 err = snd_card_create(index[devno], id[devno], THIS_MODULE,
8889a8a5 689 sizeof(struct cx25821_audio_dev), &card);
53e712d0 690 if (err < 0) {
36d89f7d
JP
691 pr_info("DEBUG ERROR: cannot create snd_card_new in %s\n",
692 __func__);
53e712d0 693 return err;
02b20b0b
MCC
694 }
695
696 strcpy(card->driver, "cx25821");
697
698 /* Card "creation" */
699 card->private_free = snd_cx25821_dev_free;
ba952d84 700 chip = card->private_data;
02b20b0b
MCC
701 spin_lock_init(&chip->reg_lock);
702
703 chip->dev = dev;
704 chip->card = card;
705 chip->pci = dev->pci;
706 chip->iobase = pci_resource_start(dev->pci, 0);
707
02b20b0b
MCC
708 chip->irq = dev->pci->irq;
709
710 err = request_irq(dev->pci->irq, cx25821_irq,
18e9351e 711 IRQF_SHARED, chip->dev->name, chip);
02b20b0b
MCC
712
713 if (err < 0) {
36d89f7d 714 pr_err("ERROR %s: can't get IRQ %d for ALSA\n",
1a9fc855 715 chip->dev->name, dev->pci->irq);
02b20b0b
MCC
716 goto error;
717 }
718
629dcf23 719 err = snd_cx25821_pcm(chip, 0, "cx25821 Digital");
720 if (err < 0) {
36d89f7d
JP
721 pr_info("DEBUG ERROR: cannot create snd_cx25821_pcm %s\n",
722 __func__);
02b20b0b
MCC
723 goto error;
724 }
725
726 snd_card_set_dev(card, &chip->pci->dev);
727
02b20b0b 728 strcpy(card->shortname, "cx25821");
1a9fc855
MCC
729 sprintf(card->longname, "%s at 0x%lx irq %d", chip->dev->name,
730 chip->iobase, chip->irq);
731 strcpy(card->mixername, "CX25821");
02b20b0b 732
36d89f7d
JP
733 pr_info("%s/%i: ALSA support for cx25821 boards\n",
734 card->driver, devno);
02b20b0b
MCC
735
736 err = snd_card_register(card);
1a9fc855 737 if (err < 0) {
36d89f7d
JP
738 pr_info("DEBUG ERROR: cannot register sound card %s\n",
739 __func__);
02b20b0b
MCC
740 goto error;
741 }
742
743 snd_cx25821_cards[devno] = card;
744
745 devno++;
746 return 0;
747
8889a8a5 748error:
02b20b0b
MCC
749 snd_card_free(card);
750 return err;
751}
752
02b20b0b
MCC
753/****************************************************************************
754 LINUX MODULE INIT
755 ****************************************************************************/
756static void cx25821_audio_fini(void)
757{
758 snd_card_free(snd_cx25821_cards[0]);
759}
760
761/*
762 * Module initializer
763 *
764 * Loops through present saa7134 cards, and assigns an ALSA device
765 * to each one
766 *
767 */
768static int cx25821_alsa_init(void)
769{
770 struct cx25821_dev *dev = NULL;
771 struct list_head *list;
772
0cd301f1 773 mutex_lock(&cx25821_devlist_mutex);
1a9fc855 774 list_for_each(list, &cx25821_devlist) {
02b20b0b
MCC
775 dev = list_entry(list, struct cx25821_dev, devlist);
776 cx25821_audio_initdev(dev);
777 }
0cd301f1 778 mutex_unlock(&cx25821_devlist_mutex);
02b20b0b
MCC
779
780 if (dev == NULL)
36d89f7d 781 pr_info("ERROR ALSA: no cx25821 cards found\n");
02b20b0b
MCC
782
783 return 0;
784
785}
786
787late_initcall(cx25821_alsa_init);
788module_exit(cx25821_audio_fini);
789
790/* ----------------------------------------------------------- */
791/*
792 * Local variables:
793 * c-basic-offset: 8
794 * End:
795 */
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