Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | |
3 | cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver | |
4 | ||
5 | (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version] | |
6 | (c) 2002 Yurij Sysoev <yurij@naturesoft.net> | |
7 | (c) 2003 Gerd Knorr <kraxel@bytesex.org> | |
8 | ||
9 | ----------------------------------------------------------------------- | |
10 | ||
11 | Lot of voodoo here. Even the data sheet doesn't help to | |
12 | understand what is going on here, the documentation for the audio | |
13 | part of the cx2388x chip is *very* bad. | |
14 | ||
15 | Some of this comes from party done linux driver sources I got from | |
16 | [undocumented]. | |
17 | ||
18 | Some comes from the dscaler sources, one of the dscaler driver guy works | |
19 | for Conexant ... | |
20 | ||
21 | ----------------------------------------------------------------------- | |
22 | ||
23 | This program is free software; you can redistribute it and/or modify | |
24 | it under the terms of the GNU General Public License as published by | |
25 | the Free Software Foundation; either version 2 of the License, or | |
26 | (at your option) any later version. | |
27 | ||
28 | This program is distributed in the hope that it will be useful, | |
29 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
30 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
31 | GNU General Public License for more details. | |
32 | ||
33 | You should have received a copy of the GNU General Public License | |
34 | along with this program; if not, write to the Free Software | |
35 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
36 | */ | |
37 | ||
38 | #include <linux/module.h> | |
39 | #include <linux/moduleparam.h> | |
40 | #include <linux/errno.h> | |
41 | #include <linux/kernel.h> | |
42 | #include <linux/slab.h> | |
43 | #include <linux/mm.h> | |
44 | #include <linux/poll.h> | |
45 | #include <linux/pci.h> | |
46 | #include <linux/signal.h> | |
47 | #include <linux/ioport.h> | |
48 | #include <linux/sched.h> | |
49 | #include <linux/types.h> | |
50 | #include <linux/interrupt.h> | |
51 | #include <linux/vmalloc.h> | |
52 | #include <linux/init.h> | |
53 | #include <linux/smp_lock.h> | |
54 | #include <linux/delay.h> | |
55 | #include <linux/kthread.h> | |
56 | ||
57 | #include "cx88.h" | |
58 | ||
59 | static unsigned int audio_debug = 0; | |
60 | module_param(audio_debug,int,0644); | |
61 | MODULE_PARM_DESC(audio_debug,"enable debug messages [audio]"); | |
62 | ||
63 | #define dprintk(fmt, arg...) if (audio_debug) \ | |
64 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) | |
65 | ||
66 | /* ----------------------------------------------------------- */ | |
67 | ||
68 | static char *aud_ctl_names[64] = | |
69 | { | |
70 | [ EN_BTSC_FORCE_MONO ] = "BTSC_FORCE_MONO", | |
71 | [ EN_BTSC_FORCE_STEREO ] = "BTSC_FORCE_STEREO", | |
72 | [ EN_BTSC_FORCE_SAP ] = "BTSC_FORCE_SAP", | |
73 | [ EN_BTSC_AUTO_STEREO ] = "BTSC_AUTO_STEREO", | |
74 | [ EN_BTSC_AUTO_SAP ] = "BTSC_AUTO_SAP", | |
75 | [ EN_A2_FORCE_MONO1 ] = "A2_FORCE_MONO1", | |
76 | [ EN_A2_FORCE_MONO2 ] = "A2_FORCE_MONO2", | |
77 | [ EN_A2_FORCE_STEREO ] = "A2_FORCE_STEREO", | |
78 | [ EN_A2_AUTO_MONO2 ] = "A2_AUTO_MONO2", | |
79 | [ EN_A2_AUTO_STEREO ] = "A2_AUTO_STEREO", | |
80 | [ EN_EIAJ_FORCE_MONO1 ] = "EIAJ_FORCE_MONO1", | |
81 | [ EN_EIAJ_FORCE_MONO2 ] = "EIAJ_FORCE_MONO2", | |
82 | [ EN_EIAJ_FORCE_STEREO ] = "EIAJ_FORCE_STEREO", | |
83 | [ EN_EIAJ_AUTO_MONO2 ] = "EIAJ_AUTO_MONO2", | |
84 | [ EN_EIAJ_AUTO_STEREO ] = "EIAJ_AUTO_STEREO", | |
85 | [ EN_NICAM_FORCE_MONO1 ] = "NICAM_FORCE_MONO1", | |
86 | [ EN_NICAM_FORCE_MONO2 ] = "NICAM_FORCE_MONO2", | |
87 | [ EN_NICAM_FORCE_STEREO ] = "NICAM_FORCE_STEREO", | |
88 | [ EN_NICAM_AUTO_MONO2 ] = "NICAM_AUTO_MONO2", | |
89 | [ EN_NICAM_AUTO_STEREO ] = "NICAM_AUTO_STEREO", | |
90 | [ EN_FMRADIO_FORCE_MONO ] = "FMRADIO_FORCE_MONO", | |
91 | [ EN_FMRADIO_FORCE_STEREO ] = "FMRADIO_FORCE_STEREO", | |
92 | [ EN_FMRADIO_AUTO_STEREO ] = "FMRADIO_AUTO_STEREO", | |
93 | }; | |
94 | ||
95 | struct rlist { | |
96 | u32 reg; | |
97 | u32 val; | |
98 | }; | |
99 | ||
100 | static void set_audio_registers(struct cx88_core *core, | |
101 | const struct rlist *l) | |
102 | { | |
103 | int i; | |
104 | ||
105 | for (i = 0; l[i].reg; i++) { | |
106 | switch (l[i].reg) { | |
107 | case AUD_PDF_DDS_CNST_BYTE2: | |
108 | case AUD_PDF_DDS_CNST_BYTE1: | |
109 | case AUD_PDF_DDS_CNST_BYTE0: | |
110 | case AUD_QAM_MODE: | |
111 | case AUD_PHACC_FREQ_8MSB: | |
112 | case AUD_PHACC_FREQ_8LSB: | |
113 | cx_writeb(l[i].reg, l[i].val); | |
114 | break; | |
115 | default: | |
116 | cx_write(l[i].reg, l[i].val); | |
117 | break; | |
118 | } | |
119 | } | |
120 | } | |
121 | ||
122 | static void set_audio_start(struct cx88_core *core, | |
e52e98a7 | 123 | u32 mode) |
1da177e4 LT |
124 | { |
125 | // mute | |
126 | cx_write(AUD_VOL_CTL, (1 << 6)); | |
127 | ||
1da177e4 LT |
128 | // start programming |
129 | cx_write(AUD_CTL, 0x0000); | |
130 | cx_write(AUD_INIT, mode); | |
131 | cx_write(AUD_INIT_LD, 0x0001); | |
132 | cx_write(AUD_SOFT_RESET, 0x0001); | |
1da177e4 LT |
133 | } |
134 | ||
e52e98a7 | 135 | static void set_audio_finish(struct cx88_core *core, u32 ctl) |
1da177e4 LT |
136 | { |
137 | u32 volume; | |
138 | ||
139 | if (cx88_boards[core->board].blackbird) { | |
b45009b0 MCC |
140 | // sets sound input from external adc |
141 | cx_set(AUD_CTL, EN_I2SIN_ENABLE); | |
142 | //cx_write(AUD_I2SINPUTCNTL, 0); | |
143 | cx_write(AUD_I2SINPUTCNTL, 4); | |
144 | cx_write(AUD_BAUDRATE, 1); | |
1da177e4 | 145 | // 'pass-thru mode': this enables the i2s output to the mpeg encoder |
b45009b0 | 146 | cx_set(AUD_CTL, EN_I2SOUT_ENABLE); |
1da177e4 | 147 | cx_write(AUD_I2SOUTPUTCNTL, 1); |
b45009b0 | 148 | cx_write(AUD_I2SCNTL, 0); |
1da177e4 | 149 | //cx_write(AUD_APB_IN_RATE_ADJ, 0); |
e52e98a7 MCC |
150 | } else { |
151 | ctl |= EN_DAC_ENABLE; | |
152 | cx_write(AUD_CTL, ctl); | |
1da177e4 LT |
153 | } |
154 | ||
e52e98a7 | 155 | /* finish programming */ |
1da177e4 LT |
156 | cx_write(AUD_SOFT_RESET, 0x0000); |
157 | ||
e52e98a7 | 158 | /* unmute */ |
1da177e4 LT |
159 | volume = cx_sread(SHADOW_AUD_VOL_CTL); |
160 | cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume); | |
161 | } | |
162 | ||
163 | /* ----------------------------------------------------------- */ | |
164 | ||
e52e98a7 | 165 | static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, u32 mode) |
1da177e4 LT |
166 | { |
167 | static const struct rlist btsc[] = { | |
e52e98a7 | 168 | { AUD_AFE_12DB_EN, 0x00000001 }, |
1da177e4 LT |
169 | { AUD_OUT1_SEL, 0x00000013 }, |
170 | { AUD_OUT1_SHIFT, 0x00000000 }, | |
171 | { AUD_POLY0_DDS_CONSTANT, 0x0012010c }, | |
172 | { AUD_DMD_RA_DDS, 0x00c3e7aa }, | |
173 | { AUD_DBX_IN_GAIN, 0x00004734 }, | |
174 | { AUD_DBX_WBE_GAIN, 0x00004640 }, | |
175 | { AUD_DBX_SE_GAIN, 0x00008d31 }, | |
176 | { AUD_DCOC_0_SRC, 0x0000001a }, | |
177 | { AUD_IIR1_4_SEL, 0x00000021 }, | |
178 | { AUD_DCOC_PASS_IN, 0x00000003 }, | |
179 | { AUD_DCOC_0_SHIFT_IN0, 0x0000000a }, | |
180 | { AUD_DCOC_0_SHIFT_IN1, 0x00000008 }, | |
181 | { AUD_DCOC_1_SHIFT_IN0, 0x0000000a }, | |
182 | { AUD_DCOC_1_SHIFT_IN1, 0x00000008 }, | |
183 | { AUD_DN0_FREQ, 0x0000283b }, | |
184 | { AUD_DN2_SRC_SEL, 0x00000008 }, | |
185 | { AUD_DN2_FREQ, 0x00003000 }, | |
186 | { AUD_DN2_AFC, 0x00000002 }, | |
187 | { AUD_DN2_SHFT, 0x00000000 }, | |
188 | { AUD_IIR2_2_SEL, 0x00000020 }, | |
189 | { AUD_IIR2_2_SHIFT, 0x00000000 }, | |
190 | { AUD_IIR2_3_SEL, 0x0000001f }, | |
191 | { AUD_IIR2_3_SHIFT, 0x00000000 }, | |
192 | { AUD_CRDC1_SRC_SEL, 0x000003ce }, | |
193 | { AUD_CRDC1_SHIFT, 0x00000000 }, | |
194 | { AUD_CORDIC_SHIFT_1, 0x00000007 }, | |
195 | { AUD_DCOC_1_SRC, 0x0000001b }, | |
196 | { AUD_DCOC1_SHIFT, 0x00000000 }, | |
197 | { AUD_RDSI_SEL, 0x00000008 }, | |
198 | { AUD_RDSQ_SEL, 0x00000008 }, | |
199 | { AUD_RDSI_SHIFT, 0x00000000 }, | |
200 | { AUD_RDSQ_SHIFT, 0x00000000 }, | |
201 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, | |
e52e98a7 | 202 | { /* end of list */ }, |
1da177e4 LT |
203 | }; |
204 | static const struct rlist btsc_sap[] = { | |
e52e98a7 | 205 | { AUD_AFE_12DB_EN, 0x00000001 }, |
1da177e4 LT |
206 | { AUD_DBX_IN_GAIN, 0x00007200 }, |
207 | { AUD_DBX_WBE_GAIN, 0x00006200 }, | |
208 | { AUD_DBX_SE_GAIN, 0x00006200 }, | |
209 | { AUD_IIR1_1_SEL, 0x00000000 }, | |
210 | { AUD_IIR1_3_SEL, 0x00000001 }, | |
211 | { AUD_DN1_SRC_SEL, 0x00000007 }, | |
212 | { AUD_IIR1_4_SHIFT, 0x00000006 }, | |
213 | { AUD_IIR2_1_SHIFT, 0x00000000 }, | |
214 | { AUD_IIR2_2_SHIFT, 0x00000000 }, | |
215 | { AUD_IIR3_0_SHIFT, 0x00000000 }, | |
216 | { AUD_IIR3_1_SHIFT, 0x00000000 }, | |
217 | { AUD_IIR3_0_SEL, 0x0000000d }, | |
218 | { AUD_IIR3_1_SEL, 0x0000000e }, | |
219 | { AUD_DEEMPH1_SRC_SEL, 0x00000014 }, | |
220 | { AUD_DEEMPH1_SHIFT, 0x00000000 }, | |
221 | { AUD_DEEMPH1_G0, 0x00004000 }, | |
222 | { AUD_DEEMPH1_A0, 0x00000000 }, | |
223 | { AUD_DEEMPH1_B0, 0x00000000 }, | |
224 | { AUD_DEEMPH1_A1, 0x00000000 }, | |
225 | { AUD_DEEMPH1_B1, 0x00000000 }, | |
226 | { AUD_OUT0_SEL, 0x0000003f }, | |
227 | { AUD_OUT1_SEL, 0x0000003f }, | |
228 | { AUD_DN1_AFC, 0x00000002 }, | |
229 | { AUD_DCOC_0_SHIFT_IN0, 0x0000000a }, | |
230 | { AUD_DCOC_0_SHIFT_IN1, 0x00000008 }, | |
231 | { AUD_DCOC_1_SHIFT_IN0, 0x0000000a }, | |
232 | { AUD_DCOC_1_SHIFT_IN1, 0x00000008 }, | |
233 | { AUD_IIR1_0_SEL, 0x0000001d }, | |
234 | { AUD_IIR1_2_SEL, 0x0000001e }, | |
235 | { AUD_IIR2_1_SEL, 0x00000002 }, | |
236 | { AUD_IIR2_2_SEL, 0x00000004 }, | |
237 | { AUD_IIR3_2_SEL, 0x0000000f }, | |
238 | { AUD_DCOC2_SHIFT, 0x00000001 }, | |
239 | { AUD_IIR3_2_SHIFT, 0x00000001 }, | |
240 | { AUD_DEEMPH0_SRC_SEL, 0x00000014 }, | |
241 | { AUD_CORDIC_SHIFT_1, 0x00000006 }, | |
242 | { AUD_POLY0_DDS_CONSTANT, 0x000e4db2 }, | |
243 | { AUD_DMD_RA_DDS, 0x00f696e6 }, | |
244 | { AUD_IIR2_3_SEL, 0x00000025 }, | |
245 | { AUD_IIR1_4_SEL, 0x00000021 }, | |
246 | { AUD_DN1_FREQ, 0x0000c965 }, | |
247 | { AUD_DCOC_PASS_IN, 0x00000003 }, | |
248 | { AUD_DCOC_0_SRC, 0x0000001a }, | |
249 | { AUD_DCOC_1_SRC, 0x0000001b }, | |
250 | { AUD_DCOC1_SHIFT, 0x00000000 }, | |
251 | { AUD_RDSI_SEL, 0x00000009 }, | |
252 | { AUD_RDSQ_SEL, 0x00000009 }, | |
253 | { AUD_RDSI_SHIFT, 0x00000000 }, | |
254 | { AUD_RDSQ_SHIFT, 0x00000000 }, | |
255 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, | |
e52e98a7 | 256 | { /* end of list */ }, |
1da177e4 LT |
257 | }; |
258 | ||
e52e98a7 MCC |
259 | mode |= EN_FMRADIO_EN_RDS; |
260 | ||
1da177e4 LT |
261 | if (sap) { |
262 | dprintk("%s SAP (status: unknown)\n",__FUNCTION__); | |
e52e98a7 | 263 | set_audio_start(core, SEL_SAP); |
1da177e4 | 264 | set_audio_registers(core, btsc_sap); |
e52e98a7 | 265 | set_audio_finish(core, mode); |
1da177e4 LT |
266 | } else { |
267 | dprintk("%s (status: known-good)\n",__FUNCTION__); | |
e52e98a7 | 268 | set_audio_start(core, SEL_BTSC); |
1da177e4 | 269 | set_audio_registers(core, btsc); |
e52e98a7 | 270 | set_audio_finish(core, mode); |
1da177e4 | 271 | } |
1da177e4 LT |
272 | } |
273 | ||
b1706b91 | 274 | static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode) |
1da177e4 | 275 | { |
e52e98a7 | 276 | static const struct rlist nicam_l[] = { |
b1706b91 TS |
277 | { AUD_AFE_12DB_EN, 0x00000001}, |
278 | { AUD_RATE_ADJ1, 0x00000060 }, | |
279 | { AUD_RATE_ADJ2, 0x000000F9 }, | |
280 | { AUD_RATE_ADJ3, 0x000001CC }, | |
281 | { AUD_RATE_ADJ4, 0x000002B3 }, | |
282 | { AUD_RATE_ADJ5, 0x00000726 }, | |
283 | { AUD_DEEMPHDENOM1_R, 0x0000F3D0 }, | |
284 | { AUD_DEEMPHDENOM2_R, 0x00000000 }, | |
285 | { AUD_ERRLOGPERIOD_R, 0x00000064 }, | |
286 | { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, | |
287 | { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, | |
288 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, | |
289 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, | |
290 | { AUD_DMD_RA_DDS, 0x00C00000 }, | |
291 | { AUD_PLL_INT, 0x0000001E }, | |
292 | { AUD_PLL_DDS, 0x00000000 }, | |
293 | { AUD_PLL_FRAC, 0x0000E542 }, | |
294 | { AUD_START_TIMER, 0x00000000 }, | |
295 | { AUD_DEEMPHNUMER1_R, 0x000353DE }, | |
296 | { AUD_DEEMPHNUMER2_R, 0x000001B1 }, | |
297 | { AUD_PDF_DDS_CNST_BYTE2, 0x06 }, | |
298 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, | |
299 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, | |
300 | { AUD_QAM_MODE, 0x05 }, | |
301 | { AUD_PHACC_FREQ_8MSB, 0x34 }, | |
302 | { AUD_PHACC_FREQ_8LSB, 0x4C }, | |
303 | { AUD_DEEMPHGAIN_R, 0x00006680 }, | |
304 | { AUD_RATE_THRES_DMD, 0x000000C0 }, | |
e52e98a7 | 305 | { /* end of list */ }, |
b1706b91 | 306 | } ; |
1da177e4 | 307 | |
b1706b91 TS |
308 | static const struct rlist nicam_bgdki_common[] = { |
309 | { AUD_AFE_12DB_EN, 0x00000001}, | |
e52e98a7 MCC |
310 | { AUD_RATE_ADJ1, 0x00000010 }, |
311 | { AUD_RATE_ADJ2, 0x00000040 }, | |
312 | { AUD_RATE_ADJ3, 0x00000100 }, | |
313 | { AUD_RATE_ADJ4, 0x00000400 }, | |
314 | { AUD_RATE_ADJ5, 0x00001000 }, | |
b1706b91 TS |
315 | //{ AUD_DMD_RA_DDS, 0x00c0d5ce }, |
316 | { AUD_ERRLOGPERIOD_R, 0x00000fff}, | |
317 | { AUD_ERRINTRPTTHSHLD1_R, 0x000003ff}, | |
318 | { AUD_ERRINTRPTTHSHLD2_R, 0x000000ff}, | |
319 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000003f}, | |
320 | { AUD_POLYPH80SCALEFAC, 0x00000003}, | |
321 | { AUD_DEEMPHGAIN_R, 0x000023c2}, | |
322 | { AUD_DEEMPHNUMER1_R, 0x0002a7bc}, | |
323 | { AUD_DEEMPHNUMER2_R, 0x0003023e}, | |
324 | { AUD_DEEMPHDENOM1_R, 0x0000f3d0}, | |
325 | { AUD_DEEMPHDENOM2_R, 0x00000000}, | |
e52e98a7 MCC |
326 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, |
327 | { AUD_PDF_DDS_CNST_BYTE0, 0x16 }, | |
328 | { AUD_QAM_MODE, 0x05 }, | |
b1706b91 TS |
329 | { /* end of list */ }, |
330 | }; | |
331 | ||
332 | static const struct rlist nicam_i[] = { | |
e52e98a7 MCC |
333 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, |
334 | { AUD_PHACC_FREQ_8MSB, 0x3a }, | |
335 | { AUD_PHACC_FREQ_8LSB, 0x93 }, | |
336 | { /* end of list */ }, | |
337 | }; | |
338 | ||
b1706b91 TS |
339 | static const struct rlist nicam_default[] = { |
340 | { AUD_PDF_DDS_CNST_BYTE0, 0x16 }, | |
341 | { AUD_PHACC_FREQ_8MSB, 0x34 }, | |
342 | { AUD_PHACC_FREQ_8LSB, 0x4c }, | |
343 | { /* end of list */ }, | |
344 | }; | |
e52e98a7 | 345 | |
b1706b91 TS |
346 | switch (core->tvaudio) { |
347 | case WW_L: | |
348 | dprintk("%s SECAM-L NICAM (status: devel)\n",__FUNCTION__); | |
349 | set_audio_registers(core, nicam_l); | |
350 | break; | |
351 | case WW_I: | |
352 | dprintk("%s PAL-I NICAM (status: devel)\n",__FUNCTION__); | |
353 | set_audio_registers(core, nicam_bgdki_common); | |
354 | set_audio_registers(core, nicam_i); | |
355 | break; | |
356 | default: | |
357 | dprintk("%s PAL-BGDK NICAM (status: unknown)\n",__FUNCTION__); | |
358 | set_audio_registers(core, nicam_bgdki_common); | |
359 | set_audio_registers(core, nicam_default); | |
360 | break; | |
361 | }; | |
362 | ||
363 | mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS; | |
364 | set_audio_finish(core, mode); | |
1da177e4 LT |
365 | } |
366 | ||
e52e98a7 | 367 | static void set_audio_standard_A2(struct cx88_core *core, u32 mode) |
1da177e4 | 368 | { |
b1706b91 | 369 | static const struct rlist a2_bgdk_common[] = { |
e52e98a7 MCC |
370 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
371 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | |
372 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | |
373 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, | |
374 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | |
375 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | |
376 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | |
377 | {AUD_QAM_MODE, 0x05}, | |
378 | {AUD_PHACC_FREQ_8MSB, 0x34}, | |
379 | {AUD_PHACC_FREQ_8LSB, 0x4c}, | |
380 | {AUD_RATE_ADJ1, 0x00000100}, | |
381 | {AUD_RATE_ADJ2, 0x00000200}, | |
382 | {AUD_RATE_ADJ3, 0x00000300}, | |
383 | {AUD_RATE_ADJ4, 0x00000400}, | |
384 | {AUD_RATE_ADJ5, 0x00000500}, | |
385 | {AUD_THR_FR, 0x00000000}, | |
386 | {AAGC_HYST, 0x0000001a}, | |
387 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | |
388 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | |
389 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | |
390 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | |
391 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | |
392 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | |
393 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | |
394 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | |
395 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | |
396 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | |
397 | {AUD_MODE_CHG_TIMER, 0x00000040}, | |
398 | {AUD_AFE_12DB_EN, 0x00000001}, | |
399 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | |
400 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | |
401 | {AUD_DEEMPH0_G0, 0x00000380}, | |
402 | {AUD_DEEMPH1_G0, 0x00000380}, | |
403 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
404 | {AUD_DCOC0_SHIFT, 0x00000000}, | |
405 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
406 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
407 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
408 | {AUD_IIR3_0_SEL, 0x00000021}, | |
409 | {AUD_DN2_AFC, 0x00000002}, | |
410 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
411 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
412 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
413 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
414 | {AUD_IIR3_1_SEL, 0x00000023}, | |
415 | {AUD_RDSI_SEL, 0x00000017}, | |
416 | {AUD_RDSI_SHIFT, 0x00000000}, | |
417 | {AUD_RDSQ_SEL, 0x00000017}, | |
418 | {AUD_RDSQ_SHIFT, 0x00000000}, | |
419 | {AUD_PLL_INT, 0x0000001e}, | |
420 | {AUD_PLL_DDS, 0x00000000}, | |
421 | {AUD_PLL_FRAC, 0x0000e542}, | |
422 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | |
423 | {AUD_START_TIMER, 0x00000000}, | |
424 | { /* end of list */ }, | |
425 | }; | |
1da177e4 | 426 | |
e52e98a7 MCC |
427 | static const struct rlist a2_bg[] = { |
428 | {AUD_DMD_RA_DDS, 0x002a4f2f}, | |
429 | {AUD_C1_UP_THR, 0x00007000}, | |
430 | {AUD_C1_LO_THR, 0x00005400}, | |
431 | {AUD_C2_UP_THR, 0x00005400}, | |
432 | {AUD_C2_LO_THR, 0x00003000}, | |
b1706b91 | 433 | { /* end of list */ }, |
1da177e4 LT |
434 | }; |
435 | ||
e52e98a7 MCC |
436 | static const struct rlist a2_dk[] = { |
437 | {AUD_DMD_RA_DDS, 0x002a4f2f}, | |
438 | {AUD_C1_UP_THR, 0x00007000}, | |
439 | {AUD_C1_LO_THR, 0x00005400}, | |
440 | {AUD_C2_UP_THR, 0x00005400}, | |
441 | {AUD_C2_LO_THR, 0x00003000}, | |
442 | {AUD_DN0_FREQ, 0x00003a1c}, | |
443 | {AUD_DN2_FREQ, 0x0000d2e0}, | |
b1706b91 | 444 | { /* end of list */ }, |
1da177e4 | 445 | }; |
b1706b91 TS |
446 | |
447 | static const struct rlist a1_i[] = { | |
448 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | |
449 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | |
450 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | |
451 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, | |
452 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | |
453 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | |
454 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | |
455 | {AUD_QAM_MODE, 0x05}, | |
456 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | |
457 | {AUD_PHACC_FREQ_8LSB, 0x93}, | |
458 | {AUD_DMD_RA_DDS, 0x002a4f2f}, | |
459 | {AUD_PLL_INT, 0x0000001e}, | |
460 | {AUD_PLL_DDS, 0x00000004}, | |
461 | {AUD_PLL_FRAC, 0x0000e542}, | |
462 | {AUD_RATE_ADJ1, 0x00000100}, | |
463 | {AUD_RATE_ADJ2, 0x00000200}, | |
464 | {AUD_RATE_ADJ3, 0x00000300}, | |
465 | {AUD_RATE_ADJ4, 0x00000400}, | |
466 | {AUD_RATE_ADJ5, 0x00000500}, | |
467 | {AUD_THR_FR, 0x00000000}, | |
468 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | |
469 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | |
470 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | |
471 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | |
472 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | |
473 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | |
474 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | |
475 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | |
476 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | |
477 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | |
478 | {AUD_MODE_CHG_TIMER, 0x00000060}, | |
479 | {AUD_AFE_12DB_EN, 0x00000001}, | |
480 | {AAGC_HYST, 0x0000000a}, | |
481 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | |
482 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | |
483 | {AUD_C1_UP_THR, 0x00007000}, | |
484 | {AUD_C1_LO_THR, 0x00005400}, | |
485 | {AUD_C2_UP_THR, 0x00005400}, | |
486 | {AUD_C2_LO_THR, 0x00003000}, | |
487 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
488 | {AUD_DCOC0_SHIFT, 0x00000000}, | |
489 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
490 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
491 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
492 | {AUD_IIR3_0_SEL, 0x00000021}, | |
493 | {AUD_DN2_AFC, 0x00000002}, | |
494 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
495 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
496 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
497 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
498 | {AUD_IIR3_1_SEL, 0x00000023}, | |
499 | {AUD_DN0_FREQ, 0x000035a3}, | |
500 | {AUD_DN2_FREQ, 0x000029c7}, | |
501 | {AUD_CRDC0_SRC_SEL, 0x00000511}, | |
502 | {AUD_IIR1_0_SEL, 0x00000001}, | |
503 | {AUD_IIR1_1_SEL, 0x00000000}, | |
504 | {AUD_IIR3_2_SEL, 0x00000003}, | |
505 | {AUD_IIR3_2_SHIFT, 0x00000000}, | |
506 | {AUD_IIR3_0_SEL, 0x00000002}, | |
507 | {AUD_IIR2_0_SEL, 0x00000021}, | |
508 | {AUD_IIR2_0_SHIFT, 0x00000002}, | |
509 | {AUD_DEEMPH0_SRC_SEL, 0x0000000b}, | |
510 | {AUD_DEEMPH1_SRC_SEL, 0x0000000b}, | |
511 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | |
512 | {AUD_START_TIMER, 0x00000000}, | |
513 | { /* end of list */ }, | |
514 | }; | |
515 | ||
516 | static const struct rlist am_l[] = { | |
517 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | |
518 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF}, | |
519 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F}, | |
520 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F}, | |
521 | {AUD_PDF_DDS_CNST_BYTE2, 0x48}, | |
522 | {AUD_PDF_DDS_CNST_BYTE1, 0x3D}, | |
523 | {AUD_QAM_MODE, 0x00}, | |
524 | {AUD_PDF_DDS_CNST_BYTE0, 0xf5}, | |
525 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | |
526 | {AUD_PHACC_FREQ_8LSB, 0x4a}, | |
527 | {AUD_DEEMPHGAIN_R, 0x00006680}, | |
528 | {AUD_DEEMPHNUMER1_R, 0x000353DE}, | |
529 | {AUD_DEEMPHNUMER2_R, 0x000001B1}, | |
530 | {AUD_DEEMPHDENOM1_R, 0x0000F3D0}, | |
531 | {AUD_DEEMPHDENOM2_R, 0x00000000}, | |
532 | {AUD_FM_MODE_ENABLE, 0x00000007}, | |
533 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
534 | {AUD_AFE_12DB_EN, 0x00000001}, | |
535 | {AAGC_GAIN, 0x00000000}, | |
536 | {AAGC_HYST, 0x00000018}, | |
537 | {AAGC_DEF, 0x00000020}, | |
538 | {AUD_DN0_FREQ, 0x00000000}, | |
539 | {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2}, | |
540 | {AUD_DCOC_0_SRC, 0x00000021}, | |
541 | {AUD_IIR1_0_SEL, 0x00000000}, | |
542 | {AUD_IIR1_0_SHIFT, 0x00000007}, | |
543 | {AUD_IIR1_1_SEL, 0x00000002}, | |
544 | {AUD_IIR1_1_SHIFT, 0x00000000}, | |
545 | {AUD_DCOC_1_SRC, 0x00000003}, | |
546 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
547 | {AUD_DCOC_PASS_IN, 0x00000000}, | |
548 | {AUD_IIR1_2_SEL, 0x00000023}, | |
549 | {AUD_IIR1_2_SHIFT, 0x00000000}, | |
550 | {AUD_IIR1_3_SEL, 0x00000004}, | |
551 | {AUD_IIR1_3_SHIFT, 0x00000007}, | |
552 | {AUD_IIR1_4_SEL, 0x00000005}, | |
553 | {AUD_IIR1_4_SHIFT, 0x00000007}, | |
554 | {AUD_IIR3_0_SEL, 0x00000007}, | |
555 | {AUD_IIR3_0_SHIFT, 0x00000000}, | |
556 | {AUD_DEEMPH0_SRC_SEL, 0x00000011}, | |
557 | {AUD_DEEMPH0_SHIFT, 0x00000000}, | |
558 | {AUD_DEEMPH0_G0, 0x00007000}, | |
559 | {AUD_DEEMPH0_A0, 0x00000000}, | |
560 | {AUD_DEEMPH0_B0, 0x00000000}, | |
561 | {AUD_DEEMPH0_A1, 0x00000000}, | |
562 | {AUD_DEEMPH0_B1, 0x00000000}, | |
563 | {AUD_DEEMPH1_SRC_SEL, 0x00000011}, | |
564 | {AUD_DEEMPH1_SHIFT, 0x00000000}, | |
565 | {AUD_DEEMPH1_G0, 0x00007000}, | |
566 | {AUD_DEEMPH1_A0, 0x00000000}, | |
567 | {AUD_DEEMPH1_B0, 0x00000000}, | |
568 | {AUD_DEEMPH1_A1, 0x00000000}, | |
569 | {AUD_DEEMPH1_B1, 0x00000000}, | |
570 | {AUD_OUT0_SEL, 0x0000003F}, | |
571 | {AUD_OUT1_SEL, 0x0000003F}, | |
572 | {AUD_DMD_RA_DDS, 0x00F5C285}, | |
573 | {AUD_PLL_INT, 0x0000001E}, | |
574 | {AUD_PLL_DDS, 0x00000000}, | |
575 | {AUD_PLL_FRAC, 0x0000E542}, | |
576 | {AUD_RATE_ADJ1, 0x00000100}, | |
577 | {AUD_RATE_ADJ2, 0x00000200}, | |
578 | {AUD_RATE_ADJ3, 0x00000300}, | |
579 | {AUD_RATE_ADJ4, 0x00000400}, | |
580 | {AUD_RATE_ADJ5, 0x00000500}, | |
581 | {AUD_RATE_THRES_DMD, 0x000000C0}, | |
582 | {/* end of list */ }, | |
1da177e4 | 583 | }; |
e52e98a7 MCC |
584 | |
585 | static const struct rlist a2_deemph50[] = { | |
586 | {AUD_DEEMPH0_G0, 0x00000380}, | |
587 | {AUD_DEEMPH1_G0, 0x00000380}, | |
588 | {AUD_DEEMPHGAIN_R, 0x000011e1}, | |
589 | {AUD_DEEMPHNUMER1_R, 0x0002a7bc}, | |
590 | {AUD_DEEMPHNUMER2_R, 0x0003023c}, | |
591 | { /* end of list */ }, | |
592 | }; | |
593 | ||
e52e98a7 | 594 | set_audio_start(core, SEL_A2); |
1da177e4 | 595 | switch (core->tvaudio) { |
b1706b91 TS |
596 | case WW_BG: |
597 | dprintk("%s PAL-BG A1/2 (status: known-good)\n",__FUNCTION__); | |
598 | set_audio_registers(core, a2_bgdk_common); | |
599 | set_audio_registers(core, a2_bg); | |
600 | set_audio_registers(core, a2_deemph50); | |
1da177e4 | 601 | break; |
b1706b91 TS |
602 | case WW_DK: |
603 | dprintk("%s PAL-DK A1/2 (status: known-good)\n",__FUNCTION__); | |
604 | set_audio_registers(core, a2_bgdk_common); | |
605 | set_audio_registers(core, a2_dk); | |
606 | set_audio_registers(core, a2_deemph50); | |
1da177e4 | 607 | break; |
b1706b91 TS |
608 | case WW_I: |
609 | dprintk("%s PAL-I A1 (status: known-good)\n",__FUNCTION__); | |
610 | set_audio_registers(core, a1_i); | |
611 | set_audio_registers(core, a2_deemph50); | |
612 | break; | |
613 | case WW_L: | |
614 | dprintk("%s AM-L (status: devel)\n",__FUNCTION__); | |
615 | set_audio_registers(core, am_l); | |
616 | break; | |
617 | default: | |
618 | dprintk("%s Warning: wrong value\n",__FUNCTION__); | |
619 | return; | |
1da177e4 LT |
620 | break; |
621 | }; | |
e52e98a7 MCC |
622 | |
623 | mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF; | |
624 | set_audio_finish(core, mode); | |
1da177e4 LT |
625 | } |
626 | ||
627 | static void set_audio_standard_EIAJ(struct cx88_core *core) | |
628 | { | |
629 | static const struct rlist eiaj[] = { | |
630 | /* TODO: eiaj register settings are not there yet ... */ | |
631 | ||
632 | { /* end of list */ }, | |
633 | }; | |
634 | dprintk("%s (status: unknown)\n",__FUNCTION__); | |
635 | ||
e52e98a7 | 636 | set_audio_start(core, SEL_EIAJ); |
1da177e4 | 637 | set_audio_registers(core, eiaj); |
e52e98a7 | 638 | set_audio_finish(core, EN_EIAJ_AUTO_STEREO); |
1da177e4 LT |
639 | } |
640 | ||
b45009b0 | 641 | static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type deemph) |
1da177e4 | 642 | { |
b45009b0 MCC |
643 | static const struct rlist fm_deemph_50[] = { |
644 | { AUD_DEEMPH0_G0, 0x0C45 }, | |
645 | { AUD_DEEMPH0_A0, 0x6262 }, | |
646 | { AUD_DEEMPH0_B0, 0x1C29 }, | |
647 | { AUD_DEEMPH0_A1, 0x3FC66}, | |
648 | { AUD_DEEMPH0_B1, 0x399A }, | |
649 | ||
650 | { AUD_DEEMPH1_G0, 0x0D80 }, | |
651 | { AUD_DEEMPH1_A0, 0x6262 }, | |
652 | { AUD_DEEMPH1_B0, 0x1C29 }, | |
653 | { AUD_DEEMPH1_A1, 0x3FC66}, | |
654 | { AUD_DEEMPH1_B1, 0x399A}, | |
655 | ||
656 | { AUD_POLYPH80SCALEFAC, 0x0003}, | |
657 | { /* end of list */ }, | |
658 | }; | |
659 | static const struct rlist fm_deemph_75[] = { | |
660 | { AUD_DEEMPH0_G0, 0x091B }, | |
661 | { AUD_DEEMPH0_A0, 0x6B68 }, | |
662 | { AUD_DEEMPH0_B0, 0x11EC }, | |
663 | { AUD_DEEMPH0_A1, 0x3FC66}, | |
664 | { AUD_DEEMPH0_B1, 0x399A }, | |
665 | ||
666 | { AUD_DEEMPH1_G0, 0x0AA0 }, | |
667 | { AUD_DEEMPH1_A0, 0x6B68 }, | |
668 | { AUD_DEEMPH1_B0, 0x11EC }, | |
669 | { AUD_DEEMPH1_A1, 0x3FC66}, | |
670 | { AUD_DEEMPH1_B1, 0x399A}, | |
671 | ||
672 | { AUD_POLYPH80SCALEFAC, 0x0003}, | |
673 | { /* end of list */ }, | |
674 | }; | |
1da177e4 | 675 | |
b45009b0 MCC |
676 | /* It is enough to leave default values? */ |
677 | static const struct rlist fm_no_deemph[] = { | |
1da177e4 | 678 | |
b45009b0 MCC |
679 | { AUD_POLYPH80SCALEFAC, 0x0003}, |
680 | { /* end of list */ }, | |
681 | }; | |
1da177e4 | 682 | |
b45009b0 | 683 | dprintk("%s (status: unknown)\n",__FUNCTION__); |
e52e98a7 | 684 | set_audio_start(core, SEL_FMRADIO); |
1da177e4 | 685 | |
b45009b0 MCC |
686 | switch (deemph) |
687 | { | |
688 | case FM_NO_DEEMPH: | |
689 | set_audio_registers(core, fm_no_deemph); | |
1da177e4 | 690 | break; |
1da177e4 | 691 | |
b45009b0 MCC |
692 | case FM_DEEMPH_50: |
693 | set_audio_registers(core, fm_deemph_50); | |
694 | break; | |
1da177e4 | 695 | |
b45009b0 MCC |
696 | case FM_DEEMPH_75: |
697 | set_audio_registers(core, fm_deemph_75); | |
698 | break; | |
699 | } | |
1da177e4 | 700 | |
e52e98a7 | 701 | set_audio_finish(core, EN_FMRADIO_AUTO_STEREO); |
1da177e4 LT |
702 | } |
703 | ||
704 | /* ----------------------------------------------------------- */ | |
705 | ||
b1706b91 TS |
706 | int cx88_detect_nicam(struct cx88_core *core) |
707 | { | |
708 | int i, j=0; | |
709 | ||
710 | dprintk("start nicam autodetect.\n"); | |
711 | ||
712 | for(i=0; i<6; i++) { | |
713 | /* if bit1=1 then nicam is detected */ | |
714 | j+= ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1); | |
715 | ||
716 | /* 3x detected: absolutly sure now */ | |
717 | if(j==3) { | |
718 | dprintk("nicam is detected.\n"); | |
719 | return 1; | |
720 | } | |
721 | ||
722 | /* wait a little bit for next reading status */ | |
723 | msleep (10); | |
724 | } | |
725 | ||
726 | dprintk("nicam is not detected.\n"); | |
727 | return 0; | |
728 | } | |
729 | ||
1da177e4 LT |
730 | void cx88_set_tvaudio(struct cx88_core *core) |
731 | { | |
732 | switch (core->tvaudio) { | |
733 | case WW_BTSC: | |
e52e98a7 | 734 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); |
1da177e4 | 735 | break; |
b1706b91 TS |
736 | case WW_BG: |
737 | case WW_DK: | |
738 | case WW_I: | |
739 | case WW_L: | |
740 | /* prepare all dsp registers */ | |
741 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
742 | ||
743 | /* set nicam mode - otherwise | |
744 | AUD_NICAM_STATUS2 contains wrong values */ | |
745 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1); | |
746 | if(0 == cx88_detect_nicam(core)) { | |
747 | /* fall back to fm / am mono */ | |
748 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
749 | core->use_nicam = 0; | |
750 | } else { | |
751 | core->use_nicam = 1; | |
752 | } | |
1da177e4 LT |
753 | break; |
754 | case WW_EIAJ: | |
755 | set_audio_standard_EIAJ(core); | |
756 | break; | |
757 | case WW_FM: | |
b45009b0 | 758 | set_audio_standard_FM(core,FM_NO_DEEMPH); |
1da177e4 | 759 | break; |
1da177e4 LT |
760 | case WW_NONE: |
761 | default: | |
762 | printk("%s/0: unknown tv audio mode [%d]\n", | |
e52e98a7 | 763 | core->name, core->tvaudio); |
1da177e4 LT |
764 | break; |
765 | } | |
766 | return; | |
767 | } | |
768 | ||
769 | void cx88_newstation(struct cx88_core *core) | |
770 | { | |
771 | core->audiomode_manual = UNSET; | |
1da177e4 LT |
772 | } |
773 | ||
774 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t) | |
775 | { | |
776 | static char *m[] = {"stereo", "dual mono", "mono", "sap"}; | |
777 | static char *p[] = {"no pilot", "pilot c1", "pilot c2", "?"}; | |
778 | u32 reg,mode,pilot; | |
779 | ||
780 | reg = cx_read(AUD_STATUS); | |
781 | mode = reg & 0x03; | |
782 | pilot = (reg >> 2) & 0x03; | |
783 | ||
784 | if (core->astat != reg) | |
785 | dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n", | |
786 | reg, m[mode], p[pilot], | |
787 | aud_ctl_names[cx_read(AUD_CTL) & 63]); | |
788 | core->astat = reg; | |
789 | ||
e52e98a7 MCC |
790 | /* TODO |
791 | Reading from AUD_STATUS is not enough | |
792 | for auto-detecting sap/dual-fm/nicam. | |
793 | Add some code here later. | |
794 | */ | |
795 | ||
796 | # if 0 | |
1da177e4 LT |
797 | t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP | |
798 | V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; | |
799 | t->rxsubchans = V4L2_TUNER_SUB_MONO; | |
800 | t->audmode = V4L2_TUNER_MODE_MONO; | |
801 | ||
802 | switch (core->tvaudio) { | |
803 | case WW_BTSC: | |
804 | t->capability = V4L2_TUNER_CAP_STEREO | | |
805 | V4L2_TUNER_CAP_SAP; | |
806 | t->rxsubchans = V4L2_TUNER_SUB_STEREO; | |
e52e98a7 | 807 | if (1 == pilot) { |
1da177e4 LT |
808 | /* SAP */ |
809 | t->rxsubchans |= V4L2_TUNER_SUB_SAP; | |
810 | } | |
811 | break; | |
812 | case WW_A2_BG: | |
813 | case WW_A2_DK: | |
814 | case WW_A2_M: | |
e52e98a7 | 815 | if (1 == pilot) { |
1da177e4 LT |
816 | /* stereo */ |
817 | t->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; | |
818 | if (0 == mode) | |
819 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
820 | } | |
e52e98a7 | 821 | if (2 == pilot) { |
1da177e4 LT |
822 | /* dual language -- FIXME */ |
823 | t->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; | |
824 | t->audmode = V4L2_TUNER_MODE_LANG1; | |
825 | } | |
826 | break; | |
827 | case WW_NICAM_BGDKL: | |
828 | if (0 == mode) { | |
829 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
830 | t->rxsubchans |= V4L2_TUNER_SUB_STEREO; | |
831 | } | |
832 | break; | |
e52e98a7 MCC |
833 | case WW_SYSTEM_L_AM: |
834 | if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) { | |
835 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
1da177e4 LT |
836 | t->rxsubchans |= V4L2_TUNER_SUB_STEREO; |
837 | } | |
e52e98a7 | 838 | break ; |
1da177e4 LT |
839 | default: |
840 | /* nothing */ | |
841 | break; | |
842 | } | |
e52e98a7 | 843 | # endif |
1da177e4 LT |
844 | return; |
845 | } | |
846 | ||
847 | void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual) | |
848 | { | |
849 | u32 ctl = UNSET; | |
850 | u32 mask = UNSET; | |
851 | ||
852 | if (manual) { | |
853 | core->audiomode_manual = mode; | |
854 | } else { | |
855 | if (UNSET != core->audiomode_manual) | |
856 | return; | |
857 | } | |
858 | core->audiomode_current = mode; | |
859 | ||
860 | switch (core->tvaudio) { | |
861 | case WW_BTSC: | |
862 | switch (mode) { | |
863 | case V4L2_TUNER_MODE_MONO: | |
e52e98a7 | 864 | set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO); |
1da177e4 | 865 | break; |
e52e98a7 MCC |
866 | case V4L2_TUNER_MODE_LANG1: |
867 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); | |
868 | break; | |
869 | case V4L2_TUNER_MODE_LANG2: | |
870 | set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP); | |
1da177e4 LT |
871 | break; |
872 | case V4L2_TUNER_MODE_STEREO: | |
e52e98a7 | 873 | set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO); |
1da177e4 LT |
874 | break; |
875 | } | |
876 | break; | |
b1706b91 TS |
877 | case WW_BG: |
878 | case WW_DK: | |
879 | case WW_I: | |
880 | case WW_L: | |
881 | if(1 == core->use_nicam) { | |
882 | switch (mode) { | |
883 | case V4L2_TUNER_MODE_MONO: | |
884 | case V4L2_TUNER_MODE_LANG1: | |
885 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1); | |
886 | break; | |
887 | case V4L2_TUNER_MODE_LANG2: | |
888 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO2); | |
889 | break; | |
890 | case V4L2_TUNER_MODE_STEREO: | |
891 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_STEREO); | |
892 | break; | |
893 | } | |
894 | } else { | |
895 | if ( (core->tvaudio == WW_I) || (core->tvaudio == WW_L) ) { | |
896 | /* fall back to fm / am mono */ | |
897 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
898 | } else { | |
899 | /* TODO: Add A2 autodection */ | |
900 | switch (mode) { | |
901 | case V4L2_TUNER_MODE_MONO: | |
902 | case V4L2_TUNER_MODE_LANG1: | |
903 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
904 | break; | |
905 | case V4L2_TUNER_MODE_LANG2: | |
906 | set_audio_standard_A2(core, EN_A2_FORCE_MONO2); | |
907 | break; | |
908 | case V4L2_TUNER_MODE_STEREO: | |
909 | set_audio_standard_A2(core, EN_A2_FORCE_STEREO); | |
910 | break; | |
911 | } | |
912 | } | |
1da177e4 LT |
913 | } |
914 | break; | |
915 | case WW_FM: | |
916 | switch (mode) { | |
917 | case V4L2_TUNER_MODE_MONO: | |
918 | ctl = EN_FMRADIO_FORCE_MONO; | |
919 | mask = 0x3f; | |
920 | break; | |
921 | case V4L2_TUNER_MODE_STEREO: | |
922 | ctl = EN_FMRADIO_AUTO_STEREO; | |
923 | mask = 0x3f; | |
924 | break; | |
925 | } | |
926 | break; | |
927 | } | |
928 | ||
929 | if (UNSET != ctl) { | |
930 | dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x " | |
931 | "[status=0x%x,ctl=0x%x,vol=0x%x]\n", | |
932 | mask, ctl, cx_read(AUD_STATUS), | |
933 | cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL)); | |
934 | cx_andor(AUD_CTL, mask, ctl); | |
935 | } | |
936 | return; | |
937 | } | |
938 | ||
939 | int cx88_audio_thread(void *data) | |
940 | { | |
941 | struct cx88_core *core = data; | |
942 | struct v4l2_tuner t; | |
943 | u32 mode = 0; | |
944 | ||
945 | dprintk("cx88: tvaudio thread started\n"); | |
946 | for (;;) { | |
947 | msleep_interruptible(1000); | |
948 | if (kthread_should_stop()) | |
949 | break; | |
950 | ||
951 | /* just monitor the audio status for now ... */ | |
952 | memset(&t,0,sizeof(t)); | |
953 | cx88_get_stereo(core,&t); | |
954 | ||
955 | if (UNSET != core->audiomode_manual) | |
956 | /* manually set, don't do anything. */ | |
957 | continue; | |
958 | ||
959 | /* monitor signal */ | |
960 | if (t.rxsubchans & V4L2_TUNER_SUB_STEREO) | |
961 | mode = V4L2_TUNER_MODE_STEREO; | |
962 | else | |
963 | mode = V4L2_TUNER_MODE_MONO; | |
964 | if (mode == core->audiomode_current) | |
965 | continue; | |
966 | ||
967 | /* automatically switch to best available mode */ | |
968 | cx88_set_stereo(core, mode, 0); | |
969 | } | |
970 | ||
971 | dprintk("cx88: tvaudio thread exiting\n"); | |
972 | return 0; | |
973 | } | |
974 | ||
975 | /* ----------------------------------------------------------- */ | |
976 | ||
977 | EXPORT_SYMBOL(cx88_set_tvaudio); | |
978 | EXPORT_SYMBOL(cx88_newstation); | |
979 | EXPORT_SYMBOL(cx88_set_stereo); | |
980 | EXPORT_SYMBOL(cx88_get_stereo); | |
981 | EXPORT_SYMBOL(cx88_audio_thread); | |
982 | ||
983 | /* | |
984 | * Local variables: | |
985 | * c-basic-offset: 8 | |
986 | * End: | |
b45009b0 | 987 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 988 | */ |