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[PATCH] mark struct file_operations const 3
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-video.c
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1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kmod.h>
28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
32#include <linux/kthread.h>
33#include <asm/div64.h>
34
35#include "cx88.h"
5e453dc7 36#include <media/v4l2-common.h>
1da177e4 37
cd41e28e 38#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 39/* Include V4L1 specific functions. Should be removed soon */
40#include <linux/videodev.h>
cd41e28e 41#endif
79436633 42
1da177e4
LT		 43MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
44MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
45MODULE_LICENSE("GPL");
46
47/* ------------------------------------------------------------------ */
48
49static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
50static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
51static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52
53module_param_array(video_nr, int, NULL, 0444);
54module_param_array(vbi_nr, int, NULL, 0444);
55module_param_array(radio_nr, int, NULL, 0444);
56
57MODULE_PARM_DESC(video_nr,"video device numbers");
58MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
59MODULE_PARM_DESC(radio_nr,"radio device numbers");
60
61static unsigned int video_debug = 0;
62module_param(video_debug,int,0644);
63MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
64
65static unsigned int irq_debug = 0;
66module_param(irq_debug,int,0644);
67MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
68
69static unsigned int vid_limit = 16;
70module_param(vid_limit,int,0644);
71MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
72
73#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 74 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 75
76/* ------------------------------------------------------------------ */
77
78static LIST_HEAD(cx8800_devlist);
79
80/* ------------------------------------------------------------------- */
81/* static data */
82
83static struct cx88_tvnorm tvnorms[] = {
84 {
85 .name = "NTSC-M",
86 .id = V4L2_STD_NTSC_M,
87 .cxiformat = VideoFormatNTSC,
88 .cxoformat = 0x181f0008,
89 },{
90 .name = "NTSC-JP",
91 .id = V4L2_STD_NTSC_M_JP,
92 .cxiformat = VideoFormatNTSCJapan,
93 .cxoformat = 0x181f0008,
1da177e4
LT		 94 },{
95 .name = "PAL-BG",
96 .id = V4L2_STD_PAL_BG,
97 .cxiformat = VideoFormatPAL,
98 .cxoformat = 0x181f0008,
99 },{
100 .name = "PAL-DK",
101 .id = V4L2_STD_PAL_DK,
102 .cxiformat = VideoFormatPAL,
103 .cxoformat = 0x181f0008,
104 },{
105 .name = "PAL-I",
106 .id = V4L2_STD_PAL_I,
107 .cxiformat = VideoFormatPAL,
108 .cxoformat = 0x181f0008,
4ac97914 109 },{
1da177e4
LT		 110 .name = "PAL-M",
111 .id = V4L2_STD_PAL_M,
112 .cxiformat = VideoFormatPALM,
113 .cxoformat = 0x1c1f0008,
114 },{
115 .name = "PAL-N",
116 .id = V4L2_STD_PAL_N,
117 .cxiformat = VideoFormatPALN,
118 .cxoformat = 0x1c1f0008,
119 },{
120 .name = "PAL-Nc",
121 .id = V4L2_STD_PAL_Nc,
122 .cxiformat = VideoFormatPALNC,
123 .cxoformat = 0x1c1f0008,
124 },{
125 .name = "PAL-60",
126 .id = V4L2_STD_PAL_60,
127 .cxiformat = VideoFormatPAL60,
128 .cxoformat = 0x181f0008,
129 },{
130 .name = "SECAM-L",
131 .id = V4L2_STD_SECAM_L,
132 .cxiformat = VideoFormatSECAM,
133 .cxoformat = 0x181f0008,
134 },{
135 .name = "SECAM-DK",
136 .id = V4L2_STD_SECAM_DK,
137 .cxiformat = VideoFormatSECAM,
138 .cxoformat = 0x181f0008,
139 }
140};
141
142static struct cx8800_fmt formats[] = {
143 {
144 .name = "8 bpp, gray",
145 .fourcc = V4L2_PIX_FMT_GREY,
146 .cxformat = ColorFormatY8,
147 .depth = 8,
148 .flags = FORMAT_FLAGS_PACKED,
149 },{
150 .name = "15 bpp RGB, le",
151 .fourcc = V4L2_PIX_FMT_RGB555,
152 .cxformat = ColorFormatRGB15,
153 .depth = 16,
154 .flags = FORMAT_FLAGS_PACKED,
155 },{
156 .name = "15 bpp RGB, be",
157 .fourcc = V4L2_PIX_FMT_RGB555X,
158 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
159 .depth = 16,
160 .flags = FORMAT_FLAGS_PACKED,
161 },{
162 .name = "16 bpp RGB, le",
163 .fourcc = V4L2_PIX_FMT_RGB565,
164 .cxformat = ColorFormatRGB16,
165 .depth = 16,
166 .flags = FORMAT_FLAGS_PACKED,
167 },{
168 .name = "16 bpp RGB, be",
169 .fourcc = V4L2_PIX_FMT_RGB565X,
170 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
171 .depth = 16,
172 .flags = FORMAT_FLAGS_PACKED,
173 },{
174 .name = "24 bpp RGB, le",
175 .fourcc = V4L2_PIX_FMT_BGR24,
176 .cxformat = ColorFormatRGB24,
177 .depth = 24,
178 .flags = FORMAT_FLAGS_PACKED,
179 },{
180 .name = "32 bpp RGB, le",
181 .fourcc = V4L2_PIX_FMT_BGR32,
182 .cxformat = ColorFormatRGB32,
183 .depth = 32,
184 .flags = FORMAT_FLAGS_PACKED,
185 },{
186 .name = "32 bpp RGB, be",
187 .fourcc = V4L2_PIX_FMT_RGB32,
188 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
189 .depth = 32,
190 .flags = FORMAT_FLAGS_PACKED,
191 },{
192 .name = "4:2:2, packed, YUYV",
193 .fourcc = V4L2_PIX_FMT_YUYV,
194 .cxformat = ColorFormatYUY2,
195 .depth = 16,
196 .flags = FORMAT_FLAGS_PACKED,
197 },{
198 .name = "4:2:2, packed, UYVY",
199 .fourcc = V4L2_PIX_FMT_UYVY,
200 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
201 .depth = 16,
202 .flags = FORMAT_FLAGS_PACKED,
203 },
204};
205
206static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
207{
208 unsigned int i;
209
210 for (i = 0; i < ARRAY_SIZE(formats); i++)
211 if (formats[i].fourcc == fourcc)
212 return formats+i;
213 return NULL;
214}
215
216/* ------------------------------------------------------------------- */
217
218static const struct v4l2_queryctrl no_ctl = {
219 .name = "42",
220 .flags = V4L2_CTRL_FLAG_DISABLED,
221};
222
223static struct cx88_ctrl cx8800_ctls[] = {
224 /* --- video --- */
225 {
226 .v = {
227 .id = V4L2_CID_BRIGHTNESS,
228 .name = "Brightness",
229 .minimum = 0x00,
230 .maximum = 0xff,
231 .step = 1,
9f9c907f 232 .default_value = 0x7f,
1da177e4
LT		 233 .type = V4L2_CTRL_TYPE_INTEGER,
234 },
235 .off = 128,
236 .reg = MO_CONTR_BRIGHT,
237 .mask = 0x00ff,
238 .shift = 0,
239 },{
240 .v = {
241 .id = V4L2_CID_CONTRAST,
242 .name = "Contrast",
243 .minimum = 0,
244 .maximum = 0xff,
245 .step = 1,
70f00044 246 .default_value = 0x3f,
1da177e4
LT		 247 .type = V4L2_CTRL_TYPE_INTEGER,
248 },
41ef7c1e 249 .off = 0,
1da177e4
LT		 250 .reg = MO_CONTR_BRIGHT,
251 .mask = 0xff00,
252 .shift = 8,
253 },{
254 .v = {
255 .id = V4L2_CID_HUE,
256 .name = "Hue",
257 .minimum = 0,
258 .maximum = 0xff,
259 .step = 1,
9f9c907f 260 .default_value = 0x7f,
1da177e4
LT		 261 .type = V4L2_CTRL_TYPE_INTEGER,
262 },
9ac4c158 263 .off = 128,
1da177e4
LT		 264 .reg = MO_HUE,
265 .mask = 0x00ff,
266 .shift = 0,
267 },{
268 /* strictly, this only describes only U saturation.
269 * V saturation is handled specially through code.
270 */
271 .v = {
272 .id = V4L2_CID_SATURATION,
273 .name = "Saturation",
274 .minimum = 0,
275 .maximum = 0xff,
276 .step = 1,
70f00044 277 .default_value = 0x7f,
1da177e4
LT		 278 .type = V4L2_CTRL_TYPE_INTEGER,
279 },
280 .off = 0,
281 .reg = MO_UV_SATURATION,
282 .mask = 0x00ff,
283 .shift = 0,
284 },{
285 /* --- audio --- */
286 .v = {
287 .id = V4L2_CID_AUDIO_MUTE,
288 .name = "Mute",
289 .minimum = 0,
290 .maximum = 1,
70f00044 291 .default_value = 1,
1da177e4
LT		 292 .type = V4L2_CTRL_TYPE_BOOLEAN,
293 },
294 .reg = AUD_VOL_CTL,
295 .sreg = SHADOW_AUD_VOL_CTL,
296 .mask = (1 << 6),
297 .shift = 6,
298 },{
299 .v = {
300 .id = V4L2_CID_AUDIO_VOLUME,
301 .name = "Volume",
302 .minimum = 0,
303 .maximum = 0x3f,
304 .step = 1,
9f9c907f 305 .default_value = 0x3f,
1da177e4
LT		 306 .type = V4L2_CTRL_TYPE_INTEGER,
307 },
308 .reg = AUD_VOL_CTL,
309 .sreg = SHADOW_AUD_VOL_CTL,
310 .mask = 0x3f,
311 .shift = 0,
312 },{
313 .v = {
314 .id = V4L2_CID_AUDIO_BALANCE,
315 .name = "Balance",
316 .minimum = 0,
317 .maximum = 0x7f,
318 .step = 1,
319 .default_value = 0x40,
320 .type = V4L2_CTRL_TYPE_INTEGER,
321 },
322 .reg = AUD_BAL_CTL,
323 .sreg = SHADOW_AUD_BAL_CTL,
324 .mask = 0x7f,
325 .shift = 0,
326 }
327};
408b664a 328static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 329
38a2713a
MK		 330const u32 cx88_user_ctrls[] = {
331 V4L2_CID_USER_CLASS,
332 V4L2_CID_BRIGHTNESS,
333 V4L2_CID_CONTRAST,
334 V4L2_CID_SATURATION,
335 V4L2_CID_HUE,
336 V4L2_CID_AUDIO_VOLUME,
337 V4L2_CID_AUDIO_BALANCE,
338 V4L2_CID_AUDIO_MUTE,
339 0
340};
341EXPORT_SYMBOL(cx88_user_ctrls);
342
343static const u32 *ctrl_classes[] = {
344 cx88_user_ctrls,
345 NULL
346};
347
348int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl)
349{
350 int i;
351
352 if (qctrl->id < V4L2_CID_BASE ||
353 qctrl->id >= V4L2_CID_LASTP1)
354 return -EINVAL;
355 for (i = 0; i < CX8800_CTLS; i++)
356 if (cx8800_ctls[i].v.id == qctrl->id)
357 break;
358 if (i == CX8800_CTLS) {
359 *qctrl = no_ctl;
360 return 0;
361 }
362 *qctrl = cx8800_ctls[i].v;
363 return 0;
364}
365EXPORT_SYMBOL(cx8800_ctrl_query);
366
367static int cx88_queryctrl(struct v4l2_queryctrl *qctrl)
368{
369 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
370 if (qctrl->id == 0)
371 return -EINVAL;
372 return cx8800_ctrl_query(qctrl);
373}
374
1da177e4
LT		 375/* ------------------------------------------------------------------- */
376/* resource management */
377
378static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
379{
e52e98a7 380 struct cx88_core *core = dev->core;
1da177e4
LT		 381 if (fh->resources & bit)
382 /* have it already allocated */
383 return 1;
384
385 /* is it free? */
3593cab5 386 mutex_lock(&core->lock);
1da177e4
LT		 387 if (dev->resources & bit) {
388 /* no, someone else uses it */
3593cab5 389 mutex_unlock(&core->lock);
1da177e4
LT		 390 return 0;
391 }
392 /* it's free, grab it */
393 fh->resources |= bit;
394 dev->resources |= bit;
395 dprintk(1,"res: get %d\n",bit);
3593cab5 396 mutex_unlock(&core->lock);
1da177e4
LT		 397 return 1;
398}
399
400static
401int res_check(struct cx8800_fh *fh, unsigned int bit)
402{
403 return (fh->resources & bit);
404}
405
406static
407int res_locked(struct cx8800_dev *dev, unsigned int bit)
408{
409 return (dev->resources & bit);
410}
411
412static
413void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
414{
e52e98a7 415 struct cx88_core *core = dev->core;
ae24601b 416 BUG_ON((fh->resources & bits) != bits);
1da177e4 417
3593cab5 418 mutex_lock(&core->lock);
1da177e4
LT		 419 fh->resources &= ~bits;
420 dev->resources &= ~bits;
421 dprintk(1,"res: put %d\n",bits);
3593cab5 422 mutex_unlock(&core->lock);
1da177e4
LT		 423}
424
425/* ------------------------------------------------------------------ */
426
e52e98a7
MCC		 427/* static int video_mux(struct cx8800_dev *dev, unsigned int input) */
428static int video_mux(struct cx88_core *core, unsigned int input)
1da177e4 429{
e52e98a7 430 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 431
432 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
433 input, INPUT(input)->vmux,
434 INPUT(input)->gpio0,INPUT(input)->gpio1,
435 INPUT(input)->gpio2,INPUT(input)->gpio3);
e52e98a7 436 core->input = input;
1da177e4
LT		 437 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
438 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
439 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
440 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
441 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
442
443 switch (INPUT(input)->type) {
444 case CX88_VMUX_SVIDEO:
445 cx_set(MO_AFECFG_IO, 0x00000001);
446 cx_set(MO_INPUT_FORMAT, 0x00010010);
447 cx_set(MO_FILTER_EVEN, 0x00002020);
448 cx_set(MO_FILTER_ODD, 0x00002020);
449 break;
450 default:
451 cx_clear(MO_AFECFG_IO, 0x00000001);
452 cx_clear(MO_INPUT_FORMAT, 0x00010010);
453 cx_clear(MO_FILTER_EVEN, 0x00002020);
454 cx_clear(MO_FILTER_ODD, 0x00002020);
455 break;
456 }
f24546a9
MK		 457
458 if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) {
459 /* sets sound input from external adc */
460 if (INPUT(input)->extadc)
461 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
462 else
463 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
464 }
1da177e4
LT		 465 return 0;
466}
467
468/* ------------------------------------------------------------------ */
469
470static int start_video_dma(struct cx8800_dev *dev,
471 struct cx88_dmaqueue *q,
472 struct cx88_buffer *buf)
473{
474 struct cx88_core *core = dev->core;
475
476 /* setup fifo + format */
e52e98a7 477 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 478 buf->bpl, buf->risc.dma);
e52e98a7 479 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 480 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
481
482 /* reset counter */
483 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
484 q->count = 1;
485
486 /* enable irqs */
487 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
e52e98a7
MCC		 488
489 /* Enables corresponding bits at PCI_INT_STAT:
490 bits 0 to 4: video, audio, transport stream, VIP, Host
491 bit 7: timer
492 bits 8 and 9: DMA complete for: SRC, DST
493 bits 10 and 11: BERR signal asserted for RISC: RD, WR
494 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
495 */
1da177e4
LT		 496 cx_set(MO_VID_INTMSK, 0x0f0011);
497
498 /* enable capture */
499 cx_set(VID_CAPTURE_CONTROL,0x06);
500
501 /* start dma */
502 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 503 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 504
505 return 0;
506}
507
17bc98a4 508#ifdef CONFIG_PM
1da177e4
LT		 509static int stop_video_dma(struct cx8800_dev *dev)
510{
511 struct cx88_core *core = dev->core;
512
513 /* stop dma */
514 cx_clear(MO_VID_DMACNTRL, 0x11);
515
516 /* disable capture */
517 cx_clear(VID_CAPTURE_CONTROL,0x06);
518
519 /* disable irqs */
520 cx_clear(MO_PCI_INTMSK, 0x000001);
521 cx_clear(MO_VID_INTMSK, 0x0f0011);
522 return 0;
523}
17bc98a4 524#endif
1da177e4
LT		 525
526static int restart_video_queue(struct cx8800_dev *dev,
527 struct cx88_dmaqueue *q)
528{
e52e98a7 529 struct cx88_core *core = dev->core;
1da177e4
LT		 530 struct cx88_buffer *buf, *prev;
531 struct list_head *item;
532
533 if (!list_empty(&q->active)) {
4ac97914 534 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 535 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
536 buf, buf->vb.i);
537 start_video_dma(dev, q, buf);
538 list_for_each(item,&q->active) {
539 buf = list_entry(item, struct cx88_buffer, vb.queue);
540 buf->count = q->count++;
541 }
542 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
543 return 0;
544 }
545
546 prev = NULL;
547 for (;;) {
548 if (list_empty(&q->queued))
549 return 0;
4ac97914 550 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 551 if (NULL == prev) {
179e0917 552 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 553 start_video_dma(dev, q, buf);
554 buf->vb.state = STATE_ACTIVE;
555 buf->count = q->count++;
556 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
557 dprintk(2,"[%p/%d] restart_queue - first active\n",
558 buf,buf->vb.i);
559
560 } else if (prev->vb.width == buf->vb.width &&
561 prev->vb.height == buf->vb.height &&
562 prev->fmt == buf->fmt) {
179e0917 563 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 564 buf->vb.state = STATE_ACTIVE;
565 buf->count = q->count++;
566 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
567 dprintk(2,"[%p/%d] restart_queue - move to active\n",
568 buf,buf->vb.i);
569 } else {
570 return 0;
571 }
572 prev = buf;
573 }
574}
575
576/* ------------------------------------------------------------------ */
577
578static int
579buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
580{
581 struct cx8800_fh *fh = q->priv_data;
582
583 *size = fh->fmt->depth*fh->width*fh->height >> 3;
584 if (0 == *count)
585 *count = 32;
586 while (*size * *count > vid_limit * 1024 * 1024)
587 (*count)--;
588 return 0;
589}
590
591static int
592buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
593 enum v4l2_field field)
594{
595 struct cx8800_fh *fh = q->priv_data;
596 struct cx8800_dev *dev = fh->dev;
e52e98a7 597 struct cx88_core *core = dev->core;
1da177e4
LT		 598 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
599 int rc, init_buffer = 0;
600
601 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 602 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
603 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 604 return -EINVAL;
605 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
606 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
607 return -EINVAL;
608
609 if (buf->fmt != fh->fmt ||
610 buf->vb.width != fh->width ||
611 buf->vb.height != fh->height ||
612 buf->vb.field != field) {
613 buf->fmt = fh->fmt;
614 buf->vb.width = fh->width;
615 buf->vb.height = fh->height;
616 buf->vb.field = field;
617 init_buffer = 1;
618 }
619
620 if (STATE_NEEDS_INIT == buf->vb.state) {
621 init_buffer = 1;
c7b0ac05 622 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 623 goto fail;
624 }
625
626 if (init_buffer) {
627 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
628 switch (buf->vb.field) {
629 case V4L2_FIELD_TOP:
630 cx88_risc_buffer(dev->pci, &buf->risc,
631 buf->vb.dma.sglist, 0, UNSET,
632 buf->bpl, 0, buf->vb.height);
633 break;
634 case V4L2_FIELD_BOTTOM:
635 cx88_risc_buffer(dev->pci, &buf->risc,
636 buf->vb.dma.sglist, UNSET, 0,
637 buf->bpl, 0, buf->vb.height);
638 break;
639 case V4L2_FIELD_INTERLACED:
640 cx88_risc_buffer(dev->pci, &buf->risc,
641 buf->vb.dma.sglist, 0, buf->bpl,
642 buf->bpl, buf->bpl,
643 buf->vb.height >> 1);
644 break;
645 case V4L2_FIELD_SEQ_TB:
646 cx88_risc_buffer(dev->pci, &buf->risc,
647 buf->vb.dma.sglist,
648 0, buf->bpl * (buf->vb.height >> 1),
649 buf->bpl, 0,
650 buf->vb.height >> 1);
651 break;
652 case V4L2_FIELD_SEQ_BT:
653 cx88_risc_buffer(dev->pci, &buf->risc,
654 buf->vb.dma.sglist,
655 buf->bpl * (buf->vb.height >> 1), 0,
656 buf->bpl, 0,
657 buf->vb.height >> 1);
658 break;
659 default:
660 BUG();
661 }
662 }
663 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
664 buf, buf->vb.i,
665 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
666 (unsigned long)buf->risc.dma);
667
668 buf->vb.state = STATE_PREPARED;
669 return 0;
670
671 fail:
c7b0ac05 672 cx88_free_buffer(q,buf);
1da177e4
LT		 673 return rc;
674}
675
676static void
677buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
678{
679 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
680 struct cx88_buffer *prev;
681 struct cx8800_fh *fh = vq->priv_data;
682 struct cx8800_dev *dev = fh->dev;
e52e98a7 683 struct cx88_core *core = dev->core;
1da177e4
LT		 684 struct cx88_dmaqueue *q = &dev->vidq;
685
686 /* add jump to stopper */
687 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
688 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
689
690 if (!list_empty(&q->queued)) {
691 list_add_tail(&buf->vb.queue,&q->queued);
692 buf->vb.state = STATE_QUEUED;
693 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
694 buf, buf->vb.i);
695
696 } else if (list_empty(&q->active)) {
697 list_add_tail(&buf->vb.queue,&q->active);
698 start_video_dma(dev, q, buf);
699 buf->vb.state = STATE_ACTIVE;
700 buf->count = q->count++;
701 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
702 dprintk(2,"[%p/%d] buffer_queue - first active\n",
703 buf, buf->vb.i);
704
705 } else {
706 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
707 if (prev->vb.width == buf->vb.width &&
708 prev->vb.height == buf->vb.height &&
709 prev->fmt == buf->fmt) {
710 list_add_tail(&buf->vb.queue,&q->active);
711 buf->vb.state = STATE_ACTIVE;
712 buf->count = q->count++;
713 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
714 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
715 buf, buf->vb.i);
716
717 } else {
718 list_add_tail(&buf->vb.queue,&q->queued);
719 buf->vb.state = STATE_QUEUED;
720 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
721 buf, buf->vb.i);
722 }
723 }
724}
725
726static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
727{
728 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 729
c7b0ac05 730 cx88_free_buffer(q,buf);
1da177e4
LT		 731}
732
408b664a 733static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 734 .buf_setup = buffer_setup,
735 .buf_prepare = buffer_prepare,
736 .buf_queue = buffer_queue,
737 .buf_release = buffer_release,
738};
739
740/* ------------------------------------------------------------------ */
741
1da177e4
LT		 742
743/* ------------------------------------------------------------------ */
744
745static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
746{
747 switch (fh->type) {
748 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
749 return &fh->vidq;
750 case V4L2_BUF_TYPE_VBI_CAPTURE:
751 return &fh->vbiq;
752 default:
753 BUG();
754 return NULL;
755 }
756}
757
758static int get_ressource(struct cx8800_fh *fh)
759{
760 switch (fh->type) {
761 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
762 return RESOURCE_VIDEO;
763 case V4L2_BUF_TYPE_VBI_CAPTURE:
764 return RESOURCE_VBI;
765 default:
766 BUG();
767 return 0;
768 }
769}
770
771static int video_open(struct inode *inode, struct file *file)
772{
773 int minor = iminor(inode);
774 struct cx8800_dev *h,*dev = NULL;
e52e98a7 775 struct cx88_core *core;
1da177e4
LT		 776 struct cx8800_fh *fh;
777 struct list_head *list;
778 enum v4l2_buf_type type = 0;
779 int radio = 0;
780
781 list_for_each(list,&cx8800_devlist) {
782 h = list_entry(list, struct cx8800_dev, devlist);
783 if (h->video_dev->minor == minor) {
784 dev = h;
785 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
786 }
787 if (h->vbi_dev->minor == minor) {
788 dev = h;
789 type = V4L2_BUF_TYPE_VBI_CAPTURE;
790 }
791 if (h->radio_dev &&
792 h->radio_dev->minor == minor) {
793 radio = 1;
794 dev = h;
795 }
796 }
797 if (NULL == dev)
798 return -ENODEV;
799
e52e98a7
MCC		 800 core = dev->core;
801
1da177e4
LT		 802 dprintk(1,"open minor=%d radio=%d type=%s\n",
803 minor,radio,v4l2_type_names[type]);
804
805 /* allocate + initialize per filehandle data */
7408187d 806 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 807 if (NULL == fh)
808 return -ENOMEM;
1da177e4
LT		 809 file->private_data = fh;
810 fh->dev = dev;
811 fh->radio = radio;
812 fh->type = type;
813 fh->width = 320;
814 fh->height = 240;
815 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
816
817 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
818 dev->pci, &dev->slock,
819 V4L2_BUF_TYPE_VIDEO_CAPTURE,
820 V4L2_FIELD_INTERLACED,
821 sizeof(struct cx88_buffer),
822 fh);
823 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
824 dev->pci, &dev->slock,
825 V4L2_BUF_TYPE_VBI_CAPTURE,
826 V4L2_FIELD_SEQ_TB,
827 sizeof(struct cx88_buffer),
828 fh);
829
830 if (fh->radio) {
1da177e4
LT		 831 int board = core->board;
832 dprintk(1,"video_open: setting radio device\n");
fd3113e8 833 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3);
1da177e4
LT		 834 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0);
835 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1);
836 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2);
e52e98a7 837 core->tvaudio = WW_FM;
1da177e4
LT		 838 cx88_set_tvaudio(core);
839 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 840 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 841 }
842
4ac97914 843 return 0;
1da177e4
LT		 844}
845
846static ssize_t
f9e7a020 847video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 848{
849 struct cx8800_fh *fh = file->private_data;
850
851 switch (fh->type) {
852 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
853 if (res_locked(fh->dev,RESOURCE_VIDEO))
854 return -EBUSY;
855 return videobuf_read_one(&fh->vidq, data, count, ppos,
856 file->f_flags & O_NONBLOCK);
857 case V4L2_BUF_TYPE_VBI_CAPTURE:
858 if (!res_get(fh->dev,fh,RESOURCE_VBI))
859 return -EBUSY;
860 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
861 file->f_flags & O_NONBLOCK);
862 default:
863 BUG();
864 return 0;
865 }
866}
867
868static unsigned int
869video_poll(struct file *file, struct poll_table_struct *wait)
870{
871 struct cx8800_fh *fh = file->private_data;
872 struct cx88_buffer *buf;
873
874 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
875 if (!res_get(fh->dev,fh,RESOURCE_VBI))
876 return POLLERR;
877 return videobuf_poll_stream(file, &fh->vbiq, wait);
878 }
879
880 if (res_check(fh,RESOURCE_VIDEO)) {
881 /* streaming capture */
882 if (list_empty(&fh->vidq.stream))
883 return POLLERR;
884 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
885 } else {
886 /* read() capture */
887 buf = (struct cx88_buffer*)fh->vidq.read_buf;
888 if (NULL == buf)
889 return POLLERR;
890 }
891 poll_wait(file, &buf->vb.done, wait);
892 if (buf->vb.state == STATE_DONE ||
893 buf->vb.state == STATE_ERROR)
894 return POLLIN|POLLRDNORM;
895 return 0;
896}
897
898static int video_release(struct inode *inode, struct file *file)
899{
900 struct cx8800_fh *fh = file->private_data;
901 struct cx8800_dev *dev = fh->dev;
902
903 /* turn off overlay */
904 if (res_check(fh, RESOURCE_OVERLAY)) {
905 /* FIXME */
906 res_free(dev,fh,RESOURCE_OVERLAY);
907 }
908
909 /* stop video capture */
910 if (res_check(fh, RESOURCE_VIDEO)) {
911 videobuf_queue_cancel(&fh->vidq);
912 res_free(dev,fh,RESOURCE_VIDEO);
913 }
914 if (fh->vidq.read_buf) {
915 buffer_release(&fh->vidq,fh->vidq.read_buf);
916 kfree(fh->vidq.read_buf);
917 }
918
919 /* stop vbi capture */
920 if (res_check(fh, RESOURCE_VBI)) {
921 if (fh->vbiq.streaming)
922 videobuf_streamoff(&fh->vbiq);
923 if (fh->vbiq.reading)
924 videobuf_read_stop(&fh->vbiq);
925 res_free(dev,fh,RESOURCE_VBI);
926 }
927
928 videobuf_mmap_free(&fh->vidq);
929 videobuf_mmap_free(&fh->vbiq);
930 file->private_data = NULL;
931 kfree(fh);
e52e98a7
MCC		 932
933 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
934
1da177e4
LT		 935 return 0;
936}
937
938static int
939video_mmap(struct file *file, struct vm_area_struct * vma)
940{
941 struct cx8800_fh *fh = file->private_data;
942
943 return videobuf_mmap_mapper(get_queue(fh), vma);
944}
945
946/* ------------------------------------------------------------------ */
947
e52e98a7
MCC		 948/* static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
949static int get_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 950{
e52e98a7 951 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 952 struct cx88_ctrl *c = NULL;
953 u32 value;
954 int i;
955
956 for (i = 0; i < CX8800_CTLS; i++)
957 if (cx8800_ctls[i].v.id == ctl->id)
958 c = &cx8800_ctls[i];
959 if (NULL == c)
960 return -EINVAL;
961
962 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
963 switch (ctl->id) {
964 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 965 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
966 : (0x7f - (value & 0x7f));
1da177e4
LT		 967 break;
968 case V4L2_CID_AUDIO_VOLUME:
969 ctl->value = 0x3f - (value & 0x3f);
970 break;
971 default:
972 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
973 break;
974 }
6457af5f
IP		 975 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
976 ctl->id, c->v.name, ctl->value, c->reg,
977 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 978 return 0;
979}
980
e52e98a7
MCC		 981/* static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
982static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 983{
e52e98a7 984 /* struct cx88_core *core = dev->core; */
1da177e4 985 struct cx88_ctrl *c = NULL;
70f00044 986 u32 value,mask;
1da177e4 987 int i;
70f00044
MCC		 988 for (i = 0; i < CX8800_CTLS; i++) {
989 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 990 c = &cx8800_ctls[i];
70f00044
MCC		 991 }
992 }
1da177e4
LT		 993 if (NULL == c)
994 return -EINVAL;
995
996 if (ctl->value < c->v.minimum)
e52e98a7 997 ctl->value = c->v.minimum;
1da177e4 998 if (ctl->value > c->v.maximum)
e52e98a7 999 ctl->value = c->v.maximum;
70f00044 1000 mask=c->mask;
1da177e4
LT		 1001 switch (ctl->id) {
1002 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 1003 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1004 break;
1005 case V4L2_CID_AUDIO_VOLUME:
1006 value = 0x3f - (ctl->value & 0x3f);
1007 break;
1008 case V4L2_CID_SATURATION:
1009 /* special v_sat handling */
70f00044
MCC		 1010
1011 value = ((ctl->value - c->off) << c->shift) & c->mask;
1012
1013 if (core->tvnorm->id & V4L2_STD_SECAM) {
1014 /* For SECAM, both U and V sat should be equal */
1015 value=value<<8|value;
1016 } else {
1017 /* Keeps U Saturation proportional to V Sat */
1018 value=(value*0x5a)/0x7f<<8|value;
1019 }
1020 mask=0xffff;
1021 break;
1da177e4
LT		 1022 default:
1023 value = ((ctl->value - c->off) << c->shift) & c->mask;
1024 break;
1025 }
6457af5f
IP		 1026 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1027 ctl->id, c->v.name, ctl->value, c->reg, value,
1028 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1029 if (c->sreg) {
70f00044 1030 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1031 } else {
70f00044 1032 cx_andor(c->reg, mask, value);
1da177e4
LT		 1033 }
1034 return 0;
1035}
1036
e52e98a7 1037static void init_controls(struct cx88_core *core)
1da177e4 1038{
70f00044
MCC		 1039 struct v4l2_control ctrl;
1040 int i;
1da177e4 1041
70f00044
MCC		 1042 for (i = 0; i < CX8800_CTLS; i++) {
1043 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1044 ctrl.value=cx8800_ctls[i].v.default_value;
70f00044
MCC		 1045 set_control(core, &ctrl);
1046 }
1da177e4
LT		 1047}
1048
1049/* ------------------------------------------------------------------ */
1050
1051static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1052 struct v4l2_format *f)
1053{
1054 switch (f->type) {
1055 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1056 memset(&f->fmt.pix,0,sizeof(f->fmt.pix));
1057 f->fmt.pix.width = fh->width;
1058 f->fmt.pix.height = fh->height;
1059 f->fmt.pix.field = fh->vidq.field;
1060 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1061 f->fmt.pix.bytesperline =
1062 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1063 f->fmt.pix.sizeimage =
1064 f->fmt.pix.height * f->fmt.pix.bytesperline;
1065 return 0;
1066 case V4L2_BUF_TYPE_VBI_CAPTURE:
1067 cx8800_vbi_fmt(dev, f);
1068 return 0;
1069 default:
1070 return -EINVAL;
1071 }
1072}
1073
1074static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1075 struct v4l2_format *f)
1076{
e52e98a7
MCC		 1077 struct cx88_core *core = dev->core;
1078
1da177e4
LT		 1079 switch (f->type) {
1080 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1081 {
1082 struct cx8800_fmt *fmt;
1083 enum v4l2_field field;
1084 unsigned int maxw, maxh;
1085
1086 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1087 if (NULL == fmt)
1088 return -EINVAL;
1089
1090 field = f->fmt.pix.field;
e52e98a7
MCC		 1091 maxw = norm_maxw(core->tvnorm);
1092 maxh = norm_maxh(core->tvnorm);
1da177e4
LT		 1093
1094 if (V4L2_FIELD_ANY == field) {
1095 field = (f->fmt.pix.height > maxh/2)
1096 ? V4L2_FIELD_INTERLACED
1097 : V4L2_FIELD_BOTTOM;
1098 }
1099
1100 switch (field) {
1101 case V4L2_FIELD_TOP:
1102 case V4L2_FIELD_BOTTOM:
1103 maxh = maxh / 2;
1104 break;
1105 case V4L2_FIELD_INTERLACED:
1106 break;
1107 default:
1108 return -EINVAL;
1109 }
1110
1111 f->fmt.pix.field = field;
1112 if (f->fmt.pix.height < 32)
1113 f->fmt.pix.height = 32;
1114 if (f->fmt.pix.height > maxh)
1115 f->fmt.pix.height = maxh;
1116 if (f->fmt.pix.width < 48)
1117 f->fmt.pix.width = 48;
1118 if (f->fmt.pix.width > maxw)
1119 f->fmt.pix.width = maxw;
1120 f->fmt.pix.width &= ~0x03;
1121 f->fmt.pix.bytesperline =
1122 (f->fmt.pix.width * fmt->depth) >> 3;
1123 f->fmt.pix.sizeimage =
1124 f->fmt.pix.height * f->fmt.pix.bytesperline;
1125
1126 return 0;
1127 }
1128 case V4L2_BUF_TYPE_VBI_CAPTURE:
1129 cx8800_vbi_fmt(dev, f);
1130 return 0;
1131 default:
1132 return -EINVAL;
1133 }
1134}
1135
1136static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1137 struct v4l2_format *f)
1138{
1139 int err;
1140
1141 switch (f->type) {
1142 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1143 err = cx8800_try_fmt(dev,fh,f);
1144 if (0 != err)
1145 return err;
1146
1147 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1148 fh->width = f->fmt.pix.width;
1149 fh->height = f->fmt.pix.height;
1150 fh->vidq.field = f->fmt.pix.field;
1151 return 0;
1152 case V4L2_BUF_TYPE_VBI_CAPTURE:
1153 cx8800_vbi_fmt(dev, f);
1154 return 0;
1155 default:
1156 return -EINVAL;
1157 }
1158}
1159
1160/*
1161 * This function is _not_ called directly, but from
1162 * video_generic_ioctl (and maybe others). userspace
1163 * copying is done already, arg is a kernel pointer.
1164 */
1165static int video_do_ioctl(struct inode *inode, struct file *file,
1166 unsigned int cmd, void *arg)
1167{
1168 struct cx8800_fh *fh = file->private_data;
1169 struct cx8800_dev *dev = fh->dev;
1170 struct cx88_core *core = dev->core;
1da177e4
LT		 1171 int err;
1172
1173 if (video_debug > 1)
5e453dc7 1174 v4l_print_ioctl(core->name,cmd);
1da177e4 1175 switch (cmd) {
e52e98a7
MCC		 1176
1177 /* --- capabilities ------------------------------------------ */
1da177e4
LT		 1178 case VIDIOC_QUERYCAP:
1179 {
1180 struct v4l2_capability *cap = arg;
1181
1182 memset(cap,0,sizeof(*cap));
e52e98a7 1183 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1184 strlcpy(cap->card, cx88_boards[core->board].name,
1185 sizeof(cap->card));
1186 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1187 cap->version = CX88_VERSION_CODE;
1188 cap->capabilities =
1189 V4L2_CAP_VIDEO_CAPTURE |
1190 V4L2_CAP_READWRITE |
1191 V4L2_CAP_STREAMING |
1192 V4L2_CAP_VBI_CAPTURE |
1da177e4
LT		 1193 0;
1194 if (UNSET != core->tuner_type)
1195 cap->capabilities |= V4L2_CAP_TUNER;
1196 return 0;
1197 }
1198
e52e98a7
MCC		 1199 /* --- capture ioctls ---------------------------------------- */
1200 case VIDIOC_ENUM_FMT:
1201 {
1202 struct v4l2_fmtdesc *f = arg;
1203 enum v4l2_buf_type type;
1204 unsigned int index;
1205
1206 index = f->index;
1207 type = f->type;
1208 switch (type) {
1209 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1210 if (index >= ARRAY_SIZE(formats))
1211 return -EINVAL;
1212 memset(f,0,sizeof(*f));
1213 f->index = index;
1214 f->type = type;
1215 strlcpy(f->description,formats[index].name,sizeof(f->description));
1216 f->pixelformat = formats[index].fourcc;
1217 break;
1218 default:
1219 return -EINVAL;
1220 }
1221 return 0;
1222 }
1223 case VIDIOC_G_FMT:
1224 {
1225 struct v4l2_format *f = arg;
1226 return cx8800_g_fmt(dev,fh,f);
1227 }
1228 case VIDIOC_S_FMT:
1229 {
1230 struct v4l2_format *f = arg;
1231 return cx8800_s_fmt(dev,fh,f);
1232 }
1233 case VIDIOC_TRY_FMT:
1234 {
1235 struct v4l2_format *f = arg;
1236 return cx8800_try_fmt(dev,fh,f);
1237 }
0dfa9abd 1238#ifdef CONFIG_VIDEO_V4L1_COMPAT
e52e98a7
MCC		 1239 /* --- streaming capture ------------------------------------- */
1240 case VIDIOCGMBUF:
1241 {
1242 struct video_mbuf *mbuf = arg;
1243 struct videobuf_queue *q;
1244 struct v4l2_requestbuffers req;
1245 unsigned int i;
1246
1247 q = get_queue(fh);
1248 memset(&req,0,sizeof(req));
1249 req.type = q->type;
1250 req.count = 8;
1251 req.memory = V4L2_MEMORY_MMAP;
1252 err = videobuf_reqbufs(q,&req);
1253 if (err < 0)
1254 return err;
1255 memset(mbuf,0,sizeof(*mbuf));
1256 mbuf->frames = req.count;
1257 mbuf->size = 0;
1258 for (i = 0; i < mbuf->frames; i++) {
1259 mbuf->offsets[i] = q->bufs[i]->boff;
1260 mbuf->size += q->bufs[i]->bsize;
1261 }
1262 return 0;
1263 }
79436633 1264#endif
e52e98a7
MCC		 1265 case VIDIOC_REQBUFS:
1266 return videobuf_reqbufs(get_queue(fh), arg);
1267
1268 case VIDIOC_QUERYBUF:
1269 return videobuf_querybuf(get_queue(fh), arg);
1270
1271 case VIDIOC_QBUF:
1272 return videobuf_qbuf(get_queue(fh), arg);
1273
1274 case VIDIOC_DQBUF:
1275 return videobuf_dqbuf(get_queue(fh), arg,
1276 file->f_flags & O_NONBLOCK);
1277
1278 case VIDIOC_STREAMON:
1279 {
1280 int res = get_ressource(fh);
1281
1282 if (!res_get(dev,fh,res))
1283 return -EBUSY;
1284 return videobuf_streamon(get_queue(fh));
1285 }
1286 case VIDIOC_STREAMOFF:
1287 {
1288 int res = get_ressource(fh);
1289
1290 err = videobuf_streamoff(get_queue(fh));
1291 if (err < 0)
1292 return err;
1293 res_free(dev,fh,res);
1294 return 0;
1295 }
e52e98a7
MCC		 1296 default:
1297 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl );
1298 }
1299 return 0;
1300}
1301
1302int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
4ac97914 1303 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl)
e52e98a7
MCC		 1304{
1305 int err;
1306
c7b0ac05
MCC		 1307 if (video_debug) {
1308 if (video_debug > 1) {
1309 if (_IOC_DIR(cmd) & _IOC_WRITE)
1310 v4l_printk_ioctl_arg("cx88(w)",cmd, arg);
1311 else if (!_IOC_DIR(cmd) & _IOC_READ) {
1312 v4l_print_ioctl("cx88", cmd);
1313 }
1314 } else
1315 v4l_print_ioctl(core->name,cmd);
1316
1317 }
e52e98a7
MCC		 1318
1319 switch (cmd) {
1da177e4
LT		 1320 /* ---------- tv norms ---------- */
1321 case VIDIOC_ENUMSTD:
1322 {
1323 struct v4l2_standard *e = arg;
1324 unsigned int i;
1325
1326 i = e->index;
1327 if (i >= ARRAY_SIZE(tvnorms))
1328 return -EINVAL;
1329 err = v4l2_video_std_construct(e, tvnorms[e->index].id,
1330 tvnorms[e->index].name);
1331 e->index = i;
1332 if (err < 0)
1333 return err;
1334 return 0;
1335 }
1336 case VIDIOC_G_STD:
1337 {
1338 v4l2_std_id *id = arg;
1339
1340 *id = core->tvnorm->id;
1341 return 0;
1342 }
1343 case VIDIOC_S_STD:
1344 {
1345 v4l2_std_id *id = arg;
1346 unsigned int i;
1347
1348 for(i = 0; i < ARRAY_SIZE(tvnorms); i++)
1349 if (*id & tvnorms[i].id)
1350 break;
1351 if (i == ARRAY_SIZE(tvnorms))
1352 return -EINVAL;
1353
3593cab5 1354 mutex_lock(&core->lock);
e52e98a7 1355 cx88_set_tvnorm(core,&tvnorms[i]);
3593cab5 1356 mutex_unlock(&core->lock);
1da177e4
LT		 1357 return 0;
1358 }
1359
1360 /* ------ input switching ---------- */
1361 case VIDIOC_ENUMINPUT:
1362 {
1363 static const char *iname[] = {
1364 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1365 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1366 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1367 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1368 [ CX88_VMUX_SVIDEO ] = "S-Video",
1369 [ CX88_VMUX_TELEVISION ] = "Television",
1370 [ CX88_VMUX_CABLE ] = "Cable TV",
1371 [ CX88_VMUX_DVB ] = "DVB",
1372 [ CX88_VMUX_DEBUG ] = "for debug only",
1373 };
1374 struct v4l2_input *i = arg;
1375 unsigned int n;
1376
1377 n = i->index;
1378 if (n >= 4)
1379 return -EINVAL;
1380 if (0 == INPUT(n)->type)
1381 return -EINVAL;
1382 memset(i,0,sizeof(*i));
1383 i->index = n;
1384 i->type = V4L2_INPUT_TYPE_CAMERA;
1385 strcpy(i->name,iname[INPUT(n)->type]);
1386 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) ||
1387 (CX88_VMUX_CABLE == INPUT(n)->type))
1388 i->type = V4L2_INPUT_TYPE_TUNER;
1389 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1390 i->std |= tvnorms[n].id;
1391 return 0;
1392 }
1393 case VIDIOC_G_INPUT:
1394 {
1395 unsigned int *i = arg;
1396
e52e98a7 1397 *i = core->input;
1da177e4
LT		 1398 return 0;
1399 }
1400 case VIDIOC_S_INPUT:
1401 {
1402 unsigned int *i = arg;
1403
1404 if (*i >= 4)
1405 return -EINVAL;
3593cab5 1406 mutex_lock(&core->lock);
1da177e4 1407 cx88_newstation(core);
e52e98a7 1408 video_mux(core,*i);
3593cab5 1409 mutex_unlock(&core->lock);
1da177e4
LT		 1410 return 0;
1411 }
1412
1413
1da177e4 1414
1da177e4
LT		 1415 /* --- controls ---------------------------------------------- */
1416 case VIDIOC_QUERYCTRL:
1417 {
1418 struct v4l2_queryctrl *c = arg;
1da177e4 1419
38a2713a 1420 return cx88_queryctrl(c);
1da177e4
LT		 1421 }
1422 case VIDIOC_G_CTRL:
e52e98a7 1423 return get_control(core,arg);
1da177e4 1424 case VIDIOC_S_CTRL:
e52e98a7 1425 return set_control(core,arg);
1da177e4
LT		 1426
1427 /* --- tuner ioctls ------------------------------------------ */
1428 case VIDIOC_G_TUNER:
1429 {
1430 struct v4l2_tuner *t = arg;
1431 u32 reg;
1432
1433 if (UNSET == core->tuner_type)
1434 return -EINVAL;
1435 if (0 != t->index)
1436 return -EINVAL;
1437
1438 memset(t,0,sizeof(*t));
1439 strcpy(t->name, "Television");
1440 t->type = V4L2_TUNER_ANALOG_TV;
1441 t->capability = V4L2_TUNER_CAP_NORM;
1442 t->rangehigh = 0xffffffffUL;
1443
1444 cx88_get_stereo(core ,t);
1445 reg = cx_read(MO_DEVICE_STATUS);
4ac97914 1446 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1da177e4
LT		 1447 return 0;
1448 }
1449 case VIDIOC_S_TUNER:
1450 {
1451 struct v4l2_tuner *t = arg;
1452
1453 if (UNSET == core->tuner_type)
1454 return -EINVAL;
1455 if (0 != t->index)
1456 return -EINVAL;
1457 cx88_set_stereo(core, t->audmode, 1);
1458 return 0;
1459 }
1460 case VIDIOC_G_FREQUENCY:
1461 {
1462 struct v4l2_frequency *f = arg;
1463
a82decf6
MCC		 1464 memset(f,0,sizeof(*f));
1465
1da177e4
LT		 1466 if (UNSET == core->tuner_type)
1467 return -EINVAL;
a82decf6 1468
e52e98a7
MCC		 1469 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1470 f->type = radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1471 f->frequency = core->freq;
41ef7c1e 1472
e52e98a7 1473 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
41ef7c1e 1474
1da177e4
LT		 1475 return 0;
1476 }
1477 case VIDIOC_S_FREQUENCY:
1478 {
1479 struct v4l2_frequency *f = arg;
1480
1481 if (UNSET == core->tuner_type)
1482 return -EINVAL;
1483 if (f->tuner != 0)
1484 return -EINVAL;
e52e98a7 1485 if (0 == radio && f->type != V4L2_TUNER_ANALOG_TV)
1da177e4 1486 return -EINVAL;
e52e98a7 1487 if (1 == radio && f->type != V4L2_TUNER_RADIO)
1da177e4 1488 return -EINVAL;
3593cab5 1489 mutex_lock(&core->lock);
e52e98a7 1490 core->freq = f->frequency;
1da177e4 1491 cx88_newstation(core);
e52e98a7 1492 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c5287ba1
MCC		 1493
1494 /* When changing channels it is required to reset TVAUDIO */
1495 msleep (10);
1496 cx88_set_tvaudio(core);
1497
3593cab5 1498 mutex_unlock(&core->lock);
1da177e4
LT		 1499 return 0;
1500 }
902fc997
TP		 1501#ifdef CONFIG_VIDEO_ADV_DEBUG
1502 /* ioctls to allow direct acces to the cx2388x registers */
1503 case VIDIOC_INT_G_REGISTER:
1504 {
1505 struct v4l2_register *reg = arg;
1506
1507 if (reg->i2c_id != 0)
1508 return -EINVAL;
1509 /* cx2388x has a 24-bit register space */
1510 reg->val = cx_read(reg->reg&0xffffff);
1511 return 0;
1512 }
1513 case VIDIOC_INT_S_REGISTER:
1514 {
1515 struct v4l2_register *reg = arg;
1516
1517 if (reg->i2c_id != 0)
1518 return -EINVAL;
1519 if (!capable(CAP_SYS_ADMIN))
1520 return -EPERM;
1521 cx_write(reg->reg&0xffffff, reg->val);
1522 return 0;
1523 }
1524#endif
1da177e4
LT		 1525
1526 default:
1527 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
e52e98a7 1528 driver_ioctl);
1da177e4
LT		 1529 }
1530 return 0;
1531}
1532
1533static int video_ioctl(struct inode *inode, struct file *file,
1534 unsigned int cmd, unsigned long arg)
1535{
c7b0ac05
MCC		 1536 int retval;
1537
1538 retval=video_usercopy(inode, file, cmd, arg, video_do_ioctl);
1539
1540 if (video_debug > 1) {
1541 if (retval < 0) {
1542 v4l_print_ioctl("cx88(err)", cmd);
1543 printk(KERN_DEBUG "cx88(err): errcode=%d\n",retval);
1544 } else if (_IOC_DIR(cmd) & _IOC_READ)
1545 v4l_printk_ioctl_arg("cx88(r)",cmd, (void *)arg);
1546 }
1547
1548 return retval;
1da177e4
LT		 1549}
1550
1551/* ----------------------------------------------------------- */
1552
1553static int radio_do_ioctl(struct inode *inode, struct file *file,
1554 unsigned int cmd, void *arg)
1555{
1556 struct cx8800_fh *fh = file->private_data;
1557 struct cx8800_dev *dev = fh->dev;
1558 struct cx88_core *core = dev->core;
1559
1560 if (video_debug > 1)
5e453dc7 1561 v4l_print_ioctl(core->name,cmd);
1da177e4
LT		 1562
1563 switch (cmd) {
1564 case VIDIOC_QUERYCAP:
1565 {
1566 struct v4l2_capability *cap = arg;
1567
1568 memset(cap,0,sizeof(*cap));
4ac97914 1569 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1570 strlcpy(cap->card, cx88_boards[core->board].name,
1571 sizeof(cap->card));
1572 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1573 cap->version = CX88_VERSION_CODE;
a82decf6 1574 cap->capabilities = V4L2_CAP_TUNER;
1da177e4
LT		 1575 return 0;
1576 }
1577 case VIDIOC_G_TUNER:
1578 {
1579 struct v4l2_tuner *t = arg;
1580
1581 if (t->index > 0)
1582 return -EINVAL;
1583
1584 memset(t,0,sizeof(*t));
1585 strcpy(t->name, "Radio");
48c42596 1586 t->type = V4L2_TUNER_RADIO;
1da177e4 1587
e52e98a7 1588 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1da177e4
LT		 1589 return 0;
1590 }
1591 case VIDIOC_ENUMINPUT:
1592 {
1593 struct v4l2_input *i = arg;
1594
1595 if (i->index != 0)
1596 return -EINVAL;
1597 strcpy(i->name,"Radio");
1598 i->type = V4L2_INPUT_TYPE_TUNER;
1599 return 0;
1600 }
1601 case VIDIOC_G_INPUT:
1602 {
1603 int *i = arg;
1604 *i = 0;
1605 return 0;
1606 }
1607 case VIDIOC_G_AUDIO:
1608 {
1609 struct v4l2_audio *a = arg;
1610
1611 memset(a,0,sizeof(*a));
1612 strcpy(a->name,"Radio");
1613 return 0;
1614 }
1615 case VIDIOC_G_STD:
1616 {
1617 v4l2_std_id *id = arg;
1618 *id = 0;
1619 return 0;
1620 }
0dfa9abd 1621#ifdef CONFIG_VIDEO_V4L1_COMPAT
a82decf6
MCC		 1622 case VIDIOCSTUNER:
1623 {
1624 struct video_tuner *v = arg;
1625
1626 if (v->tuner) /* Only tuner 0 */
1627 return -EINVAL;
1628
e52e98a7
MCC		 1629 cx88_call_i2c_clients(core,VIDIOCSTUNER,v);
1630 return 0;
a82decf6 1631 }
79436633 1632#endif
1da177e4 1633 case VIDIOC_S_TUNER:
a82decf6
MCC		 1634 {
1635 struct v4l2_tuner *t = arg;
1636
1637 if (0 != t->index)
1638 return -EINVAL;
1639
e52e98a7 1640 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
a82decf6
MCC		 1641
1642 return 0;
1643 }
1644
1645 case VIDIOC_S_AUDIO:
1da177e4
LT		 1646 case VIDIOC_S_INPUT:
1647 case VIDIOC_S_STD:
1648 return 0;
1649
1650 case VIDIOC_QUERYCTRL:
1651 {
1652 struct v4l2_queryctrl *c = arg;
1653 int i;
1654
1655 if (c->id < V4L2_CID_BASE ||
1656 c->id >= V4L2_CID_LASTP1)
1657 return -EINVAL;
1658 if (c->id == V4L2_CID_AUDIO_MUTE) {
1659 for (i = 0; i < CX8800_CTLS; i++)
1660 if (cx8800_ctls[i].v.id == c->id)
1661 break;
1662 *c = cx8800_ctls[i].v;
1663 } else
1664 *c = no_ctl;
1665 return 0;
1666 }
1667
1668
1669 case VIDIOC_G_CTRL:
1670 case VIDIOC_S_CTRL:
1671 case VIDIOC_G_FREQUENCY:
1672 case VIDIOC_S_FREQUENCY:
1673 return video_do_ioctl(inode,file,cmd,arg);
1674
1675 default:
1676 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
1677 radio_do_ioctl);
1678 }
1679 return 0;
1680};
1681
1682static int radio_ioctl(struct inode *inode, struct file *file,
1683 unsigned int cmd, unsigned long arg)
1684{
1685 return video_usercopy(inode, file, cmd, arg, radio_do_ioctl);
1686};
1687
1688/* ----------------------------------------------------------- */
1689
1690static void cx8800_vid_timeout(unsigned long data)
1691{
1692 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1693 struct cx88_core *core = dev->core;
1694 struct cx88_dmaqueue *q = &dev->vidq;
1695 struct cx88_buffer *buf;
1696 unsigned long flags;
1697
e52e98a7 1698 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1699
1700 cx_clear(MO_VID_DMACNTRL, 0x11);
1701 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1702
1703 spin_lock_irqsave(&dev->slock,flags);
1704 while (!list_empty(&q->active)) {
1705 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1706 list_del(&buf->vb.queue);
1707 buf->vb.state = STATE_ERROR;
1708 wake_up(&buf->vb.done);
1709 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1710 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1711 }
1712 restart_video_queue(dev,q);
1713 spin_unlock_irqrestore(&dev->slock,flags);
1714}
1715
41ef7c1e
MCC		 1716static char *cx88_vid_irqs[32] = {
1717 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1718 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1719 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1720 "y_sync", "u_sync", "v_sync", "vbi_sync",
1721 "opc_err", "par_err", "rip_err", "pci_abort",
1722};
1723
1da177e4
LT		 1724static void cx8800_vid_irq(struct cx8800_dev *dev)
1725{
1726 struct cx88_core *core = dev->core;
1727 u32 status, mask, count;
1728
1729 status = cx_read(MO_VID_INTSTAT);
1730 mask = cx_read(MO_VID_INTMSK);
1731 if (0 == (status & mask))
1732 return;
1733 cx_write(MO_VID_INTSTAT, status);
1734 if (irq_debug || (status & mask & ~0xff))
1735 cx88_print_irqbits(core->name, "irq vid",
1736 cx88_vid_irqs, status, mask);
1737
1738 /* risc op code error */
1739 if (status & (1 << 16)) {
1740 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1741 cx_clear(MO_VID_DMACNTRL, 0x11);
1742 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1743 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1744 }
1745
1746 /* risc1 y */
1747 if (status & 0x01) {
1748 spin_lock(&dev->slock);
1749 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1750 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1751 spin_unlock(&dev->slock);
1752 }
1753
1754 /* risc1 vbi */
1755 if (status & 0x08) {
1756 spin_lock(&dev->slock);
1757 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1758 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1759 spin_unlock(&dev->slock);
1760 }
1761
1762 /* risc2 y */
1763 if (status & 0x10) {
1764 dprintk(2,"stopper video\n");
1765 spin_lock(&dev->slock);
1766 restart_video_queue(dev,&dev->vidq);
1767 spin_unlock(&dev->slock);
1768 }
1769
1770 /* risc2 vbi */
1771 if (status & 0x80) {
1772 dprintk(2,"stopper vbi\n");
1773 spin_lock(&dev->slock);
1774 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1775 spin_unlock(&dev->slock);
1776 }
1777}
1778
7d12e780 1779static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1780{
1781 struct cx8800_dev *dev = dev_id;
1782 struct cx88_core *core = dev->core;
1783 u32 status;
1784 int loop, handled = 0;
1785
1786 for (loop = 0; loop < 10; loop++) {
1787 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
1788 if (0 == status)
1789 goto out;
1790 cx_write(MO_PCI_INTSTAT, status);
1791 handled = 1;
1792
1793 if (status & core->pci_irqmask)
1794 cx88_core_irq(core,status);
1795 if (status & 0x01)
1796 cx8800_vid_irq(dev);
1797 };
1798 if (10 == loop) {
1799 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1800 core->name);
1801 cx_write(MO_PCI_INTMSK,0);
1802 }
1803
1804 out:
1805 return IRQ_RETVAL(handled);
1806}
1807
1808/* ----------------------------------------------------------- */
1809/* exported stuff */
1810
1811static struct file_operations video_fops =
1812{
1813 .owner = THIS_MODULE,
1814 .open = video_open,
1815 .release = video_release,
1816 .read = video_read,
1817 .poll = video_poll,
1818 .mmap = video_mmap,
1819 .ioctl = video_ioctl,
0d0fbf81 1820 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1821 .llseek = no_llseek,
1822};
1823
408b664a 1824static struct video_device cx8800_video_template =
1da177e4
LT		 1825{
1826 .name = "cx8800-video",
1827 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1828 .hardware = 0,
1829 .fops = &video_fops,
1830 .minor = -1,
1831};
1832
408b664a 1833static struct video_device cx8800_vbi_template =
1da177e4
LT		 1834{
1835 .name = "cx8800-vbi",
1836 .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER,
1837 .hardware = 0,
1838 .fops = &video_fops,
1839 .minor = -1,
1840};
1841
1842static struct file_operations radio_fops =
1843{
1844 .owner = THIS_MODULE,
1845 .open = video_open,
1846 .release = video_release,
1847 .ioctl = radio_ioctl,
0d0fbf81 1848 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1849 .llseek = no_llseek,
1850};
1851
408b664a 1852static struct video_device cx8800_radio_template =
1da177e4
LT		 1853{
1854 .name = "cx8800-radio",
1855 .type = VID_TYPE_TUNER,
1856 .hardware = 0,
1857 .fops = &radio_fops,
1858 .minor = -1,
1859};
1860
1861/* ----------------------------------------------------------- */
1862
1863static void cx8800_unregister_video(struct cx8800_dev *dev)
1864{
1865 if (dev->radio_dev) {
1866 if (-1 != dev->radio_dev->minor)
1867 video_unregister_device(dev->radio_dev);
1868 else
1869 video_device_release(dev->radio_dev);
1870 dev->radio_dev = NULL;
1871 }
1872 if (dev->vbi_dev) {
1873 if (-1 != dev->vbi_dev->minor)
1874 video_unregister_device(dev->vbi_dev);
1875 else
1876 video_device_release(dev->vbi_dev);
1877 dev->vbi_dev = NULL;
1878 }
1879 if (dev->video_dev) {
1880 if (-1 != dev->video_dev->minor)
1881 video_unregister_device(dev->video_dev);
1882 else
1883 video_device_release(dev->video_dev);
1884 dev->video_dev = NULL;
1885 }
1886}
1887
1888static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1889 const struct pci_device_id *pci_id)
1890{
1891 struct cx8800_dev *dev;
1892 struct cx88_core *core;
1893 int err;
1894
7408187d 1895 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1896 if (NULL == dev)
1897 return -ENOMEM;
1da177e4
LT		 1898
1899 /* pci init */
1900 dev->pci = pci_dev;
1901 if (pci_enable_device(pci_dev)) {
1902 err = -EIO;
1903 goto fail_free;
1904 }
1905 core = cx88_core_get(dev->pci);
1906 if (NULL == core) {
1907 err = -EINVAL;
1908 goto fail_free;
1909 }
1910 dev->core = core;
1911
1912 /* print pci info */
1913 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1914 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1915 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1916 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1917 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1918 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1919
1920 pci_set_master(pci_dev);
1921 if (!pci_dma_supported(pci_dev,0xffffffff)) {
1922 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1923 err = -EIO;
1924 goto fail_core;
1925 }
1926
1927 /* initialize driver struct */
1da177e4
LT		 1928 spin_lock_init(&dev->slock);
1929 core->tvnorm = tvnorms;
1930
1931 /* init video dma queues */
1932 INIT_LIST_HEAD(&dev->vidq.active);
1933 INIT_LIST_HEAD(&dev->vidq.queued);
1934 dev->vidq.timeout.function = cx8800_vid_timeout;
1935 dev->vidq.timeout.data = (unsigned long)dev;
1936 init_timer(&dev->vidq.timeout);
1937 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1938 MO_VID_DMACNTRL,0x11,0x00);
1939
1940 /* init vbi dma queues */
1941 INIT_LIST_HEAD(&dev->vbiq.active);
1942 INIT_LIST_HEAD(&dev->vbiq.queued);
1943 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1944 dev->vbiq.timeout.data = (unsigned long)dev;
1945 init_timer(&dev->vbiq.timeout);
1946 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1947 MO_VID_DMACNTRL,0x88,0x00);
1948
1949 /* get irq */
1950 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1951 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4
LT		 1952 if (err < 0) {
1953 printk(KERN_ERR "%s: can't get IRQ %d\n",
1954 core->name,pci_dev->irq);
1955 goto fail_core;
1956 }
1957 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1958
1959 /* load and configure helper modules */
1960 if (TUNER_ABSENT != core->tuner_type)
1961 request_module("tuner");
e52e98a7 1962
3057906d
ST		 1963 if (cx88_boards[ core->board ].audio_chip == AUDIO_CHIP_WM8775)
1964 request_module("wm8775");
1965
1da177e4
LT		 1966 /* register v4l devices */
1967 dev->video_dev = cx88_vdev_init(core,dev->pci,
1968 &cx8800_video_template,"video");
1969 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1970 video_nr[core->nr]);
1971 if (err < 0) {
1972 printk(KERN_INFO "%s: can't register video device\n",
1973 core->name);
1974 goto fail_unreg;
1975 }
1976 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1977 core->name,dev->video_dev->minor & 0x1f);
1978
1979 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1980 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1981 vbi_nr[core->nr]);
1982 if (err < 0) {
1983 printk(KERN_INFO "%s/0: can't register vbi device\n",
1984 core->name);
1985 goto fail_unreg;
1986 }
1987 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1988 core->name,dev->vbi_dev->minor & 0x1f);
1989
1990 if (core->has_radio) {
1991 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1992 &cx8800_radio_template,"radio");
1993 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1994 radio_nr[core->nr]);
1995 if (err < 0) {
1996 printk(KERN_INFO "%s/0: can't register radio device\n",
1997 core->name);
1998 goto fail_unreg;
1999 }
2000 printk(KERN_INFO "%s/0: registered device radio%d\n",
2001 core->name,dev->radio_dev->minor & 0x1f);
2002 }
2003
2004 /* everything worked */
2005 list_add_tail(&dev->devlist,&cx8800_devlist);
2006 pci_set_drvdata(pci_dev,dev);
2007
2008 /* initial device configuration */
3593cab5 2009 mutex_lock(&core->lock);
e52e98a7 2010 cx88_set_tvnorm(core,tvnorms);
70f00044 2011 init_controls(core);
e52e98a7 2012 video_mux(core,0);
3593cab5 2013 mutex_unlock(&core->lock);
1da177e4
LT		 2014
2015 /* start tvaudio thread */
2016 if (core->tuner_type != TUNER_ABSENT)
2017 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
2018 return 0;
2019
2020fail_unreg:
2021 cx8800_unregister_video(dev);
2022 free_irq(pci_dev->irq, dev);
2023fail_core:
2024 cx88_core_put(core,dev->pci);
2025fail_free:
2026 kfree(dev);
2027 return err;
2028}
2029
2030static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
2031{
4ac97914 2032 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 2033 struct cx88_core *core = dev->core;
1da177e4
LT		 2034
2035 /* stop thread */
e52e98a7
MCC		 2036 if (core->kthread) {
2037 kthread_stop(core->kthread);
2038 core->kthread = NULL;
1da177e4
LT		 2039 }
2040
e52e98a7 2041 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 2042 pci_disable_device(pci_dev);
2043
2044 /* unregister stuff */
2045
2046 free_irq(pci_dev->irq, dev);
2047 cx8800_unregister_video(dev);
2048 pci_set_drvdata(pci_dev, NULL);
2049
2050 /* free memory */
2051 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2052 list_del(&dev->devlist);
e52e98a7 2053 cx88_core_put(core,dev->pci);
1da177e4
LT		 2054 kfree(dev);
2055}
2056
17bc98a4 2057#ifdef CONFIG_PM
1da177e4
LT		 2058static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2059{
b45009b0 2060 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2061 struct cx88_core *core = dev->core;
2062
2063 /* stop video+vbi capture */
2064 spin_lock(&dev->slock);
2065 if (!list_empty(&dev->vidq.active)) {
2066 printk("%s: suspend video\n", core->name);
2067 stop_video_dma(dev);
2068 del_timer(&dev->vidq.timeout);
2069 }
2070 if (!list_empty(&dev->vbiq.active)) {
2071 printk("%s: suspend vbi\n", core->name);
2072 cx8800_stop_vbi_dma(dev);
2073 del_timer(&dev->vbiq.timeout);
2074 }
2075 spin_unlock(&dev->slock);
2076
1da177e4 2077 /* FIXME -- shutdown device */
e52e98a7 2078 cx88_shutdown(core);
1da177e4
LT		 2079
2080 pci_save_state(pci_dev);
2081 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2082 pci_disable_device(pci_dev);
2083 dev->state.disabled = 1;
2084 }
2085 return 0;
2086}
2087
2088static int cx8800_resume(struct pci_dev *pci_dev)
2089{
b45009b0 2090 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2091 struct cx88_core *core = dev->core;
08adb9e2 2092 int err;
1da177e4
LT		 2093
2094 if (dev->state.disabled) {
08adb9e2
MCC		 2095 err=pci_enable_device(pci_dev);
2096 if (err) {
2097 printk(KERN_ERR "%s: can't enable device\n",
2098 core->name);
2099 return err;
2100 }
2101
1da177e4
LT		 2102 dev->state.disabled = 0;
2103 }
08adb9e2
MCC		 2104 err= pci_set_power_state(pci_dev, PCI_D0);
2105 if (err) {
2106 printk(KERN_ERR "%s: can't enable device\n",
2107 core->name);
2108
2109 pci_disable_device(pci_dev);
2110 dev->state.disabled = 1;
2111
2112 return err;
2113 }
1da177e4
LT		 2114 pci_restore_state(pci_dev);
2115
1da177e4 2116 /* FIXME: re-initialize hardware */
e52e98a7 2117 cx88_reset(core);
1da177e4
LT		 2118
2119 /* restart video+vbi capture */
2120 spin_lock(&dev->slock);
2121 if (!list_empty(&dev->vidq.active)) {
2122 printk("%s: resume video\n", core->name);
2123 restart_video_queue(dev,&dev->vidq);
2124 }
2125 if (!list_empty(&dev->vbiq.active)) {
2126 printk("%s: resume vbi\n", core->name);
2127 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2128 }
2129 spin_unlock(&dev->slock);
2130
2131 return 0;
2132}
17bc98a4 2133#endif
1da177e4
LT		 2134
2135/* ----------------------------------------------------------- */
2136
408b664a 2137static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2138 {
2139 .vendor = 0x14f1,
2140 .device = 0x8800,
b45009b0
MCC		 2141 .subvendor = PCI_ANY_ID,
2142 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2143 },{
2144 /* --- end of list --- */
2145 }
2146};
2147MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2148
2149static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2150 .name = "cx8800",
2151 .id_table = cx8800_pci_tbl,
2152 .probe = cx8800_initdev,
2153 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2154#ifdef CONFIG_PM
1da177e4
LT		 2155 .suspend = cx8800_suspend,
2156 .resume = cx8800_resume,
17bc98a4 2157#endif
1da177e4
LT		 2158};
2159
2160static int cx8800_init(void)
2161{
2162 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2163 (CX88_VERSION_CODE >> 16) & 0xff,
2164 (CX88_VERSION_CODE >> 8) & 0xff,
2165 CX88_VERSION_CODE & 0xff);
2166#ifdef SNAPSHOT
2167 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2168 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2169#endif
2170 return pci_register_driver(&cx8800_pci_driver);
2171}
2172
2173static void cx8800_fini(void)
2174{
2175 pci_unregister_driver(&cx8800_pci_driver);
2176}
2177
2178module_init(cx8800_init);
2179module_exit(cx8800_fini);
2180
e52e98a7
MCC		 2181EXPORT_SYMBOL(cx88_do_ioctl);
2182
1da177e4
LT		 2183/* ----------------------------------------------------------- */
2184/*
2185 * Local variables:
2186 * c-basic-offset: 8
2187 * End:
b45009b0 2188 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2189 */
Linux kernel - Deliverables
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