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V4L/DVB (4498): Offset parameter permission were 0x666, instead of 0x664
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kmod.h>
28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
32#include <linux/kthread.h>
33#include <asm/div64.h>
34
35#include "cx88.h"
5e453dc7 36#include <media/v4l2-common.h>
1da177e4 37
cd41e28e 38#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 39/* Include V4L1 specific functions. Should be removed soon */
40#include <linux/videodev.h>
cd41e28e 41#endif
79436633 42
1da177e4
LT		 43MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
44MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
45MODULE_LICENSE("GPL");
46
47/* ------------------------------------------------------------------ */
48
49static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
50static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
51static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52
53module_param_array(video_nr, int, NULL, 0444);
54module_param_array(vbi_nr, int, NULL, 0444);
55module_param_array(radio_nr, int, NULL, 0444);
56
57MODULE_PARM_DESC(video_nr,"video device numbers");
58MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
59MODULE_PARM_DESC(radio_nr,"radio device numbers");
60
61static unsigned int video_debug = 0;
62module_param(video_debug,int,0644);
63MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
64
65static unsigned int irq_debug = 0;
66module_param(irq_debug,int,0644);
67MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
68
69static unsigned int vid_limit = 16;
70module_param(vid_limit,int,0644);
71MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
72
73#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 74 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 75
76/* ------------------------------------------------------------------ */
77
78static LIST_HEAD(cx8800_devlist);
79
80/* ------------------------------------------------------------------- */
81/* static data */
82
83static struct cx88_tvnorm tvnorms[] = {
84 {
85 .name = "NTSC-M",
86 .id = V4L2_STD_NTSC_M,
87 .cxiformat = VideoFormatNTSC,
88 .cxoformat = 0x181f0008,
89 },{
90 .name = "NTSC-JP",
91 .id = V4L2_STD_NTSC_M_JP,
92 .cxiformat = VideoFormatNTSCJapan,
93 .cxoformat = 0x181f0008,
1da177e4
LT		 94 },{
95 .name = "PAL-BG",
96 .id = V4L2_STD_PAL_BG,
97 .cxiformat = VideoFormatPAL,
98 .cxoformat = 0x181f0008,
99 },{
100 .name = "PAL-DK",
101 .id = V4L2_STD_PAL_DK,
102 .cxiformat = VideoFormatPAL,
103 .cxoformat = 0x181f0008,
104 },{
105 .name = "PAL-I",
106 .id = V4L2_STD_PAL_I,
107 .cxiformat = VideoFormatPAL,
108 .cxoformat = 0x181f0008,
4ac97914 109 },{
1da177e4
LT		 110 .name = "PAL-M",
111 .id = V4L2_STD_PAL_M,
112 .cxiformat = VideoFormatPALM,
113 .cxoformat = 0x1c1f0008,
114 },{
115 .name = "PAL-N",
116 .id = V4L2_STD_PAL_N,
117 .cxiformat = VideoFormatPALN,
118 .cxoformat = 0x1c1f0008,
119 },{
120 .name = "PAL-Nc",
121 .id = V4L2_STD_PAL_Nc,
122 .cxiformat = VideoFormatPALNC,
123 .cxoformat = 0x1c1f0008,
124 },{
125 .name = "PAL-60",
126 .id = V4L2_STD_PAL_60,
127 .cxiformat = VideoFormatPAL60,
128 .cxoformat = 0x181f0008,
129 },{
130 .name = "SECAM-L",
131 .id = V4L2_STD_SECAM_L,
132 .cxiformat = VideoFormatSECAM,
133 .cxoformat = 0x181f0008,
134 },{
135 .name = "SECAM-DK",
136 .id = V4L2_STD_SECAM_DK,
137 .cxiformat = VideoFormatSECAM,
138 .cxoformat = 0x181f0008,
139 }
140};
141
142static struct cx8800_fmt formats[] = {
143 {
144 .name = "8 bpp, gray",
145 .fourcc = V4L2_PIX_FMT_GREY,
146 .cxformat = ColorFormatY8,
147 .depth = 8,
148 .flags = FORMAT_FLAGS_PACKED,
149 },{
150 .name = "15 bpp RGB, le",
151 .fourcc = V4L2_PIX_FMT_RGB555,
152 .cxformat = ColorFormatRGB15,
153 .depth = 16,
154 .flags = FORMAT_FLAGS_PACKED,
155 },{
156 .name = "15 bpp RGB, be",
157 .fourcc = V4L2_PIX_FMT_RGB555X,
158 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
159 .depth = 16,
160 .flags = FORMAT_FLAGS_PACKED,
161 },{
162 .name = "16 bpp RGB, le",
163 .fourcc = V4L2_PIX_FMT_RGB565,
164 .cxformat = ColorFormatRGB16,
165 .depth = 16,
166 .flags = FORMAT_FLAGS_PACKED,
167 },{
168 .name = "16 bpp RGB, be",
169 .fourcc = V4L2_PIX_FMT_RGB565X,
170 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
171 .depth = 16,
172 .flags = FORMAT_FLAGS_PACKED,
173 },{
174 .name = "24 bpp RGB, le",
175 .fourcc = V4L2_PIX_FMT_BGR24,
176 .cxformat = ColorFormatRGB24,
177 .depth = 24,
178 .flags = FORMAT_FLAGS_PACKED,
179 },{
180 .name = "32 bpp RGB, le",
181 .fourcc = V4L2_PIX_FMT_BGR32,
182 .cxformat = ColorFormatRGB32,
183 .depth = 32,
184 .flags = FORMAT_FLAGS_PACKED,
185 },{
186 .name = "32 bpp RGB, be",
187 .fourcc = V4L2_PIX_FMT_RGB32,
188 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
189 .depth = 32,
190 .flags = FORMAT_FLAGS_PACKED,
191 },{
192 .name = "4:2:2, packed, YUYV",
193 .fourcc = V4L2_PIX_FMT_YUYV,
194 .cxformat = ColorFormatYUY2,
195 .depth = 16,
196 .flags = FORMAT_FLAGS_PACKED,
197 },{
198 .name = "4:2:2, packed, UYVY",
199 .fourcc = V4L2_PIX_FMT_UYVY,
200 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
201 .depth = 16,
202 .flags = FORMAT_FLAGS_PACKED,
203 },
204};
205
206static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
207{
208 unsigned int i;
209
210 for (i = 0; i < ARRAY_SIZE(formats); i++)
211 if (formats[i].fourcc == fourcc)
212 return formats+i;
213 return NULL;
214}
215
216/* ------------------------------------------------------------------- */
217
218static const struct v4l2_queryctrl no_ctl = {
219 .name = "42",
220 .flags = V4L2_CTRL_FLAG_DISABLED,
221};
222
223static struct cx88_ctrl cx8800_ctls[] = {
224 /* --- video --- */
225 {
226 .v = {
227 .id = V4L2_CID_BRIGHTNESS,
228 .name = "Brightness",
229 .minimum = 0x00,
230 .maximum = 0xff,
231 .step = 1,
9f9c907f 232 .default_value = 0x7f,
1da177e4
LT		 233 .type = V4L2_CTRL_TYPE_INTEGER,
234 },
235 .off = 128,
236 .reg = MO_CONTR_BRIGHT,
237 .mask = 0x00ff,
238 .shift = 0,
239 },{
240 .v = {
241 .id = V4L2_CID_CONTRAST,
242 .name = "Contrast",
243 .minimum = 0,
244 .maximum = 0xff,
245 .step = 1,
70f00044 246 .default_value = 0x3f,
1da177e4
LT		 247 .type = V4L2_CTRL_TYPE_INTEGER,
248 },
41ef7c1e 249 .off = 0,
1da177e4
LT		 250 .reg = MO_CONTR_BRIGHT,
251 .mask = 0xff00,
252 .shift = 8,
253 },{
254 .v = {
255 .id = V4L2_CID_HUE,
256 .name = "Hue",
257 .minimum = 0,
258 .maximum = 0xff,
259 .step = 1,
9f9c907f 260 .default_value = 0x7f,
1da177e4
LT		 261 .type = V4L2_CTRL_TYPE_INTEGER,
262 },
9ac4c158 263 .off = 128,
1da177e4
LT		 264 .reg = MO_HUE,
265 .mask = 0x00ff,
266 .shift = 0,
267 },{
268 /* strictly, this only describes only U saturation.
269 * V saturation is handled specially through code.
270 */
271 .v = {
272 .id = V4L2_CID_SATURATION,
273 .name = "Saturation",
274 .minimum = 0,
275 .maximum = 0xff,
276 .step = 1,
70f00044 277 .default_value = 0x7f,
1da177e4
LT		 278 .type = V4L2_CTRL_TYPE_INTEGER,
279 },
280 .off = 0,
281 .reg = MO_UV_SATURATION,
282 .mask = 0x00ff,
283 .shift = 0,
284 },{
285 /* --- audio --- */
286 .v = {
287 .id = V4L2_CID_AUDIO_MUTE,
288 .name = "Mute",
289 .minimum = 0,
290 .maximum = 1,
70f00044 291 .default_value = 1,
1da177e4
LT		 292 .type = V4L2_CTRL_TYPE_BOOLEAN,
293 },
294 .reg = AUD_VOL_CTL,
295 .sreg = SHADOW_AUD_VOL_CTL,
296 .mask = (1 << 6),
297 .shift = 6,
298 },{
299 .v = {
300 .id = V4L2_CID_AUDIO_VOLUME,
301 .name = "Volume",
302 .minimum = 0,
303 .maximum = 0x3f,
304 .step = 1,
9f9c907f 305 .default_value = 0x3f,
1da177e4
LT		 306 .type = V4L2_CTRL_TYPE_INTEGER,
307 },
308 .reg = AUD_VOL_CTL,
309 .sreg = SHADOW_AUD_VOL_CTL,
310 .mask = 0x3f,
311 .shift = 0,
312 },{
313 .v = {
314 .id = V4L2_CID_AUDIO_BALANCE,
315 .name = "Balance",
316 .minimum = 0,
317 .maximum = 0x7f,
318 .step = 1,
319 .default_value = 0x40,
320 .type = V4L2_CTRL_TYPE_INTEGER,
321 },
322 .reg = AUD_BAL_CTL,
323 .sreg = SHADOW_AUD_BAL_CTL,
324 .mask = 0x7f,
325 .shift = 0,
326 }
327};
408b664a 328static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 329
38a2713a
MK		 330const u32 cx88_user_ctrls[] = {
331 V4L2_CID_USER_CLASS,
332 V4L2_CID_BRIGHTNESS,
333 V4L2_CID_CONTRAST,
334 V4L2_CID_SATURATION,
335 V4L2_CID_HUE,
336 V4L2_CID_AUDIO_VOLUME,
337 V4L2_CID_AUDIO_BALANCE,
338 V4L2_CID_AUDIO_MUTE,
339 0
340};
341EXPORT_SYMBOL(cx88_user_ctrls);
342
343static const u32 *ctrl_classes[] = {
344 cx88_user_ctrls,
345 NULL
346};
347
348int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl)
349{
350 int i;
351
352 if (qctrl->id < V4L2_CID_BASE ||
353 qctrl->id >= V4L2_CID_LASTP1)
354 return -EINVAL;
355 for (i = 0; i < CX8800_CTLS; i++)
356 if (cx8800_ctls[i].v.id == qctrl->id)
357 break;
358 if (i == CX8800_CTLS) {
359 *qctrl = no_ctl;
360 return 0;
361 }
362 *qctrl = cx8800_ctls[i].v;
363 return 0;
364}
365EXPORT_SYMBOL(cx8800_ctrl_query);
366
367static int cx88_queryctrl(struct v4l2_queryctrl *qctrl)
368{
369 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
370 if (qctrl->id == 0)
371 return -EINVAL;
372 return cx8800_ctrl_query(qctrl);
373}
374
1da177e4
LT		 375/* ------------------------------------------------------------------- */
376/* resource management */
377
378static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
379{
e52e98a7 380 struct cx88_core *core = dev->core;
1da177e4
LT		 381 if (fh->resources & bit)
382 /* have it already allocated */
383 return 1;
384
385 /* is it free? */
3593cab5 386 mutex_lock(&core->lock);
1da177e4
LT		 387 if (dev->resources & bit) {
388 /* no, someone else uses it */
3593cab5 389 mutex_unlock(&core->lock);
1da177e4
LT		 390 return 0;
391 }
392 /* it's free, grab it */
393 fh->resources |= bit;
394 dev->resources |= bit;
395 dprintk(1,"res: get %d\n",bit);
3593cab5 396 mutex_unlock(&core->lock);
1da177e4
LT		 397 return 1;
398}
399
400static
401int res_check(struct cx8800_fh *fh, unsigned int bit)
402{
403 return (fh->resources & bit);
404}
405
406static
407int res_locked(struct cx8800_dev *dev, unsigned int bit)
408{
409 return (dev->resources & bit);
410}
411
412static
413void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
414{
e52e98a7 415 struct cx88_core *core = dev->core;
ae24601b 416 BUG_ON((fh->resources & bits) != bits);
1da177e4 417
3593cab5 418 mutex_lock(&core->lock);
1da177e4
LT		 419 fh->resources &= ~bits;
420 dev->resources &= ~bits;
421 dprintk(1,"res: put %d\n",bits);
3593cab5 422 mutex_unlock(&core->lock);
1da177e4
LT		 423}
424
425/* ------------------------------------------------------------------ */
426
e52e98a7
MCC		 427/* static int video_mux(struct cx8800_dev *dev, unsigned int input) */
428static int video_mux(struct cx88_core *core, unsigned int input)
1da177e4 429{
e52e98a7 430 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 431
432 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
433 input, INPUT(input)->vmux,
434 INPUT(input)->gpio0,INPUT(input)->gpio1,
435 INPUT(input)->gpio2,INPUT(input)->gpio3);
e52e98a7 436 core->input = input;
1da177e4
LT		 437 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
438 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
439 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
440 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
441 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
442
443 switch (INPUT(input)->type) {
444 case CX88_VMUX_SVIDEO:
445 cx_set(MO_AFECFG_IO, 0x00000001);
446 cx_set(MO_INPUT_FORMAT, 0x00010010);
447 cx_set(MO_FILTER_EVEN, 0x00002020);
448 cx_set(MO_FILTER_ODD, 0x00002020);
449 break;
450 default:
451 cx_clear(MO_AFECFG_IO, 0x00000001);
452 cx_clear(MO_INPUT_FORMAT, 0x00010010);
453 cx_clear(MO_FILTER_EVEN, 0x00002020);
454 cx_clear(MO_FILTER_ODD, 0x00002020);
455 break;
456 }
457 return 0;
458}
459
460/* ------------------------------------------------------------------ */
461
462static int start_video_dma(struct cx8800_dev *dev,
463 struct cx88_dmaqueue *q,
464 struct cx88_buffer *buf)
465{
466 struct cx88_core *core = dev->core;
467
468 /* setup fifo + format */
e52e98a7 469 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 470 buf->bpl, buf->risc.dma);
e52e98a7 471 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 472 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
473
474 /* reset counter */
475 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
476 q->count = 1;
477
478 /* enable irqs */
479 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
e52e98a7
MCC		 480
481 /* Enables corresponding bits at PCI_INT_STAT:
482 bits 0 to 4: video, audio, transport stream, VIP, Host
483 bit 7: timer
484 bits 8 and 9: DMA complete for: SRC, DST
485 bits 10 and 11: BERR signal asserted for RISC: RD, WR
486 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
487 */
1da177e4
LT		 488 cx_set(MO_VID_INTMSK, 0x0f0011);
489
490 /* enable capture */
491 cx_set(VID_CAPTURE_CONTROL,0x06);
492
493 /* start dma */
494 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 495 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 496
497 return 0;
498}
499
500static int stop_video_dma(struct cx8800_dev *dev)
501{
502 struct cx88_core *core = dev->core;
503
504 /* stop dma */
505 cx_clear(MO_VID_DMACNTRL, 0x11);
506
507 /* disable capture */
508 cx_clear(VID_CAPTURE_CONTROL,0x06);
509
510 /* disable irqs */
511 cx_clear(MO_PCI_INTMSK, 0x000001);
512 cx_clear(MO_VID_INTMSK, 0x0f0011);
513 return 0;
514}
515
516static int restart_video_queue(struct cx8800_dev *dev,
517 struct cx88_dmaqueue *q)
518{
e52e98a7 519 struct cx88_core *core = dev->core;
1da177e4
LT		 520 struct cx88_buffer *buf, *prev;
521 struct list_head *item;
522
523 if (!list_empty(&q->active)) {
4ac97914 524 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 525 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
526 buf, buf->vb.i);
527 start_video_dma(dev, q, buf);
528 list_for_each(item,&q->active) {
529 buf = list_entry(item, struct cx88_buffer, vb.queue);
530 buf->count = q->count++;
531 }
532 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
533 return 0;
534 }
535
536 prev = NULL;
537 for (;;) {
538 if (list_empty(&q->queued))
539 return 0;
4ac97914 540 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 541 if (NULL == prev) {
179e0917 542 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 543 start_video_dma(dev, q, buf);
544 buf->vb.state = STATE_ACTIVE;
545 buf->count = q->count++;
546 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
547 dprintk(2,"[%p/%d] restart_queue - first active\n",
548 buf,buf->vb.i);
549
550 } else if (prev->vb.width == buf->vb.width &&
551 prev->vb.height == buf->vb.height &&
552 prev->fmt == buf->fmt) {
179e0917 553 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 554 buf->vb.state = STATE_ACTIVE;
555 buf->count = q->count++;
556 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
557 dprintk(2,"[%p/%d] restart_queue - move to active\n",
558 buf,buf->vb.i);
559 } else {
560 return 0;
561 }
562 prev = buf;
563 }
564}
565
566/* ------------------------------------------------------------------ */
567
568static int
569buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
570{
571 struct cx8800_fh *fh = q->priv_data;
572
573 *size = fh->fmt->depth*fh->width*fh->height >> 3;
574 if (0 == *count)
575 *count = 32;
576 while (*size * *count > vid_limit * 1024 * 1024)
577 (*count)--;
578 return 0;
579}
580
581static int
582buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
583 enum v4l2_field field)
584{
585 struct cx8800_fh *fh = q->priv_data;
586 struct cx8800_dev *dev = fh->dev;
e52e98a7 587 struct cx88_core *core = dev->core;
1da177e4
LT		 588 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
589 int rc, init_buffer = 0;
590
591 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 592 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
593 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 594 return -EINVAL;
595 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
596 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
597 return -EINVAL;
598
599 if (buf->fmt != fh->fmt ||
600 buf->vb.width != fh->width ||
601 buf->vb.height != fh->height ||
602 buf->vb.field != field) {
603 buf->fmt = fh->fmt;
604 buf->vb.width = fh->width;
605 buf->vb.height = fh->height;
606 buf->vb.field = field;
607 init_buffer = 1;
608 }
609
610 if (STATE_NEEDS_INIT == buf->vb.state) {
611 init_buffer = 1;
c7b0ac05 612 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 613 goto fail;
614 }
615
616 if (init_buffer) {
617 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
618 switch (buf->vb.field) {
619 case V4L2_FIELD_TOP:
620 cx88_risc_buffer(dev->pci, &buf->risc,
621 buf->vb.dma.sglist, 0, UNSET,
622 buf->bpl, 0, buf->vb.height);
623 break;
624 case V4L2_FIELD_BOTTOM:
625 cx88_risc_buffer(dev->pci, &buf->risc,
626 buf->vb.dma.sglist, UNSET, 0,
627 buf->bpl, 0, buf->vb.height);
628 break;
629 case V4L2_FIELD_INTERLACED:
630 cx88_risc_buffer(dev->pci, &buf->risc,
631 buf->vb.dma.sglist, 0, buf->bpl,
632 buf->bpl, buf->bpl,
633 buf->vb.height >> 1);
634 break;
635 case V4L2_FIELD_SEQ_TB:
636 cx88_risc_buffer(dev->pci, &buf->risc,
637 buf->vb.dma.sglist,
638 0, buf->bpl * (buf->vb.height >> 1),
639 buf->bpl, 0,
640 buf->vb.height >> 1);
641 break;
642 case V4L2_FIELD_SEQ_BT:
643 cx88_risc_buffer(dev->pci, &buf->risc,
644 buf->vb.dma.sglist,
645 buf->bpl * (buf->vb.height >> 1), 0,
646 buf->bpl, 0,
647 buf->vb.height >> 1);
648 break;
649 default:
650 BUG();
651 }
652 }
653 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
654 buf, buf->vb.i,
655 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
656 (unsigned long)buf->risc.dma);
657
658 buf->vb.state = STATE_PREPARED;
659 return 0;
660
661 fail:
c7b0ac05 662 cx88_free_buffer(q,buf);
1da177e4
LT		 663 return rc;
664}
665
666static void
667buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
668{
669 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
670 struct cx88_buffer *prev;
671 struct cx8800_fh *fh = vq->priv_data;
672 struct cx8800_dev *dev = fh->dev;
e52e98a7 673 struct cx88_core *core = dev->core;
1da177e4
LT		 674 struct cx88_dmaqueue *q = &dev->vidq;
675
676 /* add jump to stopper */
677 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
678 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
679
680 if (!list_empty(&q->queued)) {
681 list_add_tail(&buf->vb.queue,&q->queued);
682 buf->vb.state = STATE_QUEUED;
683 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
684 buf, buf->vb.i);
685
686 } else if (list_empty(&q->active)) {
687 list_add_tail(&buf->vb.queue,&q->active);
688 start_video_dma(dev, q, buf);
689 buf->vb.state = STATE_ACTIVE;
690 buf->count = q->count++;
691 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
692 dprintk(2,"[%p/%d] buffer_queue - first active\n",
693 buf, buf->vb.i);
694
695 } else {
696 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
697 if (prev->vb.width == buf->vb.width &&
698 prev->vb.height == buf->vb.height &&
699 prev->fmt == buf->fmt) {
700 list_add_tail(&buf->vb.queue,&q->active);
701 buf->vb.state = STATE_ACTIVE;
702 buf->count = q->count++;
703 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
704 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
705 buf, buf->vb.i);
706
707 } else {
708 list_add_tail(&buf->vb.queue,&q->queued);
709 buf->vb.state = STATE_QUEUED;
710 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
711 buf, buf->vb.i);
712 }
713 }
714}
715
716static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
717{
718 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 719
c7b0ac05 720 cx88_free_buffer(q,buf);
1da177e4
LT		 721}
722
408b664a 723static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 724 .buf_setup = buffer_setup,
725 .buf_prepare = buffer_prepare,
726 .buf_queue = buffer_queue,
727 .buf_release = buffer_release,
728};
729
730/* ------------------------------------------------------------------ */
731
1da177e4
LT		 732
733/* ------------------------------------------------------------------ */
734
735static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
736{
737 switch (fh->type) {
738 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
739 return &fh->vidq;
740 case V4L2_BUF_TYPE_VBI_CAPTURE:
741 return &fh->vbiq;
742 default:
743 BUG();
744 return NULL;
745 }
746}
747
748static int get_ressource(struct cx8800_fh *fh)
749{
750 switch (fh->type) {
751 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
752 return RESOURCE_VIDEO;
753 case V4L2_BUF_TYPE_VBI_CAPTURE:
754 return RESOURCE_VBI;
755 default:
756 BUG();
757 return 0;
758 }
759}
760
761static int video_open(struct inode *inode, struct file *file)
762{
763 int minor = iminor(inode);
764 struct cx8800_dev *h,*dev = NULL;
e52e98a7 765 struct cx88_core *core;
1da177e4
LT		 766 struct cx8800_fh *fh;
767 struct list_head *list;
768 enum v4l2_buf_type type = 0;
769 int radio = 0;
770
771 list_for_each(list,&cx8800_devlist) {
772 h = list_entry(list, struct cx8800_dev, devlist);
773 if (h->video_dev->minor == minor) {
774 dev = h;
775 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
776 }
777 if (h->vbi_dev->minor == minor) {
778 dev = h;
779 type = V4L2_BUF_TYPE_VBI_CAPTURE;
780 }
781 if (h->radio_dev &&
782 h->radio_dev->minor == minor) {
783 radio = 1;
784 dev = h;
785 }
786 }
787 if (NULL == dev)
788 return -ENODEV;
789
e52e98a7
MCC		 790 core = dev->core;
791
1da177e4
LT		 792 dprintk(1,"open minor=%d radio=%d type=%s\n",
793 minor,radio,v4l2_type_names[type]);
794
795 /* allocate + initialize per filehandle data */
7408187d 796 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 797 if (NULL == fh)
798 return -ENOMEM;
1da177e4
LT		 799 file->private_data = fh;
800 fh->dev = dev;
801 fh->radio = radio;
802 fh->type = type;
803 fh->width = 320;
804 fh->height = 240;
805 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
806
807 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
808 dev->pci, &dev->slock,
809 V4L2_BUF_TYPE_VIDEO_CAPTURE,
810 V4L2_FIELD_INTERLACED,
811 sizeof(struct cx88_buffer),
812 fh);
813 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
814 dev->pci, &dev->slock,
815 V4L2_BUF_TYPE_VBI_CAPTURE,
816 V4L2_FIELD_SEQ_TB,
817 sizeof(struct cx88_buffer),
818 fh);
819
820 if (fh->radio) {
1da177e4
LT		 821 int board = core->board;
822 dprintk(1,"video_open: setting radio device\n");
fd3113e8 823 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3);
1da177e4
LT		 824 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0);
825 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1);
826 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2);
e52e98a7 827 core->tvaudio = WW_FM;
1da177e4
LT		 828 cx88_set_tvaudio(core);
829 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 830 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 831 }
832
4ac97914 833 return 0;
1da177e4
LT		 834}
835
836static ssize_t
f9e7a020 837video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 838{
839 struct cx8800_fh *fh = file->private_data;
840
841 switch (fh->type) {
842 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
843 if (res_locked(fh->dev,RESOURCE_VIDEO))
844 return -EBUSY;
845 return videobuf_read_one(&fh->vidq, data, count, ppos,
846 file->f_flags & O_NONBLOCK);
847 case V4L2_BUF_TYPE_VBI_CAPTURE:
848 if (!res_get(fh->dev,fh,RESOURCE_VBI))
849 return -EBUSY;
850 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
851 file->f_flags & O_NONBLOCK);
852 default:
853 BUG();
854 return 0;
855 }
856}
857
858static unsigned int
859video_poll(struct file *file, struct poll_table_struct *wait)
860{
861 struct cx8800_fh *fh = file->private_data;
862 struct cx88_buffer *buf;
863
864 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
865 if (!res_get(fh->dev,fh,RESOURCE_VBI))
866 return POLLERR;
867 return videobuf_poll_stream(file, &fh->vbiq, wait);
868 }
869
870 if (res_check(fh,RESOURCE_VIDEO)) {
871 /* streaming capture */
872 if (list_empty(&fh->vidq.stream))
873 return POLLERR;
874 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
875 } else {
876 /* read() capture */
877 buf = (struct cx88_buffer*)fh->vidq.read_buf;
878 if (NULL == buf)
879 return POLLERR;
880 }
881 poll_wait(file, &buf->vb.done, wait);
882 if (buf->vb.state == STATE_DONE ||
883 buf->vb.state == STATE_ERROR)
884 return POLLIN|POLLRDNORM;
885 return 0;
886}
887
888static int video_release(struct inode *inode, struct file *file)
889{
890 struct cx8800_fh *fh = file->private_data;
891 struct cx8800_dev *dev = fh->dev;
892
893 /* turn off overlay */
894 if (res_check(fh, RESOURCE_OVERLAY)) {
895 /* FIXME */
896 res_free(dev,fh,RESOURCE_OVERLAY);
897 }
898
899 /* stop video capture */
900 if (res_check(fh, RESOURCE_VIDEO)) {
901 videobuf_queue_cancel(&fh->vidq);
902 res_free(dev,fh,RESOURCE_VIDEO);
903 }
904 if (fh->vidq.read_buf) {
905 buffer_release(&fh->vidq,fh->vidq.read_buf);
906 kfree(fh->vidq.read_buf);
907 }
908
909 /* stop vbi capture */
910 if (res_check(fh, RESOURCE_VBI)) {
911 if (fh->vbiq.streaming)
912 videobuf_streamoff(&fh->vbiq);
913 if (fh->vbiq.reading)
914 videobuf_read_stop(&fh->vbiq);
915 res_free(dev,fh,RESOURCE_VBI);
916 }
917
918 videobuf_mmap_free(&fh->vidq);
919 videobuf_mmap_free(&fh->vbiq);
920 file->private_data = NULL;
921 kfree(fh);
e52e98a7
MCC		 922
923 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
924
1da177e4
LT		 925 return 0;
926}
927
928static int
929video_mmap(struct file *file, struct vm_area_struct * vma)
930{
931 struct cx8800_fh *fh = file->private_data;
932
933 return videobuf_mmap_mapper(get_queue(fh), vma);
934}
935
936/* ------------------------------------------------------------------ */
937
e52e98a7
MCC		 938/* static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
939static int get_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 940{
e52e98a7 941 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 942 struct cx88_ctrl *c = NULL;
943 u32 value;
944 int i;
945
946 for (i = 0; i < CX8800_CTLS; i++)
947 if (cx8800_ctls[i].v.id == ctl->id)
948 c = &cx8800_ctls[i];
949 if (NULL == c)
950 return -EINVAL;
951
952 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
953 switch (ctl->id) {
954 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 955 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
956 : (0x7f - (value & 0x7f));
1da177e4
LT		 957 break;
958 case V4L2_CID_AUDIO_VOLUME:
959 ctl->value = 0x3f - (value & 0x3f);
960 break;
961 default:
962 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
963 break;
964 }
6457af5f
IP		 965 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
966 ctl->id, c->v.name, ctl->value, c->reg,
967 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 968 return 0;
969}
970
e52e98a7
MCC		 971/* static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
972static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 973{
e52e98a7 974 /* struct cx88_core *core = dev->core; */
1da177e4 975 struct cx88_ctrl *c = NULL;
70f00044 976 u32 value,mask;
1da177e4 977 int i;
70f00044
MCC		 978 for (i = 0; i < CX8800_CTLS; i++) {
979 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 980 c = &cx8800_ctls[i];
70f00044
MCC		 981 }
982 }
1da177e4
LT		 983 if (NULL == c)
984 return -EINVAL;
985
986 if (ctl->value < c->v.minimum)
e52e98a7 987 ctl->value = c->v.minimum;
1da177e4 988 if (ctl->value > c->v.maximum)
e52e98a7 989 ctl->value = c->v.maximum;
70f00044 990 mask=c->mask;
1da177e4
LT		 991 switch (ctl->id) {
992 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 993 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 994 break;
995 case V4L2_CID_AUDIO_VOLUME:
996 value = 0x3f - (ctl->value & 0x3f);
997 break;
998 case V4L2_CID_SATURATION:
999 /* special v_sat handling */
70f00044
MCC		 1000
1001 value = ((ctl->value - c->off) << c->shift) & c->mask;
1002
1003 if (core->tvnorm->id & V4L2_STD_SECAM) {
1004 /* For SECAM, both U and V sat should be equal */
1005 value=value<<8|value;
1006 } else {
1007 /* Keeps U Saturation proportional to V Sat */
1008 value=(value*0x5a)/0x7f<<8|value;
1009 }
1010 mask=0xffff;
1011 break;
1da177e4
LT		 1012 default:
1013 value = ((ctl->value - c->off) << c->shift) & c->mask;
1014 break;
1015 }
6457af5f
IP		 1016 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1017 ctl->id, c->v.name, ctl->value, c->reg, value,
1018 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1019 if (c->sreg) {
70f00044 1020 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1021 } else {
70f00044 1022 cx_andor(c->reg, mask, value);
1da177e4
LT		 1023 }
1024 return 0;
1025}
1026
e52e98a7 1027static void init_controls(struct cx88_core *core)
1da177e4 1028{
70f00044
MCC		 1029 struct v4l2_control ctrl;
1030 int i;
1da177e4 1031
70f00044
MCC		 1032 for (i = 0; i < CX8800_CTLS; i++) {
1033 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1034 ctrl.value=cx8800_ctls[i].v.default_value;
70f00044
MCC		 1035 set_control(core, &ctrl);
1036 }
1da177e4
LT		 1037}
1038
1039/* ------------------------------------------------------------------ */
1040
1041static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1042 struct v4l2_format *f)
1043{
1044 switch (f->type) {
1045 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1046 memset(&f->fmt.pix,0,sizeof(f->fmt.pix));
1047 f->fmt.pix.width = fh->width;
1048 f->fmt.pix.height = fh->height;
1049 f->fmt.pix.field = fh->vidq.field;
1050 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1051 f->fmt.pix.bytesperline =
1052 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1053 f->fmt.pix.sizeimage =
1054 f->fmt.pix.height * f->fmt.pix.bytesperline;
1055 return 0;
1056 case V4L2_BUF_TYPE_VBI_CAPTURE:
1057 cx8800_vbi_fmt(dev, f);
1058 return 0;
1059 default:
1060 return -EINVAL;
1061 }
1062}
1063
1064static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1065 struct v4l2_format *f)
1066{
e52e98a7
MCC		 1067 struct cx88_core *core = dev->core;
1068
1da177e4
LT		 1069 switch (f->type) {
1070 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1071 {
1072 struct cx8800_fmt *fmt;
1073 enum v4l2_field field;
1074 unsigned int maxw, maxh;
1075
1076 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1077 if (NULL == fmt)
1078 return -EINVAL;
1079
1080 field = f->fmt.pix.field;
e52e98a7
MCC		 1081 maxw = norm_maxw(core->tvnorm);
1082 maxh = norm_maxh(core->tvnorm);
1da177e4
LT		 1083
1084 if (V4L2_FIELD_ANY == field) {
1085 field = (f->fmt.pix.height > maxh/2)
1086 ? V4L2_FIELD_INTERLACED
1087 : V4L2_FIELD_BOTTOM;
1088 }
1089
1090 switch (field) {
1091 case V4L2_FIELD_TOP:
1092 case V4L2_FIELD_BOTTOM:
1093 maxh = maxh / 2;
1094 break;
1095 case V4L2_FIELD_INTERLACED:
1096 break;
1097 default:
1098 return -EINVAL;
1099 }
1100
1101 f->fmt.pix.field = field;
1102 if (f->fmt.pix.height < 32)
1103 f->fmt.pix.height = 32;
1104 if (f->fmt.pix.height > maxh)
1105 f->fmt.pix.height = maxh;
1106 if (f->fmt.pix.width < 48)
1107 f->fmt.pix.width = 48;
1108 if (f->fmt.pix.width > maxw)
1109 f->fmt.pix.width = maxw;
1110 f->fmt.pix.width &= ~0x03;
1111 f->fmt.pix.bytesperline =
1112 (f->fmt.pix.width * fmt->depth) >> 3;
1113 f->fmt.pix.sizeimage =
1114 f->fmt.pix.height * f->fmt.pix.bytesperline;
1115
1116 return 0;
1117 }
1118 case V4L2_BUF_TYPE_VBI_CAPTURE:
1119 cx8800_vbi_fmt(dev, f);
1120 return 0;
1121 default:
1122 return -EINVAL;
1123 }
1124}
1125
1126static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1127 struct v4l2_format *f)
1128{
1129 int err;
1130
1131 switch (f->type) {
1132 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1133 err = cx8800_try_fmt(dev,fh,f);
1134 if (0 != err)
1135 return err;
1136
1137 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1138 fh->width = f->fmt.pix.width;
1139 fh->height = f->fmt.pix.height;
1140 fh->vidq.field = f->fmt.pix.field;
1141 return 0;
1142 case V4L2_BUF_TYPE_VBI_CAPTURE:
1143 cx8800_vbi_fmt(dev, f);
1144 return 0;
1145 default:
1146 return -EINVAL;
1147 }
1148}
1149
1150/*
1151 * This function is _not_ called directly, but from
1152 * video_generic_ioctl (and maybe others). userspace
1153 * copying is done already, arg is a kernel pointer.
1154 */
1155static int video_do_ioctl(struct inode *inode, struct file *file,
1156 unsigned int cmd, void *arg)
1157{
1158 struct cx8800_fh *fh = file->private_data;
1159 struct cx8800_dev *dev = fh->dev;
1160 struct cx88_core *core = dev->core;
1da177e4
LT		 1161 int err;
1162
1163 if (video_debug > 1)
5e453dc7 1164 v4l_print_ioctl(core->name,cmd);
1da177e4 1165 switch (cmd) {
e52e98a7
MCC		 1166
1167 /* --- capabilities ------------------------------------------ */
1da177e4
LT		 1168 case VIDIOC_QUERYCAP:
1169 {
1170 struct v4l2_capability *cap = arg;
1171
1172 memset(cap,0,sizeof(*cap));
e52e98a7 1173 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1174 strlcpy(cap->card, cx88_boards[core->board].name,
1175 sizeof(cap->card));
1176 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1177 cap->version = CX88_VERSION_CODE;
1178 cap->capabilities =
1179 V4L2_CAP_VIDEO_CAPTURE |
1180 V4L2_CAP_READWRITE |
1181 V4L2_CAP_STREAMING |
1182 V4L2_CAP_VBI_CAPTURE |
1da177e4
LT		 1183 0;
1184 if (UNSET != core->tuner_type)
1185 cap->capabilities |= V4L2_CAP_TUNER;
1186 return 0;
1187 }
1188
e52e98a7
MCC		 1189 /* --- capture ioctls ---------------------------------------- */
1190 case VIDIOC_ENUM_FMT:
1191 {
1192 struct v4l2_fmtdesc *f = arg;
1193 enum v4l2_buf_type type;
1194 unsigned int index;
1195
1196 index = f->index;
1197 type = f->type;
1198 switch (type) {
1199 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1200 if (index >= ARRAY_SIZE(formats))
1201 return -EINVAL;
1202 memset(f,0,sizeof(*f));
1203 f->index = index;
1204 f->type = type;
1205 strlcpy(f->description,formats[index].name,sizeof(f->description));
1206 f->pixelformat = formats[index].fourcc;
1207 break;
1208 default:
1209 return -EINVAL;
1210 }
1211 return 0;
1212 }
1213 case VIDIOC_G_FMT:
1214 {
1215 struct v4l2_format *f = arg;
1216 return cx8800_g_fmt(dev,fh,f);
1217 }
1218 case VIDIOC_S_FMT:
1219 {
1220 struct v4l2_format *f = arg;
1221 return cx8800_s_fmt(dev,fh,f);
1222 }
1223 case VIDIOC_TRY_FMT:
1224 {
1225 struct v4l2_format *f = arg;
1226 return cx8800_try_fmt(dev,fh,f);
1227 }
0dfa9abd 1228#ifdef CONFIG_VIDEO_V4L1_COMPAT
e52e98a7
MCC		 1229 /* --- streaming capture ------------------------------------- */
1230 case VIDIOCGMBUF:
1231 {
1232 struct video_mbuf *mbuf = arg;
1233 struct videobuf_queue *q;
1234 struct v4l2_requestbuffers req;
1235 unsigned int i;
1236
1237 q = get_queue(fh);
1238 memset(&req,0,sizeof(req));
1239 req.type = q->type;
1240 req.count = 8;
1241 req.memory = V4L2_MEMORY_MMAP;
1242 err = videobuf_reqbufs(q,&req);
1243 if (err < 0)
1244 return err;
1245 memset(mbuf,0,sizeof(*mbuf));
1246 mbuf->frames = req.count;
1247 mbuf->size = 0;
1248 for (i = 0; i < mbuf->frames; i++) {
1249 mbuf->offsets[i] = q->bufs[i]->boff;
1250 mbuf->size += q->bufs[i]->bsize;
1251 }
1252 return 0;
1253 }
79436633 1254#endif
e52e98a7
MCC		 1255 case VIDIOC_REQBUFS:
1256 return videobuf_reqbufs(get_queue(fh), arg);
1257
1258 case VIDIOC_QUERYBUF:
1259 return videobuf_querybuf(get_queue(fh), arg);
1260
1261 case VIDIOC_QBUF:
1262 return videobuf_qbuf(get_queue(fh), arg);
1263
1264 case VIDIOC_DQBUF:
1265 return videobuf_dqbuf(get_queue(fh), arg,
1266 file->f_flags & O_NONBLOCK);
1267
1268 case VIDIOC_STREAMON:
1269 {
1270 int res = get_ressource(fh);
1271
1272 if (!res_get(dev,fh,res))
1273 return -EBUSY;
1274 return videobuf_streamon(get_queue(fh));
1275 }
1276 case VIDIOC_STREAMOFF:
1277 {
1278 int res = get_ressource(fh);
1279
1280 err = videobuf_streamoff(get_queue(fh));
1281 if (err < 0)
1282 return err;
1283 res_free(dev,fh,res);
1284 return 0;
1285 }
e52e98a7
MCC		 1286 default:
1287 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl );
1288 }
1289 return 0;
1290}
1291
1292int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
4ac97914 1293 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl)
e52e98a7
MCC		 1294{
1295 int err;
1296
c7b0ac05
MCC		 1297 if (video_debug) {
1298 if (video_debug > 1) {
1299 if (_IOC_DIR(cmd) & _IOC_WRITE)
1300 v4l_printk_ioctl_arg("cx88(w)",cmd, arg);
1301 else if (!_IOC_DIR(cmd) & _IOC_READ) {
1302 v4l_print_ioctl("cx88", cmd);
1303 }
1304 } else
1305 v4l_print_ioctl(core->name,cmd);
1306
1307 }
e52e98a7
MCC		 1308
1309 switch (cmd) {
1da177e4
LT		 1310 /* ---------- tv norms ---------- */
1311 case VIDIOC_ENUMSTD:
1312 {
1313 struct v4l2_standard *e = arg;
1314 unsigned int i;
1315
1316 i = e->index;
1317 if (i >= ARRAY_SIZE(tvnorms))
1318 return -EINVAL;
1319 err = v4l2_video_std_construct(e, tvnorms[e->index].id,
1320 tvnorms[e->index].name);
1321 e->index = i;
1322 if (err < 0)
1323 return err;
1324 return 0;
1325 }
1326 case VIDIOC_G_STD:
1327 {
1328 v4l2_std_id *id = arg;
1329
1330 *id = core->tvnorm->id;
1331 return 0;
1332 }
1333 case VIDIOC_S_STD:
1334 {
1335 v4l2_std_id *id = arg;
1336 unsigned int i;
1337
1338 for(i = 0; i < ARRAY_SIZE(tvnorms); i++)
1339 if (*id & tvnorms[i].id)
1340 break;
1341 if (i == ARRAY_SIZE(tvnorms))
1342 return -EINVAL;
1343
3593cab5 1344 mutex_lock(&core->lock);
e52e98a7 1345 cx88_set_tvnorm(core,&tvnorms[i]);
3593cab5 1346 mutex_unlock(&core->lock);
1da177e4
LT		 1347 return 0;
1348 }
1349
1350 /* ------ input switching ---------- */
1351 case VIDIOC_ENUMINPUT:
1352 {
1353 static const char *iname[] = {
1354 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1355 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1356 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1357 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1358 [ CX88_VMUX_SVIDEO ] = "S-Video",
1359 [ CX88_VMUX_TELEVISION ] = "Television",
1360 [ CX88_VMUX_CABLE ] = "Cable TV",
1361 [ CX88_VMUX_DVB ] = "DVB",
1362 [ CX88_VMUX_DEBUG ] = "for debug only",
1363 };
1364 struct v4l2_input *i = arg;
1365 unsigned int n;
1366
1367 n = i->index;
1368 if (n >= 4)
1369 return -EINVAL;
1370 if (0 == INPUT(n)->type)
1371 return -EINVAL;
1372 memset(i,0,sizeof(*i));
1373 i->index = n;
1374 i->type = V4L2_INPUT_TYPE_CAMERA;
1375 strcpy(i->name,iname[INPUT(n)->type]);
1376 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) ||
1377 (CX88_VMUX_CABLE == INPUT(n)->type))
1378 i->type = V4L2_INPUT_TYPE_TUNER;
1379 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1380 i->std |= tvnorms[n].id;
1381 return 0;
1382 }
1383 case VIDIOC_G_INPUT:
1384 {
1385 unsigned int *i = arg;
1386
e52e98a7 1387 *i = core->input;
1da177e4
LT		 1388 return 0;
1389 }
1390 case VIDIOC_S_INPUT:
1391 {
1392 unsigned int *i = arg;
1393
1394 if (*i >= 4)
1395 return -EINVAL;
3593cab5 1396 mutex_lock(&core->lock);
1da177e4 1397 cx88_newstation(core);
e52e98a7 1398 video_mux(core,*i);
3593cab5 1399 mutex_unlock(&core->lock);
1da177e4
LT		 1400 return 0;
1401 }
1402
1403
1da177e4 1404
1da177e4
LT		 1405 /* --- controls ---------------------------------------------- */
1406 case VIDIOC_QUERYCTRL:
1407 {
1408 struct v4l2_queryctrl *c = arg;
1da177e4 1409
38a2713a 1410 return cx88_queryctrl(c);
1da177e4
LT		 1411 }
1412 case VIDIOC_G_CTRL:
e52e98a7 1413 return get_control(core,arg);
1da177e4 1414 case VIDIOC_S_CTRL:
e52e98a7 1415 return set_control(core,arg);
1da177e4
LT		 1416
1417 /* --- tuner ioctls ------------------------------------------ */
1418 case VIDIOC_G_TUNER:
1419 {
1420 struct v4l2_tuner *t = arg;
1421 u32 reg;
1422
1423 if (UNSET == core->tuner_type)
1424 return -EINVAL;
1425 if (0 != t->index)
1426 return -EINVAL;
1427
1428 memset(t,0,sizeof(*t));
1429 strcpy(t->name, "Television");
1430 t->type = V4L2_TUNER_ANALOG_TV;
1431 t->capability = V4L2_TUNER_CAP_NORM;
1432 t->rangehigh = 0xffffffffUL;
1433
1434 cx88_get_stereo(core ,t);
1435 reg = cx_read(MO_DEVICE_STATUS);
4ac97914 1436 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1da177e4
LT		 1437 return 0;
1438 }
1439 case VIDIOC_S_TUNER:
1440 {
1441 struct v4l2_tuner *t = arg;
1442
1443 if (UNSET == core->tuner_type)
1444 return -EINVAL;
1445 if (0 != t->index)
1446 return -EINVAL;
1447 cx88_set_stereo(core, t->audmode, 1);
1448 return 0;
1449 }
1450 case VIDIOC_G_FREQUENCY:
1451 {
1452 struct v4l2_frequency *f = arg;
1453
a82decf6
MCC		 1454 memset(f,0,sizeof(*f));
1455
1da177e4
LT		 1456 if (UNSET == core->tuner_type)
1457 return -EINVAL;
a82decf6 1458
e52e98a7
MCC		 1459 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1460 f->type = radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1461 f->frequency = core->freq;
41ef7c1e 1462
e52e98a7 1463 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
41ef7c1e 1464
1da177e4
LT		 1465 return 0;
1466 }
1467 case VIDIOC_S_FREQUENCY:
1468 {
1469 struct v4l2_frequency *f = arg;
1470
1471 if (UNSET == core->tuner_type)
1472 return -EINVAL;
1473 if (f->tuner != 0)
1474 return -EINVAL;
e52e98a7 1475 if (0 == radio && f->type != V4L2_TUNER_ANALOG_TV)
1da177e4 1476 return -EINVAL;
e52e98a7 1477 if (1 == radio && f->type != V4L2_TUNER_RADIO)
1da177e4 1478 return -EINVAL;
3593cab5 1479 mutex_lock(&core->lock);
e52e98a7 1480 core->freq = f->frequency;
1da177e4 1481 cx88_newstation(core);
e52e98a7 1482 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c5287ba1
MCC		 1483
1484 /* When changing channels it is required to reset TVAUDIO */
1485 msleep (10);
1486 cx88_set_tvaudio(core);
1487
3593cab5 1488 mutex_unlock(&core->lock);
1da177e4
LT		 1489 return 0;
1490 }
1491
1492 default:
1493 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
e52e98a7 1494 driver_ioctl);
1da177e4
LT		 1495 }
1496 return 0;
1497}
1498
1499static int video_ioctl(struct inode *inode, struct file *file,
1500 unsigned int cmd, unsigned long arg)
1501{
c7b0ac05
MCC		 1502 int retval;
1503
1504 retval=video_usercopy(inode, file, cmd, arg, video_do_ioctl);
1505
1506 if (video_debug > 1) {
1507 if (retval < 0) {
1508 v4l_print_ioctl("cx88(err)", cmd);
1509 printk(KERN_DEBUG "cx88(err): errcode=%d\n",retval);
1510 } else if (_IOC_DIR(cmd) & _IOC_READ)
1511 v4l_printk_ioctl_arg("cx88(r)",cmd, (void *)arg);
1512 }
1513
1514 return retval;
1da177e4
LT		 1515}
1516
1517/* ----------------------------------------------------------- */
1518
1519static int radio_do_ioctl(struct inode *inode, struct file *file,
1520 unsigned int cmd, void *arg)
1521{
1522 struct cx8800_fh *fh = file->private_data;
1523 struct cx8800_dev *dev = fh->dev;
1524 struct cx88_core *core = dev->core;
1525
1526 if (video_debug > 1)
5e453dc7 1527 v4l_print_ioctl(core->name,cmd);
1da177e4
LT		 1528
1529 switch (cmd) {
1530 case VIDIOC_QUERYCAP:
1531 {
1532 struct v4l2_capability *cap = arg;
1533
1534 memset(cap,0,sizeof(*cap));
4ac97914 1535 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1536 strlcpy(cap->card, cx88_boards[core->board].name,
1537 sizeof(cap->card));
1538 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1539 cap->version = CX88_VERSION_CODE;
a82decf6 1540 cap->capabilities = V4L2_CAP_TUNER;
1da177e4
LT		 1541 return 0;
1542 }
1543 case VIDIOC_G_TUNER:
1544 {
1545 struct v4l2_tuner *t = arg;
1546
1547 if (t->index > 0)
1548 return -EINVAL;
1549
1550 memset(t,0,sizeof(*t));
1551 strcpy(t->name, "Radio");
48c42596 1552 t->type = V4L2_TUNER_RADIO;
1da177e4 1553
e52e98a7 1554 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1da177e4
LT		 1555 return 0;
1556 }
1557 case VIDIOC_ENUMINPUT:
1558 {
1559 struct v4l2_input *i = arg;
1560
1561 if (i->index != 0)
1562 return -EINVAL;
1563 strcpy(i->name,"Radio");
1564 i->type = V4L2_INPUT_TYPE_TUNER;
1565 return 0;
1566 }
1567 case VIDIOC_G_INPUT:
1568 {
1569 int *i = arg;
1570 *i = 0;
1571 return 0;
1572 }
1573 case VIDIOC_G_AUDIO:
1574 {
1575 struct v4l2_audio *a = arg;
1576
1577 memset(a,0,sizeof(*a));
1578 strcpy(a->name,"Radio");
1579 return 0;
1580 }
1581 case VIDIOC_G_STD:
1582 {
1583 v4l2_std_id *id = arg;
1584 *id = 0;
1585 return 0;
1586 }
0dfa9abd 1587#ifdef CONFIG_VIDEO_V4L1_COMPAT
a82decf6
MCC		 1588 case VIDIOCSTUNER:
1589 {
1590 struct video_tuner *v = arg;
1591
1592 if (v->tuner) /* Only tuner 0 */
1593 return -EINVAL;
1594
e52e98a7
MCC		 1595 cx88_call_i2c_clients(core,VIDIOCSTUNER,v);
1596 return 0;
a82decf6 1597 }
79436633 1598#endif
1da177e4 1599 case VIDIOC_S_TUNER:
a82decf6
MCC		 1600 {
1601 struct v4l2_tuner *t = arg;
1602
1603 if (0 != t->index)
1604 return -EINVAL;
1605
e52e98a7 1606 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
a82decf6
MCC		 1607
1608 return 0;
1609 }
1610
1611 case VIDIOC_S_AUDIO:
1da177e4
LT		 1612 case VIDIOC_S_INPUT:
1613 case VIDIOC_S_STD:
1614 return 0;
1615
1616 case VIDIOC_QUERYCTRL:
1617 {
1618 struct v4l2_queryctrl *c = arg;
1619 int i;
1620
1621 if (c->id < V4L2_CID_BASE ||
1622 c->id >= V4L2_CID_LASTP1)
1623 return -EINVAL;
1624 if (c->id == V4L2_CID_AUDIO_MUTE) {
1625 for (i = 0; i < CX8800_CTLS; i++)
1626 if (cx8800_ctls[i].v.id == c->id)
1627 break;
1628 *c = cx8800_ctls[i].v;
1629 } else
1630 *c = no_ctl;
1631 return 0;
1632 }
1633
1634
1635 case VIDIOC_G_CTRL:
1636 case VIDIOC_S_CTRL:
1637 case VIDIOC_G_FREQUENCY:
1638 case VIDIOC_S_FREQUENCY:
1639 return video_do_ioctl(inode,file,cmd,arg);
1640
1641 default:
1642 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
1643 radio_do_ioctl);
1644 }
1645 return 0;
1646};
1647
1648static int radio_ioctl(struct inode *inode, struct file *file,
1649 unsigned int cmd, unsigned long arg)
1650{
1651 return video_usercopy(inode, file, cmd, arg, radio_do_ioctl);
1652};
1653
1654/* ----------------------------------------------------------- */
1655
1656static void cx8800_vid_timeout(unsigned long data)
1657{
1658 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1659 struct cx88_core *core = dev->core;
1660 struct cx88_dmaqueue *q = &dev->vidq;
1661 struct cx88_buffer *buf;
1662 unsigned long flags;
1663
e52e98a7 1664 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1665
1666 cx_clear(MO_VID_DMACNTRL, 0x11);
1667 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1668
1669 spin_lock_irqsave(&dev->slock,flags);
1670 while (!list_empty(&q->active)) {
1671 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1672 list_del(&buf->vb.queue);
1673 buf->vb.state = STATE_ERROR;
1674 wake_up(&buf->vb.done);
1675 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1676 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1677 }
1678 restart_video_queue(dev,q);
1679 spin_unlock_irqrestore(&dev->slock,flags);
1680}
1681
41ef7c1e
MCC		 1682static char *cx88_vid_irqs[32] = {
1683 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1684 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1685 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1686 "y_sync", "u_sync", "v_sync", "vbi_sync",
1687 "opc_err", "par_err", "rip_err", "pci_abort",
1688};
1689
1da177e4
LT		 1690static void cx8800_vid_irq(struct cx8800_dev *dev)
1691{
1692 struct cx88_core *core = dev->core;
1693 u32 status, mask, count;
1694
1695 status = cx_read(MO_VID_INTSTAT);
1696 mask = cx_read(MO_VID_INTMSK);
1697 if (0 == (status & mask))
1698 return;
1699 cx_write(MO_VID_INTSTAT, status);
1700 if (irq_debug || (status & mask & ~0xff))
1701 cx88_print_irqbits(core->name, "irq vid",
1702 cx88_vid_irqs, status, mask);
1703
1704 /* risc op code error */
1705 if (status & (1 << 16)) {
1706 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1707 cx_clear(MO_VID_DMACNTRL, 0x11);
1708 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1709 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1710 }
1711
1712 /* risc1 y */
1713 if (status & 0x01) {
1714 spin_lock(&dev->slock);
1715 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1716 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1717 spin_unlock(&dev->slock);
1718 }
1719
1720 /* risc1 vbi */
1721 if (status & 0x08) {
1722 spin_lock(&dev->slock);
1723 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1724 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1725 spin_unlock(&dev->slock);
1726 }
1727
1728 /* risc2 y */
1729 if (status & 0x10) {
1730 dprintk(2,"stopper video\n");
1731 spin_lock(&dev->slock);
1732 restart_video_queue(dev,&dev->vidq);
1733 spin_unlock(&dev->slock);
1734 }
1735
1736 /* risc2 vbi */
1737 if (status & 0x80) {
1738 dprintk(2,"stopper vbi\n");
1739 spin_lock(&dev->slock);
1740 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1741 spin_unlock(&dev->slock);
1742 }
1743}
1744
1745static irqreturn_t cx8800_irq(int irq, void *dev_id, struct pt_regs *regs)
1746{
1747 struct cx8800_dev *dev = dev_id;
1748 struct cx88_core *core = dev->core;
1749 u32 status;
1750 int loop, handled = 0;
1751
1752 for (loop = 0; loop < 10; loop++) {
1753 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
1754 if (0 == status)
1755 goto out;
1756 cx_write(MO_PCI_INTSTAT, status);
1757 handled = 1;
1758
1759 if (status & core->pci_irqmask)
1760 cx88_core_irq(core,status);
1761 if (status & 0x01)
1762 cx8800_vid_irq(dev);
1763 };
1764 if (10 == loop) {
1765 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1766 core->name);
1767 cx_write(MO_PCI_INTMSK,0);
1768 }
1769
1770 out:
1771 return IRQ_RETVAL(handled);
1772}
1773
1774/* ----------------------------------------------------------- */
1775/* exported stuff */
1776
1777static struct file_operations video_fops =
1778{
1779 .owner = THIS_MODULE,
1780 .open = video_open,
1781 .release = video_release,
1782 .read = video_read,
1783 .poll = video_poll,
1784 .mmap = video_mmap,
1785 .ioctl = video_ioctl,
0d0fbf81 1786 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1787 .llseek = no_llseek,
1788};
1789
408b664a 1790static struct video_device cx8800_video_template =
1da177e4
LT		 1791{
1792 .name = "cx8800-video",
1793 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1794 .hardware = 0,
1795 .fops = &video_fops,
1796 .minor = -1,
1797};
1798
408b664a 1799static struct video_device cx8800_vbi_template =
1da177e4
LT		 1800{
1801 .name = "cx8800-vbi",
1802 .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER,
1803 .hardware = 0,
1804 .fops = &video_fops,
1805 .minor = -1,
1806};
1807
1808static struct file_operations radio_fops =
1809{
1810 .owner = THIS_MODULE,
1811 .open = video_open,
1812 .release = video_release,
1813 .ioctl = radio_ioctl,
0d0fbf81 1814 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1815 .llseek = no_llseek,
1816};
1817
408b664a 1818static struct video_device cx8800_radio_template =
1da177e4
LT		 1819{
1820 .name = "cx8800-radio",
1821 .type = VID_TYPE_TUNER,
1822 .hardware = 0,
1823 .fops = &radio_fops,
1824 .minor = -1,
1825};
1826
1827/* ----------------------------------------------------------- */
1828
1829static void cx8800_unregister_video(struct cx8800_dev *dev)
1830{
1831 if (dev->radio_dev) {
1832 if (-1 != dev->radio_dev->minor)
1833 video_unregister_device(dev->radio_dev);
1834 else
1835 video_device_release(dev->radio_dev);
1836 dev->radio_dev = NULL;
1837 }
1838 if (dev->vbi_dev) {
1839 if (-1 != dev->vbi_dev->minor)
1840 video_unregister_device(dev->vbi_dev);
1841 else
1842 video_device_release(dev->vbi_dev);
1843 dev->vbi_dev = NULL;
1844 }
1845 if (dev->video_dev) {
1846 if (-1 != dev->video_dev->minor)
1847 video_unregister_device(dev->video_dev);
1848 else
1849 video_device_release(dev->video_dev);
1850 dev->video_dev = NULL;
1851 }
1852}
1853
1854static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1855 const struct pci_device_id *pci_id)
1856{
1857 struct cx8800_dev *dev;
1858 struct cx88_core *core;
1859 int err;
1860
7408187d 1861 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1862 if (NULL == dev)
1863 return -ENOMEM;
1da177e4
LT		 1864
1865 /* pci init */
1866 dev->pci = pci_dev;
1867 if (pci_enable_device(pci_dev)) {
1868 err = -EIO;
1869 goto fail_free;
1870 }
1871 core = cx88_core_get(dev->pci);
1872 if (NULL == core) {
1873 err = -EINVAL;
1874 goto fail_free;
1875 }
1876 dev->core = core;
1877
1878 /* print pci info */
1879 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1880 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1881 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1882 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1883 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1884 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1885
1886 pci_set_master(pci_dev);
1887 if (!pci_dma_supported(pci_dev,0xffffffff)) {
1888 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1889 err = -EIO;
1890 goto fail_core;
1891 }
1892
1893 /* initialize driver struct */
1da177e4
LT		 1894 spin_lock_init(&dev->slock);
1895 core->tvnorm = tvnorms;
1896
1897 /* init video dma queues */
1898 INIT_LIST_HEAD(&dev->vidq.active);
1899 INIT_LIST_HEAD(&dev->vidq.queued);
1900 dev->vidq.timeout.function = cx8800_vid_timeout;
1901 dev->vidq.timeout.data = (unsigned long)dev;
1902 init_timer(&dev->vidq.timeout);
1903 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1904 MO_VID_DMACNTRL,0x11,0x00);
1905
1906 /* init vbi dma queues */
1907 INIT_LIST_HEAD(&dev->vbiq.active);
1908 INIT_LIST_HEAD(&dev->vbiq.queued);
1909 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1910 dev->vbiq.timeout.data = (unsigned long)dev;
1911 init_timer(&dev->vbiq.timeout);
1912 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1913 MO_VID_DMACNTRL,0x88,0x00);
1914
1915 /* get irq */
1916 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1917 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4
LT		 1918 if (err < 0) {
1919 printk(KERN_ERR "%s: can't get IRQ %d\n",
1920 core->name,pci_dev->irq);
1921 goto fail_core;
1922 }
1923 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1924
1925 /* load and configure helper modules */
1926 if (TUNER_ABSENT != core->tuner_type)
1927 request_module("tuner");
e52e98a7 1928
1da177e4
LT		 1929 /* register v4l devices */
1930 dev->video_dev = cx88_vdev_init(core,dev->pci,
1931 &cx8800_video_template,"video");
1932 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1933 video_nr[core->nr]);
1934 if (err < 0) {
1935 printk(KERN_INFO "%s: can't register video device\n",
1936 core->name);
1937 goto fail_unreg;
1938 }
1939 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1940 core->name,dev->video_dev->minor & 0x1f);
1941
1942 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1943 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1944 vbi_nr[core->nr]);
1945 if (err < 0) {
1946 printk(KERN_INFO "%s/0: can't register vbi device\n",
1947 core->name);
1948 goto fail_unreg;
1949 }
1950 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1951 core->name,dev->vbi_dev->minor & 0x1f);
1952
1953 if (core->has_radio) {
1954 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1955 &cx8800_radio_template,"radio");
1956 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1957 radio_nr[core->nr]);
1958 if (err < 0) {
1959 printk(KERN_INFO "%s/0: can't register radio device\n",
1960 core->name);
1961 goto fail_unreg;
1962 }
1963 printk(KERN_INFO "%s/0: registered device radio%d\n",
1964 core->name,dev->radio_dev->minor & 0x1f);
1965 }
1966
1967 /* everything worked */
1968 list_add_tail(&dev->devlist,&cx8800_devlist);
1969 pci_set_drvdata(pci_dev,dev);
1970
1971 /* initial device configuration */
3593cab5 1972 mutex_lock(&core->lock);
e52e98a7 1973 cx88_set_tvnorm(core,tvnorms);
70f00044 1974 init_controls(core);
e52e98a7 1975 video_mux(core,0);
3593cab5 1976 mutex_unlock(&core->lock);
1da177e4
LT		 1977
1978 /* start tvaudio thread */
1979 if (core->tuner_type != TUNER_ABSENT)
1980 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1981 return 0;
1982
1983fail_unreg:
1984 cx8800_unregister_video(dev);
1985 free_irq(pci_dev->irq, dev);
1986fail_core:
1987 cx88_core_put(core,dev->pci);
1988fail_free:
1989 kfree(dev);
1990 return err;
1991}
1992
1993static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1994{
4ac97914 1995 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1996 struct cx88_core *core = dev->core;
1da177e4
LT		 1997
1998 /* stop thread */
e52e98a7
MCC		 1999 if (core->kthread) {
2000 kthread_stop(core->kthread);
2001 core->kthread = NULL;
1da177e4
LT		 2002 }
2003
e52e98a7 2004 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 2005 pci_disable_device(pci_dev);
2006
2007 /* unregister stuff */
2008
2009 free_irq(pci_dev->irq, dev);
2010 cx8800_unregister_video(dev);
2011 pci_set_drvdata(pci_dev, NULL);
2012
2013 /* free memory */
2014 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2015 list_del(&dev->devlist);
e52e98a7 2016 cx88_core_put(core,dev->pci);
1da177e4
LT		 2017 kfree(dev);
2018}
2019
2020static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2021{
b45009b0 2022 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2023 struct cx88_core *core = dev->core;
2024
2025 /* stop video+vbi capture */
2026 spin_lock(&dev->slock);
2027 if (!list_empty(&dev->vidq.active)) {
2028 printk("%s: suspend video\n", core->name);
2029 stop_video_dma(dev);
2030 del_timer(&dev->vidq.timeout);
2031 }
2032 if (!list_empty(&dev->vbiq.active)) {
2033 printk("%s: suspend vbi\n", core->name);
2034 cx8800_stop_vbi_dma(dev);
2035 del_timer(&dev->vbiq.timeout);
2036 }
2037 spin_unlock(&dev->slock);
2038
1da177e4 2039 /* FIXME -- shutdown device */
e52e98a7 2040 cx88_shutdown(core);
1da177e4
LT		 2041
2042 pci_save_state(pci_dev);
2043 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2044 pci_disable_device(pci_dev);
2045 dev->state.disabled = 1;
2046 }
2047 return 0;
2048}
2049
2050static int cx8800_resume(struct pci_dev *pci_dev)
2051{
b45009b0 2052 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2053 struct cx88_core *core = dev->core;
08adb9e2 2054 int err;
1da177e4
LT		 2055
2056 if (dev->state.disabled) {
08adb9e2
MCC		 2057 err=pci_enable_device(pci_dev);
2058 if (err) {
2059 printk(KERN_ERR "%s: can't enable device\n",
2060 core->name);
2061 return err;
2062 }
2063
1da177e4
LT		 2064 dev->state.disabled = 0;
2065 }
08adb9e2
MCC		 2066 err= pci_set_power_state(pci_dev, PCI_D0);
2067 if (err) {
2068 printk(KERN_ERR "%s: can't enable device\n",
2069 core->name);
2070
2071 pci_disable_device(pci_dev);
2072 dev->state.disabled = 1;
2073
2074 return err;
2075 }
1da177e4
LT		 2076 pci_restore_state(pci_dev);
2077
1da177e4 2078 /* FIXME: re-initialize hardware */
e52e98a7 2079 cx88_reset(core);
1da177e4
LT		 2080
2081 /* restart video+vbi capture */
2082 spin_lock(&dev->slock);
2083 if (!list_empty(&dev->vidq.active)) {
2084 printk("%s: resume video\n", core->name);
2085 restart_video_queue(dev,&dev->vidq);
2086 }
2087 if (!list_empty(&dev->vbiq.active)) {
2088 printk("%s: resume vbi\n", core->name);
2089 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2090 }
2091 spin_unlock(&dev->slock);
2092
2093 return 0;
2094}
2095
2096/* ----------------------------------------------------------- */
2097
408b664a 2098static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2099 {
2100 .vendor = 0x14f1,
2101 .device = 0x8800,
b45009b0
MCC		 2102 .subvendor = PCI_ANY_ID,
2103 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2104 },{
2105 /* --- end of list --- */
2106 }
2107};
2108MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2109
2110static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2111 .name = "cx8800",
2112 .id_table = cx8800_pci_tbl,
2113 .probe = cx8800_initdev,
2114 .remove = __devexit_p(cx8800_finidev),
1da177e4
LT		 2115
2116 .suspend = cx8800_suspend,
2117 .resume = cx8800_resume,
2118};
2119
2120static int cx8800_init(void)
2121{
2122 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2123 (CX88_VERSION_CODE >> 16) & 0xff,
2124 (CX88_VERSION_CODE >> 8) & 0xff,
2125 CX88_VERSION_CODE & 0xff);
2126#ifdef SNAPSHOT
2127 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2128 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2129#endif
2130 return pci_register_driver(&cx8800_pci_driver);
2131}
2132
2133static void cx8800_fini(void)
2134{
2135 pci_unregister_driver(&cx8800_pci_driver);
2136}
2137
2138module_init(cx8800_init);
2139module_exit(cx8800_fini);
2140
e52e98a7
MCC		 2141EXPORT_SYMBOL(cx88_do_ioctl);
2142
1da177e4
LT		 2143/* ----------------------------------------------------------- */
2144/*
2145 * Local variables:
2146 * c-basic-offset: 8
2147 * End:
b45009b0 2148 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2149 */
Linux kernel - Deliverables
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