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V4L/DVB (3166): "Philips 1236D ATSC/NTSC dual in" - fix typo.
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kmod.h>
28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
32#include <linux/kthread.h>
33#include <asm/div64.h>
34
35#include "cx88.h"
36
79436633
MCC		 37/* Include V4L1 specific functions. Should be removed soon */
38#include <linux/videodev.h>
39
1da177e4
LT		 40MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
41MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
42MODULE_LICENSE("GPL");
43
44/* ------------------------------------------------------------------ */
45
46static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
47static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
48static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
49
50module_param_array(video_nr, int, NULL, 0444);
51module_param_array(vbi_nr, int, NULL, 0444);
52module_param_array(radio_nr, int, NULL, 0444);
53
54MODULE_PARM_DESC(video_nr,"video device numbers");
55MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
56MODULE_PARM_DESC(radio_nr,"radio device numbers");
57
58static unsigned int video_debug = 0;
59module_param(video_debug,int,0644);
60MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
61
62static unsigned int irq_debug = 0;
63module_param(irq_debug,int,0644);
64MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
65
66static unsigned int vid_limit = 16;
67module_param(vid_limit,int,0644);
68MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
69
70#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 71 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 72
73/* ------------------------------------------------------------------ */
74
75static LIST_HEAD(cx8800_devlist);
76
77/* ------------------------------------------------------------------- */
78/* static data */
79
80static struct cx88_tvnorm tvnorms[] = {
81 {
82 .name = "NTSC-M",
83 .id = V4L2_STD_NTSC_M,
84 .cxiformat = VideoFormatNTSC,
85 .cxoformat = 0x181f0008,
86 },{
87 .name = "NTSC-JP",
88 .id = V4L2_STD_NTSC_M_JP,
89 .cxiformat = VideoFormatNTSCJapan,
90 .cxoformat = 0x181f0008,
1da177e4
LT		 91 },{
92 .name = "PAL-BG",
93 .id = V4L2_STD_PAL_BG,
94 .cxiformat = VideoFormatPAL,
95 .cxoformat = 0x181f0008,
96 },{
97 .name = "PAL-DK",
98 .id = V4L2_STD_PAL_DK,
99 .cxiformat = VideoFormatPAL,
100 .cxoformat = 0x181f0008,
101 },{
102 .name = "PAL-I",
103 .id = V4L2_STD_PAL_I,
104 .cxiformat = VideoFormatPAL,
105 .cxoformat = 0x181f0008,
4ac97914 106 },{
1da177e4
LT		 107 .name = "PAL-M",
108 .id = V4L2_STD_PAL_M,
109 .cxiformat = VideoFormatPALM,
110 .cxoformat = 0x1c1f0008,
111 },{
112 .name = "PAL-N",
113 .id = V4L2_STD_PAL_N,
114 .cxiformat = VideoFormatPALN,
115 .cxoformat = 0x1c1f0008,
116 },{
117 .name = "PAL-Nc",
118 .id = V4L2_STD_PAL_Nc,
119 .cxiformat = VideoFormatPALNC,
120 .cxoformat = 0x1c1f0008,
121 },{
122 .name = "PAL-60",
123 .id = V4L2_STD_PAL_60,
124 .cxiformat = VideoFormatPAL60,
125 .cxoformat = 0x181f0008,
126 },{
127 .name = "SECAM-L",
128 .id = V4L2_STD_SECAM_L,
129 .cxiformat = VideoFormatSECAM,
130 .cxoformat = 0x181f0008,
131 },{
132 .name = "SECAM-DK",
133 .id = V4L2_STD_SECAM_DK,
134 .cxiformat = VideoFormatSECAM,
135 .cxoformat = 0x181f0008,
136 }
137};
138
139static struct cx8800_fmt formats[] = {
140 {
141 .name = "8 bpp, gray",
142 .fourcc = V4L2_PIX_FMT_GREY,
143 .cxformat = ColorFormatY8,
144 .depth = 8,
145 .flags = FORMAT_FLAGS_PACKED,
146 },{
147 .name = "15 bpp RGB, le",
148 .fourcc = V4L2_PIX_FMT_RGB555,
149 .cxformat = ColorFormatRGB15,
150 .depth = 16,
151 .flags = FORMAT_FLAGS_PACKED,
152 },{
153 .name = "15 bpp RGB, be",
154 .fourcc = V4L2_PIX_FMT_RGB555X,
155 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
156 .depth = 16,
157 .flags = FORMAT_FLAGS_PACKED,
158 },{
159 .name = "16 bpp RGB, le",
160 .fourcc = V4L2_PIX_FMT_RGB565,
161 .cxformat = ColorFormatRGB16,
162 .depth = 16,
163 .flags = FORMAT_FLAGS_PACKED,
164 },{
165 .name = "16 bpp RGB, be",
166 .fourcc = V4L2_PIX_FMT_RGB565X,
167 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
168 .depth = 16,
169 .flags = FORMAT_FLAGS_PACKED,
170 },{
171 .name = "24 bpp RGB, le",
172 .fourcc = V4L2_PIX_FMT_BGR24,
173 .cxformat = ColorFormatRGB24,
174 .depth = 24,
175 .flags = FORMAT_FLAGS_PACKED,
176 },{
177 .name = "32 bpp RGB, le",
178 .fourcc = V4L2_PIX_FMT_BGR32,
179 .cxformat = ColorFormatRGB32,
180 .depth = 32,
181 .flags = FORMAT_FLAGS_PACKED,
182 },{
183 .name = "32 bpp RGB, be",
184 .fourcc = V4L2_PIX_FMT_RGB32,
185 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
186 .depth = 32,
187 .flags = FORMAT_FLAGS_PACKED,
188 },{
189 .name = "4:2:2, packed, YUYV",
190 .fourcc = V4L2_PIX_FMT_YUYV,
191 .cxformat = ColorFormatYUY2,
192 .depth = 16,
193 .flags = FORMAT_FLAGS_PACKED,
194 },{
195 .name = "4:2:2, packed, UYVY",
196 .fourcc = V4L2_PIX_FMT_UYVY,
197 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
198 .depth = 16,
199 .flags = FORMAT_FLAGS_PACKED,
200 },
201};
202
203static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
204{
205 unsigned int i;
206
207 for (i = 0; i < ARRAY_SIZE(formats); i++)
208 if (formats[i].fourcc == fourcc)
209 return formats+i;
210 return NULL;
211}
212
213/* ------------------------------------------------------------------- */
214
215static const struct v4l2_queryctrl no_ctl = {
216 .name = "42",
217 .flags = V4L2_CTRL_FLAG_DISABLED,
218};
219
220static struct cx88_ctrl cx8800_ctls[] = {
221 /* --- video --- */
222 {
223 .v = {
224 .id = V4L2_CID_BRIGHTNESS,
225 .name = "Brightness",
226 .minimum = 0x00,
227 .maximum = 0xff,
228 .step = 1,
229 .default_value = 0,
230 .type = V4L2_CTRL_TYPE_INTEGER,
231 },
232 .off = 128,
233 .reg = MO_CONTR_BRIGHT,
234 .mask = 0x00ff,
235 .shift = 0,
236 },{
237 .v = {
238 .id = V4L2_CID_CONTRAST,
239 .name = "Contrast",
240 .minimum = 0,
241 .maximum = 0xff,
242 .step = 1,
243 .default_value = 0,
244 .type = V4L2_CTRL_TYPE_INTEGER,
245 },
41ef7c1e 246 .off = 0,
1da177e4
LT		 247 .reg = MO_CONTR_BRIGHT,
248 .mask = 0xff00,
249 .shift = 8,
250 },{
251 .v = {
252 .id = V4L2_CID_HUE,
253 .name = "Hue",
254 .minimum = 0,
255 .maximum = 0xff,
256 .step = 1,
257 .default_value = 0,
258 .type = V4L2_CTRL_TYPE_INTEGER,
259 },
9ac4c158 260 .off = 128,
1da177e4
LT		 261 .reg = MO_HUE,
262 .mask = 0x00ff,
263 .shift = 0,
264 },{
265 /* strictly, this only describes only U saturation.
266 * V saturation is handled specially through code.
267 */
268 .v = {
269 .id = V4L2_CID_SATURATION,
270 .name = "Saturation",
271 .minimum = 0,
272 .maximum = 0xff,
273 .step = 1,
274 .default_value = 0,
275 .type = V4L2_CTRL_TYPE_INTEGER,
276 },
277 .off = 0,
278 .reg = MO_UV_SATURATION,
279 .mask = 0x00ff,
280 .shift = 0,
281 },{
282 /* --- audio --- */
283 .v = {
284 .id = V4L2_CID_AUDIO_MUTE,
285 .name = "Mute",
286 .minimum = 0,
287 .maximum = 1,
288 .type = V4L2_CTRL_TYPE_BOOLEAN,
289 },
290 .reg = AUD_VOL_CTL,
291 .sreg = SHADOW_AUD_VOL_CTL,
292 .mask = (1 << 6),
293 .shift = 6,
294 },{
295 .v = {
296 .id = V4L2_CID_AUDIO_VOLUME,
297 .name = "Volume",
298 .minimum = 0,
299 .maximum = 0x3f,
300 .step = 1,
301 .default_value = 0,
302 .type = V4L2_CTRL_TYPE_INTEGER,
303 },
304 .reg = AUD_VOL_CTL,
305 .sreg = SHADOW_AUD_VOL_CTL,
306 .mask = 0x3f,
307 .shift = 0,
308 },{
309 .v = {
310 .id = V4L2_CID_AUDIO_BALANCE,
311 .name = "Balance",
312 .minimum = 0,
313 .maximum = 0x7f,
314 .step = 1,
315 .default_value = 0x40,
316 .type = V4L2_CTRL_TYPE_INTEGER,
317 },
318 .reg = AUD_BAL_CTL,
319 .sreg = SHADOW_AUD_BAL_CTL,
320 .mask = 0x7f,
321 .shift = 0,
322 }
323};
408b664a 324static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4
LT		 325
326/* ------------------------------------------------------------------- */
327/* resource management */
328
329static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
330{
e52e98a7 331 struct cx88_core *core = dev->core;
1da177e4
LT		 332 if (fh->resources & bit)
333 /* have it already allocated */
334 return 1;
335
336 /* is it free? */
e52e98a7 337 down(&core->lock);
1da177e4
LT		 338 if (dev->resources & bit) {
339 /* no, someone else uses it */
e52e98a7 340 up(&core->lock);
1da177e4
LT		 341 return 0;
342 }
343 /* it's free, grab it */
344 fh->resources |= bit;
345 dev->resources |= bit;
346 dprintk(1,"res: get %d\n",bit);
e52e98a7 347 up(&core->lock);
1da177e4
LT		 348 return 1;
349}
350
351static
352int res_check(struct cx8800_fh *fh, unsigned int bit)
353{
354 return (fh->resources & bit);
355}
356
357static
358int res_locked(struct cx8800_dev *dev, unsigned int bit)
359{
360 return (dev->resources & bit);
361}
362
363static
364void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
365{
e52e98a7 366 struct cx88_core *core = dev->core;
1da177e4
LT		 367 if ((fh->resources & bits) != bits)
368 BUG();
369
e52e98a7 370 down(&core->lock);
1da177e4
LT		 371 fh->resources &= ~bits;
372 dev->resources &= ~bits;
373 dprintk(1,"res: put %d\n",bits);
e52e98a7 374 up(&core->lock);
1da177e4
LT		 375}
376
377/* ------------------------------------------------------------------ */
378
e52e98a7
MCC		 379/* static int video_mux(struct cx8800_dev *dev, unsigned int input) */
380static int video_mux(struct cx88_core *core, unsigned int input)
1da177e4 381{
e52e98a7 382 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 383
384 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
385 input, INPUT(input)->vmux,
386 INPUT(input)->gpio0,INPUT(input)->gpio1,
387 INPUT(input)->gpio2,INPUT(input)->gpio3);
e52e98a7 388 core->input = input;
1da177e4
LT		 389 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
390 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
391 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
392 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
393 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
394
395 switch (INPUT(input)->type) {
396 case CX88_VMUX_SVIDEO:
397 cx_set(MO_AFECFG_IO, 0x00000001);
398 cx_set(MO_INPUT_FORMAT, 0x00010010);
399 cx_set(MO_FILTER_EVEN, 0x00002020);
400 cx_set(MO_FILTER_ODD, 0x00002020);
401 break;
402 default:
403 cx_clear(MO_AFECFG_IO, 0x00000001);
404 cx_clear(MO_INPUT_FORMAT, 0x00010010);
405 cx_clear(MO_FILTER_EVEN, 0x00002020);
406 cx_clear(MO_FILTER_ODD, 0x00002020);
407 break;
408 }
409 return 0;
410}
411
412/* ------------------------------------------------------------------ */
413
414static int start_video_dma(struct cx8800_dev *dev,
415 struct cx88_dmaqueue *q,
416 struct cx88_buffer *buf)
417{
418 struct cx88_core *core = dev->core;
419
420 /* setup fifo + format */
e52e98a7 421 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 422 buf->bpl, buf->risc.dma);
e52e98a7 423 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 424 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
425
426 /* reset counter */
427 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
428 q->count = 1;
429
430 /* enable irqs */
431 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
e52e98a7
MCC		 432
433 /* Enables corresponding bits at PCI_INT_STAT:
434 bits 0 to 4: video, audio, transport stream, VIP, Host
435 bit 7: timer
436 bits 8 and 9: DMA complete for: SRC, DST
437 bits 10 and 11: BERR signal asserted for RISC: RD, WR
438 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
439 */
1da177e4
LT		 440 cx_set(MO_VID_INTMSK, 0x0f0011);
441
442 /* enable capture */
443 cx_set(VID_CAPTURE_CONTROL,0x06);
444
445 /* start dma */
446 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 447 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 448
449 return 0;
450}
451
452static int stop_video_dma(struct cx8800_dev *dev)
453{
454 struct cx88_core *core = dev->core;
455
456 /* stop dma */
457 cx_clear(MO_VID_DMACNTRL, 0x11);
458
459 /* disable capture */
460 cx_clear(VID_CAPTURE_CONTROL,0x06);
461
462 /* disable irqs */
463 cx_clear(MO_PCI_INTMSK, 0x000001);
464 cx_clear(MO_VID_INTMSK, 0x0f0011);
465 return 0;
466}
467
468static int restart_video_queue(struct cx8800_dev *dev,
469 struct cx88_dmaqueue *q)
470{
e52e98a7 471 struct cx88_core *core = dev->core;
1da177e4
LT		 472 struct cx88_buffer *buf, *prev;
473 struct list_head *item;
474
475 if (!list_empty(&q->active)) {
4ac97914 476 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 477 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
478 buf, buf->vb.i);
479 start_video_dma(dev, q, buf);
480 list_for_each(item,&q->active) {
481 buf = list_entry(item, struct cx88_buffer, vb.queue);
482 buf->count = q->count++;
483 }
484 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
485 return 0;
486 }
487
488 prev = NULL;
489 for (;;) {
490 if (list_empty(&q->queued))
491 return 0;
4ac97914 492 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 493 if (NULL == prev) {
494 list_del(&buf->vb.queue);
495 list_add_tail(&buf->vb.queue,&q->active);
496 start_video_dma(dev, q, buf);
497 buf->vb.state = STATE_ACTIVE;
498 buf->count = q->count++;
499 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
500 dprintk(2,"[%p/%d] restart_queue - first active\n",
501 buf,buf->vb.i);
502
503 } else if (prev->vb.width == buf->vb.width &&
504 prev->vb.height == buf->vb.height &&
505 prev->fmt == buf->fmt) {
506 list_del(&buf->vb.queue);
507 list_add_tail(&buf->vb.queue,&q->active);
508 buf->vb.state = STATE_ACTIVE;
509 buf->count = q->count++;
510 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
511 dprintk(2,"[%p/%d] restart_queue - move to active\n",
512 buf,buf->vb.i);
513 } else {
514 return 0;
515 }
516 prev = buf;
517 }
518}
519
520/* ------------------------------------------------------------------ */
521
522static int
523buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
524{
525 struct cx8800_fh *fh = q->priv_data;
526
527 *size = fh->fmt->depth*fh->width*fh->height >> 3;
528 if (0 == *count)
529 *count = 32;
530 while (*size * *count > vid_limit * 1024 * 1024)
531 (*count)--;
532 return 0;
533}
534
535static int
536buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
537 enum v4l2_field field)
538{
539 struct cx8800_fh *fh = q->priv_data;
540 struct cx8800_dev *dev = fh->dev;
e52e98a7 541 struct cx88_core *core = dev->core;
1da177e4
LT		 542 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
543 int rc, init_buffer = 0;
544
545 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 546 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
547 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 548 return -EINVAL;
549 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
550 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
551 return -EINVAL;
552
553 if (buf->fmt != fh->fmt ||
554 buf->vb.width != fh->width ||
555 buf->vb.height != fh->height ||
556 buf->vb.field != field) {
557 buf->fmt = fh->fmt;
558 buf->vb.width = fh->width;
559 buf->vb.height = fh->height;
560 buf->vb.field = field;
561 init_buffer = 1;
562 }
563
564 if (STATE_NEEDS_INIT == buf->vb.state) {
565 init_buffer = 1;
566 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL)))
567 goto fail;
568 }
569
570 if (init_buffer) {
571 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
572 switch (buf->vb.field) {
573 case V4L2_FIELD_TOP:
574 cx88_risc_buffer(dev->pci, &buf->risc,
575 buf->vb.dma.sglist, 0, UNSET,
576 buf->bpl, 0, buf->vb.height);
577 break;
578 case V4L2_FIELD_BOTTOM:
579 cx88_risc_buffer(dev->pci, &buf->risc,
580 buf->vb.dma.sglist, UNSET, 0,
581 buf->bpl, 0, buf->vb.height);
582 break;
583 case V4L2_FIELD_INTERLACED:
584 cx88_risc_buffer(dev->pci, &buf->risc,
585 buf->vb.dma.sglist, 0, buf->bpl,
586 buf->bpl, buf->bpl,
587 buf->vb.height >> 1);
588 break;
589 case V4L2_FIELD_SEQ_TB:
590 cx88_risc_buffer(dev->pci, &buf->risc,
591 buf->vb.dma.sglist,
592 0, buf->bpl * (buf->vb.height >> 1),
593 buf->bpl, 0,
594 buf->vb.height >> 1);
595 break;
596 case V4L2_FIELD_SEQ_BT:
597 cx88_risc_buffer(dev->pci, &buf->risc,
598 buf->vb.dma.sglist,
599 buf->bpl * (buf->vb.height >> 1), 0,
600 buf->bpl, 0,
601 buf->vb.height >> 1);
602 break;
603 default:
604 BUG();
605 }
606 }
607 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
608 buf, buf->vb.i,
609 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
610 (unsigned long)buf->risc.dma);
611
612 buf->vb.state = STATE_PREPARED;
613 return 0;
614
615 fail:
616 cx88_free_buffer(dev->pci,buf);
617 return rc;
618}
619
620static void
621buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
622{
623 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
624 struct cx88_buffer *prev;
625 struct cx8800_fh *fh = vq->priv_data;
626 struct cx8800_dev *dev = fh->dev;
e52e98a7 627 struct cx88_core *core = dev->core;
1da177e4
LT		 628 struct cx88_dmaqueue *q = &dev->vidq;
629
630 /* add jump to stopper */
631 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
632 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
633
634 if (!list_empty(&q->queued)) {
635 list_add_tail(&buf->vb.queue,&q->queued);
636 buf->vb.state = STATE_QUEUED;
637 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
638 buf, buf->vb.i);
639
640 } else if (list_empty(&q->active)) {
641 list_add_tail(&buf->vb.queue,&q->active);
642 start_video_dma(dev, q, buf);
643 buf->vb.state = STATE_ACTIVE;
644 buf->count = q->count++;
645 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
646 dprintk(2,"[%p/%d] buffer_queue - first active\n",
647 buf, buf->vb.i);
648
649 } else {
650 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
651 if (prev->vb.width == buf->vb.width &&
652 prev->vb.height == buf->vb.height &&
653 prev->fmt == buf->fmt) {
654 list_add_tail(&buf->vb.queue,&q->active);
655 buf->vb.state = STATE_ACTIVE;
656 buf->count = q->count++;
657 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
658 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
659 buf, buf->vb.i);
660
661 } else {
662 list_add_tail(&buf->vb.queue,&q->queued);
663 buf->vb.state = STATE_QUEUED;
664 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
665 buf, buf->vb.i);
666 }
667 }
668}
669
670static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
671{
672 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
673 struct cx8800_fh *fh = q->priv_data;
674
675 cx88_free_buffer(fh->dev->pci,buf);
676}
677
408b664a 678static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 679 .buf_setup = buffer_setup,
680 .buf_prepare = buffer_prepare,
681 .buf_queue = buffer_queue,
682 .buf_release = buffer_release,
683};
684
685/* ------------------------------------------------------------------ */
686
1da177e4
LT		 687
688/* ------------------------------------------------------------------ */
689
690static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
691{
692 switch (fh->type) {
693 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
694 return &fh->vidq;
695 case V4L2_BUF_TYPE_VBI_CAPTURE:
696 return &fh->vbiq;
697 default:
698 BUG();
699 return NULL;
700 }
701}
702
703static int get_ressource(struct cx8800_fh *fh)
704{
705 switch (fh->type) {
706 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
707 return RESOURCE_VIDEO;
708 case V4L2_BUF_TYPE_VBI_CAPTURE:
709 return RESOURCE_VBI;
710 default:
711 BUG();
712 return 0;
713 }
714}
715
716static int video_open(struct inode *inode, struct file *file)
717{
718 int minor = iminor(inode);
719 struct cx8800_dev *h,*dev = NULL;
e52e98a7 720 struct cx88_core *core;
1da177e4
LT		 721 struct cx8800_fh *fh;
722 struct list_head *list;
723 enum v4l2_buf_type type = 0;
724 int radio = 0;
725
726 list_for_each(list,&cx8800_devlist) {
727 h = list_entry(list, struct cx8800_dev, devlist);
728 if (h->video_dev->minor == minor) {
729 dev = h;
730 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
731 }
732 if (h->vbi_dev->minor == minor) {
733 dev = h;
734 type = V4L2_BUF_TYPE_VBI_CAPTURE;
735 }
736 if (h->radio_dev &&
737 h->radio_dev->minor == minor) {
738 radio = 1;
739 dev = h;
740 }
741 }
742 if (NULL == dev)
743 return -ENODEV;
744
e52e98a7
MCC		 745 core = dev->core;
746
1da177e4
LT		 747 dprintk(1,"open minor=%d radio=%d type=%s\n",
748 minor,radio,v4l2_type_names[type]);
749
750 /* allocate + initialize per filehandle data */
751 fh = kmalloc(sizeof(*fh),GFP_KERNEL);
752 if (NULL == fh)
753 return -ENOMEM;
754 memset(fh,0,sizeof(*fh));
755 file->private_data = fh;
756 fh->dev = dev;
757 fh->radio = radio;
758 fh->type = type;
759 fh->width = 320;
760 fh->height = 240;
761 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
762
763 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
764 dev->pci, &dev->slock,
765 V4L2_BUF_TYPE_VIDEO_CAPTURE,
766 V4L2_FIELD_INTERLACED,
767 sizeof(struct cx88_buffer),
768 fh);
769 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
770 dev->pci, &dev->slock,
771 V4L2_BUF_TYPE_VBI_CAPTURE,
772 V4L2_FIELD_SEQ_TB,
773 sizeof(struct cx88_buffer),
774 fh);
775
776 if (fh->radio) {
1da177e4
LT		 777 int board = core->board;
778 dprintk(1,"video_open: setting radio device\n");
fd3113e8 779 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3);
1da177e4
LT		 780 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0);
781 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1);
782 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2);
e52e98a7 783 core->tvaudio = WW_FM;
1da177e4
LT		 784 cx88_set_tvaudio(core);
785 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 786 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 787 }
788
4ac97914 789 return 0;
1da177e4
LT		 790}
791
792static ssize_t
f9e7a020 793video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 794{
795 struct cx8800_fh *fh = file->private_data;
796
797 switch (fh->type) {
798 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
799 if (res_locked(fh->dev,RESOURCE_VIDEO))
800 return -EBUSY;
801 return videobuf_read_one(&fh->vidq, data, count, ppos,
802 file->f_flags & O_NONBLOCK);
803 case V4L2_BUF_TYPE_VBI_CAPTURE:
804 if (!res_get(fh->dev,fh,RESOURCE_VBI))
805 return -EBUSY;
806 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
807 file->f_flags & O_NONBLOCK);
808 default:
809 BUG();
810 return 0;
811 }
812}
813
814static unsigned int
815video_poll(struct file *file, struct poll_table_struct *wait)
816{
817 struct cx8800_fh *fh = file->private_data;
818 struct cx88_buffer *buf;
819
820 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
821 if (!res_get(fh->dev,fh,RESOURCE_VBI))
822 return POLLERR;
823 return videobuf_poll_stream(file, &fh->vbiq, wait);
824 }
825
826 if (res_check(fh,RESOURCE_VIDEO)) {
827 /* streaming capture */
828 if (list_empty(&fh->vidq.stream))
829 return POLLERR;
830 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
831 } else {
832 /* read() capture */
833 buf = (struct cx88_buffer*)fh->vidq.read_buf;
834 if (NULL == buf)
835 return POLLERR;
836 }
837 poll_wait(file, &buf->vb.done, wait);
838 if (buf->vb.state == STATE_DONE ||
839 buf->vb.state == STATE_ERROR)
840 return POLLIN|POLLRDNORM;
841 return 0;
842}
843
844static int video_release(struct inode *inode, struct file *file)
845{
846 struct cx8800_fh *fh = file->private_data;
847 struct cx8800_dev *dev = fh->dev;
848
849 /* turn off overlay */
850 if (res_check(fh, RESOURCE_OVERLAY)) {
851 /* FIXME */
852 res_free(dev,fh,RESOURCE_OVERLAY);
853 }
854
855 /* stop video capture */
856 if (res_check(fh, RESOURCE_VIDEO)) {
857 videobuf_queue_cancel(&fh->vidq);
858 res_free(dev,fh,RESOURCE_VIDEO);
859 }
860 if (fh->vidq.read_buf) {
861 buffer_release(&fh->vidq,fh->vidq.read_buf);
862 kfree(fh->vidq.read_buf);
863 }
864
865 /* stop vbi capture */
866 if (res_check(fh, RESOURCE_VBI)) {
867 if (fh->vbiq.streaming)
868 videobuf_streamoff(&fh->vbiq);
869 if (fh->vbiq.reading)
870 videobuf_read_stop(&fh->vbiq);
871 res_free(dev,fh,RESOURCE_VBI);
872 }
873
874 videobuf_mmap_free(&fh->vidq);
875 videobuf_mmap_free(&fh->vbiq);
876 file->private_data = NULL;
877 kfree(fh);
e52e98a7
MCC		 878
879 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
880
1da177e4
LT		 881 return 0;
882}
883
884static int
885video_mmap(struct file *file, struct vm_area_struct * vma)
886{
887 struct cx8800_fh *fh = file->private_data;
888
889 return videobuf_mmap_mapper(get_queue(fh), vma);
890}
891
892/* ------------------------------------------------------------------ */
893
e52e98a7
MCC		 894/* static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
895static int get_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 896{
e52e98a7 897 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 898 struct cx88_ctrl *c = NULL;
899 u32 value;
900 int i;
901
902 for (i = 0; i < CX8800_CTLS; i++)
903 if (cx8800_ctls[i].v.id == ctl->id)
904 c = &cx8800_ctls[i];
905 if (NULL == c)
906 return -EINVAL;
907
908 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
909 switch (ctl->id) {
910 case V4L2_CID_AUDIO_BALANCE:
911 ctl->value = (value & 0x40) ? (value & 0x3f) : (0x40 - (value & 0x3f));
912 break;
913 case V4L2_CID_AUDIO_VOLUME:
914 ctl->value = 0x3f - (value & 0x3f);
915 break;
916 default:
917 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
918 break;
919 }
920 return 0;
921}
922
e52e98a7
MCC		 923/* static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
924static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 925{
e52e98a7 926 /* struct cx88_core *core = dev->core; */
1da177e4 927 struct cx88_ctrl *c = NULL;
4ac97914 928 u32 v_sat_value;
1da177e4
LT		 929 u32 value;
930 int i;
931
932 for (i = 0; i < CX8800_CTLS; i++)
933 if (cx8800_ctls[i].v.id == ctl->id)
934 c = &cx8800_ctls[i];
935 if (NULL == c)
936 return -EINVAL;
937
938 if (ctl->value < c->v.minimum)
e52e98a7 939 ctl->value = c->v.minimum;
1da177e4 940 if (ctl->value > c->v.maximum)
e52e98a7 941 ctl->value = c->v.maximum;
1da177e4
LT		 942 switch (ctl->id) {
943 case V4L2_CID_AUDIO_BALANCE:
944 value = (ctl->value < 0x40) ? (0x40 - ctl->value) : ctl->value;
945 break;
946 case V4L2_CID_AUDIO_VOLUME:
947 value = 0x3f - (ctl->value & 0x3f);
948 break;
949 case V4L2_CID_SATURATION:
950 /* special v_sat handling */
951 v_sat_value = ctl->value - (0x7f - 0x5a);
952 if (v_sat_value > 0xff)
953 v_sat_value = 0xff;
954 if (v_sat_value < 0x00)
955 v_sat_value = 0x00;
956 cx_andor(MO_UV_SATURATION, 0xff00, v_sat_value << 8);
957 /* fall through to default route for u_sat */
958 default:
959 value = ((ctl->value - c->off) << c->shift) & c->mask;
960 break;
961 }
962 dprintk(1,"set_control id=0x%X reg=0x%x val=0x%x%s\n",
963 ctl->id, c->reg, value, c->sreg ? " [shadowed]" : "");
964 if (c->sreg) {
965 cx_sandor(c->sreg, c->reg, c->mask, value);
966 } else {
967 cx_andor(c->reg, c->mask, value);
968 }
969 return 0;
970}
971
e52e98a7
MCC		 972/* static void init_controls(struct cx8800_dev *dev) */
973static void init_controls(struct cx88_core *core)
1da177e4
LT		 974{
975 static struct v4l2_control mute = {
976 .id = V4L2_CID_AUDIO_MUTE,
977 .value = 1,
978 };
979 static struct v4l2_control volume = {
980 .id = V4L2_CID_AUDIO_VOLUME,
981 .value = 0x3f,
982 };
b45009b0
MCC		 983 static struct v4l2_control hue = {
984 .id = V4L2_CID_HUE,
985 .value = 0x80,
986 };
987 static struct v4l2_control contrast = {
988 .id = V4L2_CID_CONTRAST,
989 .value = 0x80,
990 };
991 static struct v4l2_control brightness = {
992 .id = V4L2_CID_BRIGHTNESS,
993 .value = 0x80,
994 };
1da177e4 995
e52e98a7
MCC		 996 set_control(core,&mute);
997 set_control(core,&volume);
998 set_control(core,&hue);
999 set_control(core,&contrast);
1000 set_control(core,&brightness);
1da177e4
LT		 1001}
1002
1003/* ------------------------------------------------------------------ */
1004
1005static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1006 struct v4l2_format *f)
1007{
1008 switch (f->type) {
1009 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1010 memset(&f->fmt.pix,0,sizeof(f->fmt.pix));
1011 f->fmt.pix.width = fh->width;
1012 f->fmt.pix.height = fh->height;
1013 f->fmt.pix.field = fh->vidq.field;
1014 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1015 f->fmt.pix.bytesperline =
1016 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1017 f->fmt.pix.sizeimage =
1018 f->fmt.pix.height * f->fmt.pix.bytesperline;
1019 return 0;
1020 case V4L2_BUF_TYPE_VBI_CAPTURE:
1021 cx8800_vbi_fmt(dev, f);
1022 return 0;
1023 default:
1024 return -EINVAL;
1025 }
1026}
1027
1028static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1029 struct v4l2_format *f)
1030{
e52e98a7
MCC		 1031 struct cx88_core *core = dev->core;
1032
1da177e4
LT		 1033 switch (f->type) {
1034 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1035 {
1036 struct cx8800_fmt *fmt;
1037 enum v4l2_field field;
1038 unsigned int maxw, maxh;
1039
1040 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1041 if (NULL == fmt)
1042 return -EINVAL;
1043
1044 field = f->fmt.pix.field;
e52e98a7
MCC		 1045 maxw = norm_maxw(core->tvnorm);
1046 maxh = norm_maxh(core->tvnorm);
1da177e4
LT		 1047
1048 if (V4L2_FIELD_ANY == field) {
1049 field = (f->fmt.pix.height > maxh/2)
1050 ? V4L2_FIELD_INTERLACED
1051 : V4L2_FIELD_BOTTOM;
1052 }
1053
1054 switch (field) {
1055 case V4L2_FIELD_TOP:
1056 case V4L2_FIELD_BOTTOM:
1057 maxh = maxh / 2;
1058 break;
1059 case V4L2_FIELD_INTERLACED:
1060 break;
1061 default:
1062 return -EINVAL;
1063 }
1064
1065 f->fmt.pix.field = field;
1066 if (f->fmt.pix.height < 32)
1067 f->fmt.pix.height = 32;
1068 if (f->fmt.pix.height > maxh)
1069 f->fmt.pix.height = maxh;
1070 if (f->fmt.pix.width < 48)
1071 f->fmt.pix.width = 48;
1072 if (f->fmt.pix.width > maxw)
1073 f->fmt.pix.width = maxw;
1074 f->fmt.pix.width &= ~0x03;
1075 f->fmt.pix.bytesperline =
1076 (f->fmt.pix.width * fmt->depth) >> 3;
1077 f->fmt.pix.sizeimage =
1078 f->fmt.pix.height * f->fmt.pix.bytesperline;
1079
1080 return 0;
1081 }
1082 case V4L2_BUF_TYPE_VBI_CAPTURE:
1083 cx8800_vbi_fmt(dev, f);
1084 return 0;
1085 default:
1086 return -EINVAL;
1087 }
1088}
1089
1090static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1091 struct v4l2_format *f)
1092{
1093 int err;
1094
1095 switch (f->type) {
1096 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1097 err = cx8800_try_fmt(dev,fh,f);
1098 if (0 != err)
1099 return err;
1100
1101 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1102 fh->width = f->fmt.pix.width;
1103 fh->height = f->fmt.pix.height;
1104 fh->vidq.field = f->fmt.pix.field;
1105 return 0;
1106 case V4L2_BUF_TYPE_VBI_CAPTURE:
1107 cx8800_vbi_fmt(dev, f);
1108 return 0;
1109 default:
1110 return -EINVAL;
1111 }
1112}
1113
1114/*
1115 * This function is _not_ called directly, but from
1116 * video_generic_ioctl (and maybe others). userspace
1117 * copying is done already, arg is a kernel pointer.
1118 */
1119static int video_do_ioctl(struct inode *inode, struct file *file,
1120 unsigned int cmd, void *arg)
1121{
1122 struct cx8800_fh *fh = file->private_data;
1123 struct cx8800_dev *dev = fh->dev;
1124 struct cx88_core *core = dev->core;
1da177e4
LT		 1125 int err;
1126
1127 if (video_debug > 1)
1128 cx88_print_ioctl(core->name,cmd);
1129 switch (cmd) {
e52e98a7
MCC		 1130
1131 /* --- capabilities ------------------------------------------ */
1da177e4
LT		 1132 case VIDIOC_QUERYCAP:
1133 {
1134 struct v4l2_capability *cap = arg;
1135
1136 memset(cap,0,sizeof(*cap));
e52e98a7 1137 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1138 strlcpy(cap->card, cx88_boards[core->board].name,
1139 sizeof(cap->card));
1140 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1141 cap->version = CX88_VERSION_CODE;
1142 cap->capabilities =
1143 V4L2_CAP_VIDEO_CAPTURE |
1144 V4L2_CAP_READWRITE |
1145 V4L2_CAP_STREAMING |
1146 V4L2_CAP_VBI_CAPTURE |
e52e98a7 1147 V4L2_CAP_VIDEO_OVERLAY |
1da177e4
LT		 1148 0;
1149 if (UNSET != core->tuner_type)
1150 cap->capabilities |= V4L2_CAP_TUNER;
1151 return 0;
1152 }
1153
e52e98a7
MCC		 1154 /* --- capture ioctls ---------------------------------------- */
1155 case VIDIOC_ENUM_FMT:
1156 {
1157 struct v4l2_fmtdesc *f = arg;
1158 enum v4l2_buf_type type;
1159 unsigned int index;
1160
1161 index = f->index;
1162 type = f->type;
1163 switch (type) {
1164 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1165 if (index >= ARRAY_SIZE(formats))
1166 return -EINVAL;
1167 memset(f,0,sizeof(*f));
1168 f->index = index;
1169 f->type = type;
1170 strlcpy(f->description,formats[index].name,sizeof(f->description));
1171 f->pixelformat = formats[index].fourcc;
1172 break;
1173 default:
1174 return -EINVAL;
1175 }
1176 return 0;
1177 }
1178 case VIDIOC_G_FMT:
1179 {
1180 struct v4l2_format *f = arg;
1181 return cx8800_g_fmt(dev,fh,f);
1182 }
1183 case VIDIOC_S_FMT:
1184 {
1185 struct v4l2_format *f = arg;
1186 return cx8800_s_fmt(dev,fh,f);
1187 }
1188 case VIDIOC_TRY_FMT:
1189 {
1190 struct v4l2_format *f = arg;
1191 return cx8800_try_fmt(dev,fh,f);
1192 }
79436633 1193#ifdef HAVE_V4L1
e52e98a7
MCC		 1194 /* --- streaming capture ------------------------------------- */
1195 case VIDIOCGMBUF:
1196 {
1197 struct video_mbuf *mbuf = arg;
1198 struct videobuf_queue *q;
1199 struct v4l2_requestbuffers req;
1200 unsigned int i;
1201
1202 q = get_queue(fh);
1203 memset(&req,0,sizeof(req));
1204 req.type = q->type;
1205 req.count = 8;
1206 req.memory = V4L2_MEMORY_MMAP;
1207 err = videobuf_reqbufs(q,&req);
1208 if (err < 0)
1209 return err;
1210 memset(mbuf,0,sizeof(*mbuf));
1211 mbuf->frames = req.count;
1212 mbuf->size = 0;
1213 for (i = 0; i < mbuf->frames; i++) {
1214 mbuf->offsets[i] = q->bufs[i]->boff;
1215 mbuf->size += q->bufs[i]->bsize;
1216 }
1217 return 0;
1218 }
79436633 1219#endif
e52e98a7
MCC		 1220 case VIDIOC_REQBUFS:
1221 return videobuf_reqbufs(get_queue(fh), arg);
1222
1223 case VIDIOC_QUERYBUF:
1224 return videobuf_querybuf(get_queue(fh), arg);
1225
1226 case VIDIOC_QBUF:
1227 return videobuf_qbuf(get_queue(fh), arg);
1228
1229 case VIDIOC_DQBUF:
1230 return videobuf_dqbuf(get_queue(fh), arg,
1231 file->f_flags & O_NONBLOCK);
1232
1233 case VIDIOC_STREAMON:
1234 {
1235 int res = get_ressource(fh);
1236
1237 if (!res_get(dev,fh,res))
1238 return -EBUSY;
1239 return videobuf_streamon(get_queue(fh));
1240 }
1241 case VIDIOC_STREAMOFF:
1242 {
1243 int res = get_ressource(fh);
1244
1245 err = videobuf_streamoff(get_queue(fh));
1246 if (err < 0)
1247 return err;
1248 res_free(dev,fh,res);
1249 return 0;
1250 }
e52e98a7
MCC		 1251 default:
1252 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl );
1253 }
1254 return 0;
1255}
1256
1257int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
4ac97914 1258 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl)
e52e98a7
MCC		 1259{
1260 int err;
1261
9f95a0bf 1262 dprintk( 1, "CORE IOCTL: 0x%x\n", cmd );
e52e98a7
MCC		 1263 if (video_debug > 1)
1264 cx88_print_ioctl(core->name,cmd);
e52e98a7
MCC		 1265
1266 switch (cmd) {
1da177e4
LT		 1267 /* ---------- tv norms ---------- */
1268 case VIDIOC_ENUMSTD:
1269 {
1270 struct v4l2_standard *e = arg;
1271 unsigned int i;
1272
1273 i = e->index;
1274 if (i >= ARRAY_SIZE(tvnorms))
1275 return -EINVAL;
1276 err = v4l2_video_std_construct(e, tvnorms[e->index].id,
1277 tvnorms[e->index].name);
1278 e->index = i;
1279 if (err < 0)
1280 return err;
1281 return 0;
1282 }
1283 case VIDIOC_G_STD:
1284 {
1285 v4l2_std_id *id = arg;
1286
1287 *id = core->tvnorm->id;
1288 return 0;
1289 }
1290 case VIDIOC_S_STD:
1291 {
1292 v4l2_std_id *id = arg;
1293 unsigned int i;
1294
1295 for(i = 0; i < ARRAY_SIZE(tvnorms); i++)
1296 if (*id & tvnorms[i].id)
1297 break;
1298 if (i == ARRAY_SIZE(tvnorms))
1299 return -EINVAL;
1300
e52e98a7
MCC		 1301 down(&core->lock);
1302 cx88_set_tvnorm(core,&tvnorms[i]);
1303 up(&core->lock);
1da177e4
LT		 1304 return 0;
1305 }
1306
1307 /* ------ input switching ---------- */
1308 case VIDIOC_ENUMINPUT:
1309 {
1310 static const char *iname[] = {
1311 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1312 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1313 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1314 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1315 [ CX88_VMUX_SVIDEO ] = "S-Video",
1316 [ CX88_VMUX_TELEVISION ] = "Television",
1317 [ CX88_VMUX_CABLE ] = "Cable TV",
1318 [ CX88_VMUX_DVB ] = "DVB",
1319 [ CX88_VMUX_DEBUG ] = "for debug only",
1320 };
1321 struct v4l2_input *i = arg;
1322 unsigned int n;
1323
1324 n = i->index;
1325 if (n >= 4)
1326 return -EINVAL;
1327 if (0 == INPUT(n)->type)
1328 return -EINVAL;
1329 memset(i,0,sizeof(*i));
1330 i->index = n;
1331 i->type = V4L2_INPUT_TYPE_CAMERA;
1332 strcpy(i->name,iname[INPUT(n)->type]);
1333 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) ||
1334 (CX88_VMUX_CABLE == INPUT(n)->type))
1335 i->type = V4L2_INPUT_TYPE_TUNER;
1336 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1337 i->std |= tvnorms[n].id;
1338 return 0;
1339 }
1340 case VIDIOC_G_INPUT:
1341 {
1342 unsigned int *i = arg;
1343
e52e98a7 1344 *i = core->input;
1da177e4
LT		 1345 return 0;
1346 }
1347 case VIDIOC_S_INPUT:
1348 {
1349 unsigned int *i = arg;
1350
1351 if (*i >= 4)
1352 return -EINVAL;
e52e98a7 1353 down(&core->lock);
1da177e4 1354 cx88_newstation(core);
e52e98a7
MCC		 1355 video_mux(core,*i);
1356 up(&core->lock);
1da177e4
LT		 1357 return 0;
1358 }
1359
1360
1da177e4 1361
1da177e4
LT		 1362 /* --- controls ---------------------------------------------- */
1363 case VIDIOC_QUERYCTRL:
1364 {
1365 struct v4l2_queryctrl *c = arg;
1366 int i;
1367
1368 if (c->id < V4L2_CID_BASE ||
1369 c->id >= V4L2_CID_LASTP1)
1370 return -EINVAL;
1371 for (i = 0; i < CX8800_CTLS; i++)
1372 if (cx8800_ctls[i].v.id == c->id)
1373 break;
1374 if (i == CX8800_CTLS) {
1375 *c = no_ctl;
1376 return 0;
1377 }
1378 *c = cx8800_ctls[i].v;
1379 return 0;
1380 }
1381 case VIDIOC_G_CTRL:
e52e98a7 1382 return get_control(core,arg);
1da177e4 1383 case VIDIOC_S_CTRL:
e52e98a7 1384 return set_control(core,arg);
1da177e4
LT		 1385
1386 /* --- tuner ioctls ------------------------------------------ */
1387 case VIDIOC_G_TUNER:
1388 {
1389 struct v4l2_tuner *t = arg;
1390 u32 reg;
1391
1392 if (UNSET == core->tuner_type)
1393 return -EINVAL;
1394 if (0 != t->index)
1395 return -EINVAL;
1396
1397 memset(t,0,sizeof(*t));
1398 strcpy(t->name, "Television");
1399 t->type = V4L2_TUNER_ANALOG_TV;
1400 t->capability = V4L2_TUNER_CAP_NORM;
1401 t->rangehigh = 0xffffffffUL;
1402
1403 cx88_get_stereo(core ,t);
1404 reg = cx_read(MO_DEVICE_STATUS);
4ac97914 1405 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1da177e4
LT		 1406 return 0;
1407 }
1408 case VIDIOC_S_TUNER:
1409 {
1410 struct v4l2_tuner *t = arg;
1411
1412 if (UNSET == core->tuner_type)
1413 return -EINVAL;
1414 if (0 != t->index)
1415 return -EINVAL;
1416 cx88_set_stereo(core, t->audmode, 1);
1417 return 0;
1418 }
1419 case VIDIOC_G_FREQUENCY:
1420 {
1421 struct v4l2_frequency *f = arg;
1422
a82decf6
MCC		 1423 memset(f,0,sizeof(*f));
1424
1da177e4
LT		 1425 if (UNSET == core->tuner_type)
1426 return -EINVAL;
a82decf6 1427
e52e98a7
MCC		 1428 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1429 f->type = radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1430 f->frequency = core->freq;
41ef7c1e 1431
e52e98a7 1432 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
41ef7c1e 1433
1da177e4
LT		 1434 return 0;
1435 }
1436 case VIDIOC_S_FREQUENCY:
1437 {
1438 struct v4l2_frequency *f = arg;
1439
1440 if (UNSET == core->tuner_type)
1441 return -EINVAL;
1442 if (f->tuner != 0)
1443 return -EINVAL;
e52e98a7 1444 if (0 == radio && f->type != V4L2_TUNER_ANALOG_TV)
1da177e4 1445 return -EINVAL;
e52e98a7 1446 if (1 == radio && f->type != V4L2_TUNER_RADIO)
1da177e4 1447 return -EINVAL;
e52e98a7
MCC		 1448 down(&core->lock);
1449 core->freq = f->frequency;
1da177e4 1450 cx88_newstation(core);
e52e98a7 1451 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c5287ba1
MCC		 1452
1453 /* When changing channels it is required to reset TVAUDIO */
1454 msleep (10);
1455 cx88_set_tvaudio(core);
1456
e52e98a7 1457 up(&core->lock);
1da177e4
LT		 1458 return 0;
1459 }
1460
1461 default:
1462 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
e52e98a7 1463 driver_ioctl);
1da177e4
LT		 1464 }
1465 return 0;
1466}
1467
1468static int video_ioctl(struct inode *inode, struct file *file,
1469 unsigned int cmd, unsigned long arg)
1470{
1471 return video_usercopy(inode, file, cmd, arg, video_do_ioctl);
1472}
1473
1474/* ----------------------------------------------------------- */
1475
1476static int radio_do_ioctl(struct inode *inode, struct file *file,
1477 unsigned int cmd, void *arg)
1478{
1479 struct cx8800_fh *fh = file->private_data;
1480 struct cx8800_dev *dev = fh->dev;
1481 struct cx88_core *core = dev->core;
1482
1483 if (video_debug > 1)
1484 cx88_print_ioctl(core->name,cmd);
1485
1486 switch (cmd) {
1487 case VIDIOC_QUERYCAP:
1488 {
1489 struct v4l2_capability *cap = arg;
1490
1491 memset(cap,0,sizeof(*cap));
4ac97914 1492 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1493 strlcpy(cap->card, cx88_boards[core->board].name,
1494 sizeof(cap->card));
1495 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1496 cap->version = CX88_VERSION_CODE;
a82decf6 1497 cap->capabilities = V4L2_CAP_TUNER;
1da177e4
LT		 1498 return 0;
1499 }
1500 case VIDIOC_G_TUNER:
1501 {
1502 struct v4l2_tuner *t = arg;
1503
1504 if (t->index > 0)
1505 return -EINVAL;
1506
1507 memset(t,0,sizeof(*t));
1508 strcpy(t->name, "Radio");
48c42596 1509 t->type = V4L2_TUNER_RADIO;
1da177e4 1510
e52e98a7 1511 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1da177e4
LT		 1512 return 0;
1513 }
1514 case VIDIOC_ENUMINPUT:
1515 {
1516 struct v4l2_input *i = arg;
1517
1518 if (i->index != 0)
1519 return -EINVAL;
1520 strcpy(i->name,"Radio");
1521 i->type = V4L2_INPUT_TYPE_TUNER;
1522 return 0;
1523 }
1524 case VIDIOC_G_INPUT:
1525 {
1526 int *i = arg;
1527 *i = 0;
1528 return 0;
1529 }
1530 case VIDIOC_G_AUDIO:
1531 {
1532 struct v4l2_audio *a = arg;
1533
1534 memset(a,0,sizeof(*a));
1535 strcpy(a->name,"Radio");
1536 return 0;
1537 }
1538 case VIDIOC_G_STD:
1539 {
1540 v4l2_std_id *id = arg;
1541 *id = 0;
1542 return 0;
1543 }
79436633 1544#ifdef HAVE_V4L1
a82decf6
MCC		 1545 case VIDIOCSTUNER:
1546 {
1547 struct video_tuner *v = arg;
1548
1549 if (v->tuner) /* Only tuner 0 */
1550 return -EINVAL;
1551
e52e98a7
MCC		 1552 cx88_call_i2c_clients(core,VIDIOCSTUNER,v);
1553 return 0;
a82decf6 1554 }
79436633 1555#endif
1da177e4 1556 case VIDIOC_S_TUNER:
a82decf6
MCC		 1557 {
1558 struct v4l2_tuner *t = arg;
1559
1560 if (0 != t->index)
1561 return -EINVAL;
1562
e52e98a7 1563 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
a82decf6
MCC		 1564
1565 return 0;
1566 }
1567
1568 case VIDIOC_S_AUDIO:
1da177e4
LT		 1569 case VIDIOC_S_INPUT:
1570 case VIDIOC_S_STD:
1571 return 0;
1572
1573 case VIDIOC_QUERYCTRL:
1574 {
1575 struct v4l2_queryctrl *c = arg;
1576 int i;
1577
1578 if (c->id < V4L2_CID_BASE ||
1579 c->id >= V4L2_CID_LASTP1)
1580 return -EINVAL;
1581 if (c->id == V4L2_CID_AUDIO_MUTE) {
1582 for (i = 0; i < CX8800_CTLS; i++)
1583 if (cx8800_ctls[i].v.id == c->id)
1584 break;
1585 *c = cx8800_ctls[i].v;
1586 } else
1587 *c = no_ctl;
1588 return 0;
1589 }
1590
1591
1592 case VIDIOC_G_CTRL:
1593 case VIDIOC_S_CTRL:
1594 case VIDIOC_G_FREQUENCY:
1595 case VIDIOC_S_FREQUENCY:
1596 return video_do_ioctl(inode,file,cmd,arg);
1597
1598 default:
1599 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
1600 radio_do_ioctl);
1601 }
1602 return 0;
1603};
1604
1605static int radio_ioctl(struct inode *inode, struct file *file,
1606 unsigned int cmd, unsigned long arg)
1607{
1608 return video_usercopy(inode, file, cmd, arg, radio_do_ioctl);
1609};
1610
1611/* ----------------------------------------------------------- */
1612
1613static void cx8800_vid_timeout(unsigned long data)
1614{
1615 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1616 struct cx88_core *core = dev->core;
1617 struct cx88_dmaqueue *q = &dev->vidq;
1618 struct cx88_buffer *buf;
1619 unsigned long flags;
1620
e52e98a7 1621 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1622
1623 cx_clear(MO_VID_DMACNTRL, 0x11);
1624 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1625
1626 spin_lock_irqsave(&dev->slock,flags);
1627 while (!list_empty(&q->active)) {
1628 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1629 list_del(&buf->vb.queue);
1630 buf->vb.state = STATE_ERROR;
1631 wake_up(&buf->vb.done);
1632 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1633 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1634 }
1635 restart_video_queue(dev,q);
1636 spin_unlock_irqrestore(&dev->slock,flags);
1637}
1638
41ef7c1e
MCC		 1639static char *cx88_vid_irqs[32] = {
1640 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1641 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1642 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1643 "y_sync", "u_sync", "v_sync", "vbi_sync",
1644 "opc_err", "par_err", "rip_err", "pci_abort",
1645};
1646
1da177e4
LT		 1647static void cx8800_vid_irq(struct cx8800_dev *dev)
1648{
1649 struct cx88_core *core = dev->core;
1650 u32 status, mask, count;
1651
1652 status = cx_read(MO_VID_INTSTAT);
1653 mask = cx_read(MO_VID_INTMSK);
1654 if (0 == (status & mask))
1655 return;
1656 cx_write(MO_VID_INTSTAT, status);
1657 if (irq_debug || (status & mask & ~0xff))
1658 cx88_print_irqbits(core->name, "irq vid",
1659 cx88_vid_irqs, status, mask);
1660
1661 /* risc op code error */
1662 if (status & (1 << 16)) {
1663 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1664 cx_clear(MO_VID_DMACNTRL, 0x11);
1665 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1666 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1667 }
1668
1669 /* risc1 y */
1670 if (status & 0x01) {
1671 spin_lock(&dev->slock);
1672 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1673 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1674 spin_unlock(&dev->slock);
1675 }
1676
1677 /* risc1 vbi */
1678 if (status & 0x08) {
1679 spin_lock(&dev->slock);
1680 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1681 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1682 spin_unlock(&dev->slock);
1683 }
1684
1685 /* risc2 y */
1686 if (status & 0x10) {
1687 dprintk(2,"stopper video\n");
1688 spin_lock(&dev->slock);
1689 restart_video_queue(dev,&dev->vidq);
1690 spin_unlock(&dev->slock);
1691 }
1692
1693 /* risc2 vbi */
1694 if (status & 0x80) {
1695 dprintk(2,"stopper vbi\n");
1696 spin_lock(&dev->slock);
1697 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1698 spin_unlock(&dev->slock);
1699 }
1700}
1701
1702static irqreturn_t cx8800_irq(int irq, void *dev_id, struct pt_regs *regs)
1703{
1704 struct cx8800_dev *dev = dev_id;
1705 struct cx88_core *core = dev->core;
1706 u32 status;
1707 int loop, handled = 0;
1708
1709 for (loop = 0; loop < 10; loop++) {
1710 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
1711 if (0 == status)
1712 goto out;
1713 cx_write(MO_PCI_INTSTAT, status);
1714 handled = 1;
1715
1716 if (status & core->pci_irqmask)
1717 cx88_core_irq(core,status);
1718 if (status & 0x01)
1719 cx8800_vid_irq(dev);
1720 };
1721 if (10 == loop) {
1722 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1723 core->name);
1724 cx_write(MO_PCI_INTMSK,0);
1725 }
1726
1727 out:
1728 return IRQ_RETVAL(handled);
1729}
1730
1731/* ----------------------------------------------------------- */
1732/* exported stuff */
1733
1734static struct file_operations video_fops =
1735{
1736 .owner = THIS_MODULE,
1737 .open = video_open,
1738 .release = video_release,
1739 .read = video_read,
1740 .poll = video_poll,
1741 .mmap = video_mmap,
1742 .ioctl = video_ioctl,
0d0fbf81 1743 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1744 .llseek = no_llseek,
1745};
1746
408b664a 1747static struct video_device cx8800_video_template =
1da177e4
LT		 1748{
1749 .name = "cx8800-video",
1750 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1751 .hardware = 0,
1752 .fops = &video_fops,
1753 .minor = -1,
1754};
1755
408b664a 1756static struct video_device cx8800_vbi_template =
1da177e4
LT		 1757{
1758 .name = "cx8800-vbi",
1759 .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER,
1760 .hardware = 0,
1761 .fops = &video_fops,
1762 .minor = -1,
1763};
1764
1765static struct file_operations radio_fops =
1766{
1767 .owner = THIS_MODULE,
1768 .open = video_open,
1769 .release = video_release,
1770 .ioctl = radio_ioctl,
0d0fbf81 1771 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1772 .llseek = no_llseek,
1773};
1774
408b664a 1775static struct video_device cx8800_radio_template =
1da177e4
LT		 1776{
1777 .name = "cx8800-radio",
1778 .type = VID_TYPE_TUNER,
1779 .hardware = 0,
1780 .fops = &radio_fops,
1781 .minor = -1,
1782};
1783
1784/* ----------------------------------------------------------- */
1785
1786static void cx8800_unregister_video(struct cx8800_dev *dev)
1787{
1788 if (dev->radio_dev) {
1789 if (-1 != dev->radio_dev->minor)
1790 video_unregister_device(dev->radio_dev);
1791 else
1792 video_device_release(dev->radio_dev);
1793 dev->radio_dev = NULL;
1794 }
1795 if (dev->vbi_dev) {
1796 if (-1 != dev->vbi_dev->minor)
1797 video_unregister_device(dev->vbi_dev);
1798 else
1799 video_device_release(dev->vbi_dev);
1800 dev->vbi_dev = NULL;
1801 }
1802 if (dev->video_dev) {
1803 if (-1 != dev->video_dev->minor)
1804 video_unregister_device(dev->video_dev);
1805 else
1806 video_device_release(dev->video_dev);
1807 dev->video_dev = NULL;
1808 }
1809}
1810
1811static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1812 const struct pci_device_id *pci_id)
1813{
1814 struct cx8800_dev *dev;
1815 struct cx88_core *core;
1816 int err;
1817
1818 dev = kmalloc(sizeof(*dev),GFP_KERNEL);
1819 if (NULL == dev)
1820 return -ENOMEM;
1821 memset(dev,0,sizeof(*dev));
1822
1823 /* pci init */
1824 dev->pci = pci_dev;
1825 if (pci_enable_device(pci_dev)) {
1826 err = -EIO;
1827 goto fail_free;
1828 }
1829 core = cx88_core_get(dev->pci);
1830 if (NULL == core) {
1831 err = -EINVAL;
1832 goto fail_free;
1833 }
1834 dev->core = core;
1835
1836 /* print pci info */
1837 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1838 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1839 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1da177e4
LT		 1840 "latency: %d, mmio: 0x%lx\n", core->name,
1841 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1842 dev->pci_lat,pci_resource_start(pci_dev,0));
1843
1844 pci_set_master(pci_dev);
1845 if (!pci_dma_supported(pci_dev,0xffffffff)) {
1846 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1847 err = -EIO;
1848 goto fail_core;
1849 }
1850
1851 /* initialize driver struct */
1da177e4
LT		 1852 spin_lock_init(&dev->slock);
1853 core->tvnorm = tvnorms;
1854
1855 /* init video dma queues */
1856 INIT_LIST_HEAD(&dev->vidq.active);
1857 INIT_LIST_HEAD(&dev->vidq.queued);
1858 dev->vidq.timeout.function = cx8800_vid_timeout;
1859 dev->vidq.timeout.data = (unsigned long)dev;
1860 init_timer(&dev->vidq.timeout);
1861 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1862 MO_VID_DMACNTRL,0x11,0x00);
1863
1864 /* init vbi dma queues */
1865 INIT_LIST_HEAD(&dev->vbiq.active);
1866 INIT_LIST_HEAD(&dev->vbiq.queued);
1867 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1868 dev->vbiq.timeout.data = (unsigned long)dev;
1869 init_timer(&dev->vbiq.timeout);
1870 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1871 MO_VID_DMACNTRL,0x88,0x00);
1872
1873 /* get irq */
1874 err = request_irq(pci_dev->irq, cx8800_irq,
1875 SA_SHIRQ | SA_INTERRUPT, core->name, dev);
1876 if (err < 0) {
1877 printk(KERN_ERR "%s: can't get IRQ %d\n",
1878 core->name,pci_dev->irq);
1879 goto fail_core;
1880 }
1881 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1882
1883 /* load and configure helper modules */
1884 if (TUNER_ABSENT != core->tuner_type)
1885 request_module("tuner");
1886 if (core->tda9887_conf)
1887 request_module("tda9887");
e52e98a7 1888
1da177e4
LT		 1889 /* register v4l devices */
1890 dev->video_dev = cx88_vdev_init(core,dev->pci,
1891 &cx8800_video_template,"video");
1892 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1893 video_nr[core->nr]);
1894 if (err < 0) {
1895 printk(KERN_INFO "%s: can't register video device\n",
1896 core->name);
1897 goto fail_unreg;
1898 }
1899 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1900 core->name,dev->video_dev->minor & 0x1f);
1901
1902 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1903 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1904 vbi_nr[core->nr]);
1905 if (err < 0) {
1906 printk(KERN_INFO "%s/0: can't register vbi device\n",
1907 core->name);
1908 goto fail_unreg;
1909 }
1910 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1911 core->name,dev->vbi_dev->minor & 0x1f);
1912
1913 if (core->has_radio) {
1914 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1915 &cx8800_radio_template,"radio");
1916 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1917 radio_nr[core->nr]);
1918 if (err < 0) {
1919 printk(KERN_INFO "%s/0: can't register radio device\n",
1920 core->name);
1921 goto fail_unreg;
1922 }
1923 printk(KERN_INFO "%s/0: registered device radio%d\n",
1924 core->name,dev->radio_dev->minor & 0x1f);
1925 }
1926
1927 /* everything worked */
1928 list_add_tail(&dev->devlist,&cx8800_devlist);
1929 pci_set_drvdata(pci_dev,dev);
1930
1931 /* initial device configuration */
e52e98a7
MCC		 1932 down(&core->lock);
1933 init_controls(core);
1934 cx88_set_tvnorm(core,tvnorms);
1935 video_mux(core,0);
1936 up(&core->lock);
1da177e4
LT		 1937
1938 /* start tvaudio thread */
1939 if (core->tuner_type != TUNER_ABSENT)
1940 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1941 return 0;
1942
1943fail_unreg:
1944 cx8800_unregister_video(dev);
1945 free_irq(pci_dev->irq, dev);
1946fail_core:
1947 cx88_core_put(core,dev->pci);
1948fail_free:
1949 kfree(dev);
1950 return err;
1951}
1952
1953static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1954{
4ac97914 1955 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1956 struct cx88_core *core = dev->core;
1da177e4
LT		 1957
1958 /* stop thread */
e52e98a7
MCC		 1959 if (core->kthread) {
1960 kthread_stop(core->kthread);
1961 core->kthread = NULL;
1da177e4
LT		 1962 }
1963
e52e98a7 1964 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1965 pci_disable_device(pci_dev);
1966
1967 /* unregister stuff */
1968
1969 free_irq(pci_dev->irq, dev);
1970 cx8800_unregister_video(dev);
1971 pci_set_drvdata(pci_dev, NULL);
1972
1973 /* free memory */
1974 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
1975 list_del(&dev->devlist);
e52e98a7 1976 cx88_core_put(core,dev->pci);
1da177e4
LT		 1977 kfree(dev);
1978}
1979
1980static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1981{
b45009b0 1982 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1983 struct cx88_core *core = dev->core;
1984
1985 /* stop video+vbi capture */
1986 spin_lock(&dev->slock);
1987 if (!list_empty(&dev->vidq.active)) {
1988 printk("%s: suspend video\n", core->name);
1989 stop_video_dma(dev);
1990 del_timer(&dev->vidq.timeout);
1991 }
1992 if (!list_empty(&dev->vbiq.active)) {
1993 printk("%s: suspend vbi\n", core->name);
1994 cx8800_stop_vbi_dma(dev);
1995 del_timer(&dev->vbiq.timeout);
1996 }
1997 spin_unlock(&dev->slock);
1998
1da177e4 1999 /* FIXME -- shutdown device */
e52e98a7 2000 cx88_shutdown(core);
1da177e4
LT		 2001
2002 pci_save_state(pci_dev);
2003 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2004 pci_disable_device(pci_dev);
2005 dev->state.disabled = 1;
2006 }
2007 return 0;
2008}
2009
2010static int cx8800_resume(struct pci_dev *pci_dev)
2011{
b45009b0 2012 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2013 struct cx88_core *core = dev->core;
08adb9e2 2014 int err;
1da177e4
LT		 2015
2016 if (dev->state.disabled) {
08adb9e2
MCC		 2017 err=pci_enable_device(pci_dev);
2018 if (err) {
2019 printk(KERN_ERR "%s: can't enable device\n",
2020 core->name);
2021 return err;
2022 }
2023
1da177e4
LT		 2024 dev->state.disabled = 0;
2025 }
08adb9e2
MCC		 2026 err= pci_set_power_state(pci_dev, PCI_D0);
2027 if (err) {
2028 printk(KERN_ERR "%s: can't enable device\n",
2029 core->name);
2030
2031 pci_disable_device(pci_dev);
2032 dev->state.disabled = 1;
2033
2034 return err;
2035 }
1da177e4
LT		 2036 pci_restore_state(pci_dev);
2037
1da177e4 2038 /* FIXME: re-initialize hardware */
e52e98a7 2039 cx88_reset(core);
1da177e4
LT		 2040
2041 /* restart video+vbi capture */
2042 spin_lock(&dev->slock);
2043 if (!list_empty(&dev->vidq.active)) {
2044 printk("%s: resume video\n", core->name);
2045 restart_video_queue(dev,&dev->vidq);
2046 }
2047 if (!list_empty(&dev->vbiq.active)) {
2048 printk("%s: resume vbi\n", core->name);
2049 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2050 }
2051 spin_unlock(&dev->slock);
2052
2053 return 0;
2054}
2055
2056/* ----------------------------------------------------------- */
2057
408b664a 2058static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2059 {
2060 .vendor = 0x14f1,
2061 .device = 0x8800,
b45009b0
MCC		 2062 .subvendor = PCI_ANY_ID,
2063 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2064 },{
2065 /* --- end of list --- */
2066 }
2067};
2068MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2069
2070static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2071 .name = "cx8800",
2072 .id_table = cx8800_pci_tbl,
2073 .probe = cx8800_initdev,
2074 .remove = __devexit_p(cx8800_finidev),
1da177e4
LT		 2075
2076 .suspend = cx8800_suspend,
2077 .resume = cx8800_resume,
2078};
2079
2080static int cx8800_init(void)
2081{
2082 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2083 (CX88_VERSION_CODE >> 16) & 0xff,
2084 (CX88_VERSION_CODE >> 8) & 0xff,
2085 CX88_VERSION_CODE & 0xff);
2086#ifdef SNAPSHOT
2087 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2088 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2089#endif
2090 return pci_register_driver(&cx8800_pci_driver);
2091}
2092
2093static void cx8800_fini(void)
2094{
2095 pci_unregister_driver(&cx8800_pci_driver);
2096}
2097
2098module_init(cx8800_init);
2099module_exit(cx8800_fini);
2100
e52e98a7
MCC		 2101EXPORT_SYMBOL(cx88_do_ioctl);
2102
1da177e4
LT		 2103/* ----------------------------------------------------------- */
2104/*
2105 * Local variables:
2106 * c-basic-offset: 8
2107 * End:
b45009b0 2108 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2109 */
Linux kernel - Deliverables
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