projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (5097): Convert cx8800 driver to video_ioctl2 handler
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
8d87cb9f 1
1da177e4 2/*
1da177e4
LT		 3 *
4 * device driver for Conexant 2388x based TV cards
5 * video4linux video interface
6 *
7 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
8d87cb9f
MCC		 9 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
10 * - Multituner support
11 * - video_ioctl2 conversion
12 * - PAL/M fixes
13 *
1da177e4
LT		 14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/list.h>
31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/kmod.h>
34#include <linux/kernel.h>
35#include <linux/slab.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/kthread.h>
39#include <asm/div64.h>
40
41#include "cx88.h"
5e453dc7 42#include <media/v4l2-common.h>
1da177e4 43
cd41e28e 44#ifdef CONFIG_VIDEO_V4L1_COMPAT
79436633
MCC		 45/* Include V4L1 specific functions. Should be removed soon */
46#include <linux/videodev.h>
cd41e28e 47#endif
79436633 48
1da177e4
LT		 49MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
50MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
51MODULE_LICENSE("GPL");
52
53/* ------------------------------------------------------------------ */
54
55static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
56static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
57static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
58
59module_param_array(video_nr, int, NULL, 0444);
60module_param_array(vbi_nr, int, NULL, 0444);
61module_param_array(radio_nr, int, NULL, 0444);
62
63MODULE_PARM_DESC(video_nr,"video device numbers");
64MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
65MODULE_PARM_DESC(radio_nr,"radio device numbers");
66
67static unsigned int video_debug = 0;
68module_param(video_debug,int,0644);
69MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
70
71static unsigned int irq_debug = 0;
72module_param(irq_debug,int,0644);
73MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
74
75static unsigned int vid_limit = 16;
76module_param(vid_limit,int,0644);
77MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
78
79#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 80 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 81
82/* ------------------------------------------------------------------ */
83
84static LIST_HEAD(cx8800_devlist);
85
86/* ------------------------------------------------------------------- */
87/* static data */
88
8d87cb9f 89static struct v4l2_tvnorm tvnorms[] = {
1da177e4
LT		 90 {
91 .name = "NTSC-M",
92 .id = V4L2_STD_NTSC_M,
1da177e4
LT		 93 },{
94 .name = "NTSC-JP",
95 .id = V4L2_STD_NTSC_M_JP,
1da177e4
LT		 96 },{
97 .name = "PAL-BG",
98 .id = V4L2_STD_PAL_BG,
1da177e4
LT		 99 },{
100 .name = "PAL-DK",
101 .id = V4L2_STD_PAL_DK,
1da177e4
LT		 102 },{
103 .name = "PAL-I",
104 .id = V4L2_STD_PAL_I,
4ac97914 105 },{
1da177e4
LT		 106 .name = "PAL-M",
107 .id = V4L2_STD_PAL_M,
1da177e4
LT		 108 },{
109 .name = "PAL-N",
110 .id = V4L2_STD_PAL_N,
1da177e4
LT		 111 },{
112 .name = "PAL-Nc",
113 .id = V4L2_STD_PAL_Nc,
1da177e4
LT		 114 },{
115 .name = "PAL-60",
116 .id = V4L2_STD_PAL_60,
1da177e4
LT		 117 },{
118 .name = "SECAM-L",
119 .id = V4L2_STD_SECAM_L,
1da177e4
LT		 120 },{
121 .name = "SECAM-DK",
122 .id = V4L2_STD_SECAM_DK,
8d87cb9f
MCC		 123 }
124};
125
126static struct v4l2_tvnorm radionorms[] = {
127 {
128 .name = "RADIO",
129 .id = 0,
1da177e4
LT		 130 }
131};
132
133static struct cx8800_fmt formats[] = {
134 {
135 .name = "8 bpp, gray",
136 .fourcc = V4L2_PIX_FMT_GREY,
137 .cxformat = ColorFormatY8,
138 .depth = 8,
139 .flags = FORMAT_FLAGS_PACKED,
140 },{
141 .name = "15 bpp RGB, le",
142 .fourcc = V4L2_PIX_FMT_RGB555,
143 .cxformat = ColorFormatRGB15,
144 .depth = 16,
145 .flags = FORMAT_FLAGS_PACKED,
146 },{
147 .name = "15 bpp RGB, be",
148 .fourcc = V4L2_PIX_FMT_RGB555X,
149 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
150 .depth = 16,
151 .flags = FORMAT_FLAGS_PACKED,
152 },{
153 .name = "16 bpp RGB, le",
154 .fourcc = V4L2_PIX_FMT_RGB565,
155 .cxformat = ColorFormatRGB16,
156 .depth = 16,
157 .flags = FORMAT_FLAGS_PACKED,
158 },{
159 .name = "16 bpp RGB, be",
160 .fourcc = V4L2_PIX_FMT_RGB565X,
161 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
162 .depth = 16,
163 .flags = FORMAT_FLAGS_PACKED,
164 },{
165 .name = "24 bpp RGB, le",
166 .fourcc = V4L2_PIX_FMT_BGR24,
167 .cxformat = ColorFormatRGB24,
168 .depth = 24,
169 .flags = FORMAT_FLAGS_PACKED,
170 },{
171 .name = "32 bpp RGB, le",
172 .fourcc = V4L2_PIX_FMT_BGR32,
173 .cxformat = ColorFormatRGB32,
174 .depth = 32,
175 .flags = FORMAT_FLAGS_PACKED,
176 },{
177 .name = "32 bpp RGB, be",
178 .fourcc = V4L2_PIX_FMT_RGB32,
179 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
180 .depth = 32,
181 .flags = FORMAT_FLAGS_PACKED,
182 },{
183 .name = "4:2:2, packed, YUYV",
184 .fourcc = V4L2_PIX_FMT_YUYV,
185 .cxformat = ColorFormatYUY2,
186 .depth = 16,
187 .flags = FORMAT_FLAGS_PACKED,
188 },{
189 .name = "4:2:2, packed, UYVY",
190 .fourcc = V4L2_PIX_FMT_UYVY,
191 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
192 .depth = 16,
193 .flags = FORMAT_FLAGS_PACKED,
194 },
195};
196
197static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
198{
199 unsigned int i;
200
201 for (i = 0; i < ARRAY_SIZE(formats); i++)
202 if (formats[i].fourcc == fourcc)
203 return formats+i;
204 return NULL;
205}
206
207/* ------------------------------------------------------------------- */
208
209static const struct v4l2_queryctrl no_ctl = {
210 .name = "42",
211 .flags = V4L2_CTRL_FLAG_DISABLED,
212};
213
214static struct cx88_ctrl cx8800_ctls[] = {
215 /* --- video --- */
216 {
217 .v = {
218 .id = V4L2_CID_BRIGHTNESS,
219 .name = "Brightness",
220 .minimum = 0x00,
221 .maximum = 0xff,
222 .step = 1,
9f9c907f 223 .default_value = 0x7f,
1da177e4
LT		 224 .type = V4L2_CTRL_TYPE_INTEGER,
225 },
226 .off = 128,
227 .reg = MO_CONTR_BRIGHT,
228 .mask = 0x00ff,
229 .shift = 0,
230 },{
231 .v = {
232 .id = V4L2_CID_CONTRAST,
233 .name = "Contrast",
234 .minimum = 0,
235 .maximum = 0xff,
236 .step = 1,
70f00044 237 .default_value = 0x3f,
1da177e4
LT		 238 .type = V4L2_CTRL_TYPE_INTEGER,
239 },
41ef7c1e 240 .off = 0,
1da177e4
LT		 241 .reg = MO_CONTR_BRIGHT,
242 .mask = 0xff00,
243 .shift = 8,
244 },{
245 .v = {
246 .id = V4L2_CID_HUE,
247 .name = "Hue",
248 .minimum = 0,
249 .maximum = 0xff,
250 .step = 1,
9f9c907f 251 .default_value = 0x7f,
1da177e4
LT		 252 .type = V4L2_CTRL_TYPE_INTEGER,
253 },
9ac4c158 254 .off = 128,
1da177e4
LT		 255 .reg = MO_HUE,
256 .mask = 0x00ff,
257 .shift = 0,
258 },{
259 /* strictly, this only describes only U saturation.
260 * V saturation is handled specially through code.
261 */
262 .v = {
263 .id = V4L2_CID_SATURATION,
264 .name = "Saturation",
265 .minimum = 0,
266 .maximum = 0xff,
267 .step = 1,
70f00044 268 .default_value = 0x7f,
1da177e4
LT		 269 .type = V4L2_CTRL_TYPE_INTEGER,
270 },
271 .off = 0,
272 .reg = MO_UV_SATURATION,
273 .mask = 0x00ff,
274 .shift = 0,
275 },{
276 /* --- audio --- */
277 .v = {
278 .id = V4L2_CID_AUDIO_MUTE,
279 .name = "Mute",
280 .minimum = 0,
281 .maximum = 1,
70f00044 282 .default_value = 1,
1da177e4
LT		 283 .type = V4L2_CTRL_TYPE_BOOLEAN,
284 },
285 .reg = AUD_VOL_CTL,
286 .sreg = SHADOW_AUD_VOL_CTL,
287 .mask = (1 << 6),
288 .shift = 6,
289 },{
290 .v = {
291 .id = V4L2_CID_AUDIO_VOLUME,
292 .name = "Volume",
293 .minimum = 0,
294 .maximum = 0x3f,
295 .step = 1,
9f9c907f 296 .default_value = 0x3f,
1da177e4
LT		 297 .type = V4L2_CTRL_TYPE_INTEGER,
298 },
299 .reg = AUD_VOL_CTL,
300 .sreg = SHADOW_AUD_VOL_CTL,
301 .mask = 0x3f,
302 .shift = 0,
303 },{
304 .v = {
305 .id = V4L2_CID_AUDIO_BALANCE,
306 .name = "Balance",
307 .minimum = 0,
308 .maximum = 0x7f,
309 .step = 1,
310 .default_value = 0x40,
311 .type = V4L2_CTRL_TYPE_INTEGER,
312 },
313 .reg = AUD_BAL_CTL,
314 .sreg = SHADOW_AUD_BAL_CTL,
315 .mask = 0x7f,
316 .shift = 0,
317 }
318};
408b664a 319static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 320
38a2713a
MK		 321const u32 cx88_user_ctrls[] = {
322 V4L2_CID_USER_CLASS,
323 V4L2_CID_BRIGHTNESS,
324 V4L2_CID_CONTRAST,
325 V4L2_CID_SATURATION,
326 V4L2_CID_HUE,
327 V4L2_CID_AUDIO_VOLUME,
328 V4L2_CID_AUDIO_BALANCE,
329 V4L2_CID_AUDIO_MUTE,
330 0
331};
332EXPORT_SYMBOL(cx88_user_ctrls);
333
334static const u32 *ctrl_classes[] = {
335 cx88_user_ctrls,
336 NULL
337};
338
339int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl)
340{
341 int i;
342
343 if (qctrl->id < V4L2_CID_BASE ||
344 qctrl->id >= V4L2_CID_LASTP1)
345 return -EINVAL;
346 for (i = 0; i < CX8800_CTLS; i++)
347 if (cx8800_ctls[i].v.id == qctrl->id)
348 break;
349 if (i == CX8800_CTLS) {
350 *qctrl = no_ctl;
351 return 0;
352 }
353 *qctrl = cx8800_ctls[i].v;
354 return 0;
355}
356EXPORT_SYMBOL(cx8800_ctrl_query);
357
1da177e4
LT		 358/* ------------------------------------------------------------------- */
359/* resource management */
360
361static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
362{
e52e98a7 363 struct cx88_core *core = dev->core;
1da177e4
LT		 364 if (fh->resources & bit)
365 /* have it already allocated */
366 return 1;
367
368 /* is it free? */
3593cab5 369 mutex_lock(&core->lock);
1da177e4
LT		 370 if (dev->resources & bit) {
371 /* no, someone else uses it */
3593cab5 372 mutex_unlock(&core->lock);
1da177e4
LT		 373 return 0;
374 }
375 /* it's free, grab it */
376 fh->resources |= bit;
377 dev->resources |= bit;
378 dprintk(1,"res: get %d\n",bit);
3593cab5 379 mutex_unlock(&core->lock);
1da177e4
LT		 380 return 1;
381}
382
383static
384int res_check(struct cx8800_fh *fh, unsigned int bit)
385{
386 return (fh->resources & bit);
387}
388
389static
390int res_locked(struct cx8800_dev *dev, unsigned int bit)
391{
392 return (dev->resources & bit);
393}
394
395static
396void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
397{
e52e98a7 398 struct cx88_core *core = dev->core;
ae24601b 399 BUG_ON((fh->resources & bits) != bits);
1da177e4 400
3593cab5 401 mutex_lock(&core->lock);
1da177e4
LT		 402 fh->resources &= ~bits;
403 dev->resources &= ~bits;
404 dprintk(1,"res: put %d\n",bits);
3593cab5 405 mutex_unlock(&core->lock);
1da177e4
LT		 406}
407
408/* ------------------------------------------------------------------ */
409
e52e98a7
MCC		 410/* static int video_mux(struct cx8800_dev *dev, unsigned int input) */
411static int video_mux(struct cx88_core *core, unsigned int input)
1da177e4 412{
e52e98a7 413 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 414
415 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
416 input, INPUT(input)->vmux,
417 INPUT(input)->gpio0,INPUT(input)->gpio1,
418 INPUT(input)->gpio2,INPUT(input)->gpio3);
e52e98a7 419 core->input = input;
1da177e4
LT		 420 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
421 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
422 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
423 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
424 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
425
426 switch (INPUT(input)->type) {
427 case CX88_VMUX_SVIDEO:
428 cx_set(MO_AFECFG_IO, 0x00000001);
429 cx_set(MO_INPUT_FORMAT, 0x00010010);
430 cx_set(MO_FILTER_EVEN, 0x00002020);
431 cx_set(MO_FILTER_ODD, 0x00002020);
432 break;
433 default:
434 cx_clear(MO_AFECFG_IO, 0x00000001);
435 cx_clear(MO_INPUT_FORMAT, 0x00010010);
436 cx_clear(MO_FILTER_EVEN, 0x00002020);
437 cx_clear(MO_FILTER_ODD, 0x00002020);
438 break;
439 }
f24546a9
MK		 440
441 if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) {
442 /* sets sound input from external adc */
443 if (INPUT(input)->extadc)
444 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
445 else
446 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
447 }
1da177e4
LT		 448 return 0;
449}
450
451/* ------------------------------------------------------------------ */
452
453static int start_video_dma(struct cx8800_dev *dev,
454 struct cx88_dmaqueue *q,
455 struct cx88_buffer *buf)
456{
457 struct cx88_core *core = dev->core;
458
459 /* setup fifo + format */
e52e98a7 460 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 461 buf->bpl, buf->risc.dma);
e52e98a7 462 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 463 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
464
465 /* reset counter */
466 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
467 q->count = 1;
468
469 /* enable irqs */
470 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
e52e98a7
MCC		 471
472 /* Enables corresponding bits at PCI_INT_STAT:
473 bits 0 to 4: video, audio, transport stream, VIP, Host
474 bit 7: timer
475 bits 8 and 9: DMA complete for: SRC, DST
476 bits 10 and 11: BERR signal asserted for RISC: RD, WR
477 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
478 */
1da177e4
LT		 479 cx_set(MO_VID_INTMSK, 0x0f0011);
480
481 /* enable capture */
482 cx_set(VID_CAPTURE_CONTROL,0x06);
483
484 /* start dma */
485 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 486 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 487
488 return 0;
489}
490
17bc98a4 491#ifdef CONFIG_PM
1da177e4
LT		 492static int stop_video_dma(struct cx8800_dev *dev)
493{
494 struct cx88_core *core = dev->core;
495
496 /* stop dma */
497 cx_clear(MO_VID_DMACNTRL, 0x11);
498
499 /* disable capture */
500 cx_clear(VID_CAPTURE_CONTROL,0x06);
501
502 /* disable irqs */
503 cx_clear(MO_PCI_INTMSK, 0x000001);
504 cx_clear(MO_VID_INTMSK, 0x0f0011);
505 return 0;
506}
17bc98a4 507#endif
1da177e4
LT		 508
509static int restart_video_queue(struct cx8800_dev *dev,
510 struct cx88_dmaqueue *q)
511{
e52e98a7 512 struct cx88_core *core = dev->core;
1da177e4
LT		 513 struct cx88_buffer *buf, *prev;
514 struct list_head *item;
515
516 if (!list_empty(&q->active)) {
4ac97914 517 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 518 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
519 buf, buf->vb.i);
520 start_video_dma(dev, q, buf);
521 list_for_each(item,&q->active) {
522 buf = list_entry(item, struct cx88_buffer, vb.queue);
523 buf->count = q->count++;
524 }
525 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
526 return 0;
527 }
528
529 prev = NULL;
530 for (;;) {
531 if (list_empty(&q->queued))
532 return 0;
4ac97914 533 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 534 if (NULL == prev) {
179e0917 535 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 536 start_video_dma(dev, q, buf);
537 buf->vb.state = STATE_ACTIVE;
538 buf->count = q->count++;
539 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
540 dprintk(2,"[%p/%d] restart_queue - first active\n",
541 buf,buf->vb.i);
542
543 } else if (prev->vb.width == buf->vb.width &&
544 prev->vb.height == buf->vb.height &&
545 prev->fmt == buf->fmt) {
179e0917 546 list_move_tail(&buf->vb.queue, &q->active);
1da177e4
LT		 547 buf->vb.state = STATE_ACTIVE;
548 buf->count = q->count++;
549 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
550 dprintk(2,"[%p/%d] restart_queue - move to active\n",
551 buf,buf->vb.i);
552 } else {
553 return 0;
554 }
555 prev = buf;
556 }
557}
558
559/* ------------------------------------------------------------------ */
560
561static int
562buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
563{
564 struct cx8800_fh *fh = q->priv_data;
565
566 *size = fh->fmt->depth*fh->width*fh->height >> 3;
567 if (0 == *count)
568 *count = 32;
569 while (*size * *count > vid_limit * 1024 * 1024)
570 (*count)--;
571 return 0;
572}
573
574static int
575buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
576 enum v4l2_field field)
577{
578 struct cx8800_fh *fh = q->priv_data;
579 struct cx8800_dev *dev = fh->dev;
e52e98a7 580 struct cx88_core *core = dev->core;
1da177e4
LT		 581 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
582 int rc, init_buffer = 0;
583
584 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 585 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
586 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 587 return -EINVAL;
588 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
589 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
590 return -EINVAL;
591
592 if (buf->fmt != fh->fmt ||
593 buf->vb.width != fh->width ||
594 buf->vb.height != fh->height ||
595 buf->vb.field != field) {
596 buf->fmt = fh->fmt;
597 buf->vb.width = fh->width;
598 buf->vb.height = fh->height;
599 buf->vb.field = field;
600 init_buffer = 1;
601 }
602
603 if (STATE_NEEDS_INIT == buf->vb.state) {
604 init_buffer = 1;
c7b0ac05 605 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 606 goto fail;
607 }
608
609 if (init_buffer) {
610 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
611 switch (buf->vb.field) {
612 case V4L2_FIELD_TOP:
613 cx88_risc_buffer(dev->pci, &buf->risc,
614 buf->vb.dma.sglist, 0, UNSET,
615 buf->bpl, 0, buf->vb.height);
616 break;
617 case V4L2_FIELD_BOTTOM:
618 cx88_risc_buffer(dev->pci, &buf->risc,
619 buf->vb.dma.sglist, UNSET, 0,
620 buf->bpl, 0, buf->vb.height);
621 break;
622 case V4L2_FIELD_INTERLACED:
623 cx88_risc_buffer(dev->pci, &buf->risc,
624 buf->vb.dma.sglist, 0, buf->bpl,
625 buf->bpl, buf->bpl,
626 buf->vb.height >> 1);
627 break;
628 case V4L2_FIELD_SEQ_TB:
629 cx88_risc_buffer(dev->pci, &buf->risc,
630 buf->vb.dma.sglist,
631 0, buf->bpl * (buf->vb.height >> 1),
632 buf->bpl, 0,
633 buf->vb.height >> 1);
634 break;
635 case V4L2_FIELD_SEQ_BT:
636 cx88_risc_buffer(dev->pci, &buf->risc,
637 buf->vb.dma.sglist,
638 buf->bpl * (buf->vb.height >> 1), 0,
639 buf->bpl, 0,
640 buf->vb.height >> 1);
641 break;
642 default:
643 BUG();
644 }
645 }
646 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
647 buf, buf->vb.i,
648 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
649 (unsigned long)buf->risc.dma);
650
651 buf->vb.state = STATE_PREPARED;
652 return 0;
653
654 fail:
c7b0ac05 655 cx88_free_buffer(q,buf);
1da177e4
LT		 656 return rc;
657}
658
659static void
660buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
661{
662 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
663 struct cx88_buffer *prev;
664 struct cx8800_fh *fh = vq->priv_data;
665 struct cx8800_dev *dev = fh->dev;
e52e98a7 666 struct cx88_core *core = dev->core;
1da177e4
LT		 667 struct cx88_dmaqueue *q = &dev->vidq;
668
669 /* add jump to stopper */
670 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
671 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
672
673 if (!list_empty(&q->queued)) {
674 list_add_tail(&buf->vb.queue,&q->queued);
675 buf->vb.state = STATE_QUEUED;
676 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
677 buf, buf->vb.i);
678
679 } else if (list_empty(&q->active)) {
680 list_add_tail(&buf->vb.queue,&q->active);
681 start_video_dma(dev, q, buf);
682 buf->vb.state = STATE_ACTIVE;
683 buf->count = q->count++;
684 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
685 dprintk(2,"[%p/%d] buffer_queue - first active\n",
686 buf, buf->vb.i);
687
688 } else {
689 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
690 if (prev->vb.width == buf->vb.width &&
691 prev->vb.height == buf->vb.height &&
692 prev->fmt == buf->fmt) {
693 list_add_tail(&buf->vb.queue,&q->active);
694 buf->vb.state = STATE_ACTIVE;
695 buf->count = q->count++;
696 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
697 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
698 buf, buf->vb.i);
699
700 } else {
701 list_add_tail(&buf->vb.queue,&q->queued);
702 buf->vb.state = STATE_QUEUED;
703 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
704 buf, buf->vb.i);
705 }
706 }
707}
708
709static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
710{
711 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 712
c7b0ac05 713 cx88_free_buffer(q,buf);
1da177e4
LT		 714}
715
408b664a 716static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 717 .buf_setup = buffer_setup,
718 .buf_prepare = buffer_prepare,
719 .buf_queue = buffer_queue,
720 .buf_release = buffer_release,
721};
722
723/* ------------------------------------------------------------------ */
724
1da177e4
LT		 725
726/* ------------------------------------------------------------------ */
727
728static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
729{
730 switch (fh->type) {
731 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
732 return &fh->vidq;
733 case V4L2_BUF_TYPE_VBI_CAPTURE:
734 return &fh->vbiq;
735 default:
736 BUG();
737 return NULL;
738 }
739}
740
741static int get_ressource(struct cx8800_fh *fh)
742{
743 switch (fh->type) {
744 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
745 return RESOURCE_VIDEO;
746 case V4L2_BUF_TYPE_VBI_CAPTURE:
747 return RESOURCE_VBI;
748 default:
749 BUG();
750 return 0;
751 }
752}
753
754static int video_open(struct inode *inode, struct file *file)
755{
756 int minor = iminor(inode);
757 struct cx8800_dev *h,*dev = NULL;
e52e98a7 758 struct cx88_core *core;
1da177e4
LT		 759 struct cx8800_fh *fh;
760 struct list_head *list;
761 enum v4l2_buf_type type = 0;
762 int radio = 0;
763
764 list_for_each(list,&cx8800_devlist) {
765 h = list_entry(list, struct cx8800_dev, devlist);
766 if (h->video_dev->minor == minor) {
767 dev = h;
768 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
769 }
770 if (h->vbi_dev->minor == minor) {
771 dev = h;
772 type = V4L2_BUF_TYPE_VBI_CAPTURE;
773 }
774 if (h->radio_dev &&
775 h->radio_dev->minor == minor) {
776 radio = 1;
777 dev = h;
778 }
779 }
780 if (NULL == dev)
781 return -ENODEV;
782
e52e98a7
MCC		 783 core = dev->core;
784
1da177e4
LT		 785 dprintk(1,"open minor=%d radio=%d type=%s\n",
786 minor,radio,v4l2_type_names[type]);
787
788 /* allocate + initialize per filehandle data */
7408187d 789 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 790 if (NULL == fh)
791 return -ENOMEM;
1da177e4
LT		 792 file->private_data = fh;
793 fh->dev = dev;
794 fh->radio = radio;
795 fh->type = type;
796 fh->width = 320;
797 fh->height = 240;
798 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
799
800 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
801 dev->pci, &dev->slock,
802 V4L2_BUF_TYPE_VIDEO_CAPTURE,
803 V4L2_FIELD_INTERLACED,
804 sizeof(struct cx88_buffer),
805 fh);
806 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
807 dev->pci, &dev->slock,
808 V4L2_BUF_TYPE_VBI_CAPTURE,
809 V4L2_FIELD_SEQ_TB,
810 sizeof(struct cx88_buffer),
811 fh);
812
813 if (fh->radio) {
1da177e4
LT		 814 int board = core->board;
815 dprintk(1,"video_open: setting radio device\n");
fd3113e8 816 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3);
1da177e4
LT		 817 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0);
818 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1);
819 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2);
e52e98a7 820 core->tvaudio = WW_FM;
1da177e4
LT		 821 cx88_set_tvaudio(core);
822 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 823 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 824 }
825
4ac97914 826 return 0;
1da177e4
LT		 827}
828
829static ssize_t
f9e7a020 830video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 831{
832 struct cx8800_fh *fh = file->private_data;
833
834 switch (fh->type) {
835 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
836 if (res_locked(fh->dev,RESOURCE_VIDEO))
837 return -EBUSY;
838 return videobuf_read_one(&fh->vidq, data, count, ppos,
839 file->f_flags & O_NONBLOCK);
840 case V4L2_BUF_TYPE_VBI_CAPTURE:
841 if (!res_get(fh->dev,fh,RESOURCE_VBI))
842 return -EBUSY;
843 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
844 file->f_flags & O_NONBLOCK);
845 default:
846 BUG();
847 return 0;
848 }
849}
850
851static unsigned int
852video_poll(struct file *file, struct poll_table_struct *wait)
853{
854 struct cx8800_fh *fh = file->private_data;
855 struct cx88_buffer *buf;
856
857 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
858 if (!res_get(fh->dev,fh,RESOURCE_VBI))
859 return POLLERR;
860 return videobuf_poll_stream(file, &fh->vbiq, wait);
861 }
862
863 if (res_check(fh,RESOURCE_VIDEO)) {
864 /* streaming capture */
865 if (list_empty(&fh->vidq.stream))
866 return POLLERR;
867 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
868 } else {
869 /* read() capture */
870 buf = (struct cx88_buffer*)fh->vidq.read_buf;
871 if (NULL == buf)
872 return POLLERR;
873 }
874 poll_wait(file, &buf->vb.done, wait);
875 if (buf->vb.state == STATE_DONE ||
876 buf->vb.state == STATE_ERROR)
877 return POLLIN|POLLRDNORM;
878 return 0;
879}
880
881static int video_release(struct inode *inode, struct file *file)
882{
883 struct cx8800_fh *fh = file->private_data;
884 struct cx8800_dev *dev = fh->dev;
885
886 /* turn off overlay */
887 if (res_check(fh, RESOURCE_OVERLAY)) {
888 /* FIXME */
889 res_free(dev,fh,RESOURCE_OVERLAY);
890 }
891
892 /* stop video capture */
893 if (res_check(fh, RESOURCE_VIDEO)) {
894 videobuf_queue_cancel(&fh->vidq);
895 res_free(dev,fh,RESOURCE_VIDEO);
896 }
897 if (fh->vidq.read_buf) {
898 buffer_release(&fh->vidq,fh->vidq.read_buf);
899 kfree(fh->vidq.read_buf);
900 }
901
902 /* stop vbi capture */
903 if (res_check(fh, RESOURCE_VBI)) {
904 if (fh->vbiq.streaming)
905 videobuf_streamoff(&fh->vbiq);
906 if (fh->vbiq.reading)
907 videobuf_read_stop(&fh->vbiq);
908 res_free(dev,fh,RESOURCE_VBI);
909 }
910
911 videobuf_mmap_free(&fh->vidq);
912 videobuf_mmap_free(&fh->vbiq);
913 file->private_data = NULL;
914 kfree(fh);
e52e98a7
MCC		 915
916 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
917
1da177e4
LT		 918 return 0;
919}
920
921static int
922video_mmap(struct file *file, struct vm_area_struct * vma)
923{
924 struct cx8800_fh *fh = file->private_data;
925
926 return videobuf_mmap_mapper(get_queue(fh), vma);
927}
928
929/* ------------------------------------------------------------------ */
8d87cb9f 930/* VIDEO CTRL IOCTLS */
1da177e4 931
8d87cb9f
MCC		 932static int vidioc_g_ctrl (struct file *file, void *priv,
933 struct v4l2_control *ctl)
1da177e4 934{
8d87cb9f
MCC		 935 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
936 struct cx88_ctrl *c = NULL;
1da177e4
LT		 937 u32 value;
938 int i;
939
940 for (i = 0; i < CX8800_CTLS; i++)
941 if (cx8800_ctls[i].v.id == ctl->id)
942 c = &cx8800_ctls[i];
8d87cb9f 943 if (unlikely(NULL == c))
1da177e4
LT		 944 return -EINVAL;
945
946 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
947 switch (ctl->id) {
948 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 949 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
950 : (0x7f - (value & 0x7f));
1da177e4
LT		 951 break;
952 case V4L2_CID_AUDIO_VOLUME:
953 ctl->value = 0x3f - (value & 0x3f);
954 break;
955 default:
956 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
957 break;
958 }
6457af5f
IP		 959 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
960 ctl->id, c->v.name, ctl->value, c->reg,
961 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 962 return 0;
963}
964
e52e98a7 965static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 966{
1da177e4 967 struct cx88_ctrl *c = NULL;
70f00044 968 u32 value,mask;
1da177e4 969 int i;
8d87cb9f 970
70f00044
MCC		 971 for (i = 0; i < CX8800_CTLS; i++) {
972 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 973 c = &cx8800_ctls[i];
70f00044
MCC		 974 }
975 }
8d87cb9f 976 if (unlikely(NULL == c))
1da177e4
LT		 977 return -EINVAL;
978
979 if (ctl->value < c->v.minimum)
e52e98a7 980 ctl->value = c->v.minimum;
1da177e4 981 if (ctl->value > c->v.maximum)
e52e98a7 982 ctl->value = c->v.maximum;
70f00044 983 mask=c->mask;
1da177e4
LT		 984 switch (ctl->id) {
985 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 986 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 987 break;
988 case V4L2_CID_AUDIO_VOLUME:
989 value = 0x3f - (ctl->value & 0x3f);
990 break;
991 case V4L2_CID_SATURATION:
992 /* special v_sat handling */
70f00044
MCC		 993
994 value = ((ctl->value - c->off) << c->shift) & c->mask;
995
996 if (core->tvnorm->id & V4L2_STD_SECAM) {
997 /* For SECAM, both U and V sat should be equal */
998 value=value<<8|value;
999 } else {
1000 /* Keeps U Saturation proportional to V Sat */
1001 value=(value*0x5a)/0x7f<<8|value;
1002 }
1003 mask=0xffff;
1004 break;
1da177e4
LT		 1005 default:
1006 value = ((ctl->value - c->off) << c->shift) & c->mask;
1007 break;
1008 }
6457af5f
IP		 1009 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1010 ctl->id, c->v.name, ctl->value, c->reg, value,
1011 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1012 if (c->sreg) {
70f00044 1013 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1014 } else {
70f00044 1015 cx_andor(c->reg, mask, value);
1da177e4
LT		 1016 }
1017 return 0;
1018}
1019
e52e98a7 1020static void init_controls(struct cx88_core *core)
1da177e4 1021{
70f00044
MCC		 1022 struct v4l2_control ctrl;
1023 int i;
1da177e4 1024
70f00044
MCC		 1025 for (i = 0; i < CX8800_CTLS; i++) {
1026 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1027 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1028
70f00044
MCC		 1029 set_control(core, &ctrl);
1030 }
1da177e4
LT		 1031}
1032
1033/* ------------------------------------------------------------------ */
8d87cb9f 1034/* VIDEO IOCTLS */
1da177e4 1035
8d87cb9f
MCC		 1036static int vidioc_g_fmt_cap (struct file *file, void *priv,
1037 struct v4l2_format *f)
1da177e4 1038{
8d87cb9f
MCC		 1039 struct cx8800_fh *fh = priv;
1040
1041 f->fmt.pix.width = fh->width;
1042 f->fmt.pix.height = fh->height;
1043 f->fmt.pix.field = fh->vidq.field;
1044 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1045 f->fmt.pix.bytesperline =
1046 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1047 f->fmt.pix.sizeimage =
1048 f->fmt.pix.height * f->fmt.pix.bytesperline;
1049 return 0;
1da177e4
LT		 1050}
1051
8d87cb9f
MCC		 1052static int vidioc_try_fmt_cap (struct file *file, void *priv,
1053 struct v4l2_format *f)
1da177e4 1054{
8d87cb9f
MCC		 1055 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1056 struct cx8800_fmt *fmt;
1057 enum v4l2_field field;
1058 unsigned int maxw, maxh;
e52e98a7 1059
8d87cb9f
MCC		 1060 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1061 if (NULL == fmt)
1062 return -EINVAL;
1da177e4 1063
8d87cb9f
MCC		 1064 field = f->fmt.pix.field;
1065 maxw = norm_maxw(core->tvnorm);
1066 maxh = norm_maxh(core->tvnorm);
1da177e4 1067
8d87cb9f
MCC		 1068 if (V4L2_FIELD_ANY == field) {
1069 field = (f->fmt.pix.height > maxh/2)
1070 ? V4L2_FIELD_INTERLACED
1071 : V4L2_FIELD_BOTTOM;
1da177e4 1072 }
8d87cb9f
MCC		 1073
1074 switch (field) {
1075 case V4L2_FIELD_TOP:
1076 case V4L2_FIELD_BOTTOM:
1077 maxh = maxh / 2;
1078 break;
1079 case V4L2_FIELD_INTERLACED:
1080 break;
1da177e4
LT		 1081 default:
1082 return -EINVAL;
1083 }
8d87cb9f
MCC		 1084
1085 f->fmt.pix.field = field;
1086 if (f->fmt.pix.height < 32)
1087 f->fmt.pix.height = 32;
1088 if (f->fmt.pix.height > maxh)
1089 f->fmt.pix.height = maxh;
1090 if (f->fmt.pix.width < 48)
1091 f->fmt.pix.width = 48;
1092 if (f->fmt.pix.width > maxw)
1093 f->fmt.pix.width = maxw;
1094 f->fmt.pix.width &= ~0x03;
1095 f->fmt.pix.bytesperline =
1096 (f->fmt.pix.width * fmt->depth) >> 3;
1097 f->fmt.pix.sizeimage =
1098 f->fmt.pix.height * f->fmt.pix.bytesperline;
1099
1100 return 0;
1da177e4
LT		 1101}
1102
8d87cb9f
MCC		 1103static int vidioc_s_fmt_cap (struct file *file, void *priv,
1104 struct v4l2_format *f)
1da177e4 1105{
8d87cb9f
MCC		 1106 struct cx8800_fh *fh = priv;
1107 int err = vidioc_try_fmt_cap (file,priv,f);
1108
1109 if (0 != err)
1110 return err;
1111 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1112 fh->width = f->fmt.pix.width;
1113 fh->height = f->fmt.pix.height;
1114 fh->vidq.field = f->fmt.pix.field;
1115 return 0;
1da177e4
LT		 1116}
1117
8d87cb9f
MCC		 1118static int vidioc_querycap (struct file *file, void *priv,
1119 struct v4l2_capability *cap)
1da177e4 1120{
8d87cb9f 1121 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1122 struct cx88_core *core = dev->core;
1da177e4 1123
8d87cb9f
MCC		 1124 strcpy(cap->driver, "cx8800");
1125 strlcpy(cap->card, cx88_boards[core->board].name,
1126 sizeof(cap->card));
1127 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1128 cap->version = CX88_VERSION_CODE;
1129 cap->capabilities =
1130 V4L2_CAP_VIDEO_CAPTURE |
1131 V4L2_CAP_READWRITE |
1132 V4L2_CAP_STREAMING |
1133 V4L2_CAP_VBI_CAPTURE;
1134 if (UNSET != core->tuner_type)
1135 cap->capabilities |= V4L2_CAP_TUNER;
1136 return 0;
1137}
e52e98a7 1138
8d87cb9f
MCC		 1139static int vidioc_enum_fmt_cap (struct file *file, void *priv,
1140 struct v4l2_fmtdesc *f)
1141{
1142 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1143 return -EINVAL;
1144
1145 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1146 f->pixelformat = formats[f->index].fourcc;
1147
1148 return 0;
1149}
1da177e4 1150
0dfa9abd 1151#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1152static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1153{
1154 struct cx8800_fh *fh = priv;
1155 struct videobuf_queue *q;
1156 struct v4l2_requestbuffers req;
1157 unsigned int i;
1158 int err;
1159
1160 q = get_queue(fh);
1161 memset(&req,0,sizeof(req));
1162 req.type = q->type;
1163 req.count = 8;
1164 req.memory = V4L2_MEMORY_MMAP;
1165 err = videobuf_reqbufs(q,&req);
1166 if (err < 0)
1167 return err;
1168
1169 mbuf->frames = req.count;
1170 mbuf->size = 0;
1171 for (i = 0; i < mbuf->frames; i++) {
1172 mbuf->offsets[i] = q->bufs[i]->boff;
1173 mbuf->size += q->bufs[i]->bsize;
e52e98a7 1174 }
8d87cb9f
MCC		 1175 return 0;
1176}
79436633 1177#endif
e52e98a7 1178
e52e98a7 1179
8d87cb9f
MCC		 1180static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1181{
1182 struct cx8800_fh *fh = priv;
1183 return (videobuf_reqbufs(get_queue(fh), p));
1184}
e52e98a7 1185
8d87cb9f
MCC		 1186static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1187{
1188 struct cx8800_fh *fh = priv;
1189 return (videobuf_querybuf(get_queue(fh), p));
1190}
e52e98a7 1191
8d87cb9f
MCC		 1192static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1193{
1194 struct cx8800_fh *fh = priv;
1195 return (videobuf_qbuf(get_queue(fh), p));
1196}
e52e98a7 1197
8d87cb9f
MCC		 1198static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1199{
1200 struct cx8800_fh *fh = priv;
1201 return (videobuf_dqbuf(get_queue(fh), p,
1202 file->f_flags & O_NONBLOCK));
1203}
e52e98a7 1204
8d87cb9f
MCC		 1205static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1206{
1207 struct cx8800_fh *fh = priv;
1208 struct cx8800_dev *dev = fh->dev;
1209
1210 if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
1211 return -EINVAL;
1212 if (unlikely(i != fh->type))
1213 return -EINVAL;
1214
1215 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1216 return -EBUSY;
1217 return videobuf_streamon(get_queue(fh));
1218}
1219
1220static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1221{
1222 struct cx8800_fh *fh = priv;
1223 struct cx8800_dev *dev = fh->dev;
1224 int err, res;
1225
1226 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1227 return -EINVAL;
1228 if (i != fh->type)
1229 return -EINVAL;
1230
1231 res = get_ressource(fh);
1232 err = videobuf_streamoff(get_queue(fh));
1233 if (err < 0)
1234 return err;
1235 res_free(dev,fh,res);
e52e98a7
MCC		 1236 return 0;
1237}
1238
8d87cb9f 1239static int vidioc_s_std (struct file *file, void *priv, unsigned int i)
e52e98a7 1240{
8d87cb9f 1241 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1242
8d87cb9f
MCC		 1243 mutex_lock(&core->lock);
1244 cx88_set_tvnorm(core,&tvnorms[i]);
1245 mutex_unlock(&core->lock);
1246 return 0;
1247}
1da177e4 1248
8d87cb9f
MCC		 1249/* only one input in this sample driver */
1250static int vidioc_enum_input (struct file *file, void *priv,
1251 struct v4l2_input *i)
1252{
1253 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1254
1255 static const char *iname[] = {
1256 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1257 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1258 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1259 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1260 [ CX88_VMUX_SVIDEO ] = "S-Video",
1261 [ CX88_VMUX_TELEVISION ] = "Television",
1262 [ CX88_VMUX_CABLE ] = "Cable TV",
1263 [ CX88_VMUX_DVB ] = "DVB",
1264 [ CX88_VMUX_DEBUG ] = "for debug only",
1265 };
1266 unsigned int n;
1da177e4 1267
8d87cb9f
MCC		 1268 n = i->index;
1269 if (n >= 4)
1270 return -EINVAL;
1271 if (0 == INPUT(n)->type)
1272 return -EINVAL;
1273 memset(i,0,sizeof(*i));
1274 i->index = n;
1275 i->type = V4L2_INPUT_TYPE_CAMERA;
1276 strcpy(i->name,iname[INPUT(n)->type]);
1277 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) ||
1278 (CX88_VMUX_CABLE == INPUT(n)->type))
1279 i->type = V4L2_INPUT_TYPE_TUNER;
1280 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1281 i->std |= tvnorms[n].id;
1282 return 0;
1283}
1da177e4 1284
8d87cb9f
MCC		 1285static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1286{
1287 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1288
8d87cb9f
MCC		 1289 *i = core->input;
1290 return 0;
1291}
1da177e4 1292
8d87cb9f
MCC		 1293static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1294{
1295 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1296
8d87cb9f
MCC		 1297 if (i >= 4)
1298 return -EINVAL;
1da177e4 1299
8d87cb9f
MCC		 1300 mutex_lock(&core->lock);
1301 cx88_newstation(core);
1302 video_mux(core,i);
1303 mutex_unlock(&core->lock);
1304 return 0;
1305}
1da177e4 1306
1da177e4 1307
1da177e4 1308
8d87cb9f
MCC		 1309static int vidioc_queryctrl (struct file *file, void *priv,
1310 struct v4l2_queryctrl *qctrl)
1311{
1312 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1313 if (unlikely(qctrl->id == 0))
1314 return -EINVAL;
1315 return cx8800_ctrl_query(qctrl);
1316}
1da177e4 1317
8d87cb9f
MCC		 1318static int vidioc_s_ctrl (struct file *file, void *priv,
1319 struct v4l2_control *ctl)
1320{
1321 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1322
8d87cb9f
MCC		 1323 return
1324 set_control(core,ctl);
1325}
1326
1327static int vidioc_g_tuner (struct file *file, void *priv,
1328 struct v4l2_tuner *t)
1329{
1330 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1331 u32 reg;
1da177e4 1332
8d87cb9f
MCC		 1333 if (unlikely(UNSET == core->tuner_type))
1334 return -EINVAL;
a82decf6 1335
8d87cb9f
MCC		 1336 strcpy(t->name, "Television");
1337 t->type = V4L2_TUNER_ANALOG_TV;
1338 t->capability = V4L2_TUNER_CAP_NORM;
1339 t->rangehigh = 0xffffffffUL;
a82decf6 1340
8d87cb9f
MCC		 1341 cx88_get_stereo(core ,t);
1342 reg = cx_read(MO_DEVICE_STATUS);
1343 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1344 return 0;
1345}
41ef7c1e 1346
8d87cb9f
MCC		 1347static int vidioc_s_tuner (struct file *file, void *priv,
1348 struct v4l2_tuner *t)
1349{
1350 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1351
8d87cb9f
MCC		 1352 if (UNSET == core->tuner_type)
1353 return -EINVAL;
1354 if (0 != t->index)
1355 return -EINVAL;
c5287ba1 1356
8d87cb9f
MCC		 1357 cx88_set_stereo(core, t->audmode, 1);
1358 return 0;
1359}
902fc997 1360
8d87cb9f
MCC		 1361static int vidioc_g_frequency (struct file *file, void *priv,
1362 struct v4l2_frequency *f)
1363{
1364 struct cx8800_fh *fh = priv;
1365 struct cx88_core *core = fh->dev->core;
902fc997 1366
8d87cb9f
MCC		 1367 if (unlikely(UNSET == core->tuner_type))
1368 return -EINVAL;
1369
1370 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1371 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1372 f->frequency = core->freq;
1373
1374 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
1da177e4 1375
1da177e4
LT		 1376 return 0;
1377}
1378
8d87cb9f
MCC		 1379static int vidioc_s_frequency (struct file *file, void *priv,
1380 struct v4l2_frequency *f)
1da177e4 1381{
8d87cb9f
MCC		 1382 struct cx8800_fh *fh = priv;
1383 struct cx88_core *core = fh->dev->core;
c7b0ac05 1384
8d87cb9f
MCC		 1385 if (unlikely(UNSET == core->tuner_type))
1386 return -EINVAL;
1387 if (unlikely(f->tuner != 0))
1388 return -EINVAL;
1389 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1390 return -EINVAL;
1391 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1392 return -EINVAL;
1393 mutex_lock(&core->lock);
1394 core->freq = f->frequency;
1395 cx88_newstation(core);
1396 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c7b0ac05 1397
8d87cb9f
MCC		 1398 /* When changing channels it is required to reset TVAUDIO */
1399 msleep (10);
1400 cx88_set_tvaudio(core);
c7b0ac05 1401
8d87cb9f
MCC		 1402 mutex_unlock(&core->lock);
1403 return 0;
1da177e4
LT		 1404}
1405
8d87cb9f
MCC		 1406
1407/* ----------------------------------------------------------- */
1408/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1409/* ----------------------------------------------------------- */
1410
8d87cb9f
MCC		 1411static int radio_querycap (struct file *file, void *priv,
1412 struct v4l2_capability *cap)
1da177e4 1413{
8d87cb9f 1414 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1415 struct cx88_core *core = dev->core;
1416
8d87cb9f
MCC		 1417 strcpy(cap->driver, "cx8800");
1418 strlcpy(cap->card, cx88_boards[core->board].name,
1419 sizeof(cap->card));
1420 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1421 cap->version = CX88_VERSION_CODE;
1422 cap->capabilities = V4L2_CAP_TUNER;
1423 return 0;
1424}
1da177e4 1425
8d87cb9f
MCC		 1426static int radio_g_tuner (struct file *file, void *priv,
1427 struct v4l2_tuner *t)
1428{
1429 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1430
8d87cb9f
MCC		 1431 if (unlikely(t->index > 0))
1432 return -EINVAL;
1da177e4 1433
8d87cb9f
MCC		 1434 strcpy(t->name, "Radio");
1435 t->type = V4L2_TUNER_RADIO;
1da177e4 1436
8d87cb9f
MCC		 1437 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1438 return 0;
1439}
1da177e4 1440
8d87cb9f
MCC		 1441static int radio_enum_input (struct file *file, void *priv,
1442 struct v4l2_input *i)
1443{
1444 if (i->index != 0)
1445 return -EINVAL;
1446 strcpy(i->name,"Radio");
1447 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1448
8d87cb9f
MCC		 1449 return 0;
1450}
a82decf6 1451
8d87cb9f
MCC		 1452static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1453{
1454 if (unlikely(a->index))
1455 return -EINVAL;
a82decf6 1456
8d87cb9f
MCC		 1457 memset(a,0,sizeof(*a));
1458 strcpy(a->name,"Radio");
1459 return 0;
1460}
a82decf6 1461
8d87cb9f 1462/* FIXME: Should add a standard for radio */
a82decf6 1463
8d87cb9f
MCC		 1464static int radio_s_tuner (struct file *file, void *priv,
1465 struct v4l2_tuner *t)
1466{
1467 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1468
8d87cb9f
MCC		 1469 if (0 != t->index)
1470 return -EINVAL;
1da177e4 1471
8d87cb9f 1472 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
1da177e4 1473
8d87cb9f
MCC		 1474 return 0;
1475}
1da177e4 1476
8d87cb9f
MCC		 1477static int radio_s_audio (struct file *file, void *fh,
1478 struct v4l2_audio *a)
1479{
1480 return 0;
1481}
1da177e4 1482
8d87cb9f
MCC		 1483static int radio_s_input (struct file *file, void *fh, unsigned int i)
1484{
1da177e4 1485 return 0;
8d87cb9f 1486}
1da177e4 1487
8d87cb9f
MCC		 1488static int radio_queryctrl (struct file *file, void *priv,
1489 struct v4l2_queryctrl *c)
1da177e4 1490{
8d87cb9f
MCC		 1491 int i;
1492
1493 if (c->id < V4L2_CID_BASE ||
1494 c->id >= V4L2_CID_LASTP1)
1495 return -EINVAL;
1496 if (c->id == V4L2_CID_AUDIO_MUTE) {
1497 for (i = 0; i < CX8800_CTLS; i++)
1498 if (cx8800_ctls[i].v.id == c->id)
1499 break;
1500 *c = cx8800_ctls[i].v;
1501 } else
1502 *c = no_ctl;
1503 return 0;
1504}
1da177e4
LT		 1505
1506/* ----------------------------------------------------------- */
1507
1508static void cx8800_vid_timeout(unsigned long data)
1509{
1510 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1511 struct cx88_core *core = dev->core;
1512 struct cx88_dmaqueue *q = &dev->vidq;
1513 struct cx88_buffer *buf;
1514 unsigned long flags;
1515
e52e98a7 1516 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1517
1518 cx_clear(MO_VID_DMACNTRL, 0x11);
1519 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1520
1521 spin_lock_irqsave(&dev->slock,flags);
1522 while (!list_empty(&q->active)) {
1523 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1524 list_del(&buf->vb.queue);
1525 buf->vb.state = STATE_ERROR;
1526 wake_up(&buf->vb.done);
1527 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1528 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1529 }
1530 restart_video_queue(dev,q);
1531 spin_unlock_irqrestore(&dev->slock,flags);
1532}
1533
41ef7c1e
MCC		 1534static char *cx88_vid_irqs[32] = {
1535 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1536 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1537 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1538 "y_sync", "u_sync", "v_sync", "vbi_sync",
1539 "opc_err", "par_err", "rip_err", "pci_abort",
1540};
1541
1da177e4
LT		 1542static void cx8800_vid_irq(struct cx8800_dev *dev)
1543{
1544 struct cx88_core *core = dev->core;
1545 u32 status, mask, count;
1546
1547 status = cx_read(MO_VID_INTSTAT);
1548 mask = cx_read(MO_VID_INTMSK);
1549 if (0 == (status & mask))
1550 return;
1551 cx_write(MO_VID_INTSTAT, status);
1552 if (irq_debug || (status & mask & ~0xff))
1553 cx88_print_irqbits(core->name, "irq vid",
1554 cx88_vid_irqs, status, mask);
1555
1556 /* risc op code error */
1557 if (status & (1 << 16)) {
1558 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1559 cx_clear(MO_VID_DMACNTRL, 0x11);
1560 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1561 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1562 }
1563
1564 /* risc1 y */
1565 if (status & 0x01) {
1566 spin_lock(&dev->slock);
1567 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1568 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1569 spin_unlock(&dev->slock);
1570 }
1571
1572 /* risc1 vbi */
1573 if (status & 0x08) {
1574 spin_lock(&dev->slock);
1575 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1576 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1577 spin_unlock(&dev->slock);
1578 }
1579
1580 /* risc2 y */
1581 if (status & 0x10) {
1582 dprintk(2,"stopper video\n");
1583 spin_lock(&dev->slock);
1584 restart_video_queue(dev,&dev->vidq);
1585 spin_unlock(&dev->slock);
1586 }
1587
1588 /* risc2 vbi */
1589 if (status & 0x80) {
1590 dprintk(2,"stopper vbi\n");
1591 spin_lock(&dev->slock);
1592 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1593 spin_unlock(&dev->slock);
1594 }
1595}
1596
7d12e780 1597static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1598{
1599 struct cx8800_dev *dev = dev_id;
1600 struct cx88_core *core = dev->core;
1601 u32 status;
1602 int loop, handled = 0;
1603
1604 for (loop = 0; loop < 10; loop++) {
1605 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
1606 if (0 == status)
1607 goto out;
1608 cx_write(MO_PCI_INTSTAT, status);
1609 handled = 1;
1610
1611 if (status & core->pci_irqmask)
1612 cx88_core_irq(core,status);
1613 if (status & 0x01)
1614 cx8800_vid_irq(dev);
1615 };
1616 if (10 == loop) {
1617 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1618 core->name);
1619 cx_write(MO_PCI_INTMSK,0);
1620 }
1621
1622 out:
1623 return IRQ_RETVAL(handled);
1624}
1625
1626/* ----------------------------------------------------------- */
1627/* exported stuff */
1628
fa027c2a 1629static const struct file_operations video_fops =
1da177e4
LT		 1630{
1631 .owner = THIS_MODULE,
1632 .open = video_open,
1633 .release = video_release,
1634 .read = video_read,
1635 .poll = video_poll,
1636 .mmap = video_mmap,
8d87cb9f 1637 .ioctl = video_ioctl2,
0d0fbf81 1638 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1639 .llseek = no_llseek,
1640};
1641
8d87cb9f 1642static struct video_device cx8800_vbi_template;
408b664a 1643static struct video_device cx8800_video_template =
1da177e4 1644{
8d87cb9f
MCC		 1645 .name = "cx8800-video",
1646 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1647 .fops = &video_fops,
1648 .minor = -1,
1649 .vidioc_querycap = vidioc_querycap,
1650 .vidioc_enum_fmt_cap = vidioc_enum_fmt_cap,
1651 .vidioc_g_fmt_cap = vidioc_g_fmt_cap,
1652 .vidioc_try_fmt_cap = vidioc_try_fmt_cap,
1653 .vidioc_s_fmt_cap = vidioc_s_fmt_cap,
1654 .vidioc_g_fmt_vbi = cx8800_vbi_fmt,
1655 .vidioc_try_fmt_vbi = cx8800_vbi_fmt,
1656 .vidioc_s_fmt_vbi = cx8800_vbi_fmt,
1657 .vidioc_reqbufs = vidioc_reqbufs,
1658 .vidioc_querybuf = vidioc_querybuf,
1659 .vidioc_qbuf = vidioc_qbuf,
1660 .vidioc_dqbuf = vidioc_dqbuf,
1661 .vidioc_s_std = vidioc_s_std,
1662 .vidioc_enum_input = vidioc_enum_input,
1663 .vidioc_g_input = vidioc_g_input,
1664 .vidioc_s_input = vidioc_s_input,
1665 .vidioc_queryctrl = vidioc_queryctrl,
1666 .vidioc_g_ctrl = vidioc_g_ctrl,
1667 .vidioc_s_ctrl = vidioc_s_ctrl,
1668 .vidioc_streamon = vidioc_streamon,
1669 .vidioc_streamoff = vidioc_streamoff,
1670#ifdef CONFIG_VIDEO_V4L1_COMPAT
1671 .vidiocgmbuf = vidiocgmbuf,
1672#endif
1673 .vidioc_g_tuner = vidioc_g_tuner,
1674 .vidioc_s_tuner = vidioc_s_tuner,
1675 .vidioc_g_frequency = vidioc_g_frequency,
1676 .vidioc_s_frequency = vidioc_s_frequency,
1677 .tvnorms = tvnorms,
1678 .tvnormsize = ARRAY_SIZE(tvnorms),
1da177e4
LT		 1679};
1680
fa027c2a 1681static const struct file_operations radio_fops =
1da177e4
LT		 1682{
1683 .owner = THIS_MODULE,
1684 .open = video_open,
1685 .release = video_release,
8d87cb9f 1686 .ioctl = video_ioctl2,
0d0fbf81 1687 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1688 .llseek = no_llseek,
1689};
1690
408b664a 1691static struct video_device cx8800_radio_template =
1da177e4 1692{
8d87cb9f
MCC		 1693 .name = "cx8800-radio",
1694 .type = VID_TYPE_TUNER,
1695 .hardware = 0,
1696 .fops = &radio_fops,
1697 .minor = -1,
1698 .vidioc_querycap = radio_querycap,
1699 .vidioc_g_tuner = radio_g_tuner,
1700 .vidioc_enum_input = radio_enum_input,
1701 .vidioc_g_audio = radio_g_audio,
1702 .vidioc_s_tuner = radio_s_tuner,
1703 .vidioc_s_audio = radio_s_audio,
1704 .vidioc_s_input = radio_s_input,
1705 .vidioc_queryctrl = radio_queryctrl,
1706 .vidioc_g_ctrl = vidioc_g_ctrl,
1707 .vidioc_s_ctrl = vidioc_s_ctrl,
1708 .vidioc_g_frequency = vidioc_g_frequency,
1709 .vidioc_s_frequency = vidioc_s_frequency,
1710 .tvnorms = radionorms,
1711 .tvnormsize = ARRAY_SIZE(radionorms),
1da177e4
LT		 1712};
1713
1714/* ----------------------------------------------------------- */
1715
1716static void cx8800_unregister_video(struct cx8800_dev *dev)
1717{
1718 if (dev->radio_dev) {
1719 if (-1 != dev->radio_dev->minor)
1720 video_unregister_device(dev->radio_dev);
1721 else
1722 video_device_release(dev->radio_dev);
1723 dev->radio_dev = NULL;
1724 }
1725 if (dev->vbi_dev) {
1726 if (-1 != dev->vbi_dev->minor)
1727 video_unregister_device(dev->vbi_dev);
1728 else
1729 video_device_release(dev->vbi_dev);
1730 dev->vbi_dev = NULL;
1731 }
1732 if (dev->video_dev) {
1733 if (-1 != dev->video_dev->minor)
1734 video_unregister_device(dev->video_dev);
1735 else
1736 video_device_release(dev->video_dev);
1737 dev->video_dev = NULL;
1738 }
1739}
1740
1741static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1742 const struct pci_device_id *pci_id)
1743{
1744 struct cx8800_dev *dev;
1745 struct cx88_core *core;
8d87cb9f 1746
1da177e4
LT		 1747 int err;
1748
7408187d 1749 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1750 if (NULL == dev)
1751 return -ENOMEM;
1da177e4
LT		 1752
1753 /* pci init */
1754 dev->pci = pci_dev;
1755 if (pci_enable_device(pci_dev)) {
1756 err = -EIO;
1757 goto fail_free;
1758 }
1759 core = cx88_core_get(dev->pci);
1760 if (NULL == core) {
1761 err = -EINVAL;
1762 goto fail_free;
1763 }
1764 dev->core = core;
1765
1766 /* print pci info */
1767 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1768 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1769 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1770 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1771 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1772 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1773
1774 pci_set_master(pci_dev);
1775 if (!pci_dma_supported(pci_dev,0xffffffff)) {
1776 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1777 err = -EIO;
1778 goto fail_core;
1779 }
1780
8d87cb9f
MCC		 1781 /* Initialize VBI template */
1782 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1783 sizeof(cx8800_vbi_template) );
1784 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
1785 cx8800_vbi_template.type = VID_TYPE_TELETEXT|VID_TYPE_TUNER;
1786
1da177e4 1787 /* initialize driver struct */
1da177e4
LT		 1788 spin_lock_init(&dev->slock);
1789 core->tvnorm = tvnorms;
1790
1791 /* init video dma queues */
1792 INIT_LIST_HEAD(&dev->vidq.active);
1793 INIT_LIST_HEAD(&dev->vidq.queued);
1794 dev->vidq.timeout.function = cx8800_vid_timeout;
1795 dev->vidq.timeout.data = (unsigned long)dev;
1796 init_timer(&dev->vidq.timeout);
1797 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1798 MO_VID_DMACNTRL,0x11,0x00);
1799
1800 /* init vbi dma queues */
1801 INIT_LIST_HEAD(&dev->vbiq.active);
1802 INIT_LIST_HEAD(&dev->vbiq.queued);
1803 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1804 dev->vbiq.timeout.data = (unsigned long)dev;
1805 init_timer(&dev->vbiq.timeout);
1806 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1807 MO_VID_DMACNTRL,0x88,0x00);
1808
1809 /* get irq */
1810 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1811 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4
LT		 1812 if (err < 0) {
1813 printk(KERN_ERR "%s: can't get IRQ %d\n",
1814 core->name,pci_dev->irq);
1815 goto fail_core;
1816 }
1817 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1818
1819 /* load and configure helper modules */
1820 if (TUNER_ABSENT != core->tuner_type)
1821 request_module("tuner");
e52e98a7 1822
3057906d
ST		 1823 if (cx88_boards[ core->board ].audio_chip == AUDIO_CHIP_WM8775)
1824 request_module("wm8775");
1825
1da177e4
LT		 1826 /* register v4l devices */
1827 dev->video_dev = cx88_vdev_init(core,dev->pci,
1828 &cx8800_video_template,"video");
1829 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1830 video_nr[core->nr]);
1831 if (err < 0) {
1832 printk(KERN_INFO "%s: can't register video device\n",
1833 core->name);
1834 goto fail_unreg;
1835 }
1836 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1837 core->name,dev->video_dev->minor & 0x1f);
1838
1839 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1840 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1841 vbi_nr[core->nr]);
1842 if (err < 0) {
1843 printk(KERN_INFO "%s/0: can't register vbi device\n",
1844 core->name);
1845 goto fail_unreg;
1846 }
1847 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1848 core->name,dev->vbi_dev->minor & 0x1f);
1849
1850 if (core->has_radio) {
1851 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1852 &cx8800_radio_template,"radio");
1853 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1854 radio_nr[core->nr]);
1855 if (err < 0) {
1856 printk(KERN_INFO "%s/0: can't register radio device\n",
1857 core->name);
1858 goto fail_unreg;
1859 }
1860 printk(KERN_INFO "%s/0: registered device radio%d\n",
1861 core->name,dev->radio_dev->minor & 0x1f);
1862 }
1863
1864 /* everything worked */
1865 list_add_tail(&dev->devlist,&cx8800_devlist);
1866 pci_set_drvdata(pci_dev,dev);
1867
1868 /* initial device configuration */
3593cab5 1869 mutex_lock(&core->lock);
e52e98a7 1870 cx88_set_tvnorm(core,tvnorms);
70f00044 1871 init_controls(core);
e52e98a7 1872 video_mux(core,0);
3593cab5 1873 mutex_unlock(&core->lock);
1da177e4
LT		 1874
1875 /* start tvaudio thread */
1876 if (core->tuner_type != TUNER_ABSENT)
1877 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1878 return 0;
1879
1880fail_unreg:
1881 cx8800_unregister_video(dev);
1882 free_irq(pci_dev->irq, dev);
1883fail_core:
1884 cx88_core_put(core,dev->pci);
1885fail_free:
1886 kfree(dev);
1887 return err;
1888}
1889
1890static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1891{
4ac97914 1892 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1893 struct cx88_core *core = dev->core;
1da177e4
LT		 1894
1895 /* stop thread */
e52e98a7
MCC		 1896 if (core->kthread) {
1897 kthread_stop(core->kthread);
1898 core->kthread = NULL;
1da177e4
LT		 1899 }
1900
e52e98a7 1901 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1902 pci_disable_device(pci_dev);
1903
1904 /* unregister stuff */
1905
1906 free_irq(pci_dev->irq, dev);
1907 cx8800_unregister_video(dev);
1908 pci_set_drvdata(pci_dev, NULL);
1909
1910 /* free memory */
1911 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
1912 list_del(&dev->devlist);
e52e98a7 1913 cx88_core_put(core,dev->pci);
1da177e4
LT		 1914 kfree(dev);
1915}
1916
17bc98a4 1917#ifdef CONFIG_PM
1da177e4
LT		 1918static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1919{
b45009b0 1920 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1921 struct cx88_core *core = dev->core;
1922
1923 /* stop video+vbi capture */
1924 spin_lock(&dev->slock);
1925 if (!list_empty(&dev->vidq.active)) {
1926 printk("%s: suspend video\n", core->name);
1927 stop_video_dma(dev);
1928 del_timer(&dev->vidq.timeout);
1929 }
1930 if (!list_empty(&dev->vbiq.active)) {
1931 printk("%s: suspend vbi\n", core->name);
1932 cx8800_stop_vbi_dma(dev);
1933 del_timer(&dev->vbiq.timeout);
1934 }
1935 spin_unlock(&dev->slock);
1936
1da177e4 1937 /* FIXME -- shutdown device */
e52e98a7 1938 cx88_shutdown(core);
1da177e4
LT		 1939
1940 pci_save_state(pci_dev);
1941 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
1942 pci_disable_device(pci_dev);
1943 dev->state.disabled = 1;
1944 }
1945 return 0;
1946}
1947
1948static int cx8800_resume(struct pci_dev *pci_dev)
1949{
b45009b0 1950 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 1951 struct cx88_core *core = dev->core;
08adb9e2 1952 int err;
1da177e4
LT		 1953
1954 if (dev->state.disabled) {
08adb9e2
MCC		 1955 err=pci_enable_device(pci_dev);
1956 if (err) {
1957 printk(KERN_ERR "%s: can't enable device\n",
1958 core->name);
1959 return err;
1960 }
1961
1da177e4
LT		 1962 dev->state.disabled = 0;
1963 }
08adb9e2
MCC		 1964 err= pci_set_power_state(pci_dev, PCI_D0);
1965 if (err) {
1966 printk(KERN_ERR "%s: can't enable device\n",
1967 core->name);
1968
1969 pci_disable_device(pci_dev);
1970 dev->state.disabled = 1;
1971
1972 return err;
1973 }
1da177e4
LT		 1974 pci_restore_state(pci_dev);
1975
1da177e4 1976 /* FIXME: re-initialize hardware */
e52e98a7 1977 cx88_reset(core);
1da177e4
LT		 1978
1979 /* restart video+vbi capture */
1980 spin_lock(&dev->slock);
1981 if (!list_empty(&dev->vidq.active)) {
1982 printk("%s: resume video\n", core->name);
1983 restart_video_queue(dev,&dev->vidq);
1984 }
1985 if (!list_empty(&dev->vbiq.active)) {
1986 printk("%s: resume vbi\n", core->name);
1987 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1988 }
1989 spin_unlock(&dev->slock);
1990
1991 return 0;
1992}
17bc98a4 1993#endif
1da177e4
LT		 1994
1995/* ----------------------------------------------------------- */
1996
408b664a 1997static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 1998 {
1999 .vendor = 0x14f1,
2000 .device = 0x8800,
b45009b0
MCC		 2001 .subvendor = PCI_ANY_ID,
2002 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2003 },{
2004 /* --- end of list --- */
2005 }
2006};
2007MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2008
2009static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2010 .name = "cx8800",
2011 .id_table = cx8800_pci_tbl,
2012 .probe = cx8800_initdev,
2013 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2014#ifdef CONFIG_PM
1da177e4
LT		 2015 .suspend = cx8800_suspend,
2016 .resume = cx8800_resume,
17bc98a4 2017#endif
1da177e4
LT		 2018};
2019
2020static int cx8800_init(void)
2021{
2022 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2023 (CX88_VERSION_CODE >> 16) & 0xff,
2024 (CX88_VERSION_CODE >> 8) & 0xff,
2025 CX88_VERSION_CODE & 0xff);
2026#ifdef SNAPSHOT
2027 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2028 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2029#endif
2030 return pci_register_driver(&cx8800_pci_driver);
2031}
2032
2033static void cx8800_fini(void)
2034{
2035 pci_unregister_driver(&cx8800_pci_driver);
2036}
2037
2038module_init(cx8800_init);
2039module_exit(cx8800_fini);
2040
e52e98a7
MCC		 2041EXPORT_SYMBOL(cx88_do_ioctl);
2042
1da177e4
LT		 2043/* ----------------------------------------------------------- */
2044/*
2045 * Local variables:
2046 * c-basic-offset: 8
2047 * End:
b45009b0 2048 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2049 */
Linux kernel - Deliverables
This page took 0.361312 seconds and 5 git commands to generate.