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V4L/DVB (3484): Make dvb_ringbuffer compatible to dmxdev_buffer
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kmod.h>
28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
32#include <linux/kthread.h>
33#include <asm/div64.h>
34
35#include "cx88.h"
5e453dc7 36#include <media/v4l2-common.h>
1da177e4 37
79436633
MCC		 38/* Include V4L1 specific functions. Should be removed soon */
39#include <linux/videodev.h>
40
1da177e4
LT		 41MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
42MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
43MODULE_LICENSE("GPL");
44
45/* ------------------------------------------------------------------ */
46
47static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
48static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
49static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
50
51module_param_array(video_nr, int, NULL, 0444);
52module_param_array(vbi_nr, int, NULL, 0444);
53module_param_array(radio_nr, int, NULL, 0444);
54
55MODULE_PARM_DESC(video_nr,"video device numbers");
56MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
57MODULE_PARM_DESC(radio_nr,"radio device numbers");
58
59static unsigned int video_debug = 0;
60module_param(video_debug,int,0644);
61MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
62
63static unsigned int irq_debug = 0;
64module_param(irq_debug,int,0644);
65MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
66
67static unsigned int vid_limit = 16;
68module_param(vid_limit,int,0644);
69MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
70
71#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 72 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 73
74/* ------------------------------------------------------------------ */
75
76static LIST_HEAD(cx8800_devlist);
77
78/* ------------------------------------------------------------------- */
79/* static data */
80
81static struct cx88_tvnorm tvnorms[] = {
82 {
83 .name = "NTSC-M",
84 .id = V4L2_STD_NTSC_M,
85 .cxiformat = VideoFormatNTSC,
86 .cxoformat = 0x181f0008,
87 },{
88 .name = "NTSC-JP",
89 .id = V4L2_STD_NTSC_M_JP,
90 .cxiformat = VideoFormatNTSCJapan,
91 .cxoformat = 0x181f0008,
1da177e4
LT		 92 },{
93 .name = "PAL-BG",
94 .id = V4L2_STD_PAL_BG,
95 .cxiformat = VideoFormatPAL,
96 .cxoformat = 0x181f0008,
97 },{
98 .name = "PAL-DK",
99 .id = V4L2_STD_PAL_DK,
100 .cxiformat = VideoFormatPAL,
101 .cxoformat = 0x181f0008,
102 },{
103 .name = "PAL-I",
104 .id = V4L2_STD_PAL_I,
105 .cxiformat = VideoFormatPAL,
106 .cxoformat = 0x181f0008,
4ac97914 107 },{
1da177e4
LT		 108 .name = "PAL-M",
109 .id = V4L2_STD_PAL_M,
110 .cxiformat = VideoFormatPALM,
111 .cxoformat = 0x1c1f0008,
112 },{
113 .name = "PAL-N",
114 .id = V4L2_STD_PAL_N,
115 .cxiformat = VideoFormatPALN,
116 .cxoformat = 0x1c1f0008,
117 },{
118 .name = "PAL-Nc",
119 .id = V4L2_STD_PAL_Nc,
120 .cxiformat = VideoFormatPALNC,
121 .cxoformat = 0x1c1f0008,
122 },{
123 .name = "PAL-60",
124 .id = V4L2_STD_PAL_60,
125 .cxiformat = VideoFormatPAL60,
126 .cxoformat = 0x181f0008,
127 },{
128 .name = "SECAM-L",
129 .id = V4L2_STD_SECAM_L,
130 .cxiformat = VideoFormatSECAM,
131 .cxoformat = 0x181f0008,
132 },{
133 .name = "SECAM-DK",
134 .id = V4L2_STD_SECAM_DK,
135 .cxiformat = VideoFormatSECAM,
136 .cxoformat = 0x181f0008,
137 }
138};
139
140static struct cx8800_fmt formats[] = {
141 {
142 .name = "8 bpp, gray",
143 .fourcc = V4L2_PIX_FMT_GREY,
144 .cxformat = ColorFormatY8,
145 .depth = 8,
146 .flags = FORMAT_FLAGS_PACKED,
147 },{
148 .name = "15 bpp RGB, le",
149 .fourcc = V4L2_PIX_FMT_RGB555,
150 .cxformat = ColorFormatRGB15,
151 .depth = 16,
152 .flags = FORMAT_FLAGS_PACKED,
153 },{
154 .name = "15 bpp RGB, be",
155 .fourcc = V4L2_PIX_FMT_RGB555X,
156 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
157 .depth = 16,
158 .flags = FORMAT_FLAGS_PACKED,
159 },{
160 .name = "16 bpp RGB, le",
161 .fourcc = V4L2_PIX_FMT_RGB565,
162 .cxformat = ColorFormatRGB16,
163 .depth = 16,
164 .flags = FORMAT_FLAGS_PACKED,
165 },{
166 .name = "16 bpp RGB, be",
167 .fourcc = V4L2_PIX_FMT_RGB565X,
168 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
169 .depth = 16,
170 .flags = FORMAT_FLAGS_PACKED,
171 },{
172 .name = "24 bpp RGB, le",
173 .fourcc = V4L2_PIX_FMT_BGR24,
174 .cxformat = ColorFormatRGB24,
175 .depth = 24,
176 .flags = FORMAT_FLAGS_PACKED,
177 },{
178 .name = "32 bpp RGB, le",
179 .fourcc = V4L2_PIX_FMT_BGR32,
180 .cxformat = ColorFormatRGB32,
181 .depth = 32,
182 .flags = FORMAT_FLAGS_PACKED,
183 },{
184 .name = "32 bpp RGB, be",
185 .fourcc = V4L2_PIX_FMT_RGB32,
186 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
187 .depth = 32,
188 .flags = FORMAT_FLAGS_PACKED,
189 },{
190 .name = "4:2:2, packed, YUYV",
191 .fourcc = V4L2_PIX_FMT_YUYV,
192 .cxformat = ColorFormatYUY2,
193 .depth = 16,
194 .flags = FORMAT_FLAGS_PACKED,
195 },{
196 .name = "4:2:2, packed, UYVY",
197 .fourcc = V4L2_PIX_FMT_UYVY,
198 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
199 .depth = 16,
200 .flags = FORMAT_FLAGS_PACKED,
201 },
202};
203
204static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
205{
206 unsigned int i;
207
208 for (i = 0; i < ARRAY_SIZE(formats); i++)
209 if (formats[i].fourcc == fourcc)
210 return formats+i;
211 return NULL;
212}
213
214/* ------------------------------------------------------------------- */
215
216static const struct v4l2_queryctrl no_ctl = {
217 .name = "42",
218 .flags = V4L2_CTRL_FLAG_DISABLED,
219};
220
221static struct cx88_ctrl cx8800_ctls[] = {
222 /* --- video --- */
223 {
224 .v = {
225 .id = V4L2_CID_BRIGHTNESS,
226 .name = "Brightness",
227 .minimum = 0x00,
228 .maximum = 0xff,
229 .step = 1,
9f9c907f 230 .default_value = 0x7f,
1da177e4
LT		 231 .type = V4L2_CTRL_TYPE_INTEGER,
232 },
233 .off = 128,
234 .reg = MO_CONTR_BRIGHT,
235 .mask = 0x00ff,
236 .shift = 0,
237 },{
238 .v = {
239 .id = V4L2_CID_CONTRAST,
240 .name = "Contrast",
241 .minimum = 0,
242 .maximum = 0xff,
243 .step = 1,
70f00044 244 .default_value = 0x3f,
1da177e4
LT		 245 .type = V4L2_CTRL_TYPE_INTEGER,
246 },
41ef7c1e 247 .off = 0,
1da177e4
LT		 248 .reg = MO_CONTR_BRIGHT,
249 .mask = 0xff00,
250 .shift = 8,
251 },{
252 .v = {
253 .id = V4L2_CID_HUE,
254 .name = "Hue",
255 .minimum = 0,
256 .maximum = 0xff,
257 .step = 1,
9f9c907f 258 .default_value = 0x7f,
1da177e4
LT		 259 .type = V4L2_CTRL_TYPE_INTEGER,
260 },
9ac4c158 261 .off = 128,
1da177e4
LT		 262 .reg = MO_HUE,
263 .mask = 0x00ff,
264 .shift = 0,
265 },{
266 /* strictly, this only describes only U saturation.
267 * V saturation is handled specially through code.
268 */
269 .v = {
270 .id = V4L2_CID_SATURATION,
271 .name = "Saturation",
272 .minimum = 0,
273 .maximum = 0xff,
274 .step = 1,
70f00044 275 .default_value = 0x7f,
1da177e4
LT		 276 .type = V4L2_CTRL_TYPE_INTEGER,
277 },
278 .off = 0,
279 .reg = MO_UV_SATURATION,
280 .mask = 0x00ff,
281 .shift = 0,
282 },{
283 /* --- audio --- */
284 .v = {
285 .id = V4L2_CID_AUDIO_MUTE,
286 .name = "Mute",
287 .minimum = 0,
288 .maximum = 1,
70f00044 289 .default_value = 1,
1da177e4
LT		 290 .type = V4L2_CTRL_TYPE_BOOLEAN,
291 },
292 .reg = AUD_VOL_CTL,
293 .sreg = SHADOW_AUD_VOL_CTL,
294 .mask = (1 << 6),
295 .shift = 6,
296 },{
297 .v = {
298 .id = V4L2_CID_AUDIO_VOLUME,
299 .name = "Volume",
300 .minimum = 0,
301 .maximum = 0x3f,
302 .step = 1,
9f9c907f 303 .default_value = 0x3f,
1da177e4
LT		 304 .type = V4L2_CTRL_TYPE_INTEGER,
305 },
306 .reg = AUD_VOL_CTL,
307 .sreg = SHADOW_AUD_VOL_CTL,
308 .mask = 0x3f,
309 .shift = 0,
310 },{
311 .v = {
312 .id = V4L2_CID_AUDIO_BALANCE,
313 .name = "Balance",
314 .minimum = 0,
315 .maximum = 0x7f,
316 .step = 1,
317 .default_value = 0x40,
318 .type = V4L2_CTRL_TYPE_INTEGER,
319 },
320 .reg = AUD_BAL_CTL,
321 .sreg = SHADOW_AUD_BAL_CTL,
322 .mask = 0x7f,
323 .shift = 0,
324 }
325};
408b664a 326static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4
LT		 327
328/* ------------------------------------------------------------------- */
329/* resource management */
330
331static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
332{
e52e98a7 333 struct cx88_core *core = dev->core;
1da177e4
LT		 334 if (fh->resources & bit)
335 /* have it already allocated */
336 return 1;
337
338 /* is it free? */
3593cab5 339 mutex_lock(&core->lock);
1da177e4
LT		 340 if (dev->resources & bit) {
341 /* no, someone else uses it */
3593cab5 342 mutex_unlock(&core->lock);
1da177e4
LT		 343 return 0;
344 }
345 /* it's free, grab it */
346 fh->resources |= bit;
347 dev->resources |= bit;
348 dprintk(1,"res: get %d\n",bit);
3593cab5 349 mutex_unlock(&core->lock);
1da177e4
LT		 350 return 1;
351}
352
353static
354int res_check(struct cx8800_fh *fh, unsigned int bit)
355{
356 return (fh->resources & bit);
357}
358
359static
360int res_locked(struct cx8800_dev *dev, unsigned int bit)
361{
362 return (dev->resources & bit);
363}
364
365static
366void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
367{
e52e98a7 368 struct cx88_core *core = dev->core;
1da177e4
LT		 369 if ((fh->resources & bits) != bits)
370 BUG();
371
3593cab5 372 mutex_lock(&core->lock);
1da177e4
LT		 373 fh->resources &= ~bits;
374 dev->resources &= ~bits;
375 dprintk(1,"res: put %d\n",bits);
3593cab5 376 mutex_unlock(&core->lock);
1da177e4
LT		 377}
378
379/* ------------------------------------------------------------------ */
380
e52e98a7
MCC		 381/* static int video_mux(struct cx8800_dev *dev, unsigned int input) */
382static int video_mux(struct cx88_core *core, unsigned int input)
1da177e4 383{
e52e98a7 384 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 385
386 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
387 input, INPUT(input)->vmux,
388 INPUT(input)->gpio0,INPUT(input)->gpio1,
389 INPUT(input)->gpio2,INPUT(input)->gpio3);
e52e98a7 390 core->input = input;
1da177e4
LT		 391 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
392 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
393 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
394 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
395 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
396
397 switch (INPUT(input)->type) {
398 case CX88_VMUX_SVIDEO:
399 cx_set(MO_AFECFG_IO, 0x00000001);
400 cx_set(MO_INPUT_FORMAT, 0x00010010);
401 cx_set(MO_FILTER_EVEN, 0x00002020);
402 cx_set(MO_FILTER_ODD, 0x00002020);
403 break;
404 default:
405 cx_clear(MO_AFECFG_IO, 0x00000001);
406 cx_clear(MO_INPUT_FORMAT, 0x00010010);
407 cx_clear(MO_FILTER_EVEN, 0x00002020);
408 cx_clear(MO_FILTER_ODD, 0x00002020);
409 break;
410 }
411 return 0;
412}
413
414/* ------------------------------------------------------------------ */
415
416static int start_video_dma(struct cx8800_dev *dev,
417 struct cx88_dmaqueue *q,
418 struct cx88_buffer *buf)
419{
420 struct cx88_core *core = dev->core;
421
422 /* setup fifo + format */
e52e98a7 423 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 424 buf->bpl, buf->risc.dma);
e52e98a7 425 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 426 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
427
428 /* reset counter */
429 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
430 q->count = 1;
431
432 /* enable irqs */
433 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01);
e52e98a7
MCC		 434
435 /* Enables corresponding bits at PCI_INT_STAT:
436 bits 0 to 4: video, audio, transport stream, VIP, Host
437 bit 7: timer
438 bits 8 and 9: DMA complete for: SRC, DST
439 bits 10 and 11: BERR signal asserted for RISC: RD, WR
440 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
441 */
1da177e4
LT		 442 cx_set(MO_VID_INTMSK, 0x0f0011);
443
444 /* enable capture */
445 cx_set(VID_CAPTURE_CONTROL,0x06);
446
447 /* start dma */
448 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 449 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 450
451 return 0;
452}
453
454static int stop_video_dma(struct cx8800_dev *dev)
455{
456 struct cx88_core *core = dev->core;
457
458 /* stop dma */
459 cx_clear(MO_VID_DMACNTRL, 0x11);
460
461 /* disable capture */
462 cx_clear(VID_CAPTURE_CONTROL,0x06);
463
464 /* disable irqs */
465 cx_clear(MO_PCI_INTMSK, 0x000001);
466 cx_clear(MO_VID_INTMSK, 0x0f0011);
467 return 0;
468}
469
470static int restart_video_queue(struct cx8800_dev *dev,
471 struct cx88_dmaqueue *q)
472{
e52e98a7 473 struct cx88_core *core = dev->core;
1da177e4
LT		 474 struct cx88_buffer *buf, *prev;
475 struct list_head *item;
476
477 if (!list_empty(&q->active)) {
4ac97914 478 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 479 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
480 buf, buf->vb.i);
481 start_video_dma(dev, q, buf);
482 list_for_each(item,&q->active) {
483 buf = list_entry(item, struct cx88_buffer, vb.queue);
484 buf->count = q->count++;
485 }
486 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
487 return 0;
488 }
489
490 prev = NULL;
491 for (;;) {
492 if (list_empty(&q->queued))
493 return 0;
4ac97914 494 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 495 if (NULL == prev) {
496 list_del(&buf->vb.queue);
497 list_add_tail(&buf->vb.queue,&q->active);
498 start_video_dma(dev, q, buf);
499 buf->vb.state = STATE_ACTIVE;
500 buf->count = q->count++;
501 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
502 dprintk(2,"[%p/%d] restart_queue - first active\n",
503 buf,buf->vb.i);
504
505 } else if (prev->vb.width == buf->vb.width &&
506 prev->vb.height == buf->vb.height &&
507 prev->fmt == buf->fmt) {
508 list_del(&buf->vb.queue);
509 list_add_tail(&buf->vb.queue,&q->active);
510 buf->vb.state = STATE_ACTIVE;
511 buf->count = q->count++;
512 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
513 dprintk(2,"[%p/%d] restart_queue - move to active\n",
514 buf,buf->vb.i);
515 } else {
516 return 0;
517 }
518 prev = buf;
519 }
520}
521
522/* ------------------------------------------------------------------ */
523
524static int
525buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
526{
527 struct cx8800_fh *fh = q->priv_data;
528
529 *size = fh->fmt->depth*fh->width*fh->height >> 3;
530 if (0 == *count)
531 *count = 32;
532 while (*size * *count > vid_limit * 1024 * 1024)
533 (*count)--;
534 return 0;
535}
536
537static int
538buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
539 enum v4l2_field field)
540{
541 struct cx8800_fh *fh = q->priv_data;
542 struct cx8800_dev *dev = fh->dev;
e52e98a7 543 struct cx88_core *core = dev->core;
1da177e4
LT		 544 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
545 int rc, init_buffer = 0;
546
547 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 548 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
549 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 550 return -EINVAL;
551 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
552 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
553 return -EINVAL;
554
555 if (buf->fmt != fh->fmt ||
556 buf->vb.width != fh->width ||
557 buf->vb.height != fh->height ||
558 buf->vb.field != field) {
559 buf->fmt = fh->fmt;
560 buf->vb.width = fh->width;
561 buf->vb.height = fh->height;
562 buf->vb.field = field;
563 init_buffer = 1;
564 }
565
566 if (STATE_NEEDS_INIT == buf->vb.state) {
567 init_buffer = 1;
568 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL)))
569 goto fail;
570 }
571
572 if (init_buffer) {
573 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
574 switch (buf->vb.field) {
575 case V4L2_FIELD_TOP:
576 cx88_risc_buffer(dev->pci, &buf->risc,
577 buf->vb.dma.sglist, 0, UNSET,
578 buf->bpl, 0, buf->vb.height);
579 break;
580 case V4L2_FIELD_BOTTOM:
581 cx88_risc_buffer(dev->pci, &buf->risc,
582 buf->vb.dma.sglist, UNSET, 0,
583 buf->bpl, 0, buf->vb.height);
584 break;
585 case V4L2_FIELD_INTERLACED:
586 cx88_risc_buffer(dev->pci, &buf->risc,
587 buf->vb.dma.sglist, 0, buf->bpl,
588 buf->bpl, buf->bpl,
589 buf->vb.height >> 1);
590 break;
591 case V4L2_FIELD_SEQ_TB:
592 cx88_risc_buffer(dev->pci, &buf->risc,
593 buf->vb.dma.sglist,
594 0, buf->bpl * (buf->vb.height >> 1),
595 buf->bpl, 0,
596 buf->vb.height >> 1);
597 break;
598 case V4L2_FIELD_SEQ_BT:
599 cx88_risc_buffer(dev->pci, &buf->risc,
600 buf->vb.dma.sglist,
601 buf->bpl * (buf->vb.height >> 1), 0,
602 buf->bpl, 0,
603 buf->vb.height >> 1);
604 break;
605 default:
606 BUG();
607 }
608 }
609 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
610 buf, buf->vb.i,
611 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
612 (unsigned long)buf->risc.dma);
613
614 buf->vb.state = STATE_PREPARED;
615 return 0;
616
617 fail:
618 cx88_free_buffer(dev->pci,buf);
619 return rc;
620}
621
622static void
623buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
624{
625 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
626 struct cx88_buffer *prev;
627 struct cx8800_fh *fh = vq->priv_data;
628 struct cx8800_dev *dev = fh->dev;
e52e98a7 629 struct cx88_core *core = dev->core;
1da177e4
LT		 630 struct cx88_dmaqueue *q = &dev->vidq;
631
632 /* add jump to stopper */
633 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
634 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
635
636 if (!list_empty(&q->queued)) {
637 list_add_tail(&buf->vb.queue,&q->queued);
638 buf->vb.state = STATE_QUEUED;
639 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
640 buf, buf->vb.i);
641
642 } else if (list_empty(&q->active)) {
643 list_add_tail(&buf->vb.queue,&q->active);
644 start_video_dma(dev, q, buf);
645 buf->vb.state = STATE_ACTIVE;
646 buf->count = q->count++;
647 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
648 dprintk(2,"[%p/%d] buffer_queue - first active\n",
649 buf, buf->vb.i);
650
651 } else {
652 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
653 if (prev->vb.width == buf->vb.width &&
654 prev->vb.height == buf->vb.height &&
655 prev->fmt == buf->fmt) {
656 list_add_tail(&buf->vb.queue,&q->active);
657 buf->vb.state = STATE_ACTIVE;
658 buf->count = q->count++;
659 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
660 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
661 buf, buf->vb.i);
662
663 } else {
664 list_add_tail(&buf->vb.queue,&q->queued);
665 buf->vb.state = STATE_QUEUED;
666 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
667 buf, buf->vb.i);
668 }
669 }
670}
671
672static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
673{
674 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
675 struct cx8800_fh *fh = q->priv_data;
676
677 cx88_free_buffer(fh->dev->pci,buf);
678}
679
408b664a 680static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 681 .buf_setup = buffer_setup,
682 .buf_prepare = buffer_prepare,
683 .buf_queue = buffer_queue,
684 .buf_release = buffer_release,
685};
686
687/* ------------------------------------------------------------------ */
688
1da177e4
LT		 689
690/* ------------------------------------------------------------------ */
691
692static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
693{
694 switch (fh->type) {
695 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
696 return &fh->vidq;
697 case V4L2_BUF_TYPE_VBI_CAPTURE:
698 return &fh->vbiq;
699 default:
700 BUG();
701 return NULL;
702 }
703}
704
705static int get_ressource(struct cx8800_fh *fh)
706{
707 switch (fh->type) {
708 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
709 return RESOURCE_VIDEO;
710 case V4L2_BUF_TYPE_VBI_CAPTURE:
711 return RESOURCE_VBI;
712 default:
713 BUG();
714 return 0;
715 }
716}
717
718static int video_open(struct inode *inode, struct file *file)
719{
720 int minor = iminor(inode);
721 struct cx8800_dev *h,*dev = NULL;
e52e98a7 722 struct cx88_core *core;
1da177e4
LT		 723 struct cx8800_fh *fh;
724 struct list_head *list;
725 enum v4l2_buf_type type = 0;
726 int radio = 0;
727
728 list_for_each(list,&cx8800_devlist) {
729 h = list_entry(list, struct cx8800_dev, devlist);
730 if (h->video_dev->minor == minor) {
731 dev = h;
732 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
733 }
734 if (h->vbi_dev->minor == minor) {
735 dev = h;
736 type = V4L2_BUF_TYPE_VBI_CAPTURE;
737 }
738 if (h->radio_dev &&
739 h->radio_dev->minor == minor) {
740 radio = 1;
741 dev = h;
742 }
743 }
744 if (NULL == dev)
745 return -ENODEV;
746
e52e98a7
MCC		 747 core = dev->core;
748
1da177e4
LT		 749 dprintk(1,"open minor=%d radio=%d type=%s\n",
750 minor,radio,v4l2_type_names[type]);
751
752 /* allocate + initialize per filehandle data */
7408187d 753 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
1da177e4
LT		 754 if (NULL == fh)
755 return -ENOMEM;
1da177e4
LT		 756 file->private_data = fh;
757 fh->dev = dev;
758 fh->radio = radio;
759 fh->type = type;
760 fh->width = 320;
761 fh->height = 240;
762 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
763
764 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
765 dev->pci, &dev->slock,
766 V4L2_BUF_TYPE_VIDEO_CAPTURE,
767 V4L2_FIELD_INTERLACED,
768 sizeof(struct cx88_buffer),
769 fh);
770 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
771 dev->pci, &dev->slock,
772 V4L2_BUF_TYPE_VBI_CAPTURE,
773 V4L2_FIELD_SEQ_TB,
774 sizeof(struct cx88_buffer),
775 fh);
776
777 if (fh->radio) {
1da177e4
LT		 778 int board = core->board;
779 dprintk(1,"video_open: setting radio device\n");
fd3113e8 780 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3);
1da177e4
LT		 781 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0);
782 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1);
783 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2);
e52e98a7 784 core->tvaudio = WW_FM;
1da177e4
LT		 785 cx88_set_tvaudio(core);
786 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
e52e98a7 787 cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL);
1da177e4
LT		 788 }
789
4ac97914 790 return 0;
1da177e4
LT		 791}
792
793static ssize_t
f9e7a020 794video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 795{
796 struct cx8800_fh *fh = file->private_data;
797
798 switch (fh->type) {
799 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
800 if (res_locked(fh->dev,RESOURCE_VIDEO))
801 return -EBUSY;
802 return videobuf_read_one(&fh->vidq, data, count, ppos,
803 file->f_flags & O_NONBLOCK);
804 case V4L2_BUF_TYPE_VBI_CAPTURE:
805 if (!res_get(fh->dev,fh,RESOURCE_VBI))
806 return -EBUSY;
807 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
808 file->f_flags & O_NONBLOCK);
809 default:
810 BUG();
811 return 0;
812 }
813}
814
815static unsigned int
816video_poll(struct file *file, struct poll_table_struct *wait)
817{
818 struct cx8800_fh *fh = file->private_data;
819 struct cx88_buffer *buf;
820
821 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
822 if (!res_get(fh->dev,fh,RESOURCE_VBI))
823 return POLLERR;
824 return videobuf_poll_stream(file, &fh->vbiq, wait);
825 }
826
827 if (res_check(fh,RESOURCE_VIDEO)) {
828 /* streaming capture */
829 if (list_empty(&fh->vidq.stream))
830 return POLLERR;
831 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
832 } else {
833 /* read() capture */
834 buf = (struct cx88_buffer*)fh->vidq.read_buf;
835 if (NULL == buf)
836 return POLLERR;
837 }
838 poll_wait(file, &buf->vb.done, wait);
839 if (buf->vb.state == STATE_DONE ||
840 buf->vb.state == STATE_ERROR)
841 return POLLIN|POLLRDNORM;
842 return 0;
843}
844
845static int video_release(struct inode *inode, struct file *file)
846{
847 struct cx8800_fh *fh = file->private_data;
848 struct cx8800_dev *dev = fh->dev;
849
850 /* turn off overlay */
851 if (res_check(fh, RESOURCE_OVERLAY)) {
852 /* FIXME */
853 res_free(dev,fh,RESOURCE_OVERLAY);
854 }
855
856 /* stop video capture */
857 if (res_check(fh, RESOURCE_VIDEO)) {
858 videobuf_queue_cancel(&fh->vidq);
859 res_free(dev,fh,RESOURCE_VIDEO);
860 }
861 if (fh->vidq.read_buf) {
862 buffer_release(&fh->vidq,fh->vidq.read_buf);
863 kfree(fh->vidq.read_buf);
864 }
865
866 /* stop vbi capture */
867 if (res_check(fh, RESOURCE_VBI)) {
868 if (fh->vbiq.streaming)
869 videobuf_streamoff(&fh->vbiq);
870 if (fh->vbiq.reading)
871 videobuf_read_stop(&fh->vbiq);
872 res_free(dev,fh,RESOURCE_VBI);
873 }
874
875 videobuf_mmap_free(&fh->vidq);
876 videobuf_mmap_free(&fh->vbiq);
877 file->private_data = NULL;
878 kfree(fh);
e52e98a7
MCC		 879
880 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
881
1da177e4
LT		 882 return 0;
883}
884
885static int
886video_mmap(struct file *file, struct vm_area_struct * vma)
887{
888 struct cx8800_fh *fh = file->private_data;
889
890 return videobuf_mmap_mapper(get_queue(fh), vma);
891}
892
893/* ------------------------------------------------------------------ */
894
e52e98a7
MCC		 895/* static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
896static int get_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 897{
e52e98a7 898 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 899 struct cx88_ctrl *c = NULL;
900 u32 value;
901 int i;
902
903 for (i = 0; i < CX8800_CTLS; i++)
904 if (cx8800_ctls[i].v.id == ctl->id)
905 c = &cx8800_ctls[i];
906 if (NULL == c)
907 return -EINVAL;
908
909 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
910 switch (ctl->id) {
911 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 912 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
913 : (0x7f - (value & 0x7f));
1da177e4
LT		 914 break;
915 case V4L2_CID_AUDIO_VOLUME:
916 ctl->value = 0x3f - (value & 0x3f);
917 break;
918 default:
919 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
920 break;
921 }
6457af5f
IP		 922 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
923 ctl->id, c->v.name, ctl->value, c->reg,
924 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 925 return 0;
926}
927
e52e98a7
MCC		 928/* static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl) */
929static int set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 930{
e52e98a7 931 /* struct cx88_core *core = dev->core; */
1da177e4 932 struct cx88_ctrl *c = NULL;
70f00044 933 u32 value,mask;
1da177e4 934 int i;
70f00044
MCC		 935 for (i = 0; i < CX8800_CTLS; i++) {
936 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 937 c = &cx8800_ctls[i];
70f00044
MCC		 938 }
939 }
1da177e4
LT		 940 if (NULL == c)
941 return -EINVAL;
942
943 if (ctl->value < c->v.minimum)
e52e98a7 944 ctl->value = c->v.minimum;
1da177e4 945 if (ctl->value > c->v.maximum)
e52e98a7 946 ctl->value = c->v.maximum;
70f00044 947 mask=c->mask;
1da177e4
LT		 948 switch (ctl->id) {
949 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 950 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 951 break;
952 case V4L2_CID_AUDIO_VOLUME:
953 value = 0x3f - (ctl->value & 0x3f);
954 break;
955 case V4L2_CID_SATURATION:
956 /* special v_sat handling */
70f00044
MCC		 957
958 value = ((ctl->value - c->off) << c->shift) & c->mask;
959
960 if (core->tvnorm->id & V4L2_STD_SECAM) {
961 /* For SECAM, both U and V sat should be equal */
962 value=value<<8|value;
963 } else {
964 /* Keeps U Saturation proportional to V Sat */
965 value=(value*0x5a)/0x7f<<8|value;
966 }
967 mask=0xffff;
968 break;
1da177e4
LT		 969 default:
970 value = ((ctl->value - c->off) << c->shift) & c->mask;
971 break;
972 }
6457af5f
IP		 973 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
974 ctl->id, c->v.name, ctl->value, c->reg, value,
975 mask, c->sreg ? " [shadowed]" : "");
1da177e4 976 if (c->sreg) {
70f00044 977 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 978 } else {
70f00044 979 cx_andor(c->reg, mask, value);
1da177e4
LT		 980 }
981 return 0;
982}
983
e52e98a7 984static void init_controls(struct cx88_core *core)
1da177e4 985{
70f00044
MCC		 986 struct v4l2_control ctrl;
987 int i;
1da177e4 988
70f00044
MCC		 989 for (i = 0; i < CX8800_CTLS; i++) {
990 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 991 ctrl.value=cx8800_ctls[i].v.default_value;
70f00044
MCC		 992 set_control(core, &ctrl);
993 }
1da177e4
LT		 994}
995
996/* ------------------------------------------------------------------ */
997
998static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
999 struct v4l2_format *f)
1000{
1001 switch (f->type) {
1002 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1003 memset(&f->fmt.pix,0,sizeof(f->fmt.pix));
1004 f->fmt.pix.width = fh->width;
1005 f->fmt.pix.height = fh->height;
1006 f->fmt.pix.field = fh->vidq.field;
1007 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1008 f->fmt.pix.bytesperline =
1009 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1010 f->fmt.pix.sizeimage =
1011 f->fmt.pix.height * f->fmt.pix.bytesperline;
1012 return 0;
1013 case V4L2_BUF_TYPE_VBI_CAPTURE:
1014 cx8800_vbi_fmt(dev, f);
1015 return 0;
1016 default:
1017 return -EINVAL;
1018 }
1019}
1020
1021static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1022 struct v4l2_format *f)
1023{
e52e98a7
MCC		 1024 struct cx88_core *core = dev->core;
1025
1da177e4
LT		 1026 switch (f->type) {
1027 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1028 {
1029 struct cx8800_fmt *fmt;
1030 enum v4l2_field field;
1031 unsigned int maxw, maxh;
1032
1033 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1034 if (NULL == fmt)
1035 return -EINVAL;
1036
1037 field = f->fmt.pix.field;
e52e98a7
MCC		 1038 maxw = norm_maxw(core->tvnorm);
1039 maxh = norm_maxh(core->tvnorm);
1da177e4
LT		 1040
1041 if (V4L2_FIELD_ANY == field) {
1042 field = (f->fmt.pix.height > maxh/2)
1043 ? V4L2_FIELD_INTERLACED
1044 : V4L2_FIELD_BOTTOM;
1045 }
1046
1047 switch (field) {
1048 case V4L2_FIELD_TOP:
1049 case V4L2_FIELD_BOTTOM:
1050 maxh = maxh / 2;
1051 break;
1052 case V4L2_FIELD_INTERLACED:
1053 break;
1054 default:
1055 return -EINVAL;
1056 }
1057
1058 f->fmt.pix.field = field;
1059 if (f->fmt.pix.height < 32)
1060 f->fmt.pix.height = 32;
1061 if (f->fmt.pix.height > maxh)
1062 f->fmt.pix.height = maxh;
1063 if (f->fmt.pix.width < 48)
1064 f->fmt.pix.width = 48;
1065 if (f->fmt.pix.width > maxw)
1066 f->fmt.pix.width = maxw;
1067 f->fmt.pix.width &= ~0x03;
1068 f->fmt.pix.bytesperline =
1069 (f->fmt.pix.width * fmt->depth) >> 3;
1070 f->fmt.pix.sizeimage =
1071 f->fmt.pix.height * f->fmt.pix.bytesperline;
1072
1073 return 0;
1074 }
1075 case V4L2_BUF_TYPE_VBI_CAPTURE:
1076 cx8800_vbi_fmt(dev, f);
1077 return 0;
1078 default:
1079 return -EINVAL;
1080 }
1081}
1082
1083static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1084 struct v4l2_format *f)
1085{
1086 int err;
1087
1088 switch (f->type) {
1089 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1090 err = cx8800_try_fmt(dev,fh,f);
1091 if (0 != err)
1092 return err;
1093
1094 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1095 fh->width = f->fmt.pix.width;
1096 fh->height = f->fmt.pix.height;
1097 fh->vidq.field = f->fmt.pix.field;
1098 return 0;
1099 case V4L2_BUF_TYPE_VBI_CAPTURE:
1100 cx8800_vbi_fmt(dev, f);
1101 return 0;
1102 default:
1103 return -EINVAL;
1104 }
1105}
1106
1107/*
1108 * This function is _not_ called directly, but from
1109 * video_generic_ioctl (and maybe others). userspace
1110 * copying is done already, arg is a kernel pointer.
1111 */
1112static int video_do_ioctl(struct inode *inode, struct file *file,
1113 unsigned int cmd, void *arg)
1114{
1115 struct cx8800_fh *fh = file->private_data;
1116 struct cx8800_dev *dev = fh->dev;
1117 struct cx88_core *core = dev->core;
1da177e4
LT		 1118 int err;
1119
1120 if (video_debug > 1)
5e453dc7 1121 v4l_print_ioctl(core->name,cmd);
1da177e4 1122 switch (cmd) {
e52e98a7
MCC		 1123
1124 /* --- capabilities ------------------------------------------ */
1da177e4
LT		 1125 case VIDIOC_QUERYCAP:
1126 {
1127 struct v4l2_capability *cap = arg;
1128
1129 memset(cap,0,sizeof(*cap));
e52e98a7 1130 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1131 strlcpy(cap->card, cx88_boards[core->board].name,
1132 sizeof(cap->card));
1133 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1134 cap->version = CX88_VERSION_CODE;
1135 cap->capabilities =
1136 V4L2_CAP_VIDEO_CAPTURE |
1137 V4L2_CAP_READWRITE |
1138 V4L2_CAP_STREAMING |
1139 V4L2_CAP_VBI_CAPTURE |
e52e98a7 1140 V4L2_CAP_VIDEO_OVERLAY |
1da177e4
LT		 1141 0;
1142 if (UNSET != core->tuner_type)
1143 cap->capabilities |= V4L2_CAP_TUNER;
1144 return 0;
1145 }
1146
e52e98a7
MCC		 1147 /* --- capture ioctls ---------------------------------------- */
1148 case VIDIOC_ENUM_FMT:
1149 {
1150 struct v4l2_fmtdesc *f = arg;
1151 enum v4l2_buf_type type;
1152 unsigned int index;
1153
1154 index = f->index;
1155 type = f->type;
1156 switch (type) {
1157 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1158 if (index >= ARRAY_SIZE(formats))
1159 return -EINVAL;
1160 memset(f,0,sizeof(*f));
1161 f->index = index;
1162 f->type = type;
1163 strlcpy(f->description,formats[index].name,sizeof(f->description));
1164 f->pixelformat = formats[index].fourcc;
1165 break;
1166 default:
1167 return -EINVAL;
1168 }
1169 return 0;
1170 }
1171 case VIDIOC_G_FMT:
1172 {
1173 struct v4l2_format *f = arg;
1174 return cx8800_g_fmt(dev,fh,f);
1175 }
1176 case VIDIOC_S_FMT:
1177 {
1178 struct v4l2_format *f = arg;
1179 return cx8800_s_fmt(dev,fh,f);
1180 }
1181 case VIDIOC_TRY_FMT:
1182 {
1183 struct v4l2_format *f = arg;
1184 return cx8800_try_fmt(dev,fh,f);
1185 }
79436633 1186#ifdef HAVE_V4L1
e52e98a7
MCC		 1187 /* --- streaming capture ------------------------------------- */
1188 case VIDIOCGMBUF:
1189 {
1190 struct video_mbuf *mbuf = arg;
1191 struct videobuf_queue *q;
1192 struct v4l2_requestbuffers req;
1193 unsigned int i;
1194
1195 q = get_queue(fh);
1196 memset(&req,0,sizeof(req));
1197 req.type = q->type;
1198 req.count = 8;
1199 req.memory = V4L2_MEMORY_MMAP;
1200 err = videobuf_reqbufs(q,&req);
1201 if (err < 0)
1202 return err;
1203 memset(mbuf,0,sizeof(*mbuf));
1204 mbuf->frames = req.count;
1205 mbuf->size = 0;
1206 for (i = 0; i < mbuf->frames; i++) {
1207 mbuf->offsets[i] = q->bufs[i]->boff;
1208 mbuf->size += q->bufs[i]->bsize;
1209 }
1210 return 0;
1211 }
79436633 1212#endif
e52e98a7
MCC		 1213 case VIDIOC_REQBUFS:
1214 return videobuf_reqbufs(get_queue(fh), arg);
1215
1216 case VIDIOC_QUERYBUF:
1217 return videobuf_querybuf(get_queue(fh), arg);
1218
1219 case VIDIOC_QBUF:
1220 return videobuf_qbuf(get_queue(fh), arg);
1221
1222 case VIDIOC_DQBUF:
1223 return videobuf_dqbuf(get_queue(fh), arg,
1224 file->f_flags & O_NONBLOCK);
1225
1226 case VIDIOC_STREAMON:
1227 {
1228 int res = get_ressource(fh);
1229
1230 if (!res_get(dev,fh,res))
1231 return -EBUSY;
1232 return videobuf_streamon(get_queue(fh));
1233 }
1234 case VIDIOC_STREAMOFF:
1235 {
1236 int res = get_ressource(fh);
1237
1238 err = videobuf_streamoff(get_queue(fh));
1239 if (err < 0)
1240 return err;
1241 res_free(dev,fh,res);
1242 return 0;
1243 }
e52e98a7
MCC		 1244 default:
1245 return cx88_do_ioctl( inode, file, fh->radio, core, cmd, arg, video_do_ioctl );
1246 }
1247 return 0;
1248}
1249
1250int cx88_do_ioctl(struct inode *inode, struct file *file, int radio,
4ac97914 1251 struct cx88_core *core, unsigned int cmd, void *arg, v4l2_kioctl driver_ioctl)
e52e98a7
MCC		 1252{
1253 int err;
1254
6457af5f 1255 dprintk(2, "CORE IOCTL: 0x%x\n", cmd );
e52e98a7 1256 if (video_debug > 1)
5e453dc7 1257 v4l_print_ioctl(core->name,cmd);
e52e98a7
MCC		 1258
1259 switch (cmd) {
1da177e4
LT		 1260 /* ---------- tv norms ---------- */
1261 case VIDIOC_ENUMSTD:
1262 {
1263 struct v4l2_standard *e = arg;
1264 unsigned int i;
1265
1266 i = e->index;
1267 if (i >= ARRAY_SIZE(tvnorms))
1268 return -EINVAL;
1269 err = v4l2_video_std_construct(e, tvnorms[e->index].id,
1270 tvnorms[e->index].name);
1271 e->index = i;
1272 if (err < 0)
1273 return err;
1274 return 0;
1275 }
1276 case VIDIOC_G_STD:
1277 {
1278 v4l2_std_id *id = arg;
1279
1280 *id = core->tvnorm->id;
1281 return 0;
1282 }
1283 case VIDIOC_S_STD:
1284 {
1285 v4l2_std_id *id = arg;
1286 unsigned int i;
1287
1288 for(i = 0; i < ARRAY_SIZE(tvnorms); i++)
1289 if (*id & tvnorms[i].id)
1290 break;
1291 if (i == ARRAY_SIZE(tvnorms))
1292 return -EINVAL;
1293
3593cab5 1294 mutex_lock(&core->lock);
e52e98a7 1295 cx88_set_tvnorm(core,&tvnorms[i]);
3593cab5 1296 mutex_unlock(&core->lock);
1da177e4
LT		 1297 return 0;
1298 }
1299
1300 /* ------ input switching ---------- */
1301 case VIDIOC_ENUMINPUT:
1302 {
1303 static const char *iname[] = {
1304 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1305 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1306 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1307 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1308 [ CX88_VMUX_SVIDEO ] = "S-Video",
1309 [ CX88_VMUX_TELEVISION ] = "Television",
1310 [ CX88_VMUX_CABLE ] = "Cable TV",
1311 [ CX88_VMUX_DVB ] = "DVB",
1312 [ CX88_VMUX_DEBUG ] = "for debug only",
1313 };
1314 struct v4l2_input *i = arg;
1315 unsigned int n;
1316
1317 n = i->index;
1318 if (n >= 4)
1319 return -EINVAL;
1320 if (0 == INPUT(n)->type)
1321 return -EINVAL;
1322 memset(i,0,sizeof(*i));
1323 i->index = n;
1324 i->type = V4L2_INPUT_TYPE_CAMERA;
1325 strcpy(i->name,iname[INPUT(n)->type]);
1326 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) ||
1327 (CX88_VMUX_CABLE == INPUT(n)->type))
1328 i->type = V4L2_INPUT_TYPE_TUNER;
1329 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1330 i->std |= tvnorms[n].id;
1331 return 0;
1332 }
1333 case VIDIOC_G_INPUT:
1334 {
1335 unsigned int *i = arg;
1336
e52e98a7 1337 *i = core->input;
1da177e4
LT		 1338 return 0;
1339 }
1340 case VIDIOC_S_INPUT:
1341 {
1342 unsigned int *i = arg;
1343
1344 if (*i >= 4)
1345 return -EINVAL;
3593cab5 1346 mutex_lock(&core->lock);
1da177e4 1347 cx88_newstation(core);
e52e98a7 1348 video_mux(core,*i);
3593cab5 1349 mutex_unlock(&core->lock);
1da177e4
LT		 1350 return 0;
1351 }
1352
1353
1da177e4 1354
1da177e4
LT		 1355 /* --- controls ---------------------------------------------- */
1356 case VIDIOC_QUERYCTRL:
1357 {
1358 struct v4l2_queryctrl *c = arg;
1359 int i;
1360
1361 if (c->id < V4L2_CID_BASE ||
1362 c->id >= V4L2_CID_LASTP1)
1363 return -EINVAL;
1364 for (i = 0; i < CX8800_CTLS; i++)
1365 if (cx8800_ctls[i].v.id == c->id)
1366 break;
1367 if (i == CX8800_CTLS) {
1368 *c = no_ctl;
1369 return 0;
1370 }
1371 *c = cx8800_ctls[i].v;
1372 return 0;
1373 }
1374 case VIDIOC_G_CTRL:
e52e98a7 1375 return get_control(core,arg);
1da177e4 1376 case VIDIOC_S_CTRL:
e52e98a7 1377 return set_control(core,arg);
1da177e4
LT		 1378
1379 /* --- tuner ioctls ------------------------------------------ */
1380 case VIDIOC_G_TUNER:
1381 {
1382 struct v4l2_tuner *t = arg;
1383 u32 reg;
1384
1385 if (UNSET == core->tuner_type)
1386 return -EINVAL;
1387 if (0 != t->index)
1388 return -EINVAL;
1389
1390 memset(t,0,sizeof(*t));
1391 strcpy(t->name, "Television");
1392 t->type = V4L2_TUNER_ANALOG_TV;
1393 t->capability = V4L2_TUNER_CAP_NORM;
1394 t->rangehigh = 0xffffffffUL;
1395
1396 cx88_get_stereo(core ,t);
1397 reg = cx_read(MO_DEVICE_STATUS);
4ac97914 1398 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1da177e4
LT		 1399 return 0;
1400 }
1401 case VIDIOC_S_TUNER:
1402 {
1403 struct v4l2_tuner *t = arg;
1404
1405 if (UNSET == core->tuner_type)
1406 return -EINVAL;
1407 if (0 != t->index)
1408 return -EINVAL;
1409 cx88_set_stereo(core, t->audmode, 1);
1410 return 0;
1411 }
1412 case VIDIOC_G_FREQUENCY:
1413 {
1414 struct v4l2_frequency *f = arg;
1415
a82decf6
MCC		 1416 memset(f,0,sizeof(*f));
1417
1da177e4
LT		 1418 if (UNSET == core->tuner_type)
1419 return -EINVAL;
a82decf6 1420
e52e98a7
MCC		 1421 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1422 f->type = radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1423 f->frequency = core->freq;
41ef7c1e 1424
e52e98a7 1425 cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f);
41ef7c1e 1426
1da177e4
LT		 1427 return 0;
1428 }
1429 case VIDIOC_S_FREQUENCY:
1430 {
1431 struct v4l2_frequency *f = arg;
1432
1433 if (UNSET == core->tuner_type)
1434 return -EINVAL;
1435 if (f->tuner != 0)
1436 return -EINVAL;
e52e98a7 1437 if (0 == radio && f->type != V4L2_TUNER_ANALOG_TV)
1da177e4 1438 return -EINVAL;
e52e98a7 1439 if (1 == radio && f->type != V4L2_TUNER_RADIO)
1da177e4 1440 return -EINVAL;
3593cab5 1441 mutex_lock(&core->lock);
e52e98a7 1442 core->freq = f->frequency;
1da177e4 1443 cx88_newstation(core);
e52e98a7 1444 cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f);
c5287ba1
MCC		 1445
1446 /* When changing channels it is required to reset TVAUDIO */
1447 msleep (10);
1448 cx88_set_tvaudio(core);
1449
3593cab5 1450 mutex_unlock(&core->lock);
1da177e4
LT		 1451 return 0;
1452 }
1453
1454 default:
1455 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
e52e98a7 1456 driver_ioctl);
1da177e4
LT		 1457 }
1458 return 0;
1459}
1460
1461static int video_ioctl(struct inode *inode, struct file *file,
1462 unsigned int cmd, unsigned long arg)
1463{
1464 return video_usercopy(inode, file, cmd, arg, video_do_ioctl);
1465}
1466
1467/* ----------------------------------------------------------- */
1468
1469static int radio_do_ioctl(struct inode *inode, struct file *file,
1470 unsigned int cmd, void *arg)
1471{
1472 struct cx8800_fh *fh = file->private_data;
1473 struct cx8800_dev *dev = fh->dev;
1474 struct cx88_core *core = dev->core;
1475
1476 if (video_debug > 1)
5e453dc7 1477 v4l_print_ioctl(core->name,cmd);
1da177e4
LT		 1478
1479 switch (cmd) {
1480 case VIDIOC_QUERYCAP:
1481 {
1482 struct v4l2_capability *cap = arg;
1483
1484 memset(cap,0,sizeof(*cap));
4ac97914 1485 strcpy(cap->driver, "cx8800");
1da177e4
LT		 1486 strlcpy(cap->card, cx88_boards[core->board].name,
1487 sizeof(cap->card));
1488 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1489 cap->version = CX88_VERSION_CODE;
a82decf6 1490 cap->capabilities = V4L2_CAP_TUNER;
1da177e4
LT		 1491 return 0;
1492 }
1493 case VIDIOC_G_TUNER:
1494 {
1495 struct v4l2_tuner *t = arg;
1496
1497 if (t->index > 0)
1498 return -EINVAL;
1499
1500 memset(t,0,sizeof(*t));
1501 strcpy(t->name, "Radio");
48c42596 1502 t->type = V4L2_TUNER_RADIO;
1da177e4 1503
e52e98a7 1504 cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t);
1da177e4
LT		 1505 return 0;
1506 }
1507 case VIDIOC_ENUMINPUT:
1508 {
1509 struct v4l2_input *i = arg;
1510
1511 if (i->index != 0)
1512 return -EINVAL;
1513 strcpy(i->name,"Radio");
1514 i->type = V4L2_INPUT_TYPE_TUNER;
1515 return 0;
1516 }
1517 case VIDIOC_G_INPUT:
1518 {
1519 int *i = arg;
1520 *i = 0;
1521 return 0;
1522 }
1523 case VIDIOC_G_AUDIO:
1524 {
1525 struct v4l2_audio *a = arg;
1526
1527 memset(a,0,sizeof(*a));
1528 strcpy(a->name,"Radio");
1529 return 0;
1530 }
1531 case VIDIOC_G_STD:
1532 {
1533 v4l2_std_id *id = arg;
1534 *id = 0;
1535 return 0;
1536 }
79436633 1537#ifdef HAVE_V4L1
a82decf6
MCC		 1538 case VIDIOCSTUNER:
1539 {
1540 struct video_tuner *v = arg;
1541
1542 if (v->tuner) /* Only tuner 0 */
1543 return -EINVAL;
1544
e52e98a7
MCC		 1545 cx88_call_i2c_clients(core,VIDIOCSTUNER,v);
1546 return 0;
a82decf6 1547 }
79436633 1548#endif
1da177e4 1549 case VIDIOC_S_TUNER:
a82decf6
MCC		 1550 {
1551 struct v4l2_tuner *t = arg;
1552
1553 if (0 != t->index)
1554 return -EINVAL;
1555
e52e98a7 1556 cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t);
a82decf6
MCC		 1557
1558 return 0;
1559 }
1560
1561 case VIDIOC_S_AUDIO:
1da177e4
LT		 1562 case VIDIOC_S_INPUT:
1563 case VIDIOC_S_STD:
1564 return 0;
1565
1566 case VIDIOC_QUERYCTRL:
1567 {
1568 struct v4l2_queryctrl *c = arg;
1569 int i;
1570
1571 if (c->id < V4L2_CID_BASE ||
1572 c->id >= V4L2_CID_LASTP1)
1573 return -EINVAL;
1574 if (c->id == V4L2_CID_AUDIO_MUTE) {
1575 for (i = 0; i < CX8800_CTLS; i++)
1576 if (cx8800_ctls[i].v.id == c->id)
1577 break;
1578 *c = cx8800_ctls[i].v;
1579 } else
1580 *c = no_ctl;
1581 return 0;
1582 }
1583
1584
1585 case VIDIOC_G_CTRL:
1586 case VIDIOC_S_CTRL:
1587 case VIDIOC_G_FREQUENCY:
1588 case VIDIOC_S_FREQUENCY:
1589 return video_do_ioctl(inode,file,cmd,arg);
1590
1591 default:
1592 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
1593 radio_do_ioctl);
1594 }
1595 return 0;
1596};
1597
1598static int radio_ioctl(struct inode *inode, struct file *file,
1599 unsigned int cmd, unsigned long arg)
1600{
1601 return video_usercopy(inode, file, cmd, arg, radio_do_ioctl);
1602};
1603
1604/* ----------------------------------------------------------- */
1605
1606static void cx8800_vid_timeout(unsigned long data)
1607{
1608 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1609 struct cx88_core *core = dev->core;
1610 struct cx88_dmaqueue *q = &dev->vidq;
1611 struct cx88_buffer *buf;
1612 unsigned long flags;
1613
e52e98a7 1614 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1615
1616 cx_clear(MO_VID_DMACNTRL, 0x11);
1617 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1618
1619 spin_lock_irqsave(&dev->slock,flags);
1620 while (!list_empty(&q->active)) {
1621 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1622 list_del(&buf->vb.queue);
1623 buf->vb.state = STATE_ERROR;
1624 wake_up(&buf->vb.done);
1625 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1626 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1627 }
1628 restart_video_queue(dev,q);
1629 spin_unlock_irqrestore(&dev->slock,flags);
1630}
1631
41ef7c1e
MCC		 1632static char *cx88_vid_irqs[32] = {
1633 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1634 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1635 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1636 "y_sync", "u_sync", "v_sync", "vbi_sync",
1637 "opc_err", "par_err", "rip_err", "pci_abort",
1638};
1639
1da177e4
LT		 1640static void cx8800_vid_irq(struct cx8800_dev *dev)
1641{
1642 struct cx88_core *core = dev->core;
1643 u32 status, mask, count;
1644
1645 status = cx_read(MO_VID_INTSTAT);
1646 mask = cx_read(MO_VID_INTMSK);
1647 if (0 == (status & mask))
1648 return;
1649 cx_write(MO_VID_INTSTAT, status);
1650 if (irq_debug || (status & mask & ~0xff))
1651 cx88_print_irqbits(core->name, "irq vid",
1652 cx88_vid_irqs, status, mask);
1653
1654 /* risc op code error */
1655 if (status & (1 << 16)) {
1656 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1657 cx_clear(MO_VID_DMACNTRL, 0x11);
1658 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1659 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1660 }
1661
1662 /* risc1 y */
1663 if (status & 0x01) {
1664 spin_lock(&dev->slock);
1665 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1666 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1667 spin_unlock(&dev->slock);
1668 }
1669
1670 /* risc1 vbi */
1671 if (status & 0x08) {
1672 spin_lock(&dev->slock);
1673 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1674 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1675 spin_unlock(&dev->slock);
1676 }
1677
1678 /* risc2 y */
1679 if (status & 0x10) {
1680 dprintk(2,"stopper video\n");
1681 spin_lock(&dev->slock);
1682 restart_video_queue(dev,&dev->vidq);
1683 spin_unlock(&dev->slock);
1684 }
1685
1686 /* risc2 vbi */
1687 if (status & 0x80) {
1688 dprintk(2,"stopper vbi\n");
1689 spin_lock(&dev->slock);
1690 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1691 spin_unlock(&dev->slock);
1692 }
1693}
1694
1695static irqreturn_t cx8800_irq(int irq, void *dev_id, struct pt_regs *regs)
1696{
1697 struct cx8800_dev *dev = dev_id;
1698 struct cx88_core *core = dev->core;
1699 u32 status;
1700 int loop, handled = 0;
1701
1702 for (loop = 0; loop < 10; loop++) {
1703 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01);
1704 if (0 == status)
1705 goto out;
1706 cx_write(MO_PCI_INTSTAT, status);
1707 handled = 1;
1708
1709 if (status & core->pci_irqmask)
1710 cx88_core_irq(core,status);
1711 if (status & 0x01)
1712 cx8800_vid_irq(dev);
1713 };
1714 if (10 == loop) {
1715 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1716 core->name);
1717 cx_write(MO_PCI_INTMSK,0);
1718 }
1719
1720 out:
1721 return IRQ_RETVAL(handled);
1722}
1723
1724/* ----------------------------------------------------------- */
1725/* exported stuff */
1726
1727static struct file_operations video_fops =
1728{
1729 .owner = THIS_MODULE,
1730 .open = video_open,
1731 .release = video_release,
1732 .read = video_read,
1733 .poll = video_poll,
1734 .mmap = video_mmap,
1735 .ioctl = video_ioctl,
0d0fbf81 1736 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1737 .llseek = no_llseek,
1738};
1739
408b664a 1740static struct video_device cx8800_video_template =
1da177e4
LT		 1741{
1742 .name = "cx8800-video",
1743 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
1744 .hardware = 0,
1745 .fops = &video_fops,
1746 .minor = -1,
1747};
1748
408b664a 1749static struct video_device cx8800_vbi_template =
1da177e4
LT		 1750{
1751 .name = "cx8800-vbi",
1752 .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER,
1753 .hardware = 0,
1754 .fops = &video_fops,
1755 .minor = -1,
1756};
1757
1758static struct file_operations radio_fops =
1759{
1760 .owner = THIS_MODULE,
1761 .open = video_open,
1762 .release = video_release,
1763 .ioctl = radio_ioctl,
0d0fbf81 1764 .compat_ioctl = v4l_compat_ioctl32,
1da177e4
LT		 1765 .llseek = no_llseek,
1766};
1767
408b664a 1768static struct video_device cx8800_radio_template =
1da177e4
LT		 1769{
1770 .name = "cx8800-radio",
1771 .type = VID_TYPE_TUNER,
1772 .hardware = 0,
1773 .fops = &radio_fops,
1774 .minor = -1,
1775};
1776
1777/* ----------------------------------------------------------- */
1778
1779static void cx8800_unregister_video(struct cx8800_dev *dev)
1780{
1781 if (dev->radio_dev) {
1782 if (-1 != dev->radio_dev->minor)
1783 video_unregister_device(dev->radio_dev);
1784 else
1785 video_device_release(dev->radio_dev);
1786 dev->radio_dev = NULL;
1787 }
1788 if (dev->vbi_dev) {
1789 if (-1 != dev->vbi_dev->minor)
1790 video_unregister_device(dev->vbi_dev);
1791 else
1792 video_device_release(dev->vbi_dev);
1793 dev->vbi_dev = NULL;
1794 }
1795 if (dev->video_dev) {
1796 if (-1 != dev->video_dev->minor)
1797 video_unregister_device(dev->video_dev);
1798 else
1799 video_device_release(dev->video_dev);
1800 dev->video_dev = NULL;
1801 }
1802}
1803
1804static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1805 const struct pci_device_id *pci_id)
1806{
1807 struct cx8800_dev *dev;
1808 struct cx88_core *core;
1809 int err;
1810
7408187d 1811 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1812 if (NULL == dev)
1813 return -ENOMEM;
1da177e4
LT		 1814
1815 /* pci init */
1816 dev->pci = pci_dev;
1817 if (pci_enable_device(pci_dev)) {
1818 err = -EIO;
1819 goto fail_free;
1820 }
1821 core = cx88_core_get(dev->pci);
1822 if (NULL == core) {
1823 err = -EINVAL;
1824 goto fail_free;
1825 }
1826 dev->core = core;
1827
1828 /* print pci info */
1829 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1830 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1831 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1da177e4
LT		 1832 "latency: %d, mmio: 0x%lx\n", core->name,
1833 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1834 dev->pci_lat,pci_resource_start(pci_dev,0));
1835
1836 pci_set_master(pci_dev);
1837 if (!pci_dma_supported(pci_dev,0xffffffff)) {
1838 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1839 err = -EIO;
1840 goto fail_core;
1841 }
1842
1843 /* initialize driver struct */
1da177e4
LT		 1844 spin_lock_init(&dev->slock);
1845 core->tvnorm = tvnorms;
1846
1847 /* init video dma queues */
1848 INIT_LIST_HEAD(&dev->vidq.active);
1849 INIT_LIST_HEAD(&dev->vidq.queued);
1850 dev->vidq.timeout.function = cx8800_vid_timeout;
1851 dev->vidq.timeout.data = (unsigned long)dev;
1852 init_timer(&dev->vidq.timeout);
1853 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1854 MO_VID_DMACNTRL,0x11,0x00);
1855
1856 /* init vbi dma queues */
1857 INIT_LIST_HEAD(&dev->vbiq.active);
1858 INIT_LIST_HEAD(&dev->vbiq.queued);
1859 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1860 dev->vbiq.timeout.data = (unsigned long)dev;
1861 init_timer(&dev->vbiq.timeout);
1862 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1863 MO_VID_DMACNTRL,0x88,0x00);
1864
1865 /* get irq */
1866 err = request_irq(pci_dev->irq, cx8800_irq,
1867 SA_SHIRQ | SA_INTERRUPT, core->name, dev);
1868 if (err < 0) {
1869 printk(KERN_ERR "%s: can't get IRQ %d\n",
1870 core->name,pci_dev->irq);
1871 goto fail_core;
1872 }
1873 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1874
1875 /* load and configure helper modules */
1876 if (TUNER_ABSENT != core->tuner_type)
1877 request_module("tuner");
1878 if (core->tda9887_conf)
1879 request_module("tda9887");
e52e98a7 1880
1da177e4
LT		 1881 /* register v4l devices */
1882 dev->video_dev = cx88_vdev_init(core,dev->pci,
1883 &cx8800_video_template,"video");
1884 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1885 video_nr[core->nr]);
1886 if (err < 0) {
1887 printk(KERN_INFO "%s: can't register video device\n",
1888 core->name);
1889 goto fail_unreg;
1890 }
1891 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
1892 core->name,dev->video_dev->minor & 0x1f);
1893
1894 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1895 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1896 vbi_nr[core->nr]);
1897 if (err < 0) {
1898 printk(KERN_INFO "%s/0: can't register vbi device\n",
1899 core->name);
1900 goto fail_unreg;
1901 }
1902 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1903 core->name,dev->vbi_dev->minor & 0x1f);
1904
1905 if (core->has_radio) {
1906 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1907 &cx8800_radio_template,"radio");
1908 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1909 radio_nr[core->nr]);
1910 if (err < 0) {
1911 printk(KERN_INFO "%s/0: can't register radio device\n",
1912 core->name);
1913 goto fail_unreg;
1914 }
1915 printk(KERN_INFO "%s/0: registered device radio%d\n",
1916 core->name,dev->radio_dev->minor & 0x1f);
1917 }
1918
1919 /* everything worked */
1920 list_add_tail(&dev->devlist,&cx8800_devlist);
1921 pci_set_drvdata(pci_dev,dev);
1922
1923 /* initial device configuration */
3593cab5 1924 mutex_lock(&core->lock);
e52e98a7 1925 cx88_set_tvnorm(core,tvnorms);
70f00044 1926 init_controls(core);
e52e98a7 1927 video_mux(core,0);
3593cab5 1928 mutex_unlock(&core->lock);
1da177e4
LT		 1929
1930 /* start tvaudio thread */
1931 if (core->tuner_type != TUNER_ABSENT)
1932 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1933 return 0;
1934
1935fail_unreg:
1936 cx8800_unregister_video(dev);
1937 free_irq(pci_dev->irq, dev);
1938fail_core:
1939 cx88_core_put(core,dev->pci);
1940fail_free:
1941 kfree(dev);
1942 return err;
1943}
1944
1945static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1946{
4ac97914 1947 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1948 struct cx88_core *core = dev->core;
1da177e4
LT		 1949
1950 /* stop thread */
e52e98a7
MCC		 1951 if (core->kthread) {
1952 kthread_stop(core->kthread);
1953 core->kthread = NULL;
1da177e4
LT		 1954 }
1955
e52e98a7 1956 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1957 pci_disable_device(pci_dev);
1958
1959 /* unregister stuff */
1960
1961 free_irq(pci_dev->irq, dev);
1962 cx8800_unregister_video(dev);
1963 pci_set_drvdata(pci_dev, NULL);
1964
1965 /* free memory */
1966 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
1967 list_del(&dev->devlist);
e52e98a7 1968 cx88_core_put(core,dev->pci);
1da177e4
LT		 1969 kfree(dev);
1970}
1971
1972static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1973{
b45009b0 1974 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1975 struct cx88_core *core = dev->core;
1976
1977 /* stop video+vbi capture */
1978 spin_lock(&dev->slock);
1979 if (!list_empty(&dev->vidq.active)) {
1980 printk("%s: suspend video\n", core->name);
1981 stop_video_dma(dev);
1982 del_timer(&dev->vidq.timeout);
1983 }
1984 if (!list_empty(&dev->vbiq.active)) {
1985 printk("%s: suspend vbi\n", core->name);
1986 cx8800_stop_vbi_dma(dev);
1987 del_timer(&dev->vbiq.timeout);
1988 }
1989 spin_unlock(&dev->slock);
1990
1da177e4 1991 /* FIXME -- shutdown device */
e52e98a7 1992 cx88_shutdown(core);
1da177e4
LT		 1993
1994 pci_save_state(pci_dev);
1995 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
1996 pci_disable_device(pci_dev);
1997 dev->state.disabled = 1;
1998 }
1999 return 0;
2000}
2001
2002static int cx8800_resume(struct pci_dev *pci_dev)
2003{
b45009b0 2004 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2005 struct cx88_core *core = dev->core;
08adb9e2 2006 int err;
1da177e4
LT		 2007
2008 if (dev->state.disabled) {
08adb9e2
MCC		 2009 err=pci_enable_device(pci_dev);
2010 if (err) {
2011 printk(KERN_ERR "%s: can't enable device\n",
2012 core->name);
2013 return err;
2014 }
2015
1da177e4
LT		 2016 dev->state.disabled = 0;
2017 }
08adb9e2
MCC		 2018 err= pci_set_power_state(pci_dev, PCI_D0);
2019 if (err) {
2020 printk(KERN_ERR "%s: can't enable device\n",
2021 core->name);
2022
2023 pci_disable_device(pci_dev);
2024 dev->state.disabled = 1;
2025
2026 return err;
2027 }
1da177e4
LT		 2028 pci_restore_state(pci_dev);
2029
1da177e4 2030 /* FIXME: re-initialize hardware */
e52e98a7 2031 cx88_reset(core);
1da177e4
LT		 2032
2033 /* restart video+vbi capture */
2034 spin_lock(&dev->slock);
2035 if (!list_empty(&dev->vidq.active)) {
2036 printk("%s: resume video\n", core->name);
2037 restart_video_queue(dev,&dev->vidq);
2038 }
2039 if (!list_empty(&dev->vbiq.active)) {
2040 printk("%s: resume vbi\n", core->name);
2041 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2042 }
2043 spin_unlock(&dev->slock);
2044
2045 return 0;
2046}
2047
2048/* ----------------------------------------------------------- */
2049
408b664a 2050static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2051 {
2052 .vendor = 0x14f1,
2053 .device = 0x8800,
b45009b0
MCC		 2054 .subvendor = PCI_ANY_ID,
2055 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2056 },{
2057 /* --- end of list --- */
2058 }
2059};
2060MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2061
2062static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2063 .name = "cx8800",
2064 .id_table = cx8800_pci_tbl,
2065 .probe = cx8800_initdev,
2066 .remove = __devexit_p(cx8800_finidev),
1da177e4
LT		 2067
2068 .suspend = cx8800_suspend,
2069 .resume = cx8800_resume,
2070};
2071
2072static int cx8800_init(void)
2073{
2074 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2075 (CX88_VERSION_CODE >> 16) & 0xff,
2076 (CX88_VERSION_CODE >> 8) & 0xff,
2077 CX88_VERSION_CODE & 0xff);
2078#ifdef SNAPSHOT
2079 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2080 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2081#endif
2082 return pci_register_driver(&cx8800_pci_driver);
2083}
2084
2085static void cx8800_fini(void)
2086{
2087 pci_unregister_driver(&cx8800_pci_driver);
2088}
2089
2090module_init(cx8800_init);
2091module_exit(cx8800_fini);
2092
e52e98a7
MCC		 2093EXPORT_SYMBOL(cx88_do_ioctl);
2094
1da177e4
LT		 2095/* ----------------------------------------------------------- */
2096/*
2097 * Local variables:
2098 * c-basic-offset: 8
2099 * End:
b45009b0 2100 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2101 */
Linux kernel - Deliverables
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