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[media] em28xx: initial support for HAUPPAUGE HVR-930C again
[deliverable/linux.git] / drivers / media / video / em28xx / em28xx-dvb.c
CommitLineData
3aefb79a
MCC		 1/*
2 DVB device driver for em28xx
3
fec528b7 4 (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org>
3aefb79a 5
bdfbf952
DH		 6 (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com>
7 - Fixes for the driver to properly work with HVR-950
4fd305b2 8 - Fixes for the driver to properly work with Pinnacle PCTV HD Pro Stick
e14b3658 9 - Fixes for the driver to properly work with AMD ATI TV Wonder HD 600
bdfbf952 10
3421b778
AT		 11 (c) 2008 Aidan Thornton <makosoft@googlemail.com>
12
13 Based on cx88-dvb, saa7134-dvb and videobuf-dvb originally written by:
3aefb79a
MCC		 14 (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
15 (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
16
17 This program is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 2 of the License.
20 */
21
22#include <linux/kernel.h>
5a0e3ad6 23#include <linux/slab.h>
3aefb79a
MCC		 24#include <linux/usb.h>
25
26#include "em28xx.h"
27#include <media/v4l2-common.h>
28#include <media/videobuf-vmalloc.h>
d7de5d8f
FM		 29#include <media/tuner.h>
30#include "tuner-simple.h"
3aefb79a
MCC		 31
32#include "lgdt330x.h"
7e48b30a 33#include "lgdt3305.h"
7e6388a1 34#include "zl10353.h"
6e7b9ea0 35#include "s5h1409.h"
4fb202a8
DH		 36#include "mt352.h"
37#include "mt352_priv.h" /* FIXME */
285eb1a4 38#include "tda1002x.h"
7e48b30a 39#include "tda18271.h"
ca3dfd6a 40#include "s921.h"
75e2b869 41#include "drxd.h"
d6a5f921 42#include "cxd2820r.h"
fec528b7
MCC		 43#include "tda18271c2dd.h"
44#include "drxk.h"
36588715
AP		 45#include "tda10071.h"
46#include "a8293.h"
3aefb79a
MCC		 47
48MODULE_DESCRIPTION("driver for em28xx based DVB cards");
49MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
50MODULE_LICENSE("GPL");
51
52static unsigned int debug;
53module_param(debug, int, 0644);
54MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
55
56DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
57
58#define dprintk(level, fmt, arg...) do { \
59if (debug >= level) \
3421b778 60 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->name, ## arg); \
3aefb79a
MCC		 61} while (0)
62
3421b778 63#define EM28XX_DVB_NUM_BUFS 5
3421b778
AT		 64#define EM28XX_DVB_MAX_PACKETS 64
65
66struct em28xx_dvb {
f71095be 67 struct dvb_frontend *fe[2];
3421b778
AT		 68
69 /* feed count management */
70 struct mutex lock;
71 int nfeeds;
72
73 /* general boilerplate stuff */
74 struct dvb_adapter adapter;
75 struct dvb_demux demux;
76 struct dmxdev dmxdev;
77 struct dmx_frontend fe_hw;
78 struct dmx_frontend fe_mem;
79 struct dvb_net net;
fec528b7 80
c4c3a3d3 81 /* Due to DRX-K - probably need changes */
fec528b7
MCC		 82 int (*gate_ctrl)(struct dvb_frontend *, int);
83 struct semaphore pll_mutex;
c4c3a3d3 84 bool dont_attach_fe1;
3421b778
AT		 85};
86
87
88static inline void print_err_status(struct em28xx *dev,
89 int packet, int status)
3aefb79a 90{
3421b778 91 char *errmsg = "Unknown";
3aefb79a 92
3421b778
AT		 93 switch (status) {
94 case -ENOENT:
95 errmsg = "unlinked synchronuously";
96 break;
97 case -ECONNRESET:
98 errmsg = "unlinked asynchronuously";
99 break;
100 case -ENOSR:
101 errmsg = "Buffer error (overrun)";
102 break;
103 case -EPIPE:
104 errmsg = "Stalled (device not responding)";
105 break;
106 case -EOVERFLOW:
107 errmsg = "Babble (bad cable?)";
108 break;
109 case -EPROTO:
110 errmsg = "Bit-stuff error (bad cable?)";
111 break;
112 case -EILSEQ:
113 errmsg = "CRC/Timeout (could be anything)";
114 break;
115 case -ETIME:
116 errmsg = "Device does not respond";
117 break;
118 }
119 if (packet < 0) {
120 dprintk(1, "URB status %d [%s].\n", status, errmsg);
121 } else {
6ea54d93
DSL		 122 dprintk(1, "URB packet %d, status %d [%s].\n",
123 packet, status, errmsg);
3421b778
AT		 124 }
125}
3aefb79a 126
f2d0c1c6 127static inline int em28xx_dvb_isoc_copy(struct em28xx *dev, struct urb *urb)
3421b778
AT		 128{
129 int i;
3aefb79a 130
3421b778
AT		 131 if (!dev)
132 return 0;
3aefb79a 133
3421b778
AT		 134 if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED))
135 return 0;
136
137 if (urb->status < 0) {
138 print_err_status(dev, -1, urb->status);
139 if (urb->status == -ENOENT)
140 return 0;
141 }
142
143 for (i = 0; i < urb->number_of_packets; i++) {
144 int status = urb->iso_frame_desc[i].status;
145
146 if (status < 0) {
147 print_err_status(dev, i, status);
148 if (urb->iso_frame_desc[i].status != -EPROTO)
149 continue;
150 }
151
152 dvb_dmx_swfilter(&dev->dvb->demux, urb->transfer_buffer +
153 urb->iso_frame_desc[i].offset,
154 urb->iso_frame_desc[i].actual_length);
155 }
156
157 return 0;
158}
159
f2d0c1c6 160static int em28xx_start_streaming(struct em28xx_dvb *dvb)
6ea54d93 161{
c67ec53f 162 int rc;
3421b778 163 struct em28xx *dev = dvb->adapter.priv;
d18e2fda 164 int max_dvb_packet_size;
3421b778
AT		 165
166 usb_set_interface(dev->udev, 0, 1);
c67ec53f
MCC		 167 rc = em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
168 if (rc < 0)
169 return rc;
3421b778 170
d18e2fda 171 max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev);
f7acc4bb
MCC		 172 if (max_dvb_packet_size < 0)
173 return max_dvb_packet_size;
174 dprintk(1, "Using %d buffers each with %d bytes\n",
175 EM28XX_DVB_NUM_BUFS,
176 max_dvb_packet_size);
d18e2fda 177
3421b778 178 return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS,
d18e2fda 179 EM28XX_DVB_NUM_BUFS, max_dvb_packet_size,
f2d0c1c6 180 em28xx_dvb_isoc_copy);
3421b778
AT		 181}
182
f2d0c1c6 183static int em28xx_stop_streaming(struct em28xx_dvb *dvb)
6ea54d93 184{
3421b778
AT		 185 struct em28xx *dev = dvb->adapter.priv;
186
187 em28xx_uninit_isoc(dev);
c67ec53f 188
2fe3e2ee 189 em28xx_set_mode(dev, EM28XX_SUSPEND);
c67ec53f 190
3aefb79a
MCC		 191 return 0;
192}
193
f2d0c1c6 194static int em28xx_start_feed(struct dvb_demux_feed *feed)
3421b778
AT		 195{
196 struct dvb_demux *demux = feed->demux;
197 struct em28xx_dvb *dvb = demux->priv;
198 int rc, ret;
199
200 if (!demux->dmx.frontend)
201 return -EINVAL;
202
203 mutex_lock(&dvb->lock);
204 dvb->nfeeds++;
205 rc = dvb->nfeeds;
206
207 if (dvb->nfeeds == 1) {
f2d0c1c6 208 ret = em28xx_start_streaming(dvb);
6ea54d93
DSL		 209 if (ret < 0)
210 rc = ret;
3421b778
AT		 211 }
212
213 mutex_unlock(&dvb->lock);
214 return rc;
215}
216
f2d0c1c6 217static int em28xx_stop_feed(struct dvb_demux_feed *feed)
3421b778
AT		 218{
219 struct dvb_demux *demux = feed->demux;
220 struct em28xx_dvb *dvb = demux->priv;
221 int err = 0;
222
223 mutex_lock(&dvb->lock);
224 dvb->nfeeds--;
6ea54d93
DSL		 225
226 if (0 == dvb->nfeeds)
f2d0c1c6 227 err = em28xx_stop_streaming(dvb);
6ea54d93 228
3421b778
AT		 229 mutex_unlock(&dvb->lock);
230 return err;
231}
232
233
e3569abc
MCC		 234
235/* ------------------------------------------------------------------ */
236static int em28xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
237{
238 struct em28xx *dev = fe->dvb->priv;
239
240 if (acquire)
241 return em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
242 else
2fe3e2ee 243 return em28xx_set_mode(dev, EM28XX_SUSPEND);
e3569abc
MCC		 244}
245
3aefb79a
MCC		 246/* ------------------------------------------------------------------ */
247
227ad4ab
MCC		 248static struct lgdt330x_config em2880_lgdt3303_dev = {
249 .demod_address = 0x0e,
250 .demod_chip = LGDT3303,
251};
3aefb79a 252
7e48b30a
JW		 253static struct lgdt3305_config em2870_lgdt3304_dev = {
254 .i2c_addr = 0x0e,
255 .demod_chip = LGDT3304,
256 .spectral_inversion = 1,
257 .deny_i2c_rptr = 1,
258 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
259 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
260 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
261 .vsb_if_khz = 3250,
262 .qam_if_khz = 4000,
263};
264
ca3dfd6a
MCC		 265static struct s921_config sharp_isdbt = {
266 .demod_address = 0x30 >> 1
267};
268
7e6388a1
AT		 269static struct zl10353_config em28xx_zl10353_with_xc3028 = {
270 .demod_address = (0x1e >> 1),
271 .no_tuner = 1,
272 .parallel_ts = 1,
273 .if2 = 45600,
274};
275
6e7b9ea0
RK		 276static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
277 .demod_address = 0x32 >> 1,
278 .output_mode = S5H1409_PARALLEL_OUTPUT,
279 .gpio = S5H1409_GPIO_OFF,
280 .inversion = S5H1409_INVERSION_OFF,
281 .status_mode = S5H1409_DEMODLOCKING,
282 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
283};
284
7e48b30a
JW		 285static struct tda18271_std_map kworld_a340_std_map = {
286 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
287 .if_lvl = 1, .rfagc_top = 0x37, },
288 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
289 .if_lvl = 1, .rfagc_top = 0x37, },
290};
291
292static struct tda18271_config kworld_a340_config = {
293 .std_map = &kworld_a340_std_map,
294};
295
a84f79ae 296static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
f797608c
DH		 297 .demod_address = (0x1e >> 1),
298 .no_tuner = 1,
299 .disable_i2c_gate_ctrl = 1,
300 .parallel_ts = 1,
301 .if2 = 45600,
302};
303
75e2b869
DH		 304static struct drxd_config em28xx_drxd = {
305 .index = 0, .demod_address = 0x70, .demod_revision = 0xa2,
306 .demoda_address = 0x00, .pll_address = 0x00,
307 .pll_type = DRXD_PLL_NONE, .clock = 12000, .insert_rs_byte = 1,
308 .pll_set = NULL, .osc_deviation = NULL, .IF = 42800000,
6b142b3c 309 .disable_i2c_gate_ctrl = 1,
17d9d558 310};
17d9d558 311
fec528b7
MCC		 312struct drxk_config terratec_h5_drxk = {
313 .adr = 0x29,
e4f4f875 314 .single_master = 1,
f1fe1b75 315 .no_i2c_bridge = 1,
8b9456ae 316 .microcode_name = "dvb-usb-terratec-h5-drxk.fw",
fec528b7
MCC		 317};
318
82e7dbbd
EDP		 319struct drxk_config hauppauge_930c_drxk = {
320 .adr = 0x29,
321 .single_master = 1,
322 .no_i2c_bridge = 1,
323 .microcode_name = "dvb-usb-hauppauge-hvr930c-drxk.fw",
324 .chunk_size = 56,
325};
326
fec528b7
MCC		 327static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
328{
329 struct em28xx_dvb *dvb = fe->sec_priv;
330 int status;
331
332 if (!dvb)
333 return -EINVAL;
334
335 if (enable) {
336 down(&dvb->pll_mutex);
337 status = dvb->gate_ctrl(fe, 1);
338 } else {
339 status = dvb->gate_ctrl(fe, 0);
340 up(&dvb->pll_mutex);
341 }
342 return status;
343}
344
82e7dbbd
EDP		 345static void hauppauge_hvr930c_init(struct em28xx *dev)
346{
347 int i;
348
349 struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
350 {EM2874_R80_GPIO, 0xff, 0xff, 101}, //11111111
351// {0xd , 0xff, 0xff, 101}, //11111111
352 {EM2874_R80_GPIO, 0xfb, 0xff, 50}, //11111011 init bit 3
353 {EM2874_R80_GPIO, 0xff, 0xff, 184}, //11111111
354 { -1, -1, -1, -1},
355 };
356 struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
357 {EM2874_R80_GPIO, 0xef, 0xff, 1}, //11101111
358 {EM2874_R80_GPIO, 0xaf, 0xff, 101}, //10101111 init bit 7
359 {EM2874_R80_GPIO, 0xef, 0xff, 118}, //11101111
360
361
362//per il tuner?
363 {EM2874_R80_GPIO, 0xef, 0xff, 1}, //11101111
364 {EM2874_R80_GPIO, 0xcf, 0xff, 11}, //11001111 init bit 6
365 {EM2874_R80_GPIO, 0xef, 0xff, 64}, //11101111
366
367 {EM2874_R80_GPIO, 0xcf, 0xff, 101}, //11001111 init bit 6
368 {EM2874_R80_GPIO, 0xef, 0xff, 101}, //11101111
369 {EM2874_R80_GPIO, 0xcf, 0xff, 11}, //11001111 init bit 6
370 {EM2874_R80_GPIO, 0xef, 0xff, 101}, //11101111
371
372// {EM2874_R80_GPIO, 0x6f, 0xff, 10}, //01101111
373// {EM2874_R80_GPIO, 0x6d, 0xff, 100}, //01101101 init bit 2
374 { -1, -1, -1, -1},
375 };
376
377 struct em28xx_reg_seq hauppauge_hvr930c_end2[] = {
378// {EM2874_R80_GPIO, 0x6f, 0xff, 124}, //01101111
379// {EM2874_R80_GPIO, 0x4f, 0xff, 11}, //01001111 init bit 6
380// {EM2874_R80_GPIO, 0x6f, 0xff, 1}, //01101111
381// {EM2874_R80_GPIO, 0x4f, 0xff, 10}, //01001111 init bit 6
382// {EM2874_R80_GPIO, 0x6f, 0xff, 100}, //01101111
383// {0xd , 0x42, 0xff, 101}, //11111111
384 { -1, -1, -1, -1},
385 };
386 struct {
387 unsigned char r[4];
388 int len;
389 } regs[] = {
390 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
391 {{ 0x01, 0x02 }, 2},
392 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
393 {{ 0x01, 0x00 }, 2},
394 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
395 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
396 {{ 0x01, 0x00 }, 2},
397 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
398 {{ 0x04, 0x00 }, 2},
399 {{ 0x00, 0x04 }, 2},
400 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
401 {{ 0x04, 0x14 }, 2},
402 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
403 };
404
405 em28xx_gpio_set(dev, hauppauge_hvr930c_init);
406 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
407 msleep(10);
408 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
409 msleep(10);
410
411 dev->i2c_client.addr = 0x82 >> 1;
412
413 for (i = 0; i < ARRAY_SIZE(regs); i++)
414 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
415 em28xx_gpio_set(dev, hauppauge_hvr930c_end);
416
417 msleep(100);
418
419 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x44);
420 msleep(30);
421
422 em28xx_gpio_set(dev, hauppauge_hvr930c_end2);
423 msleep(10);
424 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
425 msleep(10);
426
427}
428
fec528b7
MCC		 429static void terratec_h5_init(struct em28xx *dev)
430{
431 int i;
432 struct em28xx_reg_seq terratec_h5_init[] = {
433 {EM28XX_R08_GPIO, 0xff, 0xff, 10},
434 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
435 {EM2874_R80_GPIO, 0xf2, 0xff, 50},
436 {EM2874_R80_GPIO, 0xf6, 0xff, 100},
437 { -1, -1, -1, -1},
438 };
439 struct em28xx_reg_seq terratec_h5_end[] = {
440 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
441 {EM2874_R80_GPIO, 0xa6, 0xff, 50},
442 {EM2874_R80_GPIO, 0xe6, 0xff, 100},
443 { -1, -1, -1, -1},
444 };
445 struct {
446 unsigned char r[4];
447 int len;
448 } regs[] = {
449 {{ 0x06, 0x02, 0x00, 0x31 }, 4},
450 {{ 0x01, 0x02 }, 2},
451 {{ 0x01, 0x02, 0x00, 0xc6 }, 4},
452 {{ 0x01, 0x00 }, 2},
453 {{ 0x01, 0x00, 0xff, 0xaf }, 4},
454 {{ 0x01, 0x00, 0x03, 0xa0 }, 4},
455 {{ 0x01, 0x00 }, 2},
456 {{ 0x01, 0x00, 0x73, 0xaf }, 4},
457 {{ 0x04, 0x00 }, 2},
458 {{ 0x00, 0x04 }, 2},
459 {{ 0x00, 0x04, 0x00, 0x0a }, 4},
460 {{ 0x04, 0x14 }, 2},
461 {{ 0x04, 0x14, 0x00, 0x00 }, 4},
462 };
463
464 em28xx_gpio_set(dev, terratec_h5_init);
465 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40);
466 msleep(10);
467 em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45);
468 msleep(10);
469
470 dev->i2c_client.addr = 0x82 >> 1;
471
472 for (i = 0; i < ARRAY_SIZE(regs); i++)
473 i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len);
474 em28xx_gpio_set(dev, terratec_h5_end);
475};
476
f2d0c1c6 477static int em28xx_mt352_terratec_xs_init(struct dvb_frontend *fe)
4fb202a8
DH		 478{
479 /* Values extracted from a USB trace of the Terratec Windows driver */
480 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
481 static u8 reset[] = { RESET, 0x80 };
482 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
483 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
484 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
485 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
486 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
487 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
488 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
ff69786b 489 static u8 tuner_go[] = { TUNER_GO, 0x01};
4fb202a8
DH		 490
491 mt352_write(fe, clock_config, sizeof(clock_config));
492 udelay(200);
493 mt352_write(fe, reset, sizeof(reset));
494 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
495 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
496 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
497 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
498 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
499 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
500 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
501 mt352_write(fe, tuner_go, sizeof(tuner_go));
502 return 0;
503}
504
505static struct mt352_config terratec_xs_mt352_cfg = {
506 .demod_address = (0x1e >> 1),
507 .no_tuner = 1,
508 .if2 = 45600,
f2d0c1c6 509 .demod_init = em28xx_mt352_terratec_xs_init,
4fb202a8
DH		 510};
511
285eb1a4
AP		 512static struct tda10023_config em28xx_tda10023_config = {
513 .demod_address = 0x0c,
514 .invert = 1,
515};
516
d6a5f921
AP		 517static struct cxd2820r_config em28xx_cxd2820r_config = {
518 .i2c_address = (0xd8 >> 1),
519 .ts_mode = CXD2820R_TS_SERIAL,
520 .if_dvbt_6 = 3300,
521 .if_dvbt_7 = 3500,
522 .if_dvbt_8 = 4000,
523 .if_dvbt2_6 = 3300,
524 .if_dvbt2_7 = 3500,
525 .if_dvbt2_8 = 4000,
526 .if_dvbc = 5000,
527
528 /* enable LNA for DVB-T2 and DVB-C */
529 .gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
530 .gpio_dvbc[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,
531};
532
533static struct tda18271_config em28xx_cxd2820r_tda18271_config = {
534 .output_opt = TDA18271_OUTPUT_LT_OFF,
0db4bf42 535 .gate = TDA18271_GATE_DIGITAL,
d6a5f921
AP		 536};
537
36588715
AP		 538static const struct tda10071_config em28xx_tda10071_config = {
539 .i2c_address = 0x55, /* (0xaa >> 1) */
540 .i2c_wr_max = 64,
541 .ts_mode = TDA10071_TS_SERIAL,
542 .spec_inv = 0,
543 .xtal = 40444000, /* 40.444 MHz */
544 .pll_multiplier = 20,
545};
546
547static const struct a8293_config em28xx_a8293_config = {
548 .i2c_addr = 0x08, /* (0x10 >> 1) */
549};
550
3aefb79a
MCC		 551/* ------------------------------------------------------------------ */
552
f2d0c1c6 553static int em28xx_attach_xc3028(u8 addr, struct em28xx *dev)
3aefb79a
MCC		 554{
555 struct dvb_frontend *fe;
3ca9c093
MCC		 556 struct xc2028_config cfg;
557
6ea54d93 558 memset(&cfg, 0, sizeof(cfg));
3ca9c093
MCC		 559 cfg.i2c_adap = &dev->i2c_adap;
560 cfg.i2c_addr = addr;
3ca9c093 561
f71095be 562 if (!dev->dvb->fe[0]) {
480be185
FR		 563 em28xx_errdev("/2: dvb frontend not attached. "
564 "Can't attach xc3028\n");
3aefb79a
MCC		 565 return -EINVAL;
566 }
567
f71095be 568 fe = dvb_attach(xc2028_attach, dev->dvb->fe[0], &cfg);
3aefb79a 569 if (!fe) {
480be185 570 em28xx_errdev("/2: xc3028 attach failed\n");
f71095be
AP		 571 dvb_frontend_detach(dev->dvb->fe[0]);
572 dev->dvb->fe[0] = NULL;
3aefb79a
MCC		 573 return -EINVAL;
574 }
575
480be185 576 em28xx_info("%s/2: xc3028 attached\n", dev->name);
3aefb79a
MCC		 577
578 return 0;
579}
580
3421b778
AT		 581/* ------------------------------------------------------------------ */
582
f2d0c1c6
JW		 583static int em28xx_register_dvb(struct em28xx_dvb *dvb, struct module *module,
584 struct em28xx *dev, struct device *device)
3aefb79a 585{
3421b778 586 int result;
3aefb79a 587
3421b778 588 mutex_init(&dvb->lock);
3aefb79a 589
3421b778
AT		 590 /* register adapter */
591 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
592 adapter_nr);
593 if (result < 0) {
594 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
595 dev->name, result);
596 goto fail_adapter;
597 }
e3569abc
MCC		 598
599 /* Ensure all frontends negotiate bus access */
f71095be
AP		 600 dvb->fe[0]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
601 if (dvb->fe[1])
602 dvb->fe[1]->ops.ts_bus_ctrl = em28xx_dvb_bus_ctrl;
e3569abc 603
3421b778
AT		 604 dvb->adapter.priv = dev;
605
606 /* register frontend */
f71095be 607 result = dvb_register_frontend(&dvb->adapter, dvb->fe[0]);
3421b778
AT		 608 if (result < 0) {
609 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
610 dev->name, result);
f71095be
AP		 611 goto fail_frontend0;
612 }
613
614 /* register 2nd frontend */
615 if (dvb->fe[1]) {
616 result = dvb_register_frontend(&dvb->adapter, dvb->fe[1]);
617 if (result < 0) {
618 printk(KERN_WARNING "%s: 2nd dvb_register_frontend failed (errno = %d)\n",
619 dev->name, result);
620 goto fail_frontend1;
621 }
3421b778
AT		 622 }
623
624 /* register demux stuff */
625 dvb->demux.dmx.capabilities =
626 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
627 DMX_MEMORY_BASED_FILTERING;
628 dvb->demux.priv = dvb;
629 dvb->demux.filternum = 256;
630 dvb->demux.feednum = 256;
f2d0c1c6
JW		 631 dvb->demux.start_feed = em28xx_start_feed;
632 dvb->demux.stop_feed = em28xx_stop_feed;
e3569abc 633
3421b778
AT		 634 result = dvb_dmx_init(&dvb->demux);
635 if (result < 0) {
636 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
637 dev->name, result);
638 goto fail_dmx;
639 }
640
641 dvb->dmxdev.filternum = 256;
642 dvb->dmxdev.demux = &dvb->demux.dmx;
643 dvb->dmxdev.capabilities = 0;
644 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
645 if (result < 0) {
646 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
647 dev->name, result);
648 goto fail_dmxdev;
649 }
52284c3e 650
3421b778
AT		 651 dvb->fe_hw.source = DMX_FRONTEND_0;
652 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
653 if (result < 0) {
654 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
655 dev->name, result);
656 goto fail_fe_hw;
657 }
658
659 dvb->fe_mem.source = DMX_MEMORY_FE;
660 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
661 if (result < 0) {
662 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
663 dev->name, result);
664 goto fail_fe_mem;
665 }
666
667 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
668 if (result < 0) {
669 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
670 dev->name, result);
671 goto fail_fe_conn;
672 }
673
674 /* register network adapter */
675 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
676 return 0;
677
678fail_fe_conn:
679 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
680fail_fe_mem:
681 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
682fail_fe_hw:
683 dvb_dmxdev_release(&dvb->dmxdev);
684fail_dmxdev:
685 dvb_dmx_release(&dvb->demux);
686fail_dmx:
f71095be
AP		 687 if (dvb->fe[1])
688 dvb_unregister_frontend(dvb->fe[1]);
689 dvb_unregister_frontend(dvb->fe[0]);
690fail_frontend1:
691 if (dvb->fe[1])
692 dvb_frontend_detach(dvb->fe[1]);
693fail_frontend0:
694 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 695 dvb_unregister_adapter(&dvb->adapter);
696fail_adapter:
697 return result;
698}
699
f2d0c1c6 700static void em28xx_unregister_dvb(struct em28xx_dvb *dvb)
3421b778
AT		 701{
702 dvb_net_release(&dvb->net);
703 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
704 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
705 dvb_dmxdev_release(&dvb->dmxdev);
706 dvb_dmx_release(&dvb->demux);
f71095be
AP		 707 if (dvb->fe[1])
708 dvb_unregister_frontend(dvb->fe[1]);
709 dvb_unregister_frontend(dvb->fe[0]);
c4c3a3d3 710 if (dvb->fe[1] && !dvb->dont_attach_fe1)
f71095be
AP		 711 dvb_frontend_detach(dvb->fe[1]);
712 dvb_frontend_detach(dvb->fe[0]);
3421b778
AT		 713 dvb_unregister_adapter(&dvb->adapter);
714}
715
f2d0c1c6 716static int em28xx_dvb_init(struct em28xx *dev)
3421b778 717{
e3645437 718 int result = 0, mfe_shared = 0;
3421b778
AT		 719 struct em28xx_dvb *dvb;
720
505b6d0b 721 if (!dev->board.has_dvb) {
df619181 722 /* This device does not support the extension */
ca3dfd6a 723 printk(KERN_INFO "em28xx_dvb: This device does not support the extension\n");
df619181
DH		 724 return 0;
725 }
726
3421b778 727 dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL);
6ea54d93
DSL		 728
729 if (dvb == NULL) {
480be185 730 em28xx_info("em28xx_dvb: memory allocation failed\n");
3421b778
AT		 731 return -ENOMEM;
732 }
733 dev->dvb = dvb;
f71095be 734 dvb->fe[0] = dvb->fe[1] = NULL;
3aefb79a 735
5013318c 736 mutex_lock(&dev->lock);
c67ec53f 737 em28xx_set_mode(dev, EM28XX_DIGITAL_MODE);
3aefb79a
MCC		 738 /* init frontend */
739 switch (dev->model) {
ebaefdb7 740 case EM2874_BOARD_LEADERSHIP_ISDBT:
f71095be 741 dvb->fe[0] = dvb_attach(s921_attach,
ca3dfd6a
MCC		 742 &sharp_isdbt, &dev->i2c_adap);
743
f71095be 744 if (!dvb->fe[0]) {
ca3dfd6a
MCC		 745 result = -EINVAL;
746 goto out_free;
747 }
748
749 break;
f89bc329 750 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850:
10ac6603 751 case EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950:
4fd305b2 752 case EM2880_BOARD_PINNACLE_PCTV_HD_PRO:
e14b3658 753 case EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600:
f71095be 754 dvb->fe[0] = dvb_attach(lgdt330x_attach,
3421b778
AT		 755 &em2880_lgdt3303_dev,
756 &dev->i2c_adap);
f2d0c1c6 757 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 758 result = -EINVAL;
759 goto out_free;
760 }
227ad4ab 761 break;
46510b56 762 case EM2880_BOARD_KWORLD_DVB_310U:
f71095be 763 dvb->fe[0] = dvb_attach(zl10353_attach,
3421b778
AT		 764 &em28xx_zl10353_with_xc3028,
765 &dev->i2c_adap);
f2d0c1c6 766 if (em28xx_attach_xc3028(0x61, dev) < 0) {
3421b778
AT		 767 result = -EINVAL;
768 goto out_free;
769 }
7e6388a1 770 break;
a84f79ae 771 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
ec994d05 772 case EM2882_BOARD_TERRATEC_HYBRID_XS:
01a5fd6f 773 case EM2880_BOARD_EMPIRE_DUAL_TV:
f71095be 774 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae
DH		 775 &em28xx_zl10353_xc3028_no_i2c_gate,
776 &dev->i2c_adap);
f2d0c1c6 777 if (em28xx_attach_xc3028(0x61, dev) < 0) {
a84f79ae
DH		 778 result = -EINVAL;
779 goto out_free;
780 }
781 break;
f797608c 782 case EM2880_BOARD_TERRATEC_HYBRID_XS:
65638011 783 case EM2880_BOARD_TERRATEC_HYBRID_XS_FR:
d5b3ba9c 784 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
7ca7ef60 785 case EM2882_BOARD_DIKOM_DK300:
811fab62 786 case EM2882_BOARD_KWORLD_VS_DVBT:
f71095be 787 dvb->fe[0] = dvb_attach(zl10353_attach,
a84f79ae 788 &em28xx_zl10353_xc3028_no_i2c_gate,
f797608c 789 &dev->i2c_adap);
f71095be 790 if (dvb->fe[0] == NULL) {
f797608c
DH		 791 /* This board could have either a zl10353 or a mt352.
792 If the chip id isn't for zl10353, try mt352 */
f71095be 793 dvb->fe[0] = dvb_attach(mt352_attach,
4fb202a8
DH		 794 &terratec_xs_mt352_cfg,
795 &dev->i2c_adap);
f797608c 796 }
4fb202a8 797
f2d0c1c6 798 if (em28xx_attach_xc3028(0x61, dev) < 0) {
f797608c
DH		 799 result = -EINVAL;
800 goto out_free;
801 }
802 break;
6e7b9ea0 803 case EM2883_BOARD_KWORLD_HYBRID_330U:
19859229 804 case EM2882_BOARD_EVGA_INDTUBE:
f71095be 805 dvb->fe[0] = dvb_attach(s5h1409_attach,
6e7b9ea0
RK		 806 &em28xx_s5h1409_with_xc3028,
807 &dev->i2c_adap);
f2d0c1c6 808 if (em28xx_attach_xc3028(0x61, dev) < 0) {
6e7b9ea0
RK		 809 result = -EINVAL;
810 goto out_free;
811 }
812 break;
d7de5d8f 813 case EM2882_BOARD_KWORLD_ATSC_315U:
f71095be 814 dvb->fe[0] = dvb_attach(lgdt330x_attach,
d7de5d8f
FM		 815 &em2880_lgdt3303_dev,
816 &dev->i2c_adap);
f71095be
AP		 817 if (dvb->fe[0] != NULL) {
818 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
d7de5d8f
FM		 819 &dev->i2c_adap, 0x61, TUNER_THOMSON_DTT761X)) {
820 result = -EINVAL;
821 goto out_free;
822 }
823 }
824 break;
17d9d558 825 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
ad9b4bb2 826 case EM2882_BOARD_PINNACLE_HYBRID_PRO_330E:
f71095be 827 dvb->fe[0] = dvb_attach(drxd_attach, &em28xx_drxd, NULL,
75e2b869 828 &dev->i2c_adap, &dev->udev->dev);
f2d0c1c6 829 if (em28xx_attach_xc3028(0x61, dev) < 0) {
17d9d558
DH		 830 result = -EINVAL;
831 goto out_free;
832 }
833 break;
285eb1a4
AP		 834 case EM2870_BOARD_REDDO_DVB_C_USB_BOX:
835 /* Philips CU1216L NIM (Philips TDA10023 + Infineon TUA6034) */
f71095be 836 dvb->fe[0] = dvb_attach(tda10023_attach,
285eb1a4
AP		 837 &em28xx_tda10023_config,
838 &dev->i2c_adap, 0x48);
f71095be
AP		 839 if (dvb->fe[0]) {
840 if (!dvb_attach(simple_tuner_attach, dvb->fe[0],
285eb1a4
AP		 841 &dev->i2c_adap, 0x60, TUNER_PHILIPS_CU1216L)) {
842 result = -EINVAL;
843 goto out_free;
844 }
845 }
846 break;
7e48b30a 847 case EM2870_BOARD_KWORLD_A340:
f71095be 848 dvb->fe[0] = dvb_attach(lgdt3305_attach,
7e48b30a
JW		 849 &em2870_lgdt3304_dev,
850 &dev->i2c_adap);
f71095be
AP		 851 if (dvb->fe[0] != NULL)
852 dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
7e48b30a
JW		 853 &dev->i2c_adap, &kworld_a340_config);
854 break;
d6a5f921
AP		 855 case EM28174_BOARD_PCTV_290E:
856 /* MFE
857 * FE 0 = DVB-T/T2 + FE 1 = DVB-C, both sharing same tuner. */
858 /* FE 0 */
859 dvb->fe[0] = dvb_attach(cxd2820r_attach,
860 &em28xx_cxd2820r_config, &dev->i2c_adap, NULL);
861 if (dvb->fe[0]) {
d6a5f921
AP		 862 /* FE 0 attach tuner */
863 if (!dvb_attach(tda18271_attach, dvb->fe[0], 0x60,
0db4bf42 864 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP		 865 dvb_frontend_detach(dvb->fe[0]);
866 result = -EINVAL;
867 goto out_free;
868 }
869 /* FE 1. This dvb_attach() cannot fail. */
870 dvb->fe[1] = dvb_attach(cxd2820r_attach, NULL, NULL,
871 dvb->fe[0]);
872 dvb->fe[1]->id = 1;
873 /* FE 1 attach tuner */
874 if (!dvb_attach(tda18271_attach, dvb->fe[1], 0x60,
0db4bf42 875 &dev->i2c_adap, &em28xx_cxd2820r_tda18271_config)) {
d6a5f921
AP		 876 dvb_frontend_detach(dvb->fe[1]);
877 /* leave FE 0 still active */
878 }
e3645437
AP		 879
880 mfe_shared = 1;
d6a5f921 881 }
82e7dbbd
EDP		 882 break;
883 case EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C:
884 hauppauge_hvr930c_init(dev);
885
886 dvb->dont_attach_fe1 = 1;
887
888 dvb->fe[0] = dvb_attach(drxk_attach, &hauppauge_930c_drxk, &dev->i2c_adap, &dvb->fe[1]);
889 if (!dvb->fe[0]) {
890 result = -EINVAL;
891 goto out_free;
892 }
893 /* FIXME: do we need a pll semaphore? */
894 dvb->fe[0]->sec_priv = dvb;
895 sema_init(&dvb->pll_mutex, 1);
896 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
897 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
898 dvb->fe[1]->id = 1;
899
900 /* Attach xc5000 */
901 struct xc5000_config cfg;
902 memset(&cfg, 0, sizeof(cfg));
903 cfg.i2c_address = 0x61;
904 //cfg.if_khz = 4570; //FIXME
905 cfg.if_khz = 4000; //FIXME (should be ok) read from i2c traffic
906
907 if (dvb->fe[0]->ops.i2c_gate_ctrl)
908 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
909 if (!dvb_attach(xc5000_attach, dvb->fe[0], &dev->i2c_adap, &cfg)) {
910 result = -EINVAL;
911 goto out_free;
912 }
913
914 if (dvb->fe[0]->ops.i2c_gate_ctrl)
915 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
916
917 /* Hack - needed by drxk/tda18271c2dd */
918 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
919 memcpy(&dvb->fe[1]->ops.tuner_ops,
920 &dvb->fe[0]->ops.tuner_ops,
921 sizeof(dvb->fe[0]->ops.tuner_ops));
922
fec528b7
MCC		 923 break;
924 case EM2884_BOARD_TERRATEC_H5:
925 terratec_h5_init(dev);
926
c4c3a3d3
MCC		 927 dvb->dont_attach_fe1 = 1;
928
fec528b7 929 dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]);
c4c3a3d3 930 if (!dvb->fe[0]) {
fec528b7
MCC		 931 result = -EINVAL;
932 goto out_free;
933 }
934 /* FIXME: do we need a pll semaphore? */
935 dvb->fe[0]->sec_priv = dvb;
936 sema_init(&dvb->pll_mutex, 1);
937 dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl;
938 dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl;
fec528b7
MCC		 939 dvb->fe[1]->id = 1;
940
c4c3a3d3 941 /* Attach tda18271 to DVB-C frontend */
fec528b7
MCC		 942 if (dvb->fe[0]->ops.i2c_gate_ctrl)
943 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1);
944 if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap, 0x60)) {
945 result = -EINVAL;
946 goto out_free;
947 }
948 if (dvb->fe[0]->ops.i2c_gate_ctrl)
949 dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0);
c4c3a3d3
MCC		 950
951 /* Hack - needed by drxk/tda18271c2dd */
952 dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv;
953 memcpy(&dvb->fe[1]->ops.tuner_ops,
954 &dvb->fe[0]->ops.tuner_ops,
955 sizeof(dvb->fe[0]->ops.tuner_ops));
fec528b7 956
d6a5f921 957 break;
36588715
AP		 958 case EM28174_BOARD_PCTV_460E:
959 /* attach demod */
960 dvb->fe[0] = dvb_attach(tda10071_attach,
961 &em28xx_tda10071_config, &dev->i2c_adap);
962
963 /* attach SEC */
964 if (dvb->fe[0])
965 dvb_attach(a8293_attach, dvb->fe[0], &dev->i2c_adap,
966 &em28xx_a8293_config);
967 break;
3aefb79a 968 default:
480be185
FR		 969 em28xx_errdev("/2: The frontend of your DVB/ATSC card"
970 " isn't supported yet\n");
3aefb79a
MCC		 971 break;
972 }
f71095be 973 if (NULL == dvb->fe[0]) {
480be185 974 em28xx_errdev("/2: frontend initialization failed\n");
3421b778
AT		 975 result = -EINVAL;
976 goto out_free;
3aefb79a 977 }
d7cba043 978 /* define general-purpose callback pointer */
f71095be 979 dvb->fe[0]->callback = em28xx_tuner_callback;
82e7dbbd
EDP		 980 if (dvb->fe[1])
981 dvb->fe[1]->callback = em28xx_tuner_callback;
3aefb79a
MCC		 982
983 /* register everything */
f2d0c1c6 984 result = em28xx_register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
3421b778 985
6ea54d93 986 if (result < 0)
3421b778 987 goto out_free;
3421b778 988
e3645437
AP		 989 /* MFE lock */
990 dvb->adapter.mfe_shared = mfe_shared;
991
480be185 992 em28xx_info("Successfully loaded em28xx-dvb\n");
5013318c
MCC		 993ret:
994 em28xx_set_mode(dev, EM28XX_SUSPEND);
995 mutex_unlock(&dev->lock);
996 return result;
3421b778
AT		 997
998out_free:
999 kfree(dvb);
1000 dev->dvb = NULL;
5013318c 1001 goto ret;
3aefb79a
MCC		 1002}
1003
0b8bd83c
CR		 1004static inline void prevent_sleep(struct dvb_frontend_ops *ops)
1005{
1006 ops->set_voltage = NULL;
1007 ops->sleep = NULL;
1008 ops->tuner_ops.sleep = NULL;
1009}
1010
f2d0c1c6 1011static int em28xx_dvb_fini(struct em28xx *dev)
3aefb79a 1012{
505b6d0b 1013 if (!dev->board.has_dvb) {
df619181
DH		 1014 /* This device does not support the extension */
1015 return 0;
1016 }
1017
3421b778 1018 if (dev->dvb) {
0b8bd83c
CR		 1019 struct em28xx_dvb *dvb = dev->dvb;
1020
1021 if (dev->state & DEV_DISCONNECTED) {
1022 /* We cannot tell the device to sleep
1023 * once it has been unplugged. */
1024 if (dvb->fe[0])
1025 prevent_sleep(&dvb->fe[0]->ops);
1026 if (dvb->fe[1])
1027 prevent_sleep(&dvb->fe[1]->ops);
1028 }
1029
1030 em28xx_unregister_dvb(dvb);
1031 kfree(dvb);
3421b778
AT		 1032 dev->dvb = NULL;
1033 }
3aefb79a
MCC		 1034
1035 return 0;
1036}
1037
1038static struct em28xx_ops dvb_ops = {
1039 .id = EM28XX_DVB,
1040 .name = "Em28xx dvb Extension",
f2d0c1c6
JW		 1041 .init = em28xx_dvb_init,
1042 .fini = em28xx_dvb_fini,
3aefb79a
MCC		 1043};
1044
1045static int __init em28xx_dvb_register(void)
1046{
1047 return em28xx_register_extension(&dvb_ops);
1048}
1049
1050static void __exit em28xx_dvb_unregister(void)
1051{
1052 em28xx_unregister_extension(&dvb_ops);
1053}
1054
1055module_init(em28xx_dvb_register);
1056module_exit(em28xx_dvb_unregister);
Linux kernel - Deliverables
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