V4L/DVB (9765): em28xx: move tuner gpio's to the cards struct
[deliverable/linux.git] / drivers / media / video / em28xx / em28xx.h
CommitLineData
a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
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25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
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29#include <media/videobuf-vmalloc.h>
30
a6c2ba28 31#include <linux/i2c.h>
3593cab5 32#include <linux/mutex.h>
d5e52653 33#include <media/ir-kbd-i2c.h>
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34#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
35#include <media/videobuf-dvb.h>
36#endif
3ca9c093 37#include "tuner-xc2028.h"
2ba890ec 38#include "em28xx-reg.h"
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39
40/* Boards supported by driver */
41#define EM2800_BOARD_UNKNOWN 0
42#define EM2820_BOARD_UNKNOWN 1
43#define EM2820_BOARD_TERRATEC_CINERGY_250 2
44#define EM2820_BOARD_PINNACLE_USB_2 3
45#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
46#define EM2820_BOARD_MSI_VOX_USB_2 5
47#define EM2800_BOARD_TERRATEC_CINERGY_200 6
48#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
49#define EM2800_BOARD_KWORLD_USB2800 8
50#define EM2820_BOARD_PINNACLE_DVC_90 9
51#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
52#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
53#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
54#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
55#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
56#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 57#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 58#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 59#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 60#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 61#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 62#define EM2800_BOARD_GRABBEEX_USB2800 21
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63#define EM2750_BOARD_UNKNOWN 22
64#define EM2750_BOARD_DLCW_130 23
65#define EM2820_BOARD_DLINK_USB_TV 24
66#define EM2820_BOARD_GADMEI_UTV310 25
67#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
68#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
69#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
70#define EM2820_BOARD_PINNACLE_DVC_100 29
71#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
72#define EM2821_BOARD_USBGEAR_VD204 31
73#define EM2821_BOARD_SUPERCOMP_USB_2 32
74#define EM2821_BOARD_PROLINK_PLAYTV_USB2 33
75#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
76#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
77#define EM2860_BOARD_NETGMBH_CAM 36
78#define EM2860_BOARD_GADMEI_UTV330 37
79#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
80#define EM2861_BOARD_KWORLD_PVRTV_300U 39
81#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
82#define EM2870_BOARD_KWORLD_350U 41
83#define EM2870_BOARD_KWORLD_355U 42
84#define EM2870_BOARD_TERRATEC_XS 43
85#define EM2870_BOARD_TERRATEC_XS_MT2060 44
86#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
87#define EM2870_BOARD_COMPRO_VIDEOMATE 46
88#define EM2880_BOARD_KWORLD_DVB_305U 47
89#define EM2880_BOARD_KWORLD_DVB_310U 48
90#define EM2880_BOARD_MSI_DIGIVOX_AD 49
91#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
92#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
93#define EM2881_BOARD_DNT_DA2_HYBRID 52
94#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
95#define EM2882_BOARD_KWORLD_VS_DVBT 54
96#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
97#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
98#define EM2883_BOARD_KWORLD_HYBRID_A316 57
ee281b85 99#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
864ec0b7 100#define EM2874_BOARD_PINNACLE_PCTV_80E 59
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101
102/* Limits minimum and default number of buffers */
103#define EM28XX_MIN_BUF 4
104#define EM28XX_DEF_BUF 8
a6c2ba28 105
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106/*Limits the max URB message size */
107#define URB_MAX_CTRL_SIZE 80
108
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109/* Params for validated field */
110#define EM28XX_BOARD_NOT_VALIDATED 1
111#define EM28XX_BOARD_VALIDATED 0
112
596d92d5 113/* maximum number of em28xx boards */
3687e1e6 114#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 115
a6c2ba28 116/* maximum number of frames that can be queued */
3acf2809 117#define EM28XX_NUM_FRAMES 5
a6c2ba28 118/* number of frames that get used for v4l2_read() */
3acf2809 119#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 120
121/* number of buffers for isoc transfers */
3acf2809 122#define EM28XX_NUM_BUFS 5
a6c2ba28 123
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124/* number of packets for each buffer
125 windows requests only 40 packets .. so we better do the same
126 this is what I found out for all alternate numbers there!
127 */
3acf2809 128#define EM28XX_NUM_PACKETS 40
a6c2ba28 129
a6c2ba28 130/* default alternate; 0 means choose the best */
3acf2809 131#define EM28XX_PINOUT 0
a6c2ba28 132
3acf2809 133#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 134
135/*
136#define (use usbview if you want to get the other alternate number infos)
137#define
138#define alternate number 2
139#define Endpoint Address: 82
140 Direction: in
141 Attribute: 1
142 Type: Isoc
143 Max Packet Size: 1448
144 Interval: 125us
145
146 alternate number 7
147
148 Endpoint Address: 82
149 Direction: in
150 Attribute: 1
151 Type: Isoc
152 Max Packet Size: 3072
153 Interval: 125us
154*/
155
156/* time to wait when stopping the isoc transfer */
3acf2809 157#define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 158
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159/* time in msecs to wait for i2c writes to finish */
160#define EM2800_I2C_WRITE_TIMEOUT 20
161
3aefb79a 162enum em28xx_mode {
2fe3e2ee 163 EM28XX_SUSPEND,
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164 EM28XX_ANALOG_MODE,
165 EM28XX_DIGITAL_MODE,
166};
167
3acf2809 168enum em28xx_stream_state {
a6c2ba28 169 STREAM_OFF,
170 STREAM_INTERRUPT,
171 STREAM_ON,
172};
173
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174struct em28xx;
175
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176struct em28xx_usb_isoc_ctl {
177 /* max packet size of isoc transaction */
178 int max_pkt_size;
179
180 /* number of allocated urbs */
181 int num_bufs;
182
183 /* urb for isoc transfers */
184 struct urb **urb;
185
186 /* transfer buffers for isoc transfer */
187 char **transfer_buffer;
188
189 /* Last buffer command and region */
190 u8 cmd;
191 int pos, size, pktsize;
192
193 /* Last field: ODD or EVEN? */
194 int field;
195
196 /* Stores incomplete commands */
197 u32 tmp_buf;
198 int tmp_buf_len;
199
200 /* Stores already requested buffers */
201 struct em28xx_buffer *buf;
202
203 /* Stores the number of received fields */
204 int nfields;
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205
206 /* isoc urb callback */
207 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
208
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209};
210
211struct em28xx_fmt {
212 char *name;
213 u32 fourcc; /* v4l2 format id */
214};
215
216/* buffer for one video frame */
217struct em28xx_buffer {
218 /* common v4l buffer stuff -- must be first */
219 struct videobuf_buffer vb;
220
a6c2ba28 221 struct list_head frame;
a6c2ba28 222 int top_field;
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223 int receiving;
224};
225
226struct em28xx_dmaqueue {
227 struct list_head active;
228 struct list_head queued;
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229
230 wait_queue_head_t wq;
231
232 /* Counters to control buffer fill */
233 int pos;
a6c2ba28 234};
235
236/* io methods */
3acf2809 237enum em28xx_io_method {
a6c2ba28 238 IO_NONE,
239 IO_READ,
240 IO_MMAP,
241};
242
243/* inputs */
244
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245#define MAX_EM28XX_INPUT 4
246enum enum28xx_itype {
247 EM28XX_VMUX_COMPOSITE1 = 1,
248 EM28XX_VMUX_COMPOSITE2,
249 EM28XX_VMUX_COMPOSITE3,
250 EM28XX_VMUX_COMPOSITE4,
251 EM28XX_VMUX_SVIDEO,
252 EM28XX_VMUX_TELEVISION,
253 EM28XX_VMUX_CABLE,
254 EM28XX_VMUX_DVB,
255 EM28XX_VMUX_DEBUG,
256 EM28XX_RADIO,
a6c2ba28 257};
258
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259enum em28xx_ac97_mode {
260 EM28XX_NO_AC97 = 0,
261 EM28XX_AC97_EM202,
209acc02 262 EM28XX_AC97_SIGMATEL,
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MCC
263 EM28XX_AC97_OTHER,
264};
265
266struct em28xx_audio_mode {
267 enum em28xx_ac97_mode ac97;
268
269 u16 ac97_feat;
16c7bcad 270 u32 ac97_vendor_id;
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271
272 unsigned int has_audio:1;
273
274 unsigned int i2s_3rates:1;
275 unsigned int i2s_5rates:1;
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DH
276};
277
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278/* em28xx has two audio inputs: tuner and line in.
279 However, on most devices, an auxiliary AC97 codec device is used.
280 The AC97 device may have several different inputs and outputs,
281 depending on their model. So, it is possible to use AC97 mixer to
282 address more than two different entries.
283 */
539c96d0 284enum em28xx_amux {
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285 /* This is the only entry for em28xx tuner input */
286 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
287
288 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
289
290 /* Some less-common mixer setups */
291 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
292 EM28XX_AMUX_PHONE,
293 EM28XX_AMUX_MIC,
294 EM28XX_AMUX_CD,
295 EM28XX_AMUX_AUX,
296 EM28XX_AMUX_PCM_OUT,
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297};
298
35ae6f04 299enum em28xx_aout {
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300 EM28XX_AOUT_MASTER = 1 << 0,
301 EM28XX_AOUT_LINE = 1 << 1,
302 EM28XX_AOUT_MONO = 1 << 2,
303 EM28XX_AOUT_LFE = 1 << 3,
304 EM28XX_AOUT_SURR = 1 << 4,
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MCC
305};
306
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307struct em28xx_reg_seq {
308 int reg;
309 unsigned char val, mask;
310 int sleep;
311};
312
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313struct em28xx_input {
314 enum enum28xx_itype type;
a6c2ba28 315 unsigned int vmux;
539c96d0 316 enum em28xx_amux amux;
35ae6f04 317 enum em28xx_aout aout;
122b77e5 318 struct em28xx_reg_seq *gpio;
a6c2ba28 319};
320
3acf2809 321#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 322
3acf2809 323enum em28xx_decoder {
1ed1dd54 324 EM28XX_NODECODER,
3acf2809 325 EM28XX_TVP5150,
ec5de990 326 EM28XX_SAA711X,
a6c2ba28 327};
328
3acf2809 329struct em28xx_board {
a6c2ba28 330 char *name;
505b6d0b 331 int vchannels;
a6c2ba28 332 int tuner_type;
66767920 333 int tuner_addr;
a6c2ba28 334
335 /* i2c flags */
336 unsigned int tda9887_conf;
337
017ab4b1 338 /* GPIO sequences */
122b77e5 339 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 340 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 341 struct em28xx_reg_seq *tuner_gpio;
122b77e5 342
74f38a82 343 unsigned int is_em2800:1;
a6c2ba28 344 unsigned int has_msp34xx:1;
5add9a6f 345 unsigned int mts_firmware:1;
c8793b03 346 unsigned int max_range_640_480:1;
3aefb79a 347 unsigned int has_dvb:1;
a9fc52bc 348 unsigned int has_snapshot_button:1;
95b86a9a 349 unsigned int valid:1;
3abee53e 350
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351 unsigned char xclk, i2c_speed;
352
3acf2809 353 enum em28xx_decoder decoder;
a6c2ba28 354
3acf2809 355 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 356 struct em28xx_input radio;
4b92253a 357 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 358};
359
3acf2809 360struct em28xx_eeprom {
a6c2ba28 361 u32 id; /* 0x9567eb1a */
362 u16 vendor_ID;
363 u16 product_ID;
364
365 u16 chip_conf;
366
367 u16 board_conf;
368
369 u16 string1, string2, string3;
370
371 u8 string_idx_table;
372};
373
374/* device states */
3acf2809 375enum em28xx_dev_state {
a6c2ba28 376 DEV_INITIALIZED = 0x01,
377 DEV_DISCONNECTED = 0x02,
378 DEV_MISCONFIGURED = 0x04,
379};
380
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381#define EM28XX_AUDIO_BUFS 5
382#define EM28XX_NUM_AUDIO_PACKETS 64
383#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
384#define EM28XX_CAPTURE_STREAM_EN 1
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385
386/* em28xx extensions */
6d79468d 387#define EM28XX_AUDIO 0x10
3aefb79a 388#define EM28XX_DVB 0x20
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389
390struct em28xx_audio {
391 char name[50];
392 char *transfer_buffer[EM28XX_AUDIO_BUFS];
393 struct urb *urb[EM28XX_AUDIO_BUFS];
394 struct usb_device *udev;
395 unsigned int capture_transfer_done;
396 struct snd_pcm_substream *capture_pcm_substream;
397
398 unsigned int hwptr_done_capture;
399 struct snd_card *sndcard;
400
401 int users, shutdown;
402 enum em28xx_stream_state capture_stream;
403 spinlock_t slock;
404};
405
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MCC
406struct em28xx;
407
408struct em28xx_fh {
409 struct em28xx *dev;
410 unsigned int stream_on:1; /* Locks streams */
411 int radio;
412
413 struct videobuf_queue vb_vidq;
414
415 enum v4l2_buf_type type;
416};
417
a6c2ba28 418/* main device struct */
3acf2809 419struct em28xx {
a6c2ba28 420 /* generic device properties */
421 char name[30]; /* name (including minor) of the device */
422 int model; /* index in the device_data struct */
e5589bef 423 int devno; /* marks the number of this device */
600bd7f0 424 enum em28xx_chip_id chip_id;
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MCC
425
426 struct em28xx_board board;
427
a225452e 428 unsigned int stream_on:1; /* Locks streams */
d7448a8d 429 unsigned int has_audio_class:1;
24a613e4 430 unsigned int has_alsa_audio:1;
a2070c66 431
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MCC
432 struct em28xx_IR *ir;
433
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MCC
434 /* Some older em28xx chips needs a waiting time after writing */
435 unsigned int wait_after_write;
436
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MCC
437 struct list_head devlist;
438
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MCC
439 u32 i2s_speed; /* I2S speed for audio digital stream */
440
35643943 441 struct em28xx_audio_mode audio_mode;
a6c2ba28 442
443 int tuner_type; /* type of the tuner */
444 int tuner_addr; /* tuner address */
445 int tda9887_conf;
446 /* i2c i/o */
447 struct i2c_adapter i2c_adap;
448 struct i2c_client i2c_client;
449 /* video for linux */
450 int users; /* user count for exclusive use */
451 struct video_device *vdev; /* video for linux device struct */
7d497f8a 452 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 453 int ctl_freq; /* selected frequency */
454 unsigned int ctl_input; /* selected input */
95b86a9a 455 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 456 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 457 int mute;
458 int volume;
459 /* frame properties */
a6c2ba28 460 int width; /* current frame width */
461 int height; /* current frame height */
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462 unsigned hscale; /* horizontal scale factor (see datasheet) */
463 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 464 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 465 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 466
03910cc3 467 unsigned long hash; /* eeprom hash - for boards with generic ID */
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468 unsigned long i2c_hash; /* i2c devicelist hash -
469 for boards with generic ID */
03910cc3 470
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471 struct em28xx_audio *adev;
472
a6c2ba28 473 /* states */
3acf2809 474 enum em28xx_dev_state state;
3acf2809 475 enum em28xx_io_method io;
9e31ced8 476
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MCC
477 struct work_struct request_module_wk;
478
a6c2ba28 479 /* locks */
5a80415b 480 struct mutex lock;
f2a2e491 481 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 482 /* spinlock_t queue_lock; */
a6c2ba28 483 struct list_head inqueue, outqueue;
484 wait_queue_head_t open, wait_frame, wait_stream;
485 struct video_device *vbi_dev;
0be43754 486 struct video_device *radio_dev;
a6c2ba28 487
488 unsigned char eedata[256];
489
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MCC
490 /* Isoc control struct */
491 struct em28xx_dmaqueue vidq;
492 struct em28xx_usb_isoc_ctl isoc_ctl;
493 spinlock_t slock;
494
a6c2ba28 495 /* usb transfer */
496 struct usb_device *udev; /* the usb device */
497 int alt; /* alternate */
498 int max_pkt_size; /* max packet size of isoc transaction */
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MCC
499 int num_alt; /* Number of alternative settings */
500 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
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MCC
501 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
502 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */
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503 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
504
a6c2ba28 505 /* helper funcs that call usb_control_msg */
6ea54d93 506 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 507 char *buf, int len);
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DSL
508 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
509 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
510 char *buf, int len);
511 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 512 char *buf, int len);
6ea54d93 513 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
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MCC
514
515 enum em28xx_mode mode;
516
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DH
517 /* register numbers for GPO/GPIO registers */
518 u16 reg_gpo_num, reg_gpio_num;
519
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MCC
520 /* Caches GPO and GPIO registers */
521 unsigned char reg_gpo, reg_gpio;
522
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DH
523 /* Snapshot button */
524 char snapshot_button_path[30]; /* path of the input dev */
525 struct input_dev *sbutton_input_dev;
526 struct delayed_work sbutton_query_work;
527
3421b778 528 struct em28xx_dvb *dvb;
a6c2ba28 529};
530
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MCC
531struct em28xx_ops {
532 struct list_head next;
533 char *name;
534 int id;
535 int (*init)(struct em28xx *);
536 int (*fini)(struct em28xx *);
a3a048ce
MCC
537};
538
3acf2809 539/* Provided by em28xx-i2c.c */
a6c2ba28 540
3acf2809 541void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg);
fad7b958 542void em28xx_do_i2c_scan(struct em28xx *dev);
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MCC
543int em28xx_i2c_register(struct em28xx *dev);
544int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 545
3acf2809 546/* Provided by em28xx-core.c */
a6c2ba28 547
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MCC
548u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
549void em28xx_queue_unusedframes(struct em28xx *dev);
550void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 551
3acf2809 552int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 553 char *buf, int len);
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MCC
554int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
555int em28xx_read_reg(struct em28xx *dev, u16 reg);
556int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 557 int len);
3acf2809 558int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489
DH
559int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
560
3acf2809 561int em28xx_audio_analog_set(struct em28xx *dev);
35643943 562int em28xx_audio_setup(struct em28xx *dev);
539c96d0 563
3acf2809
MCC
564int em28xx_colorlevels_set_default(struct em28xx *dev);
565int em28xx_capture_start(struct em28xx *dev, int start);
566int em28xx_outfmt_set_yuv422(struct em28xx *dev);
3acf2809 567int em28xx_resolution_set(struct em28xx *dev);
3acf2809 568int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
569int em28xx_init_isoc(struct em28xx *dev, int max_packets,
570 int num_bufs, int max_pkt_size,
c67ec53f 571 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 572void em28xx_uninit_isoc(struct em28xx *dev);
c67ec53f
MCC
573int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
574int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
3acf2809 575
6d79468d
MCC
576/* Provided by em28xx-video.c */
577int em28xx_register_extension(struct em28xx_ops *dev);
578void em28xx_unregister_extension(struct em28xx_ops *dev);
579
3acf2809 580/* Provided by em28xx-cards.c */
6ea54d93 581extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 582extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
583extern void em28xx_card_setup(struct em28xx *dev);
584extern struct em28xx_board em28xx_boards[];
585extern struct usb_device_id em28xx_id_table[];
586extern const unsigned int em28xx_bcount;
c8793b03 587void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 588int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
c8793b03
MCC
589
590/* Provided by em28xx-input.c */
c8793b03
MCC
591int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
592int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
593int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
594 u32 *ir_raw);
a9fc52bc
DH
595void em28xx_register_snapshot_button(struct em28xx *dev);
596void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 597
a924a499
MCC
598int em28xx_ir_init(struct em28xx *dev);
599int em28xx_ir_fini(struct em28xx *dev);
600
a6c2ba28 601/* printk macros */
602
3acf2809 603#define em28xx_err(fmt, arg...) do {\
f85c657f 604 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 605
3acf2809 606#define em28xx_errdev(fmt, arg...) do {\
4ac97914 607 printk(KERN_ERR "%s: "fmt,\
f85c657f 608 dev->name , ##arg); } while (0)
a6c2ba28 609
3acf2809 610#define em28xx_info(fmt, arg...) do {\
4ac97914 611 printk(KERN_INFO "%s: "fmt,\
f85c657f 612 dev->name , ##arg); } while (0)
3acf2809 613#define em28xx_warn(fmt, arg...) do {\
4ac97914 614 printk(KERN_WARNING "%s: "fmt,\
f85c657f 615 dev->name , ##arg); } while (0)
a6c2ba28 616
6ea54d93 617static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 618{
619 /* side effect of disabling scaler and mixer */
2a29a0d7 620 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 621}
622
6ea54d93 623static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 624{
41facaa4 625 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 626}
627
6ea54d93 628static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 629{
41facaa4 630 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 631}
632
6ea54d93 633static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 634{
41facaa4 635 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 636}
637
6ea54d93 638static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 639{
41facaa4 640 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 641}
642
6ea54d93 643static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 644{
41facaa4 645 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 646}
647
6ea54d93 648static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 649{
41facaa4 650 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 651}
652
6ea54d93 653static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 654{
655 u8 tmp = (u8) val;
41facaa4 656 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 657}
658
6ea54d93 659static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 660{
661 u8 tmp = (u8) val;
41facaa4 662 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 663}
664
6ea54d93 665static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 666{
667 u8 tmp = (u8) val;
41facaa4 668 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 669}
670
6ea54d93 671static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 672{
673 u8 tmp = (u8) val;
41facaa4 674 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 675}
676
6ea54d93 677static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 678{
679 u8 tmp = (u8) val;
41facaa4 680 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 681}
682
6ea54d93 683static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 684{
685 u8 tmp = (u8) val;
41facaa4 686 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 687}
688
689/*FIXME: maxw should be dependent of alt mode */
6ea54d93 690static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 691{
505b6d0b 692 if (dev->board.max_range_640_480)
7d497f8a 693 return 640;
c8793b03 694 else
7d497f8a 695 return 720;
30556b23
MR
696}
697
6ea54d93 698static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 699{
505b6d0b 700 if (dev->board.max_range_640_480)
7d497f8a 701 return 480;
c8793b03 702 else
7d497f8a 703 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 704}
a6c2ba28 705#endif
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