Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
a6c2ba28 | 7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
cb77d010 | 28 | #include <linux/videodev2.h> |
ad0ebb96 MCC |
29 | #include <media/videobuf-vmalloc.h> |
30 | ||
a6c2ba28 | 31 | #include <linux/i2c.h> |
3593cab5 | 32 | #include <linux/mutex.h> |
d5e52653 | 33 | #include <media/ir-kbd-i2c.h> |
3aefb79a MCC |
34 | #if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) |
35 | #include <media/videobuf-dvb.h> | |
36 | #endif | |
3ca9c093 | 37 | #include "tuner-xc2028.h" |
2ba890ec | 38 | #include "em28xx-reg.h" |
3aefb79a MCC |
39 | |
40 | /* Boards supported by driver */ | |
41 | #define EM2800_BOARD_UNKNOWN 0 | |
42 | #define EM2820_BOARD_UNKNOWN 1 | |
43 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
44 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
45 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
46 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
47 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
48 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
49 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
50 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
51 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
52 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
53 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
54 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
55 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
56 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
57 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_950 16 | |
4fd305b2 | 58 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 |
17d9d558 | 59 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 |
3aefb79a MCC |
60 | |
61 | /* Limits minimum and default number of buffers */ | |
62 | #define EM28XX_MIN_BUF 4 | |
63 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 64 | |
596d92d5 | 65 | /* maximum number of em28xx boards */ |
3687e1e6 | 66 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 67 | |
a6c2ba28 | 68 | /* maximum number of frames that can be queued */ |
3acf2809 | 69 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 70 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 71 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 72 | |
73 | /* number of buffers for isoc transfers */ | |
3acf2809 | 74 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 75 | |
d5e52653 MCC |
76 | /* number of packets for each buffer |
77 | windows requests only 40 packets .. so we better do the same | |
78 | this is what I found out for all alternate numbers there! | |
79 | */ | |
3acf2809 | 80 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 81 | |
a6c2ba28 | 82 | /* default alternate; 0 means choose the best */ |
3acf2809 | 83 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 84 | |
3acf2809 | 85 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 86 | |
87 | /* | |
88 | #define (use usbview if you want to get the other alternate number infos) | |
89 | #define | |
90 | #define alternate number 2 | |
91 | #define Endpoint Address: 82 | |
92 | Direction: in | |
93 | Attribute: 1 | |
94 | Type: Isoc | |
95 | Max Packet Size: 1448 | |
96 | Interval: 125us | |
97 | ||
98 | alternate number 7 | |
99 | ||
100 | Endpoint Address: 82 | |
101 | Direction: in | |
102 | Attribute: 1 | |
103 | Type: Isoc | |
104 | Max Packet Size: 3072 | |
105 | Interval: 125us | |
106 | */ | |
107 | ||
108 | /* time to wait when stopping the isoc transfer */ | |
3acf2809 | 109 | #define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) |
a6c2ba28 | 110 | |
596d92d5 MCC |
111 | /* time in msecs to wait for i2c writes to finish */ |
112 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
113 | ||
3aefb79a | 114 | enum em28xx_mode { |
c67ec53f | 115 | EM28XX_MODE_UNDEFINED, |
3aefb79a MCC |
116 | EM28XX_ANALOG_MODE, |
117 | EM28XX_DIGITAL_MODE, | |
118 | }; | |
119 | ||
3acf2809 | 120 | enum em28xx_stream_state { |
a6c2ba28 | 121 | STREAM_OFF, |
122 | STREAM_INTERRUPT, | |
123 | STREAM_ON, | |
124 | }; | |
125 | ||
579f72e4 AT |
126 | struct em28xx; |
127 | ||
ad0ebb96 MCC |
128 | struct em28xx_usb_isoc_ctl { |
129 | /* max packet size of isoc transaction */ | |
130 | int max_pkt_size; | |
131 | ||
132 | /* number of allocated urbs */ | |
133 | int num_bufs; | |
134 | ||
135 | /* urb for isoc transfers */ | |
136 | struct urb **urb; | |
137 | ||
138 | /* transfer buffers for isoc transfer */ | |
139 | char **transfer_buffer; | |
140 | ||
141 | /* Last buffer command and region */ | |
142 | u8 cmd; | |
143 | int pos, size, pktsize; | |
144 | ||
145 | /* Last field: ODD or EVEN? */ | |
146 | int field; | |
147 | ||
148 | /* Stores incomplete commands */ | |
149 | u32 tmp_buf; | |
150 | int tmp_buf_len; | |
151 | ||
152 | /* Stores already requested buffers */ | |
153 | struct em28xx_buffer *buf; | |
154 | ||
155 | /* Stores the number of received fields */ | |
156 | int nfields; | |
579f72e4 AT |
157 | |
158 | /* isoc urb callback */ | |
159 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb); | |
160 | ||
ad0ebb96 MCC |
161 | }; |
162 | ||
163 | struct em28xx_fmt { | |
164 | char *name; | |
165 | u32 fourcc; /* v4l2 format id */ | |
166 | }; | |
167 | ||
168 | /* buffer for one video frame */ | |
169 | struct em28xx_buffer { | |
170 | /* common v4l buffer stuff -- must be first */ | |
171 | struct videobuf_buffer vb; | |
172 | ||
a6c2ba28 | 173 | struct list_head frame; |
a6c2ba28 | 174 | int top_field; |
ad0ebb96 MCC |
175 | int receiving; |
176 | }; | |
177 | ||
178 | struct em28xx_dmaqueue { | |
179 | struct list_head active; | |
180 | struct list_head queued; | |
ad0ebb96 MCC |
181 | |
182 | wait_queue_head_t wq; | |
183 | ||
184 | /* Counters to control buffer fill */ | |
185 | int pos; | |
a6c2ba28 | 186 | }; |
187 | ||
188 | /* io methods */ | |
3acf2809 | 189 | enum em28xx_io_method { |
a6c2ba28 | 190 | IO_NONE, |
191 | IO_READ, | |
192 | IO_MMAP, | |
193 | }; | |
194 | ||
195 | /* inputs */ | |
196 | ||
3acf2809 MCC |
197 | #define MAX_EM28XX_INPUT 4 |
198 | enum enum28xx_itype { | |
199 | EM28XX_VMUX_COMPOSITE1 = 1, | |
200 | EM28XX_VMUX_COMPOSITE2, | |
201 | EM28XX_VMUX_COMPOSITE3, | |
202 | EM28XX_VMUX_COMPOSITE4, | |
203 | EM28XX_VMUX_SVIDEO, | |
204 | EM28XX_VMUX_TELEVISION, | |
205 | EM28XX_VMUX_CABLE, | |
206 | EM28XX_VMUX_DVB, | |
207 | EM28XX_VMUX_DEBUG, | |
208 | EM28XX_RADIO, | |
a6c2ba28 | 209 | }; |
210 | ||
539c96d0 MCC |
211 | enum em28xx_amux { |
212 | EM28XX_AMUX_VIDEO, | |
213 | EM28XX_AMUX_LINE_IN, | |
214 | EM28XX_AMUX_AC97_VIDEO, | |
215 | EM28XX_AMUX_AC97_LINE_IN, | |
216 | }; | |
217 | ||
3acf2809 MCC |
218 | struct em28xx_input { |
219 | enum enum28xx_itype type; | |
a6c2ba28 | 220 | unsigned int vmux; |
539c96d0 | 221 | enum em28xx_amux amux; |
a6c2ba28 | 222 | }; |
223 | ||
3acf2809 | 224 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 225 | |
3acf2809 MCC |
226 | enum em28xx_decoder { |
227 | EM28XX_TVP5150, | |
228 | EM28XX_SAA7113, | |
229 | EM28XX_SAA7114 | |
a6c2ba28 | 230 | }; |
231 | ||
102a0b08 MCC |
232 | struct em28xx_reg_seq { |
233 | int reg; | |
c67ec53f | 234 | unsigned char val, mask; |
102a0b08 | 235 | int sleep; |
ee6e3a86 MCC |
236 | }; |
237 | ||
3acf2809 | 238 | struct em28xx_board { |
a6c2ba28 | 239 | char *name; |
a6c2ba28 | 240 | int vchannels; |
a6c2ba28 | 241 | int tuner_type; |
242 | ||
243 | /* i2c flags */ | |
244 | unsigned int tda9887_conf; | |
245 | ||
74f38a82 | 246 | unsigned int is_em2800:1; |
a6c2ba28 | 247 | unsigned int has_msp34xx:1; |
5add9a6f | 248 | unsigned int mts_firmware:1; |
3abee53e | 249 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 250 | unsigned int max_range_640_480:1; |
3aefb79a | 251 | unsigned int has_dvb:1; |
3abee53e | 252 | |
3acf2809 | 253 | enum em28xx_decoder decoder; |
a6c2ba28 | 254 | |
3acf2809 | 255 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 256 | struct em28xx_input radio; |
a6c2ba28 | 257 | }; |
258 | ||
3acf2809 | 259 | struct em28xx_eeprom { |
a6c2ba28 | 260 | u32 id; /* 0x9567eb1a */ |
261 | u16 vendor_ID; | |
262 | u16 product_ID; | |
263 | ||
264 | u16 chip_conf; | |
265 | ||
266 | u16 board_conf; | |
267 | ||
268 | u16 string1, string2, string3; | |
269 | ||
270 | u8 string_idx_table; | |
271 | }; | |
272 | ||
273 | /* device states */ | |
3acf2809 | 274 | enum em28xx_dev_state { |
a6c2ba28 | 275 | DEV_INITIALIZED = 0x01, |
276 | DEV_DISCONNECTED = 0x02, | |
277 | DEV_MISCONFIGURED = 0x04, | |
278 | }; | |
279 | ||
6d79468d MCC |
280 | #define EM28XX_AUDIO_BUFS 5 |
281 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
282 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
283 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
284 | |
285 | /* em28xx extensions */ | |
6d79468d | 286 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 287 | #define EM28XX_DVB 0x20 |
6d79468d MCC |
288 | |
289 | struct em28xx_audio { | |
290 | char name[50]; | |
291 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
292 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
293 | struct usb_device *udev; | |
294 | unsigned int capture_transfer_done; | |
295 | struct snd_pcm_substream *capture_pcm_substream; | |
296 | ||
297 | unsigned int hwptr_done_capture; | |
298 | struct snd_card *sndcard; | |
299 | ||
300 | int users, shutdown; | |
301 | enum em28xx_stream_state capture_stream; | |
302 | spinlock_t slock; | |
303 | }; | |
304 | ||
52284c3e MCC |
305 | struct em28xx; |
306 | ||
307 | struct em28xx_fh { | |
308 | struct em28xx *dev; | |
309 | unsigned int stream_on:1; /* Locks streams */ | |
310 | int radio; | |
311 | ||
312 | struct videobuf_queue vb_vidq; | |
313 | ||
314 | enum v4l2_buf_type type; | |
315 | }; | |
316 | ||
a6c2ba28 | 317 | /* main device struct */ |
3acf2809 | 318 | struct em28xx { |
a6c2ba28 | 319 | /* generic device properties */ |
320 | char name[30]; /* name (including minor) of the device */ | |
321 | int model; /* index in the device_data struct */ | |
e5589bef | 322 | int devno; /* marks the number of this device */ |
74f38a82 | 323 | unsigned int is_em2800:1; |
a6c2ba28 | 324 | unsigned int has_msp34xx:1; |
325 | unsigned int has_tda9887:1; | |
a225452e | 326 | unsigned int stream_on:1; /* Locks streams */ |
d7448a8d | 327 | unsigned int has_audio_class:1; |
3abee53e | 328 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 329 | unsigned int max_range_640_480:1; |
3aefb79a | 330 | unsigned int has_dvb:1; |
a225452e | 331 | |
89b329ef MCC |
332 | /* Some older em28xx chips needs a waiting time after writing */ |
333 | unsigned int wait_after_write; | |
334 | ||
c67ec53f | 335 | /* GPIO sequences for analog and digital mode */ |
102a0b08 | 336 | struct em28xx_reg_seq *analog_gpio, *digital_gpio; |
ee6e3a86 | 337 | |
c67ec53f MCC |
338 | /* GPIO sequences for tuner callbacks */ |
339 | struct em28xx_reg_seq *tun_analog_gpio, *tun_digital_gpio; | |
340 | ||
74f38a82 MCC |
341 | int video_inputs; /* number of video inputs */ |
342 | struct list_head devlist; | |
343 | ||
9bb13a6d MCC |
344 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
345 | ||
3acf2809 | 346 | enum em28xx_decoder decoder; |
a6c2ba28 | 347 | |
348 | int tuner_type; /* type of the tuner */ | |
349 | int tuner_addr; /* tuner address */ | |
350 | int tda9887_conf; | |
351 | /* i2c i/o */ | |
352 | struct i2c_adapter i2c_adap; | |
353 | struct i2c_client i2c_client; | |
354 | /* video for linux */ | |
355 | int users; /* user count for exclusive use */ | |
356 | struct video_device *vdev; /* video for linux device struct */ | |
7d497f8a | 357 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 358 | int ctl_freq; /* selected frequency */ |
359 | unsigned int ctl_input; /* selected input */ | |
360 | unsigned int ctl_ainput; /* slected audio input */ | |
361 | int mute; | |
362 | int volume; | |
363 | /* frame properties */ | |
a6c2ba28 | 364 | int width; /* current frame width */ |
365 | int height; /* current frame height */ | |
a6c2ba28 | 366 | int hscale; /* horizontal scale factor (see datasheet) */ |
367 | int vscale; /* vertical scale factor (see datasheet) */ | |
368 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
9e31ced8 | 369 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 370 | |
03910cc3 | 371 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
372 | unsigned long i2c_hash; /* i2c devicelist hash - |
373 | for boards with generic ID */ | |
03910cc3 | 374 | |
6d79468d MCC |
375 | struct em28xx_audio *adev; |
376 | ||
a6c2ba28 | 377 | /* states */ |
3acf2809 | 378 | enum em28xx_dev_state state; |
3acf2809 | 379 | enum em28xx_io_method io; |
9e31ced8 | 380 | |
d7448a8d MCC |
381 | struct work_struct request_module_wk; |
382 | ||
a6c2ba28 | 383 | /* locks */ |
5a80415b | 384 | struct mutex lock; |
d7aa8020 | 385 | /* spinlock_t queue_lock; */ |
a6c2ba28 | 386 | struct list_head inqueue, outqueue; |
387 | wait_queue_head_t open, wait_frame, wait_stream; | |
388 | struct video_device *vbi_dev; | |
0be43754 | 389 | struct video_device *radio_dev; |
a6c2ba28 | 390 | |
391 | unsigned char eedata[256]; | |
392 | ||
ad0ebb96 MCC |
393 | /* Isoc control struct */ |
394 | struct em28xx_dmaqueue vidq; | |
395 | struct em28xx_usb_isoc_ctl isoc_ctl; | |
396 | spinlock_t slock; | |
397 | ||
a6c2ba28 | 398 | /* usb transfer */ |
399 | struct usb_device *udev; /* the usb device */ | |
400 | int alt; /* alternate */ | |
401 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
402 | int num_alt; /* Number of alternative settings */ |
403 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 MCC |
404 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
405 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */ | |
a6c2ba28 | 406 | /* helper funcs that call usb_control_msg */ |
6ea54d93 | 407 | int (*em28xx_write_regs) (struct em28xx *dev, u16 reg, |
a6c2ba28 | 408 | char *buf, int len); |
6ea54d93 DSL |
409 | int (*em28xx_read_reg) (struct em28xx *dev, u16 reg); |
410 | int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg, | |
411 | char *buf, int len); | |
412 | int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg, | |
a6c2ba28 | 413 | char *buf, int len); |
6ea54d93 | 414 | int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg); |
3aefb79a MCC |
415 | |
416 | enum em28xx_mode mode; | |
417 | ||
c67ec53f MCC |
418 | /* Caches GPO and GPIO registers */ |
419 | unsigned char reg_gpo, reg_gpio; | |
420 | ||
3421b778 | 421 | struct em28xx_dvb *dvb; |
a6c2ba28 | 422 | }; |
423 | ||
6d79468d MCC |
424 | struct em28xx_ops { |
425 | struct list_head next; | |
426 | char *name; | |
427 | int id; | |
428 | int (*init)(struct em28xx *); | |
429 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
430 | }; |
431 | ||
3acf2809 | 432 | /* Provided by em28xx-i2c.c */ |
a6c2ba28 | 433 | |
3acf2809 | 434 | void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg); |
fad7b958 | 435 | void em28xx_do_i2c_scan(struct em28xx *dev); |
3acf2809 MCC |
436 | int em28xx_i2c_register(struct em28xx *dev); |
437 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 438 | |
3acf2809 | 439 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 440 | |
3acf2809 MCC |
441 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
442 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
443 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 444 | |
3acf2809 | 445 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 446 | char *buf, int len); |
3acf2809 MCC |
447 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
448 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
449 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 450 | int len); |
3acf2809 | 451 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
3acf2809 | 452 | int em28xx_audio_analog_set(struct em28xx *dev); |
539c96d0 | 453 | |
3acf2809 MCC |
454 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
455 | int em28xx_capture_start(struct em28xx *dev, int start); | |
456 | int em28xx_outfmt_set_yuv422(struct em28xx *dev); | |
3acf2809 | 457 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 | 458 | int em28xx_set_alternate(struct em28xx *dev); |
579f72e4 AT |
459 | int em28xx_init_isoc(struct em28xx *dev, int max_packets, |
460 | int num_bufs, int max_pkt_size, | |
c67ec53f | 461 | int (*isoc_copy) (struct em28xx *dev, struct urb *urb)); |
579f72e4 | 462 | void em28xx_uninit_isoc(struct em28xx *dev); |
c67ec53f MCC |
463 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
464 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
3acf2809 | 465 | |
6d79468d MCC |
466 | /* Provided by em28xx-video.c */ |
467 | int em28xx_register_extension(struct em28xx_ops *dev); | |
468 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
469 | ||
3acf2809 | 470 | /* Provided by em28xx-cards.c */ |
6ea54d93 | 471 | extern int em2800_variant_detect(struct usb_device *udev, int model); |
a94e95b4 | 472 | extern void em28xx_pre_card_setup(struct em28xx *dev); |
3acf2809 MCC |
473 | extern void em28xx_card_setup(struct em28xx *dev); |
474 | extern struct em28xx_board em28xx_boards[]; | |
475 | extern struct usb_device_id em28xx_id_table[]; | |
476 | extern const unsigned int em28xx_bcount; | |
c8793b03 | 477 | void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir); |
ee6e3a86 | 478 | int em28xx_tuner_callback(void *ptr, int command, int arg); |
c8793b03 MCC |
479 | |
480 | /* Provided by em28xx-input.c */ | |
481 | /* TODO: Check if the standard get_key handlers on ir-common can be used */ | |
482 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
483 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
484 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, | |
485 | u32 *ir_raw); | |
a6c2ba28 | 486 | |
a6c2ba28 | 487 | /* printk macros */ |
488 | ||
3acf2809 | 489 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 490 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 491 | |
3acf2809 | 492 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 493 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 494 | dev->name , ##arg); } while (0) |
a6c2ba28 | 495 | |
3acf2809 | 496 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 497 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 498 | dev->name , ##arg); } while (0) |
3acf2809 | 499 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 500 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 501 | dev->name , ##arg); } while (0) |
a6c2ba28 | 502 | |
6ea54d93 | 503 | static inline int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 504 | { |
505 | /* side effect of disabling scaler and mixer */ | |
41facaa4 | 506 | return em28xx_write_regs(dev, EM28XX_R26_COMPR, "\x00", 1); |
a6c2ba28 | 507 | } |
508 | ||
6ea54d93 | 509 | static inline int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 510 | { |
41facaa4 | 511 | return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f; |
a6c2ba28 | 512 | } |
513 | ||
6ea54d93 | 514 | static inline int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 515 | { |
41facaa4 | 516 | return em28xx_read_reg(dev, EM28XX_R21_YOFFSET); |
a6c2ba28 | 517 | } |
518 | ||
6ea54d93 | 519 | static inline int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 520 | { |
41facaa4 | 521 | return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f; |
a6c2ba28 | 522 | } |
523 | ||
6ea54d93 | 524 | static inline int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 525 | { |
41facaa4 | 526 | return em28xx_read_reg(dev, EM28XX_R23_UOFFSET); |
a6c2ba28 | 527 | } |
528 | ||
6ea54d93 | 529 | static inline int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 530 | { |
41facaa4 | 531 | return em28xx_read_reg(dev, EM28XX_R24_VOFFSET); |
a6c2ba28 | 532 | } |
533 | ||
6ea54d93 | 534 | static inline int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 535 | { |
41facaa4 | 536 | return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f; |
a6c2ba28 | 537 | } |
538 | ||
6ea54d93 | 539 | static inline int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 540 | { |
541 | u8 tmp = (u8) val; | |
41facaa4 | 542 | return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1); |
a6c2ba28 | 543 | } |
544 | ||
6ea54d93 | 545 | static inline int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 546 | { |
547 | u8 tmp = (u8) val; | |
41facaa4 | 548 | return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1); |
a6c2ba28 | 549 | } |
550 | ||
6ea54d93 | 551 | static inline int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 552 | { |
553 | u8 tmp = (u8) val; | |
41facaa4 | 554 | return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1); |
a6c2ba28 | 555 | } |
556 | ||
6ea54d93 | 557 | static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 558 | { |
559 | u8 tmp = (u8) val; | |
41facaa4 | 560 | return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1); |
a6c2ba28 | 561 | } |
562 | ||
6ea54d93 | 563 | static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 564 | { |
565 | u8 tmp = (u8) val; | |
41facaa4 | 566 | return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1); |
a6c2ba28 | 567 | } |
568 | ||
6ea54d93 | 569 | static inline int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 570 | { |
571 | u8 tmp = (u8) val; | |
41facaa4 | 572 | return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1); |
a6c2ba28 | 573 | } |
574 | ||
575 | /*FIXME: maxw should be dependent of alt mode */ | |
6ea54d93 | 576 | static inline unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 577 | { |
c8793b03 | 578 | if (dev->max_range_640_480) |
7d497f8a | 579 | return 640; |
c8793b03 | 580 | else |
7d497f8a | 581 | return 720; |
30556b23 MR |
582 | } |
583 | ||
6ea54d93 | 584 | static inline unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 585 | { |
c8793b03 | 586 | if (dev->max_range_640_480) |
7d497f8a | 587 | return 480; |
c8793b03 | 588 | else |
7d497f8a | 589 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; |
a6c2ba28 | 590 | } |
a6c2ba28 | 591 | #endif |