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V4L/DVB (10525): em28xx: Coding style fixes and a typo correction
[deliverable/linux.git] / drivers / media / video / em28xx / em28xx.h
CommitLineData
a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC		 25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96
MCC		 29#include <media/videobuf-vmalloc.h>
30
a6c2ba28 31#include <linux/i2c.h>
3593cab5 32#include <linux/mutex.h>
d5e52653 33#include <media/ir-kbd-i2c.h>
3aefb79a
MCC		 34#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
35#include <media/videobuf-dvb.h>
36#endif
3ca9c093 37#include "tuner-xc2028.h"
2ba890ec 38#include "em28xx-reg.h"
3aefb79a
MCC		 39
40/* Boards supported by driver */
41#define EM2800_BOARD_UNKNOWN 0
42#define EM2820_BOARD_UNKNOWN 1
43#define EM2820_BOARD_TERRATEC_CINERGY_250 2
44#define EM2820_BOARD_PINNACLE_USB_2 3
45#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
46#define EM2820_BOARD_MSI_VOX_USB_2 5
47#define EM2800_BOARD_TERRATEC_CINERGY_200 6
48#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
49#define EM2800_BOARD_KWORLD_USB2800 8
50#define EM2820_BOARD_PINNACLE_DVC_90 9
51#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
52#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
53#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
54#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
55#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
56#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 57#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 58#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 59#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 60#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 61#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 62#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL		 63#define EM2750_BOARD_UNKNOWN 22
64#define EM2750_BOARD_DLCW_130 23
65#define EM2820_BOARD_DLINK_USB_TV 24
66#define EM2820_BOARD_GADMEI_UTV310 25
67#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
68#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
69#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
95b86a9a
DSL		 70#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
71#define EM2821_BOARD_USBGEAR_VD204 31
72#define EM2821_BOARD_SUPERCOMP_USB_2 32
73#define EM2821_BOARD_PROLINK_PLAYTV_USB2 33
74#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
75#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
76#define EM2860_BOARD_NETGMBH_CAM 36
77#define EM2860_BOARD_GADMEI_UTV330 37
78#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
79#define EM2861_BOARD_KWORLD_PVRTV_300U 39
80#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
81#define EM2870_BOARD_KWORLD_350U 41
82#define EM2870_BOARD_KWORLD_355U 42
83#define EM2870_BOARD_TERRATEC_XS 43
84#define EM2870_BOARD_TERRATEC_XS_MT2060 44
85#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
86#define EM2870_BOARD_COMPRO_VIDEOMATE 46
87#define EM2880_BOARD_KWORLD_DVB_305U 47
88#define EM2880_BOARD_KWORLD_DVB_310U 48
89#define EM2880_BOARD_MSI_DIGIVOX_AD 49
90#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
91#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
92#define EM2881_BOARD_DNT_DA2_HYBRID 52
93#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
94#define EM2882_BOARD_KWORLD_VS_DVBT 54
95#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
96#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
6e7b9ea0 97#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 98#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 99#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 100#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 101#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC		 102#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
103#define EM2860_BOARD_EASYCAP 64
3aefb79a
MCC		 104
105/* Limits minimum and default number of buffers */
106#define EM28XX_MIN_BUF 4
107#define EM28XX_DEF_BUF 8
a6c2ba28 108
c4a98793
MCC		 109/*Limits the max URB message size */
110#define URB_MAX_CTRL_SIZE 80
111
95b86a9a
DSL		 112/* Params for validated field */
113#define EM28XX_BOARD_NOT_VALIDATED 1
114#define EM28XX_BOARD_VALIDATED 0
115
22cff7b3
DSL		 116/* Params for em28xx_cmd() audio */
117#define EM28XX_START_AUDIO 1
118#define EM28XX_STOP_AUDIO 0
119
596d92d5 120/* maximum number of em28xx boards */
3687e1e6 121#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 122
a6c2ba28 123/* maximum number of frames that can be queued */
3acf2809 124#define EM28XX_NUM_FRAMES 5
a6c2ba28 125/* number of frames that get used for v4l2_read() */
3acf2809 126#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 127
128/* number of buffers for isoc transfers */
3acf2809 129#define EM28XX_NUM_BUFS 5
a6c2ba28 130
d5e52653
MCC		 131/* number of packets for each buffer
132 windows requests only 40 packets .. so we better do the same
133 this is what I found out for all alternate numbers there!
134 */
3acf2809 135#define EM28XX_NUM_PACKETS 40
a6c2ba28 136
a6c2ba28 137/* default alternate; 0 means choose the best */
3acf2809 138#define EM28XX_PINOUT 0
a6c2ba28 139
3acf2809 140#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 141
142/*
143#define (use usbview if you want to get the other alternate number infos)
144#define
145#define alternate number 2
146#define Endpoint Address: 82
147 Direction: in
148 Attribute: 1
149 Type: Isoc
150 Max Packet Size: 1448
151 Interval: 125us
152
153 alternate number 7
154
155 Endpoint Address: 82
156 Direction: in
157 Attribute: 1
158 Type: Isoc
159 Max Packet Size: 3072
160 Interval: 125us
161*/
162
163/* time to wait when stopping the isoc transfer */
a1a6ee74
NS		 164#define EM28XX_URB_TIMEOUT \
165 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 166
596d92d5
MCC		 167/* time in msecs to wait for i2c writes to finish */
168#define EM2800_I2C_WRITE_TIMEOUT 20
169
3aefb79a 170enum em28xx_mode {
2fe3e2ee 171 EM28XX_SUSPEND,
3aefb79a
MCC		 172 EM28XX_ANALOG_MODE,
173 EM28XX_DIGITAL_MODE,
174};
175
3acf2809 176enum em28xx_stream_state {
a6c2ba28 177 STREAM_OFF,
178 STREAM_INTERRUPT,
179 STREAM_ON,
180};
181
579f72e4
AT		 182struct em28xx;
183
ad0ebb96
MCC		 184struct em28xx_usb_isoc_ctl {
185 /* max packet size of isoc transaction */
186 int max_pkt_size;
187
188 /* number of allocated urbs */
189 int num_bufs;
190
191 /* urb for isoc transfers */
192 struct urb **urb;
193
194 /* transfer buffers for isoc transfer */
195 char **transfer_buffer;
196
197 /* Last buffer command and region */
198 u8 cmd;
199 int pos, size, pktsize;
200
201 /* Last field: ODD or EVEN? */
202 int field;
203
204 /* Stores incomplete commands */
205 u32 tmp_buf;
206 int tmp_buf_len;
207
208 /* Stores already requested buffers */
209 struct em28xx_buffer *buf;
210
211 /* Stores the number of received fields */
212 int nfields;
579f72e4
AT		 213
214 /* isoc urb callback */
215 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
216
ad0ebb96
MCC		 217};
218
bddcf633 219/* Struct to enumberate video formats */
ad0ebb96
MCC		 220struct em28xx_fmt {
221 char *name;
222 u32 fourcc; /* v4l2 format id */
bddcf633
MCC		 223 int depth;
224 int reg;
ad0ebb96
MCC		 225};
226
227/* buffer for one video frame */
228struct em28xx_buffer {
229 /* common v4l buffer stuff -- must be first */
230 struct videobuf_buffer vb;
231
a6c2ba28 232 struct list_head frame;
a6c2ba28 233 int top_field;
ad0ebb96
MCC		 234 int receiving;
235};
236
237struct em28xx_dmaqueue {
238 struct list_head active;
239 struct list_head queued;
ad0ebb96
MCC		 240
241 wait_queue_head_t wq;
242
243 /* Counters to control buffer fill */
244 int pos;
a6c2ba28 245};
246
247/* io methods */
3acf2809 248enum em28xx_io_method {
a6c2ba28 249 IO_NONE,
250 IO_READ,
251 IO_MMAP,
252};
253
254/* inputs */
255
3acf2809
MCC		 256#define MAX_EM28XX_INPUT 4
257enum enum28xx_itype {
258 EM28XX_VMUX_COMPOSITE1 = 1,
259 EM28XX_VMUX_COMPOSITE2,
260 EM28XX_VMUX_COMPOSITE3,
261 EM28XX_VMUX_COMPOSITE4,
262 EM28XX_VMUX_SVIDEO,
263 EM28XX_VMUX_TELEVISION,
264 EM28XX_VMUX_CABLE,
265 EM28XX_VMUX_DVB,
266 EM28XX_VMUX_DEBUG,
267 EM28XX_RADIO,
a6c2ba28 268};
269
35643943
MCC		 270enum em28xx_ac97_mode {
271 EM28XX_NO_AC97 = 0,
272 EM28XX_AC97_EM202,
209acc02 273 EM28XX_AC97_SIGMATEL,
35643943
MCC		 274 EM28XX_AC97_OTHER,
275};
276
277struct em28xx_audio_mode {
278 enum em28xx_ac97_mode ac97;
279
280 u16 ac97_feat;
16c7bcad 281 u32 ac97_vendor_id;
35643943
MCC		 282
283 unsigned int has_audio:1;
284
285 unsigned int i2s_3rates:1;
286 unsigned int i2s_5rates:1;
5c2231c8
DH		 287};
288
5faff789
MCC		 289/* em28xx has two audio inputs: tuner and line in.
290 However, on most devices, an auxiliary AC97 codec device is used.
291 The AC97 device may have several different inputs and outputs,
292 depending on their model. So, it is possible to use AC97 mixer to
293 address more than two different entries.
294 */
539c96d0 295enum em28xx_amux {
5faff789
MCC		 296 /* This is the only entry for em28xx tuner input */
297 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
298
299 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
300
301 /* Some less-common mixer setups */
302 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
303 EM28XX_AMUX_PHONE,
304 EM28XX_AMUX_MIC,
305 EM28XX_AMUX_CD,
306 EM28XX_AMUX_AUX,
307 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC		 308};
309
35ae6f04 310enum em28xx_aout {
8866f9cf 311 /* AC97 outputs */
e879b8eb
MCC		 312 EM28XX_AOUT_MASTER = 1 << 0,
313 EM28XX_AOUT_LINE = 1 << 1,
314 EM28XX_AOUT_MONO = 1 << 2,
315 EM28XX_AOUT_LFE = 1 << 3,
316 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC		 317
318 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
319 EM28XX_AOUT_PCM_IN = 1 << 7,
320
321 /* Bits 10-8 are used to indicate the PCM IN record select */
322 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
323 EM28XX_AOUT_PCM_CD = 1 << 8,
324 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
325 EM28XX_AOUT_PCM_AUX = 3 << 8,
326 EM28XX_AOUT_PCM_LINE = 4 << 8,
327 EM28XX_AOUT_PCM_STEREO = 5 << 8,
328 EM28XX_AOUT_PCM_MONO = 6 << 8,
329 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC		 330};
331
32929fb4 332static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC		 333{
334 return (a_out & 0x700) >> 8;
335}
336
122b77e5
MCC		 337struct em28xx_reg_seq {
338 int reg;
339 unsigned char val, mask;
340 int sleep;
341};
342
3acf2809
MCC		 343struct em28xx_input {
344 enum enum28xx_itype type;
a6c2ba28 345 unsigned int vmux;
539c96d0 346 enum em28xx_amux amux;
35ae6f04 347 enum em28xx_aout aout;
122b77e5 348 struct em28xx_reg_seq *gpio;
a6c2ba28 349};
350
3acf2809 351#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 352
3acf2809 353enum em28xx_decoder {
1ed1dd54 354 EM28XX_NODECODER,
3acf2809 355 EM28XX_TVP5150,
ec5de990 356 EM28XX_SAA711X,
a6c2ba28 357};
358
3acf2809 359struct em28xx_board {
a6c2ba28 360 char *name;
505b6d0b 361 int vchannels;
a6c2ba28 362 int tuner_type;
66767920 363 int tuner_addr;
a6c2ba28 364
365 /* i2c flags */
366 unsigned int tda9887_conf;
367
017ab4b1 368 /* GPIO sequences */
122b77e5 369 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 370 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 371 struct em28xx_reg_seq *tuner_gpio;
122b77e5 372
74f38a82 373 unsigned int is_em2800:1;
a6c2ba28 374 unsigned int has_msp34xx:1;
5add9a6f 375 unsigned int mts_firmware:1;
c8793b03 376 unsigned int max_range_640_480:1;
3aefb79a 377 unsigned int has_dvb:1;
a9fc52bc 378 unsigned int has_snapshot_button:1;
95b86a9a 379 unsigned int valid:1;
3abee53e 380
a2070c66
MCC		 381 unsigned char xclk, i2c_speed;
382
3acf2809 383 enum em28xx_decoder decoder;
a6c2ba28 384
3acf2809 385 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 386 struct em28xx_input radio;
4b92253a 387 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 388};
389
3acf2809 390struct em28xx_eeprom {
a6c2ba28 391 u32 id; /* 0x9567eb1a */
392 u16 vendor_ID;
393 u16 product_ID;
394
395 u16 chip_conf;
396
397 u16 board_conf;
398
399 u16 string1, string2, string3;
400
401 u8 string_idx_table;
402};
403
404/* device states */
3acf2809 405enum em28xx_dev_state {
a6c2ba28 406 DEV_INITIALIZED = 0x01,
407 DEV_DISCONNECTED = 0x02,
408 DEV_MISCONFIGURED = 0x04,
409};
410
6d79468d
MCC		 411#define EM28XX_AUDIO_BUFS 5
412#define EM28XX_NUM_AUDIO_PACKETS 64
413#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
414#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC		 415
416/* em28xx extensions */
6d79468d 417#define EM28XX_AUDIO 0x10
3aefb79a 418#define EM28XX_DVB 0x20
6d79468d
MCC		 419
420struct em28xx_audio {
421 char name[50];
422 char *transfer_buffer[EM28XX_AUDIO_BUFS];
423 struct urb *urb[EM28XX_AUDIO_BUFS];
424 struct usb_device *udev;
425 unsigned int capture_transfer_done;
426 struct snd_pcm_substream *capture_pcm_substream;
427
428 unsigned int hwptr_done_capture;
429 struct snd_card *sndcard;
430
c744dff2 431 int users;
6d79468d
MCC		 432 enum em28xx_stream_state capture_stream;
433 spinlock_t slock;
434};
435
52284c3e
MCC		 436struct em28xx;
437
438struct em28xx_fh {
439 struct em28xx *dev;
440 unsigned int stream_on:1; /* Locks streams */
441 int radio;
442
443 struct videobuf_queue vb_vidq;
444
445 enum v4l2_buf_type type;
446};
447
a6c2ba28 448/* main device struct */
3acf2809 449struct em28xx {
a6c2ba28 450 /* generic device properties */
451 char name[30]; /* name (including minor) of the device */
452 int model; /* index in the device_data struct */
e5589bef 453 int devno; /* marks the number of this device */
600bd7f0 454 enum em28xx_chip_id chip_id;
505b6d0b
MCC		 455
456 struct em28xx_board board;
457
a225452e 458 unsigned int stream_on:1; /* Locks streams */
d7448a8d 459 unsigned int has_audio_class:1;
24a613e4 460 unsigned int has_alsa_audio:1;
a2070c66 461
bddcf633
MCC		 462 struct em28xx_fmt *format;
463
a924a499
MCC		 464 struct em28xx_IR *ir;
465
89b329ef
MCC		 466 /* Some older em28xx chips needs a waiting time after writing */
467 unsigned int wait_after_write;
468
74f38a82
MCC		 469 struct list_head devlist;
470
9bb13a6d
MCC		 471 u32 i2s_speed; /* I2S speed for audio digital stream */
472
35643943 473 struct em28xx_audio_mode audio_mode;
a6c2ba28 474
475 int tuner_type; /* type of the tuner */
476 int tuner_addr; /* tuner address */
477 int tda9887_conf;
478 /* i2c i/o */
479 struct i2c_adapter i2c_adap;
480 struct i2c_client i2c_client;
481 /* video for linux */
482 int users; /* user count for exclusive use */
483 struct video_device *vdev; /* video for linux device struct */
7d497f8a 484 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 485 int ctl_freq; /* selected frequency */
486 unsigned int ctl_input; /* selected input */
95b86a9a 487 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 488 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 489 int mute;
490 int volume;
491 /* frame properties */
a6c2ba28 492 int width; /* current frame width */
493 int height; /* current frame height */
d45b9b8a
HV		 494 unsigned hscale; /* horizontal scale factor (see datasheet) */
495 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 496 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 497 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 498
03910cc3 499 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL		 500 unsigned long i2c_hash; /* i2c devicelist hash -
501 for boards with generic ID */
03910cc3 502
9baed99e 503 struct em28xx_audio adev;
6d79468d 504
a6c2ba28 505 /* states */
3acf2809 506 enum em28xx_dev_state state;
3acf2809 507 enum em28xx_io_method io;
9e31ced8 508
d7448a8d
MCC		 509 struct work_struct request_module_wk;
510
a6c2ba28 511 /* locks */
5a80415b 512 struct mutex lock;
f2a2e491 513 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 514 /* spinlock_t queue_lock; */
a6c2ba28 515 struct list_head inqueue, outqueue;
516 wait_queue_head_t open, wait_frame, wait_stream;
517 struct video_device *vbi_dev;
0be43754 518 struct video_device *radio_dev;
a6c2ba28 519
520 unsigned char eedata[256];
521
ad0ebb96
MCC		 522 /* Isoc control struct */
523 struct em28xx_dmaqueue vidq;
524 struct em28xx_usb_isoc_ctl isoc_ctl;
525 spinlock_t slock;
526
a6c2ba28 527 /* usb transfer */
528 struct usb_device *udev; /* the usb device */
529 int alt; /* alternate */
530 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC		 531 int num_alt; /* Number of alternative settings */
532 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 533 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
a1a6ee74
NS		 534 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
535 transfer */
c4a98793
MCC		 536 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
537
a6c2ba28 538 /* helper funcs that call usb_control_msg */
6ea54d93 539 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 540 char *buf, int len);
6ea54d93
DSL		 541 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
542 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
543 char *buf, int len);
544 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 545 char *buf, int len);
6ea54d93 546 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC		 547
548 enum em28xx_mode mode;
549
6a1acc3b
DH		 550 /* register numbers for GPO/GPIO registers */
551 u16 reg_gpo_num, reg_gpio_num;
552
c67ec53f
MCC		 553 /* Caches GPO and GPIO registers */
554 unsigned char reg_gpo, reg_gpio;
555
a9fc52bc
DH		 556 /* Snapshot button */
557 char snapshot_button_path[30]; /* path of the input dev */
558 struct input_dev *sbutton_input_dev;
559 struct delayed_work sbutton_query_work;
560
3421b778 561 struct em28xx_dvb *dvb;
a6c2ba28 562};
563
6d79468d
MCC		 564struct em28xx_ops {
565 struct list_head next;
566 char *name;
567 int id;
568 int (*init)(struct em28xx *);
569 int (*fini)(struct em28xx *);
a3a048ce
MCC		 570};
571
3acf2809 572/* Provided by em28xx-i2c.c */
a6c2ba28 573
3acf2809 574void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg);
fad7b958 575void em28xx_do_i2c_scan(struct em28xx *dev);
3acf2809
MCC		 576int em28xx_i2c_register(struct em28xx *dev);
577int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 578
3acf2809 579/* Provided by em28xx-core.c */
a6c2ba28 580
3acf2809
MCC		 581u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
582void em28xx_queue_unusedframes(struct em28xx *dev);
583void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 584
3acf2809 585int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 586 char *buf, int len);
3acf2809
MCC		 587int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
588int em28xx_read_reg(struct em28xx *dev, u16 reg);
589int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 590 int len);
3acf2809 591int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489
DH		 592int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
593
531c98e7
MCC		 594int em28xx_read_ac97(struct em28xx *dev, u8 reg);
595int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
596
3acf2809 597int em28xx_audio_analog_set(struct em28xx *dev);
35643943 598int em28xx_audio_setup(struct em28xx *dev);
539c96d0 599
3acf2809
MCC		 600int em28xx_colorlevels_set_default(struct em28xx *dev);
601int em28xx_capture_start(struct em28xx *dev, int start);
bddcf633 602int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 603int em28xx_resolution_set(struct em28xx *dev);
3acf2809 604int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT		 605int em28xx_init_isoc(struct em28xx *dev, int max_packets,
606 int num_bufs, int max_pkt_size,
c67ec53f 607 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 608void em28xx_uninit_isoc(struct em28xx *dev);
c67ec53f
MCC		 609int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
610int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC		 611void em28xx_wake_i2c(struct em28xx *dev);
612void em28xx_remove_from_devlist(struct em28xx *dev);
613void em28xx_add_into_devlist(struct em28xx *dev);
bec43661 614struct em28xx *em28xx_get_device(int minor,
1a23f81b
MCC		 615 enum v4l2_buf_type *fh_type,
616 int *has_radio);
6d79468d
MCC		 617int em28xx_register_extension(struct em28xx_ops *dev);
618void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC		 619void em28xx_init_extension(struct em28xx *dev);
620void em28xx_close_extension(struct em28xx *dev);
621
622/* Provided by em28xx-video.c */
1a23f81b
MCC		 623int em28xx_register_analog_devices(struct em28xx *dev);
624void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 625
3acf2809 626/* Provided by em28xx-cards.c */
6ea54d93 627extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 628extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC		 629extern void em28xx_card_setup(struct em28xx *dev);
630extern struct em28xx_board em28xx_boards[];
631extern struct usb_device_id em28xx_id_table[];
632extern const unsigned int em28xx_bcount;
c8793b03 633void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 634int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 635void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC		 636
637/* Provided by em28xx-input.c */
c8793b03
MCC		 638int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
639int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
640int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
641 u32 *ir_raw);
a9fc52bc
DH		 642void em28xx_register_snapshot_button(struct em28xx *dev);
643void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 644
a924a499
MCC		 645int em28xx_ir_init(struct em28xx *dev);
646int em28xx_ir_fini(struct em28xx *dev);
647
a6c2ba28 648/* printk macros */
649
3acf2809 650#define em28xx_err(fmt, arg...) do {\
f85c657f 651 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 652
3acf2809 653#define em28xx_errdev(fmt, arg...) do {\
4ac97914 654 printk(KERN_ERR "%s: "fmt,\
f85c657f 655 dev->name , ##arg); } while (0)
a6c2ba28 656
3acf2809 657#define em28xx_info(fmt, arg...) do {\
4ac97914 658 printk(KERN_INFO "%s: "fmt,\
f85c657f 659 dev->name , ##arg); } while (0)
3acf2809 660#define em28xx_warn(fmt, arg...) do {\
4ac97914 661 printk(KERN_WARNING "%s: "fmt,\
f85c657f 662 dev->name , ##arg); } while (0)
a6c2ba28 663
6ea54d93 664static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 665{
666 /* side effect of disabling scaler and mixer */
2a29a0d7 667 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 668}
669
6ea54d93 670static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 671{
41facaa4 672 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 673}
674
6ea54d93 675static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 676{
41facaa4 677 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 678}
679
6ea54d93 680static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 681{
41facaa4 682 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 683}
684
6ea54d93 685static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 686{
41facaa4 687 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 688}
689
6ea54d93 690static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 691{
41facaa4 692 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 693}
694
6ea54d93 695static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 696{
41facaa4 697 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 698}
699
6ea54d93 700static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 701{
702 u8 tmp = (u8) val;
41facaa4 703 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 704}
705
6ea54d93 706static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 707{
708 u8 tmp = (u8) val;
41facaa4 709 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 710}
711
6ea54d93 712static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 713{
714 u8 tmp = (u8) val;
41facaa4 715 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 716}
717
6ea54d93 718static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 719{
720 u8 tmp = (u8) val;
41facaa4 721 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 722}
723
6ea54d93 724static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 725{
726 u8 tmp = (u8) val;
41facaa4 727 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 728}
729
6ea54d93 730static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 731{
732 u8 tmp = (u8) val;
41facaa4 733 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 734}
735
736/*FIXME: maxw should be dependent of alt mode */
6ea54d93 737static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 738{
505b6d0b 739 if (dev->board.max_range_640_480)
7d497f8a 740 return 640;
c8793b03 741 else
7d497f8a 742 return 720;
30556b23
MR		 743}
744
6ea54d93 745static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 746{
505b6d0b 747 if (dev->board.max_range_640_480)
7d497f8a 748 return 480;
c8793b03 749 else
7d497f8a 750 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 751}
a6c2ba28 752#endif
Linux kernel - Deliverables
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