Commit | Line | Data |
---|---|---|
a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
a6c2ba28 | 7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
cb77d010 | 28 | #include <linux/videodev2.h> |
ad0ebb96 MCC |
29 | #include <media/videobuf-vmalloc.h> |
30 | ||
a6c2ba28 | 31 | #include <linux/i2c.h> |
3593cab5 | 32 | #include <linux/mutex.h> |
d5e52653 | 33 | #include <media/ir-kbd-i2c.h> |
3aefb79a MCC |
34 | #if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) |
35 | #include <media/videobuf-dvb.h> | |
36 | #endif | |
37 | ||
38 | /* Boards supported by driver */ | |
39 | #define EM2800_BOARD_UNKNOWN 0 | |
40 | #define EM2820_BOARD_UNKNOWN 1 | |
41 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
42 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
43 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
44 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
45 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
46 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
47 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
48 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
49 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
50 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
51 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
52 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
53 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
54 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
55 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_950 16 | |
56 | ||
57 | /* Limits minimum and default number of buffers */ | |
58 | #define EM28XX_MIN_BUF 4 | |
59 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 60 | |
596d92d5 | 61 | /* maximum number of em28xx boards */ |
3687e1e6 | 62 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 63 | |
a6c2ba28 | 64 | /* maximum number of frames that can be queued */ |
3acf2809 | 65 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 66 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 67 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 68 | |
69 | /* number of buffers for isoc transfers */ | |
3acf2809 | 70 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 71 | |
d5e52653 MCC |
72 | /* number of packets for each buffer |
73 | windows requests only 40 packets .. so we better do the same | |
74 | this is what I found out for all alternate numbers there! | |
75 | */ | |
3acf2809 | 76 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 77 | |
a6c2ba28 | 78 | /* default alternate; 0 means choose the best */ |
3acf2809 | 79 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 80 | |
3acf2809 | 81 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 82 | |
83 | /* | |
84 | #define (use usbview if you want to get the other alternate number infos) | |
85 | #define | |
86 | #define alternate number 2 | |
87 | #define Endpoint Address: 82 | |
88 | Direction: in | |
89 | Attribute: 1 | |
90 | Type: Isoc | |
91 | Max Packet Size: 1448 | |
92 | Interval: 125us | |
93 | ||
94 | alternate number 7 | |
95 | ||
96 | Endpoint Address: 82 | |
97 | Direction: in | |
98 | Attribute: 1 | |
99 | Type: Isoc | |
100 | Max Packet Size: 3072 | |
101 | Interval: 125us | |
102 | */ | |
103 | ||
104 | /* time to wait when stopping the isoc transfer */ | |
3acf2809 | 105 | #define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) |
a6c2ba28 | 106 | |
596d92d5 MCC |
107 | /* time in msecs to wait for i2c writes to finish */ |
108 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
109 | ||
3aefb79a MCC |
110 | enum em28xx_mode { |
111 | EM28XX_ANALOG_MODE, | |
112 | EM28XX_DIGITAL_MODE, | |
113 | }; | |
114 | ||
3acf2809 | 115 | enum em28xx_stream_state { |
a6c2ba28 | 116 | STREAM_OFF, |
117 | STREAM_INTERRUPT, | |
118 | STREAM_ON, | |
119 | }; | |
120 | ||
ad0ebb96 MCC |
121 | struct em28xx_usb_isoc_ctl { |
122 | /* max packet size of isoc transaction */ | |
123 | int max_pkt_size; | |
124 | ||
125 | /* number of allocated urbs */ | |
126 | int num_bufs; | |
127 | ||
128 | /* urb for isoc transfers */ | |
129 | struct urb **urb; | |
130 | ||
131 | /* transfer buffers for isoc transfer */ | |
132 | char **transfer_buffer; | |
133 | ||
134 | /* Last buffer command and region */ | |
135 | u8 cmd; | |
136 | int pos, size, pktsize; | |
137 | ||
138 | /* Last field: ODD or EVEN? */ | |
139 | int field; | |
140 | ||
141 | /* Stores incomplete commands */ | |
142 | u32 tmp_buf; | |
143 | int tmp_buf_len; | |
144 | ||
145 | /* Stores already requested buffers */ | |
146 | struct em28xx_buffer *buf; | |
147 | ||
148 | /* Stores the number of received fields */ | |
149 | int nfields; | |
150 | }; | |
151 | ||
152 | struct em28xx_fmt { | |
153 | char *name; | |
154 | u32 fourcc; /* v4l2 format id */ | |
155 | }; | |
156 | ||
157 | /* buffer for one video frame */ | |
158 | struct em28xx_buffer { | |
159 | /* common v4l buffer stuff -- must be first */ | |
160 | struct videobuf_buffer vb; | |
161 | ||
a6c2ba28 | 162 | struct list_head frame; |
a6c2ba28 | 163 | int top_field; |
ad0ebb96 MCC |
164 | int receiving; |
165 | }; | |
166 | ||
167 | struct em28xx_dmaqueue { | |
168 | struct list_head active; | |
169 | struct list_head queued; | |
ad0ebb96 MCC |
170 | |
171 | wait_queue_head_t wq; | |
172 | ||
173 | /* Counters to control buffer fill */ | |
174 | int pos; | |
a6c2ba28 | 175 | }; |
176 | ||
177 | /* io methods */ | |
3acf2809 | 178 | enum em28xx_io_method { |
a6c2ba28 | 179 | IO_NONE, |
180 | IO_READ, | |
181 | IO_MMAP, | |
182 | }; | |
183 | ||
184 | /* inputs */ | |
185 | ||
3acf2809 MCC |
186 | #define MAX_EM28XX_INPUT 4 |
187 | enum enum28xx_itype { | |
188 | EM28XX_VMUX_COMPOSITE1 = 1, | |
189 | EM28XX_VMUX_COMPOSITE2, | |
190 | EM28XX_VMUX_COMPOSITE3, | |
191 | EM28XX_VMUX_COMPOSITE4, | |
192 | EM28XX_VMUX_SVIDEO, | |
193 | EM28XX_VMUX_TELEVISION, | |
194 | EM28XX_VMUX_CABLE, | |
195 | EM28XX_VMUX_DVB, | |
196 | EM28XX_VMUX_DEBUG, | |
197 | EM28XX_RADIO, | |
a6c2ba28 | 198 | }; |
199 | ||
539c96d0 MCC |
200 | enum em28xx_amux { |
201 | EM28XX_AMUX_VIDEO, | |
202 | EM28XX_AMUX_LINE_IN, | |
203 | EM28XX_AMUX_AC97_VIDEO, | |
204 | EM28XX_AMUX_AC97_LINE_IN, | |
205 | }; | |
206 | ||
3acf2809 MCC |
207 | struct em28xx_input { |
208 | enum enum28xx_itype type; | |
a6c2ba28 | 209 | unsigned int vmux; |
539c96d0 | 210 | enum em28xx_amux amux; |
a6c2ba28 | 211 | }; |
212 | ||
3acf2809 | 213 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 214 | |
3acf2809 MCC |
215 | enum em28xx_decoder { |
216 | EM28XX_TVP5150, | |
217 | EM28XX_SAA7113, | |
218 | EM28XX_SAA7114 | |
a6c2ba28 | 219 | }; |
220 | ||
ee6e3a86 MCC |
221 | #define MAX_GPIO 2 |
222 | struct gpio_ctl { | |
223 | /* Register to be set */ | |
224 | unsigned char reg; | |
225 | /* Initial/final value */ | |
226 | unsigned char val; | |
227 | /* reset value - if set, it will do: | |
228 | val1 - val2 - val1 | |
229 | */ | |
230 | unsigned char rst; | |
231 | /* Sleep times | |
232 | */ | |
233 | unsigned int t1, t2, t3; | |
234 | }; | |
235 | ||
3acf2809 | 236 | struct em28xx_board { |
a6c2ba28 | 237 | char *name; |
a6c2ba28 | 238 | int vchannels; |
a6c2ba28 | 239 | int tuner_type; |
240 | ||
241 | /* i2c flags */ | |
242 | unsigned int tda9887_conf; | |
243 | ||
74f38a82 | 244 | unsigned int is_em2800:1; |
a6c2ba28 | 245 | unsigned int has_msp34xx:1; |
5add9a6f | 246 | unsigned int mts_firmware:1; |
3abee53e | 247 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 248 | unsigned int max_range_640_480:1; |
3aefb79a | 249 | unsigned int has_dvb:1; |
3abee53e | 250 | |
ee6e3a86 MCC |
251 | struct gpio_ctl analog_gpio[MAX_GPIO]; |
252 | struct gpio_ctl digital_gpio[MAX_GPIO]; | |
a6c2ba28 | 253 | |
3acf2809 | 254 | enum em28xx_decoder decoder; |
a6c2ba28 | 255 | |
3acf2809 | 256 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 257 | struct em28xx_input radio; |
a6c2ba28 | 258 | }; |
259 | ||
3acf2809 | 260 | struct em28xx_eeprom { |
a6c2ba28 | 261 | u32 id; /* 0x9567eb1a */ |
262 | u16 vendor_ID; | |
263 | u16 product_ID; | |
264 | ||
265 | u16 chip_conf; | |
266 | ||
267 | u16 board_conf; | |
268 | ||
269 | u16 string1, string2, string3; | |
270 | ||
271 | u8 string_idx_table; | |
272 | }; | |
273 | ||
274 | /* device states */ | |
3acf2809 | 275 | enum em28xx_dev_state { |
a6c2ba28 | 276 | DEV_INITIALIZED = 0x01, |
277 | DEV_DISCONNECTED = 0x02, | |
278 | DEV_MISCONFIGURED = 0x04, | |
279 | }; | |
280 | ||
6d79468d MCC |
281 | #define EM28XX_AUDIO_BUFS 5 |
282 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
283 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
284 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
285 | |
286 | /* em28xx extensions */ | |
6d79468d | 287 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 288 | #define EM28XX_DVB 0x20 |
6d79468d MCC |
289 | |
290 | struct em28xx_audio { | |
291 | char name[50]; | |
292 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
293 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
294 | struct usb_device *udev; | |
295 | unsigned int capture_transfer_done; | |
296 | struct snd_pcm_substream *capture_pcm_substream; | |
297 | ||
298 | unsigned int hwptr_done_capture; | |
299 | struct snd_card *sndcard; | |
300 | ||
301 | int users, shutdown; | |
302 | enum em28xx_stream_state capture_stream; | |
303 | spinlock_t slock; | |
304 | }; | |
305 | ||
a6c2ba28 | 306 | /* main device struct */ |
3acf2809 | 307 | struct em28xx { |
a6c2ba28 | 308 | /* generic device properties */ |
309 | char name[30]; /* name (including minor) of the device */ | |
310 | int model; /* index in the device_data struct */ | |
e5589bef | 311 | int devno; /* marks the number of this device */ |
74f38a82 | 312 | unsigned int is_em2800:1; |
a6c2ba28 | 313 | unsigned int has_msp34xx:1; |
314 | unsigned int has_tda9887:1; | |
a225452e | 315 | unsigned int stream_on:1; /* Locks streams */ |
d7448a8d | 316 | unsigned int has_audio_class:1; |
3abee53e | 317 | unsigned int has_12mhz_i2s:1; |
c8793b03 | 318 | unsigned int max_range_640_480:1; |
3aefb79a | 319 | unsigned int has_dvb:1; |
a225452e | 320 | |
ee6e3a86 MCC |
321 | struct gpio_ctl (*analog_gpio)[MAX_GPIO]; |
322 | struct gpio_ctl (*digital_gpio)[MAX_GPIO]; | |
323 | ||
74f38a82 MCC |
324 | int video_inputs; /* number of video inputs */ |
325 | struct list_head devlist; | |
326 | ||
9bb13a6d MCC |
327 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
328 | ||
3acf2809 | 329 | enum em28xx_decoder decoder; |
a6c2ba28 | 330 | |
331 | int tuner_type; /* type of the tuner */ | |
332 | int tuner_addr; /* tuner address */ | |
333 | int tda9887_conf; | |
334 | /* i2c i/o */ | |
335 | struct i2c_adapter i2c_adap; | |
336 | struct i2c_client i2c_client; | |
337 | /* video for linux */ | |
338 | int users; /* user count for exclusive use */ | |
339 | struct video_device *vdev; /* video for linux device struct */ | |
7d497f8a | 340 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 341 | int ctl_freq; /* selected frequency */ |
342 | unsigned int ctl_input; /* selected input */ | |
343 | unsigned int ctl_ainput; /* slected audio input */ | |
344 | int mute; | |
345 | int volume; | |
346 | /* frame properties */ | |
a6c2ba28 | 347 | int width; /* current frame width */ |
348 | int height; /* current frame height */ | |
a6c2ba28 | 349 | int hscale; /* horizontal scale factor (see datasheet) */ |
350 | int vscale; /* vertical scale factor (see datasheet) */ | |
351 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
9e31ced8 | 352 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 353 | |
03910cc3 | 354 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
fad7b958 | 355 | unsigned long i2c_hash; /* i2c devicelist hash - for boards with generic ID */ |
03910cc3 | 356 | |
6d79468d MCC |
357 | struct em28xx_audio *adev; |
358 | ||
a6c2ba28 | 359 | /* states */ |
3acf2809 | 360 | enum em28xx_dev_state state; |
3acf2809 | 361 | enum em28xx_io_method io; |
9e31ced8 | 362 | |
d7448a8d MCC |
363 | struct work_struct request_module_wk; |
364 | ||
a6c2ba28 | 365 | /* locks */ |
5a80415b | 366 | struct mutex lock; |
d7aa8020 | 367 | /* spinlock_t queue_lock; */ |
a6c2ba28 | 368 | struct list_head inqueue, outqueue; |
369 | wait_queue_head_t open, wait_frame, wait_stream; | |
370 | struct video_device *vbi_dev; | |
0be43754 | 371 | struct video_device *radio_dev; |
a6c2ba28 | 372 | |
373 | unsigned char eedata[256]; | |
374 | ||
ad0ebb96 MCC |
375 | /* Isoc control struct */ |
376 | struct em28xx_dmaqueue vidq; | |
377 | struct em28xx_usb_isoc_ctl isoc_ctl; | |
378 | spinlock_t slock; | |
379 | ||
a6c2ba28 | 380 | /* usb transfer */ |
381 | struct usb_device *udev; /* the usb device */ | |
382 | int alt; /* alternate */ | |
383 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
384 | int num_alt; /* Number of alternative settings */ |
385 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 MCC |
386 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
387 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */ | |
a6c2ba28 | 388 | /* helper funcs that call usb_control_msg */ |
3acf2809 | 389 | int (*em28xx_write_regs) (struct em28xx * dev, u16 reg, char *buf, |
a6c2ba28 | 390 | int len); |
3acf2809 MCC |
391 | int (*em28xx_read_reg) (struct em28xx * dev, u16 reg); |
392 | int (*em28xx_read_reg_req_len) (struct em28xx * dev, u8 req, u16 reg, | |
a6c2ba28 | 393 | char *buf, int len); |
3acf2809 | 394 | int (*em28xx_write_regs_req) (struct em28xx * dev, u8 req, u16 reg, |
a6c2ba28 | 395 | char *buf, int len); |
3acf2809 | 396 | int (*em28xx_read_reg_req) (struct em28xx * dev, u8 req, u16 reg); |
3aefb79a MCC |
397 | |
398 | enum em28xx_mode mode; | |
399 | ||
400 | #if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) | |
401 | struct videobuf_dvb dvb; | |
402 | struct videobuf_queue_ops *qops; | |
403 | #endif | |
a6c2ba28 | 404 | }; |
405 | ||
a3a048ce MCC |
406 | struct em28xx_fh { |
407 | struct em28xx *dev; | |
a225452e | 408 | unsigned int stream_on:1; /* Locks streams */ |
6d79468d | 409 | int radio; |
ad0ebb96 | 410 | |
ad0ebb96 | 411 | struct videobuf_queue vb_vidq; |
ad0ebb96 MCC |
412 | |
413 | enum v4l2_buf_type type; | |
6d79468d MCC |
414 | }; |
415 | ||
416 | struct em28xx_ops { | |
417 | struct list_head next; | |
418 | char *name; | |
419 | int id; | |
420 | int (*init)(struct em28xx *); | |
421 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
422 | }; |
423 | ||
3acf2809 | 424 | /* Provided by em28xx-i2c.c */ |
a6c2ba28 | 425 | |
3acf2809 | 426 | void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg); |
fad7b958 | 427 | void em28xx_do_i2c_scan(struct em28xx *dev); |
3acf2809 MCC |
428 | int em28xx_i2c_register(struct em28xx *dev); |
429 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 430 | |
3acf2809 | 431 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 432 | |
3acf2809 MCC |
433 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
434 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
435 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 436 | |
3acf2809 | 437 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 438 | char *buf, int len); |
3acf2809 MCC |
439 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
440 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
441 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 442 | int len); |
3acf2809 | 443 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
3acf2809 | 444 | int em28xx_audio_analog_set(struct em28xx *dev); |
539c96d0 | 445 | |
3acf2809 MCC |
446 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
447 | int em28xx_capture_start(struct em28xx *dev, int start); | |
448 | int em28xx_outfmt_set_yuv422(struct em28xx *dev); | |
3acf2809 | 449 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 MCC |
450 | int em28xx_set_alternate(struct em28xx *dev); |
451 | ||
6d79468d MCC |
452 | /* Provided by em28xx-video.c */ |
453 | int em28xx_register_extension(struct em28xx_ops *dev); | |
454 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
455 | ||
3acf2809 | 456 | /* Provided by em28xx-cards.c */ |
596d92d5 | 457 | extern int em2800_variant_detect(struct usb_device* udev,int model); |
a94e95b4 | 458 | extern void em28xx_pre_card_setup(struct em28xx *dev); |
3acf2809 MCC |
459 | extern void em28xx_card_setup(struct em28xx *dev); |
460 | extern struct em28xx_board em28xx_boards[]; | |
461 | extern struct usb_device_id em28xx_id_table[]; | |
462 | extern const unsigned int em28xx_bcount; | |
c8793b03 | 463 | void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir); |
ee6e3a86 | 464 | int em28xx_tuner_callback(void *ptr, int command, int arg); |
c8793b03 MCC |
465 | |
466 | /* Provided by em28xx-input.c */ | |
467 | /* TODO: Check if the standard get_key handlers on ir-common can be used */ | |
468 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
469 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | |
470 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, | |
471 | u32 *ir_raw); | |
a6c2ba28 | 472 | |
4362559d SS |
473 | /* em2800 registers */ |
474 | #define EM2800_AUDIOSRC_REG 0x08 | |
475 | ||
3acf2809 | 476 | /* em28xx registers */ |
74f38a82 | 477 | #define I2C_CLK_REG 0x06 |
596d92d5 | 478 | #define CHIPID_REG 0x0a |
a6c2ba28 | 479 | #define USBSUSP_REG 0x0c /* */ |
480 | ||
481 | #define AUDIOSRC_REG 0x0e | |
482 | #define XCLK_REG 0x0f | |
483 | ||
484 | #define VINMODE_REG 0x10 | |
485 | #define VINCTRL_REG 0x11 | |
486 | #define VINENABLE_REG 0x12 /* */ | |
487 | ||
488 | #define GAMMA_REG 0x14 | |
489 | #define RGAIN_REG 0x15 | |
490 | #define GGAIN_REG 0x16 | |
491 | #define BGAIN_REG 0x17 | |
492 | #define ROFFSET_REG 0x18 | |
493 | #define GOFFSET_REG 0x19 | |
494 | #define BOFFSET_REG 0x1a | |
495 | ||
496 | #define OFLOW_REG 0x1b | |
497 | #define HSTART_REG 0x1c | |
498 | #define VSTART_REG 0x1d | |
499 | #define CWIDTH_REG 0x1e | |
500 | #define CHEIGHT_REG 0x1f | |
501 | ||
502 | #define YGAIN_REG 0x20 | |
503 | #define YOFFSET_REG 0x21 | |
504 | #define UVGAIN_REG 0x22 | |
505 | #define UOFFSET_REG 0x23 | |
506 | #define VOFFSET_REG 0x24 | |
507 | #define SHARPNESS_REG 0x25 | |
508 | ||
509 | #define COMPR_REG 0x26 | |
510 | #define OUTFMT_REG 0x27 | |
511 | ||
512 | #define XMIN_REG 0x28 | |
513 | #define XMAX_REG 0x29 | |
514 | #define YMIN_REG 0x2a | |
515 | #define YMAX_REG 0x2b | |
516 | ||
517 | #define HSCALELOW_REG 0x30 | |
518 | #define HSCALEHIGH_REG 0x31 | |
519 | #define VSCALELOW_REG 0x32 | |
520 | #define VSCALEHIGH_REG 0x33 | |
521 | ||
522 | #define AC97LSB_REG 0x40 | |
523 | #define AC97MSB_REG 0x41 | |
524 | #define AC97ADDR_REG 0x42 | |
525 | #define AC97BUSY_REG 0x43 | |
526 | ||
527 | /* em202 registers */ | |
528 | #define MASTER_AC97 0x02 | |
539c96d0 | 529 | #define LINE_IN_AC97 0x10 |
a6c2ba28 | 530 | #define VIDEO_AC97 0x14 |
531 | ||
532 | /* register settings */ | |
4362559d SS |
533 | #define EM2800_AUDIO_SRC_TUNER 0x0d |
534 | #define EM2800_AUDIO_SRC_LINE 0x0c | |
3acf2809 MCC |
535 | #define EM28XX_AUDIO_SRC_TUNER 0xc0 |
536 | #define EM28XX_AUDIO_SRC_LINE 0x80 | |
a6c2ba28 | 537 | |
538 | /* printk macros */ | |
539 | ||
3acf2809 | 540 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 541 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 542 | |
3acf2809 | 543 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 544 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 545 | dev->name , ##arg); } while (0) |
a6c2ba28 | 546 | |
3acf2809 | 547 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 548 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 549 | dev->name , ##arg); } while (0) |
3acf2809 | 550 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 551 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 552 | dev->name , ##arg); } while (0) |
a6c2ba28 | 553 | |
3acf2809 | 554 | inline static int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 555 | { |
556 | /* side effect of disabling scaler and mixer */ | |
3acf2809 | 557 | return em28xx_write_regs(dev, COMPR_REG, "\x00", 1); |
a6c2ba28 | 558 | } |
559 | ||
3acf2809 | 560 | inline static int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 561 | { |
3acf2809 | 562 | return em28xx_read_reg(dev, YGAIN_REG) & 0x1f; |
a6c2ba28 | 563 | } |
564 | ||
3acf2809 | 565 | inline static int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 566 | { |
3acf2809 | 567 | return em28xx_read_reg(dev, YOFFSET_REG); |
a6c2ba28 | 568 | } |
569 | ||
3acf2809 | 570 | inline static int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 571 | { |
3acf2809 | 572 | return em28xx_read_reg(dev, UVGAIN_REG) & 0x1f; |
a6c2ba28 | 573 | } |
574 | ||
3acf2809 | 575 | inline static int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 576 | { |
3acf2809 | 577 | return em28xx_read_reg(dev, UOFFSET_REG); |
a6c2ba28 | 578 | } |
579 | ||
3acf2809 | 580 | inline static int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 581 | { |
3acf2809 | 582 | return em28xx_read_reg(dev, VOFFSET_REG); |
a6c2ba28 | 583 | } |
584 | ||
3acf2809 | 585 | inline static int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 586 | { |
3acf2809 | 587 | return em28xx_read_reg(dev, GAMMA_REG) & 0x3f; |
a6c2ba28 | 588 | } |
589 | ||
3acf2809 | 590 | inline static int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 591 | { |
592 | u8 tmp = (u8) val; | |
3acf2809 | 593 | return em28xx_write_regs(dev, YGAIN_REG, &tmp, 1); |
a6c2ba28 | 594 | } |
595 | ||
3acf2809 | 596 | inline static int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 597 | { |
598 | u8 tmp = (u8) val; | |
3acf2809 | 599 | return em28xx_write_regs(dev, YOFFSET_REG, &tmp, 1); |
a6c2ba28 | 600 | } |
601 | ||
3acf2809 | 602 | inline static int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 603 | { |
604 | u8 tmp = (u8) val; | |
3acf2809 | 605 | return em28xx_write_regs(dev, UVGAIN_REG, &tmp, 1); |
a6c2ba28 | 606 | } |
607 | ||
3acf2809 | 608 | inline static int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 609 | { |
610 | u8 tmp = (u8) val; | |
3acf2809 | 611 | return em28xx_write_regs(dev, UOFFSET_REG, &tmp, 1); |
a6c2ba28 | 612 | } |
613 | ||
3acf2809 | 614 | inline static int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 615 | { |
616 | u8 tmp = (u8) val; | |
3acf2809 | 617 | return em28xx_write_regs(dev, VOFFSET_REG, &tmp, 1); |
a6c2ba28 | 618 | } |
619 | ||
3acf2809 | 620 | inline static int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 621 | { |
622 | u8 tmp = (u8) val; | |
3acf2809 | 623 | return em28xx_write_regs(dev, GAMMA_REG, &tmp, 1); |
a6c2ba28 | 624 | } |
625 | ||
626 | /*FIXME: maxw should be dependent of alt mode */ | |
3acf2809 | 627 | inline static unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 628 | { |
c8793b03 | 629 | if (dev->max_range_640_480) |
7d497f8a | 630 | return 640; |
c8793b03 | 631 | else |
7d497f8a | 632 | return 720; |
30556b23 MR |
633 | } |
634 | ||
3acf2809 | 635 | inline static unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 636 | { |
c8793b03 | 637 | if (dev->max_range_640_480) |
7d497f8a | 638 | return 480; |
c8793b03 | 639 | else |
7d497f8a | 640 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; |
a6c2ba28 | 641 | } |
a6c2ba28 | 642 | #endif |