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V4L/DVB (13144): gspca_ov519: Add support for OV2610 and OV3610 sensors
[deliverable/linux.git] / drivers / media / video / gspca / ov519.c
CommitLineData
6a7eba24
JFM		 1/**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
2961e875
RB		 6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
6a7eba24
JFM		 18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34#define MODULE_NAME "ov519"
35
36#include "gspca.h"
37
6a7eba24
JFM		 38MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39MODULE_DESCRIPTION("OV519 USB Camera Driver");
40MODULE_LICENSE("GPL");
41
42/* global parameters */
43static int frame_rate;
44
45/* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47static int i2c_detect_tries = 10;
48
49/* ov519 device descriptor */
50struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
92918a53
HG		 53 __u8 packet_nr;
54
49809d6a
HG		 55 char bridge;
56#define BRIDGE_OV511 0
57#define BRIDGE_OV511PLUS 1
58#define BRIDGE_OV518 2
59#define BRIDGE_OV518PLUS 3
60#define BRIDGE_OV519 4
635118d5 61#define BRIDGE_OVFX2 5
9e4d8258
HG		 62#define BRIDGE_MASK 7
63
64 char invert_led;
65#define BRIDGE_INVERT_LED 8
49809d6a 66
6a7eba24 67 /* Determined by sensor type */
ac40b1fa 68 __u8 sif;
6a7eba24 69
ac40b1fa
JFM		 70 __u8 brightness;
71 __u8 contrast;
72 __u8 colors;
0cd6759d
JFM		 73 __u8 hflip;
74 __u8 vflip;
02ab18b0
HG		 75 __u8 autobrightness;
76 __u8 freq;
6a7eba24 77
ac40b1fa 78 __u8 stopped; /* Streaming is temporarily paused */
6a7eba24 79
1876bb92
HG		 80 __u8 frame_rate; /* current Framerate */
81 __u8 clockdiv; /* clockdiv override */
6a7eba24
JFM		 82
83 char sensor; /* Type of image sensor chip (SEN_*) */
84#define SEN_UNKNOWN 0
635118d5
HG		 85#define SEN_OV2610 1
86#define SEN_OV3610 2
87#define SEN_OV6620 3
88#define SEN_OV6630 4
89#define SEN_OV66308AF 5
90#define SEN_OV7610 6
91#define SEN_OV7620 7
92#define SEN_OV7640 8
93#define SEN_OV7670 9
94#define SEN_OV76BE 10
95#define SEN_OV8610 11
6a7eba24
JFM		 96};
97
98/* V4L2 controls supported by the driver */
99static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
100static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
101static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
102static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
103static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
104static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
0cd6759d
JFM		 105static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
106static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
107static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
108static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
02ab18b0
HG		 109static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
110static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
111static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
112static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
49809d6a
HG		 113static void setbrightness(struct gspca_dev *gspca_dev);
114static void setcontrast(struct gspca_dev *gspca_dev);
115static void setcolors(struct gspca_dev *gspca_dev);
02ab18b0
HG		 116static void setautobrightness(struct sd *sd);
117static void setfreq(struct sd *sd);
6a7eba24 118
02ab18b0 119static const struct ctrl sd_ctrls[] = {
6a7eba24
JFM		 120 {
121 {
122 .id = V4L2_CID_BRIGHTNESS,
123 .type = V4L2_CTRL_TYPE_INTEGER,
124 .name = "Brightness",
125 .minimum = 0,
126 .maximum = 255,
127 .step = 1,
594f5b8b
JFM		 128#define BRIGHTNESS_DEF 127
129 .default_value = BRIGHTNESS_DEF,
6a7eba24
JFM		 130 },
131 .set = sd_setbrightness,
132 .get = sd_getbrightness,
133 },
6a7eba24
JFM		 134 {
135 {
136 .id = V4L2_CID_CONTRAST,
137 .type = V4L2_CTRL_TYPE_INTEGER,
138 .name = "Contrast",
139 .minimum = 0,
140 .maximum = 255,
141 .step = 1,
594f5b8b
JFM		 142#define CONTRAST_DEF 127
143 .default_value = CONTRAST_DEF,
6a7eba24
JFM		 144 },
145 .set = sd_setcontrast,
146 .get = sd_getcontrast,
147 },
6a7eba24
JFM		 148 {
149 {
150 .id = V4L2_CID_SATURATION,
151 .type = V4L2_CTRL_TYPE_INTEGER,
594f5b8b 152 .name = "Color",
6a7eba24
JFM		 153 .minimum = 0,
154 .maximum = 255,
155 .step = 1,
594f5b8b
JFM		 156#define COLOR_DEF 127
157 .default_value = COLOR_DEF,
6a7eba24
JFM		 158 },
159 .set = sd_setcolors,
160 .get = sd_getcolors,
161 },
02ab18b0 162/* The flip controls work with ov7670 only */
de00448f 163#define HFLIP_IDX 3
0cd6759d
JFM		 164 {
165 {
166 .id = V4L2_CID_HFLIP,
167 .type = V4L2_CTRL_TYPE_BOOLEAN,
168 .name = "Mirror",
169 .minimum = 0,
170 .maximum = 1,
171 .step = 1,
172#define HFLIP_DEF 0
173 .default_value = HFLIP_DEF,
174 },
175 .set = sd_sethflip,
176 .get = sd_gethflip,
177 },
de00448f 178#define VFLIP_IDX 4
0cd6759d
JFM		 179 {
180 {
181 .id = V4L2_CID_VFLIP,
182 .type = V4L2_CTRL_TYPE_BOOLEAN,
183 .name = "Vflip",
184 .minimum = 0,
185 .maximum = 1,
186 .step = 1,
187#define VFLIP_DEF 0
188 .default_value = VFLIP_DEF,
189 },
190 .set = sd_setvflip,
191 .get = sd_getvflip,
192 },
02ab18b0
HG		 193#define AUTOBRIGHT_IDX 5
194 {
195 {
196 .id = V4L2_CID_AUTOBRIGHTNESS,
197 .type = V4L2_CTRL_TYPE_BOOLEAN,
198 .name = "Auto Brightness",
199 .minimum = 0,
200 .maximum = 1,
201 .step = 1,
202#define AUTOBRIGHT_DEF 1
203 .default_value = AUTOBRIGHT_DEF,
204 },
205 .set = sd_setautobrightness,
206 .get = sd_getautobrightness,
207 },
208#define FREQ_IDX 6
209 {
210 {
211 .id = V4L2_CID_POWER_LINE_FREQUENCY,
212 .type = V4L2_CTRL_TYPE_MENU,
213 .name = "Light frequency filter",
214 .minimum = 0,
215 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
216 .step = 1,
217#define FREQ_DEF 0
218 .default_value = FREQ_DEF,
219 },
220 .set = sd_setfreq,
221 .get = sd_getfreq,
222 },
223#define OV7670_FREQ_IDX 7
224 {
225 {
226 .id = V4L2_CID_POWER_LINE_FREQUENCY,
227 .type = V4L2_CTRL_TYPE_MENU,
228 .name = "Light frequency filter",
229 .minimum = 0,
230 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
231 .step = 1,
232#define OV7670_FREQ_DEF 3
233 .default_value = OV7670_FREQ_DEF,
234 },
235 .set = sd_setfreq,
236 .get = sd_getfreq,
237 },
6a7eba24
JFM		 238};
239
49809d6a 240static const struct v4l2_pix_format ov519_vga_mode[] = {
c2446b3e
JFM		 241 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
242 .bytesperline = 320,
594f5b8b 243 .sizeimage = 320 * 240 * 3 / 8 + 590,
c2446b3e
JFM		 244 .colorspace = V4L2_COLORSPACE_JPEG,
245 .priv = 1},
246 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
247 .bytesperline = 640,
248 .sizeimage = 640 * 480 * 3 / 8 + 590,
249 .colorspace = V4L2_COLORSPACE_JPEG,
250 .priv = 0},
6a7eba24 251};
49809d6a 252static const struct v4l2_pix_format ov519_sif_mode[] = {
124cc9c0
HG		 253 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
254 .bytesperline = 160,
255 .sizeimage = 160 * 120 * 3 / 8 + 590,
256 .colorspace = V4L2_COLORSPACE_JPEG,
257 .priv = 3},
c2446b3e
JFM		 258 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
259 .bytesperline = 176,
594f5b8b 260 .sizeimage = 176 * 144 * 3 / 8 + 590,
c2446b3e
JFM		 261 .colorspace = V4L2_COLORSPACE_JPEG,
262 .priv = 1},
124cc9c0
HG		 263 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
264 .bytesperline = 320,
265 .sizeimage = 320 * 240 * 3 / 8 + 590,
266 .colorspace = V4L2_COLORSPACE_JPEG,
267 .priv = 2},
c2446b3e
JFM		 268 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
269 .bytesperline = 352,
594f5b8b 270 .sizeimage = 352 * 288 * 3 / 8 + 590,
c2446b3e
JFM		 271 .colorspace = V4L2_COLORSPACE_JPEG,
272 .priv = 0},
6a7eba24
JFM		 273};
274
b282d873
HG		 275/* Note some of the sizeimage values for the ov511 / ov518 may seem
276 larger then necessary, however they need to be this big as the ov511 /
277 ov518 always fills the entire isoc frame, using 0 padding bytes when
278 it doesn't have any data. So with low framerates the amount of data
279 transfered can become quite large (libv4l will remove all the 0 padding
280 in userspace). */
49809d6a
HG		 281static const struct v4l2_pix_format ov518_vga_mode[] = {
282 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
283 .bytesperline = 320,
b282d873 284 .sizeimage = 320 * 240 * 3,
49809d6a
HG		 285 .colorspace = V4L2_COLORSPACE_JPEG,
286 .priv = 1},
287 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
288 .bytesperline = 640,
b282d873 289 .sizeimage = 640 * 480 * 2,
49809d6a
HG		 290 .colorspace = V4L2_COLORSPACE_JPEG,
291 .priv = 0},
292};
293static const struct v4l2_pix_format ov518_sif_mode[] = {
124cc9c0
HG		 294 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
295 .bytesperline = 160,
b282d873 296 .sizeimage = 70000,
124cc9c0
HG		 297 .colorspace = V4L2_COLORSPACE_JPEG,
298 .priv = 3},
49809d6a
HG		 299 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
300 .bytesperline = 176,
b282d873 301 .sizeimage = 70000,
49809d6a
HG		 302 .colorspace = V4L2_COLORSPACE_JPEG,
303 .priv = 1},
124cc9c0
HG		 304 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
305 .bytesperline = 320,
b282d873 306 .sizeimage = 320 * 240 * 3,
124cc9c0
HG		 307 .colorspace = V4L2_COLORSPACE_JPEG,
308 .priv = 2},
49809d6a
HG		 309 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
310 .bytesperline = 352,
b282d873 311 .sizeimage = 352 * 288 * 3,
49809d6a
HG		 312 .colorspace = V4L2_COLORSPACE_JPEG,
313 .priv = 0},
314};
315
1876bb92
HG		 316static const struct v4l2_pix_format ov511_vga_mode[] = {
317 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
318 .bytesperline = 320,
319 .sizeimage = 320 * 240 * 3,
320 .colorspace = V4L2_COLORSPACE_JPEG,
321 .priv = 1},
322 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
323 .bytesperline = 640,
324 .sizeimage = 640 * 480 * 2,
325 .colorspace = V4L2_COLORSPACE_JPEG,
326 .priv = 0},
327};
328static const struct v4l2_pix_format ov511_sif_mode[] = {
329 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
330 .bytesperline = 160,
b282d873 331 .sizeimage = 70000,
1876bb92
HG		 332 .colorspace = V4L2_COLORSPACE_JPEG,
333 .priv = 3},
334 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
335 .bytesperline = 176,
b282d873 336 .sizeimage = 70000,
1876bb92
HG		 337 .colorspace = V4L2_COLORSPACE_JPEG,
338 .priv = 1},
339 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
340 .bytesperline = 320,
341 .sizeimage = 320 * 240 * 3,
342 .colorspace = V4L2_COLORSPACE_JPEG,
343 .priv = 2},
344 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
345 .bytesperline = 352,
346 .sizeimage = 352 * 288 * 3,
347 .colorspace = V4L2_COLORSPACE_JPEG,
348 .priv = 0},
349};
49809d6a 350
635118d5
HG		 351static const struct v4l2_pix_format ovfx2_vga_mode[] = {
352 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
353 .bytesperline = 320,
354 .sizeimage = 320 * 240,
355 .colorspace = V4L2_COLORSPACE_SRGB,
356 .priv = 1},
357 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
358 .bytesperline = 640,
359 .sizeimage = 640 * 480,
360 .colorspace = V4L2_COLORSPACE_SRGB,
361 .priv = 0},
362};
363static const struct v4l2_pix_format ovfx2_cif_mode[] = {
364 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
365 .bytesperline = 160,
366 .sizeimage = 160 * 120,
367 .colorspace = V4L2_COLORSPACE_SRGB,
368 .priv = 3},
369 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
370 .bytesperline = 176,
371 .sizeimage = 176 * 144,
372 .colorspace = V4L2_COLORSPACE_SRGB,
373 .priv = 1},
374 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
375 .bytesperline = 320,
376 .sizeimage = 320 * 240,
377 .colorspace = V4L2_COLORSPACE_SRGB,
378 .priv = 2},
379 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
380 .bytesperline = 352,
381 .sizeimage = 352 * 288,
382 .colorspace = V4L2_COLORSPACE_SRGB,
383 .priv = 0},
384};
385static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
386 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
387 .bytesperline = 1600,
388 .sizeimage = 1600 * 1200,
389 .colorspace = V4L2_COLORSPACE_SRGB},
390};
391static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
392 {2080, 1544, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
393 .bytesperline = 2080,
394 .sizeimage = 2080 * 1544,
395 .colorspace = V4L2_COLORSPACE_SRGB},
396 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
397 .bytesperline = 1600,
398 .sizeimage = 1600 * 1200,
399 .colorspace = V4L2_COLORSPACE_SRGB},
400 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
401 .bytesperline = 1024,
402 .sizeimage = 1024 * 768,
403 .colorspace = V4L2_COLORSPACE_SRGB},
404 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
405 .bytesperline = 800,
406 .sizeimage = 800 * 600,
407 .colorspace = V4L2_COLORSPACE_SRGB},
408 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
409 .bytesperline = 640,
410 .sizeimage = 640 * 480,
411 .colorspace = V4L2_COLORSPACE_SRGB},
412};
413
414
49809d6a 415/* Registers common to OV511 / OV518 */
1876bb92 416#define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
49809d6a 417#define R51x_SYS_RESET 0x50
1876bb92
HG		 418 /* Reset type flags */
419 #define OV511_RESET_OMNICE 0x08
49809d6a
HG		 420#define R51x_SYS_INIT 0x53
421#define R51x_SYS_SNAP 0x52
422#define R51x_SYS_CUST_ID 0x5F
423#define R51x_COMP_LUT_BEGIN 0x80
424
425/* OV511 Camera interface register numbers */
1876bb92
HG		 426#define R511_CAM_DELAY 0x10
427#define R511_CAM_EDGE 0x11
428#define R511_CAM_PXCNT 0x12
429#define R511_CAM_LNCNT 0x13
430#define R511_CAM_PXDIV 0x14
431#define R511_CAM_LNDIV 0x15
432#define R511_CAM_UV_EN 0x16
433#define R511_CAM_LINE_MODE 0x17
434#define R511_CAM_OPTS 0x18
435
436#define R511_SNAP_FRAME 0x19
437#define R511_SNAP_PXCNT 0x1A
438#define R511_SNAP_LNCNT 0x1B
439#define R511_SNAP_PXDIV 0x1C
440#define R511_SNAP_LNDIV 0x1D
441#define R511_SNAP_UV_EN 0x1E
442#define R511_SNAP_UV_EN 0x1E
443#define R511_SNAP_OPTS 0x1F
444
445#define R511_DRAM_FLOW_CTL 0x20
446#define R511_FIFO_OPTS 0x31
447#define R511_I2C_CTL 0x40
49809d6a 448#define R511_SYS_LED_CTL 0x55 /* OV511+ only */
1876bb92
HG		 449#define R511_COMP_EN 0x78
450#define R511_COMP_LUT_EN 0x79
49809d6a
HG		 451
452/* OV518 Camera interface register numbers */
453#define R518_GPIO_OUT 0x56 /* OV518(+) only */
454#define R518_GPIO_CTL 0x57 /* OV518(+) only */
455
6a7eba24 456/* OV519 Camera interface register numbers */
ac40b1fa
JFM		 457#define OV519_R10_H_SIZE 0x10
458#define OV519_R11_V_SIZE 0x11
459#define OV519_R12_X_OFFSETL 0x12
460#define OV519_R13_X_OFFSETH 0x13
461#define OV519_R14_Y_OFFSETL 0x14
462#define OV519_R15_Y_OFFSETH 0x15
463#define OV519_R16_DIVIDER 0x16
464#define OV519_R20_DFR 0x20
465#define OV519_R25_FORMAT 0x25
6a7eba24
JFM		 466
467/* OV519 System Controller register numbers */
468#define OV519_SYS_RESET1 0x51
469#define OV519_SYS_EN_CLK1 0x54
470
471#define OV519_GPIO_DATA_OUT0 0x71
472#define OV519_GPIO_IO_CTRL0 0x72
473
474#define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
475
476/* I2C registers */
477#define R51x_I2C_W_SID 0x41
478#define R51x_I2C_SADDR_3 0x42
479#define R51x_I2C_SADDR_2 0x43
480#define R51x_I2C_R_SID 0x44
481#define R51x_I2C_DATA 0x45
482#define R518_I2C_CTL 0x47 /* OV518(+) only */
483
484/* I2C ADDRESSES */
485#define OV7xx0_SID 0x42
229bb7dc 486#define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
6a7eba24
JFM		 487#define OV8xx0_SID 0xa0
488#define OV6xx0_SID 0xc0
489
490/* OV7610 registers */
491#define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
49809d6a
HG		 492#define OV7610_REG_BLUE 0x01 /* blue channel balance */
493#define OV7610_REG_RED 0x02 /* red channel balance */
6a7eba24
JFM		 494#define OV7610_REG_SAT 0x03 /* saturation */
495#define OV8610_REG_HUE 0x04 /* 04 reserved */
496#define OV7610_REG_CNT 0x05 /* Y contrast */
497#define OV7610_REG_BRT 0x06 /* Y brightness */
498#define OV7610_REG_COM_C 0x14 /* misc common regs */
499#define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
500#define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
501#define OV7610_REG_COM_I 0x29 /* misc settings */
502
503/* OV7670 registers */
504#define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
505#define OV7670_REG_BLUE 0x01 /* blue gain */
506#define OV7670_REG_RED 0x02 /* red gain */
507#define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
508#define OV7670_REG_COM1 0x04 /* Control 1 */
509#define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
510#define OV7670_REG_COM3 0x0c /* Control 3 */
511#define OV7670_REG_COM4 0x0d /* Control 4 */
512#define OV7670_REG_COM5 0x0e /* All "reserved" */
513#define OV7670_REG_COM6 0x0f /* Control 6 */
514#define OV7670_REG_AECH 0x10 /* More bits of AEC value */
515#define OV7670_REG_CLKRC 0x11 /* Clock control */
516#define OV7670_REG_COM7 0x12 /* Control 7 */
517#define OV7670_COM7_FMT_VGA 0x00
518#define OV7670_COM7_YUV 0x00 /* YUV */
519#define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
520#define OV7670_COM7_FMT_MASK 0x38
521#define OV7670_COM7_RESET 0x80 /* Register reset */
522#define OV7670_REG_COM8 0x13 /* Control 8 */
523#define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
524#define OV7670_COM8_AWB 0x02 /* White balance enable */
525#define OV7670_COM8_AGC 0x04 /* Auto gain enable */
526#define OV7670_COM8_BFILT 0x20 /* Band filter enable */
527#define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
528#define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
529#define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
530#define OV7670_REG_COM10 0x15 /* Control 10 */
531#define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
532#define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
533#define OV7670_REG_VSTART 0x19 /* Vert start high bits */
534#define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
535#define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
0cd6759d 536#define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
6a7eba24
JFM		 537#define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
538#define OV7670_REG_AEW 0x24 /* AGC upper limit */
539#define OV7670_REG_AEB 0x25 /* AGC lower limit */
540#define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
541#define OV7670_REG_HREF 0x32 /* HREF pieces */
542#define OV7670_REG_TSLB 0x3a /* lots of stuff */
543#define OV7670_REG_COM11 0x3b /* Control 11 */
544#define OV7670_COM11_EXP 0x02
545#define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
546#define OV7670_REG_COM12 0x3c /* Control 12 */
547#define OV7670_REG_COM13 0x3d /* Control 13 */
548#define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
549#define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
550#define OV7670_REG_COM14 0x3e /* Control 14 */
551#define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
552#define OV7670_REG_COM15 0x40 /* Control 15 */
553#define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
554#define OV7670_REG_COM16 0x41 /* Control 16 */
555#define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
556#define OV7670_REG_BRIGHT 0x55 /* Brightness */
557#define OV7670_REG_CONTRAS 0x56 /* Contrast control */
558#define OV7670_REG_GFIX 0x69 /* Fix gain control */
559#define OV7670_REG_RGB444 0x8c /* RGB 444 control */
560#define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
561#define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
562#define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
563#define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
564#define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
565#define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
566#define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
567#define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
568#define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
569
4202f71c
JFM		 570struct ov_regvals {
571 __u8 reg;
572 __u8 val;
573};
574struct ov_i2c_regvals {
575 __u8 reg;
576 __u8 val;
577};
578
635118d5
HG		 579/* Settings for OV2610 camera chip */
580static const struct ov_i2c_regvals norm_2610[] =
581{
582 { 0x10, 0x80 }, /* reset */
583};
584
585static const struct ov_i2c_regvals norm_3620b[] =
586{
587 /*
588 * From the datasheet: "Note that after writing to register COMH
589 * (0x12) to change the sensor mode, registers related to the
590 * sensor’s cropping window will be reset back to their default
591 * values."
592 *
593 * "wait 4096 external clock ... to make sure the sensor is
594 * stable and ready to access registers" i.e. 160us at 24MHz
595 */
596
597 { 0x12, 0x80 }, /* COMH reset */
598 { 0x12, 0x00 }, /* QXGA, master */
599
600 /*
601 * 11 CLKRC "Clock Rate Control"
602 * [7] internal frequency doublers: on
603 * [6] video port mode: master
604 * [5:0] clock divider: 1
605 */
606 { 0x11, 0x80 },
607
608 /*
609 * 13 COMI "Common Control I"
610 * = 192 (0xC0) 11000000
611 * COMI[7] "AEC speed selection"
612 * = 1 (0x01) 1....... "Faster AEC correction"
613 * COMI[6] "AEC speed step selection"
614 * = 1 (0x01) .1...... "Big steps, fast"
615 * COMI[5] "Banding filter on off"
616 * = 0 (0x00) ..0..... "Off"
617 * COMI[4] "Banding filter option"
618 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
619 * the PLL is ON"
620 * COMI[3] "Reserved"
621 * = 0 (0x00) ....0...
622 * COMI[2] "AGC auto manual control selection"
623 * = 0 (0x00) .....0.. "Manual"
624 * COMI[1] "AWB auto manual control selection"
625 * = 0 (0x00) ......0. "Manual"
626 * COMI[0] "Exposure control"
627 * = 0 (0x00) .......0 "Manual"
628 */
629 { 0x13, 0xC0 },
630
631 /*
632 * 09 COMC "Common Control C"
633 * = 8 (0x08) 00001000
634 * COMC[7:5] "Reserved"
635 * = 0 (0x00) 000.....
636 * COMC[4] "Sleep Mode Enable"
637 * = 0 (0x00) ...0.... "Normal mode"
638 * COMC[3:2] "Sensor sampling reset timing selection"
639 * = 2 (0x02) ....10.. "Longer reset time"
640 * COMC[1:0] "Output drive current select"
641 * = 0 (0x00) ......00 "Weakest"
642 */
643 { 0x09, 0x08 },
644
645 /*
646 * 0C COMD "Common Control D"
647 * = 8 (0x08) 00001000
648 * COMD[7] "Reserved"
649 * = 0 (0x00) 0.......
650 * COMD[6] "Swap MSB and LSB at the output port"
651 * = 0 (0x00) .0...... "False"
652 * COMD[5:3] "Reserved"
653 * = 1 (0x01) ..001...
654 * COMD[2] "Output Average On Off"
655 * = 0 (0x00) .....0.. "Output Normal"
656 * COMD[1] "Sensor precharge voltage selection"
657 * = 0 (0x00) ......0. "Selects internal
658 * reference precharge
659 * voltage"
660 * COMD[0] "Snapshot option"
661 * = 0 (0x00) .......0 "Enable live video output
662 * after snapshot sequence"
663 */
664 { 0x0c, 0x08 },
665
666 /*
667 * 0D COME "Common Control E"
668 * = 161 (0xA1) 10100001
669 * COME[7] "Output average option"
670 * = 1 (0x01) 1....... "Output average of 4 pixels"
671 * COME[6] "Anti-blooming control"
672 * = 0 (0x00) .0...... "Off"
673 * COME[5:3] "Reserved"
674 * = 4 (0x04) ..100...
675 * COME[2] "Clock output power down pin status"
676 * = 0 (0x00) .....0.. "Tri-state data output pin
677 * on power down"
678 * COME[1] "Data output pin status selection at power down"
679 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
680 * HREF, and CHSYNC pins on
681 * power down"
682 * COME[0] "Auto zero circuit select"
683 * = 1 (0x01) .......1 "On"
684 */
685 { 0x0d, 0xA1 },
686
687 /*
688 * 0E COMF "Common Control F"
689 * = 112 (0x70) 01110000
690 * COMF[7] "System clock selection"
691 * = 0 (0x00) 0....... "Use 24 MHz system clock"
692 * COMF[6:4] "Reserved"
693 * = 7 (0x07) .111....
694 * COMF[3] "Manual auto negative offset canceling selection"
695 * = 0 (0x00) ....0... "Auto detect negative
696 * offset and cancel it"
697 * COMF[2:0] "Reserved"
698 * = 0 (0x00) .....000
699 */
700 { 0x0e, 0x70 },
701
702 /*
703 * 0F COMG "Common Control G"
704 * = 66 (0x42) 01000010
705 * COMG[7] "Optical black output selection"
706 * = 0 (0x00) 0....... "Disable"
707 * COMG[6] "Black level calibrate selection"
708 * = 1 (0x01) .1...... "Use optical black pixels
709 * to calibrate"
710 * COMG[5:4] "Reserved"
711 * = 0 (0x00) ..00....
712 * COMG[3] "Channel offset adjustment"
713 * = 0 (0x00) ....0... "Disable offset adjustment"
714 * COMG[2] "ADC black level calibration option"
715 * = 0 (0x00) .....0.. "Use B/G line and G/R
716 * line to calibrate each
717 * channel's black level"
718 * COMG[1] "Reserved"
719 * = 1 (0x01) ......1.
720 * COMG[0] "ADC black level calibration enable"
721 * = 0 (0x00) .......0 "Disable"
722 */
723 { 0x0f, 0x42 },
724
725 /*
726 * 14 COMJ "Common Control J"
727 * = 198 (0xC6) 11000110
728 * COMJ[7:6] "AGC gain ceiling"
729 * = 3 (0x03) 11...... "8x"
730 * COMJ[5:4] "Reserved"
731 * = 0 (0x00) ..00....
732 * COMJ[3] "Auto banding filter"
733 * = 0 (0x00) ....0... "Banding filter is always
734 * on off depending on
735 * COMI[5] setting"
736 * COMJ[2] "VSYNC drop option"
737 * = 1 (0x01) .....1.. "SYNC is dropped if frame
738 * data is dropped"
739 * COMJ[1] "Frame data drop"
740 * = 1 (0x01) ......1. "Drop frame data if
741 * exposure is not within
742 * tolerance. In AEC mode,
743 * data is normally dropped
744 * when data is out of
745 * range."
746 * COMJ[0] "Reserved"
747 * = 0 (0x00) .......0
748 */
749 { 0x14, 0xC6 },
750
751 /*
752 * 15 COMK "Common Control K"
753 * = 2 (0x02) 00000010
754 * COMK[7] "CHSYNC pin output swap"
755 * = 0 (0x00) 0....... "CHSYNC"
756 * COMK[6] "HREF pin output swap"
757 * = 0 (0x00) .0...... "HREF"
758 * COMK[5] "PCLK output selection"
759 * = 0 (0x00) ..0..... "PCLK always output"
760 * COMK[4] "PCLK edge selection"
761 * = 0 (0x00) ...0.... "Data valid on falling edge"
762 * COMK[3] "HREF output polarity"
763 * = 0 (0x00) ....0... "positive"
764 * COMK[2] "Reserved"
765 * = 0 (0x00) .....0..
766 * COMK[1] "VSYNC polarity"
767 * = 1 (0x01) ......1. "negative"
768 * COMK[0] "HSYNC polarity"
769 * = 0 (0x00) .......0 "positive"
770 */
771 { 0x15, 0x02 },
772
773 /*
774 * 33 CHLF "Current Control"
775 * = 9 (0x09) 00001001
776 * CHLF[7:6] "Sensor current control"
777 * = 0 (0x00) 00......
778 * CHLF[5] "Sensor current range control"
779 * = 0 (0x00) ..0..... "normal range"
780 * CHLF[4] "Sensor current"
781 * = 0 (0x00) ...0.... "normal current"
782 * CHLF[3] "Sensor buffer current control"
783 * = 1 (0x01) ....1... "half current"
784 * CHLF[2] "Column buffer current control"
785 * = 0 (0x00) .....0.. "normal current"
786 * CHLF[1] "Analog DSP current control"
787 * = 0 (0x00) ......0. "normal current"
788 * CHLF[1] "ADC current control"
789 * = 0 (0x00) ......0. "normal current"
790 */
791 { 0x33, 0x09 },
792
793 /*
794 * 34 VBLM "Blooming Control"
795 * = 80 (0x50) 01010000
796 * VBLM[7] "Hard soft reset switch"
797 * = 0 (0x00) 0....... "Hard reset"
798 * VBLM[6:4] "Blooming voltage selection"
799 * = 5 (0x05) .101....
800 * VBLM[3:0] "Sensor current control"
801 * = 0 (0x00) ....0000
802 */
803 { 0x34, 0x50 },
804
805 /*
806 * 36 VCHG "Sensor Precharge Voltage Control"
807 * = 0 (0x00) 00000000
808 * VCHG[7] "Reserved"
809 * = 0 (0x00) 0.......
810 * VCHG[6:4] "Sensor precharge voltage control"
811 * = 0 (0x00) .000....
812 * VCHG[3:0] "Sensor array common reference"
813 * = 0 (0x00) ....0000
814 */
815 { 0x36, 0x00 },
816
817 /*
818 * 37 ADC "ADC Reference Control"
819 * = 4 (0x04) 00000100
820 * ADC[7:4] "Reserved"
821 * = 0 (0x00) 0000....
822 * ADC[3] "ADC input signal range"
823 * = 0 (0x00) ....0... "Input signal 1.0x"
824 * ADC[2:0] "ADC range control"
825 * = 4 (0x04) .....100
826 */
827 { 0x37, 0x04 },
828
829 /*
830 * 38 ACOM "Analog Common Ground"
831 * = 82 (0x52) 01010010
832 * ACOM[7] "Analog gain control"
833 * = 0 (0x00) 0....... "Gain 1x"
834 * ACOM[6] "Analog black level calibration"
835 * = 1 (0x01) .1...... "On"
836 * ACOM[5:0] "Reserved"
837 * = 18 (0x12) ..010010
838 */
839 { 0x38, 0x52 },
840
841 /*
842 * 3A FREFA "Internal Reference Adjustment"
843 * = 0 (0x00) 00000000
844 * FREFA[7:0] "Range"
845 * = 0 (0x00) 00000000
846 */
847 { 0x3a, 0x00 },
848
849 /*
850 * 3C FVOPT "Internal Reference Adjustment"
851 * = 31 (0x1F) 00011111
852 * FVOPT[7:0] "Range"
853 * = 31 (0x1F) 00011111
854 */
855 { 0x3c, 0x1F },
856
857 /*
858 * 44 Undocumented = 0 (0x00) 00000000
859 * 44[7:0] "It's a secret"
860 * = 0 (0x00) 00000000
861 */
862 { 0x44, 0x00 },
863
864 /*
865 * 40 Undocumented = 0 (0x00) 00000000
866 * 40[7:0] "It's a secret"
867 * = 0 (0x00) 00000000
868 */
869 { 0x40, 0x00 },
870
871 /*
872 * 41 Undocumented = 0 (0x00) 00000000
873 * 41[7:0] "It's a secret"
874 * = 0 (0x00) 00000000
875 */
876 { 0x41, 0x00 },
877
878 /*
879 * 42 Undocumented = 0 (0x00) 00000000
880 * 42[7:0] "It's a secret"
881 * = 0 (0x00) 00000000
882 */
883 { 0x42, 0x00 },
884
885 /*
886 * 43 Undocumented = 0 (0x00) 00000000
887 * 43[7:0] "It's a secret"
888 * = 0 (0x00) 00000000
889 */
890 { 0x43, 0x00 },
891
892 /*
893 * 45 Undocumented = 128 (0x80) 10000000
894 * 45[7:0] "It's a secret"
895 * = 128 (0x80) 10000000
896 */
897 { 0x45, 0x80 },
898
899 /*
900 * 48 Undocumented = 192 (0xC0) 11000000
901 * 48[7:0] "It's a secret"
902 * = 192 (0xC0) 11000000
903 */
904 { 0x48, 0xC0 },
905
906 /*
907 * 49 Undocumented = 25 (0x19) 00011001
908 * 49[7:0] "It's a secret"
909 * = 25 (0x19) 00011001
910 */
911 { 0x49, 0x19 },
912
913 /*
914 * 4B Undocumented = 128 (0x80) 10000000
915 * 4B[7:0] "It's a secret"
916 * = 128 (0x80) 10000000
917 */
918 { 0x4B, 0x80 },
919
920 /*
921 * 4D Undocumented = 196 (0xC4) 11000100
922 * 4D[7:0] "It's a secret"
923 * = 196 (0xC4) 11000100
924 */
925 { 0x4D, 0xC4 },
926
927 /*
928 * 35 VREF "Reference Voltage Control"
929 * = 76 (0x4C) 01001100
930 * VREF[7:5] "Column high reference control"
931 * = 2 (0x02) 010..... "higher voltage"
932 * VREF[4:2] "Column low reference control"
933 * = 3 (0x03) ...011.. "Highest voltage"
934 * VREF[1:0] "Reserved"
935 * = 0 (0x00) ......00
936 */
937 { 0x35, 0x4C },
938
939 /*
940 * 3D Undocumented = 0 (0x00) 00000000
941 * 3D[7:0] "It's a secret"
942 * = 0 (0x00) 00000000
943 */
944 { 0x3D, 0x00 },
945
946 /*
947 * 3E Undocumented = 0 (0x00) 00000000
948 * 3E[7:0] "It's a secret"
949 * = 0 (0x00) 00000000
950 */
951 { 0x3E, 0x00 },
952
953 /*
954 * 3B FREFB "Internal Reference Adjustment"
955 * = 24 (0x18) 00011000
956 * FREFB[7:0] "Range"
957 * = 24 (0x18) 00011000
958 */
959 { 0x3b, 0x18 },
960
961 /*
962 * 33 CHLF "Current Control"
963 * = 25 (0x19) 00011001
964 * CHLF[7:6] "Sensor current control"
965 * = 0 (0x00) 00......
966 * CHLF[5] "Sensor current range control"
967 * = 0 (0x00) ..0..... "normal range"
968 * CHLF[4] "Sensor current"
969 * = 1 (0x01) ...1.... "double current"
970 * CHLF[3] "Sensor buffer current control"
971 * = 1 (0x01) ....1... "half current"
972 * CHLF[2] "Column buffer current control"
973 * = 0 (0x00) .....0.. "normal current"
974 * CHLF[1] "Analog DSP current control"
975 * = 0 (0x00) ......0. "normal current"
976 * CHLF[1] "ADC current control"
977 * = 0 (0x00) ......0. "normal current"
978 */
979 { 0x33, 0x19 },
980
981 /*
982 * 34 VBLM "Blooming Control"
983 * = 90 (0x5A) 01011010
984 * VBLM[7] "Hard soft reset switch"
985 * = 0 (0x00) 0....... "Hard reset"
986 * VBLM[6:4] "Blooming voltage selection"
987 * = 5 (0x05) .101....
988 * VBLM[3:0] "Sensor current control"
989 * = 10 (0x0A) ....1010
990 */
991 { 0x34, 0x5A },
992
993 /*
994 * 3B FREFB "Internal Reference Adjustment"
995 * = 0 (0x00) 00000000
996 * FREFB[7:0] "Range"
997 * = 0 (0x00) 00000000
998 */
999 { 0x3b, 0x00 },
1000
1001 /*
1002 * 33 CHLF "Current Control"
1003 * = 9 (0x09) 00001001
1004 * CHLF[7:6] "Sensor current control"
1005 * = 0 (0x00) 00......
1006 * CHLF[5] "Sensor current range control"
1007 * = 0 (0x00) ..0..... "normal range"
1008 * CHLF[4] "Sensor current"
1009 * = 0 (0x00) ...0.... "normal current"
1010 * CHLF[3] "Sensor buffer current control"
1011 * = 1 (0x01) ....1... "half current"
1012 * CHLF[2] "Column buffer current control"
1013 * = 0 (0x00) .....0.. "normal current"
1014 * CHLF[1] "Analog DSP current control"
1015 * = 0 (0x00) ......0. "normal current"
1016 * CHLF[1] "ADC current control"
1017 * = 0 (0x00) ......0. "normal current"
1018 */
1019 { 0x33, 0x09 },
1020
1021 /*
1022 * 34 VBLM "Blooming Control"
1023 * = 80 (0x50) 01010000
1024 * VBLM[7] "Hard soft reset switch"
1025 * = 0 (0x00) 0....... "Hard reset"
1026 * VBLM[6:4] "Blooming voltage selection"
1027 * = 5 (0x05) .101....
1028 * VBLM[3:0] "Sensor current control"
1029 * = 0 (0x00) ....0000
1030 */
1031 { 0x34, 0x50 },
1032
1033 /*
1034 * 12 COMH "Common Control H"
1035 * = 64 (0x40) 01000000
1036 * COMH[7] "SRST"
1037 * = 0 (0x00) 0....... "No-op"
1038 * COMH[6:4] "Resolution selection"
1039 * = 4 (0x04) .100.... "XGA"
1040 * COMH[3] "Master slave selection"
1041 * = 0 (0x00) ....0... "Master mode"
1042 * COMH[2] "Internal B/R channel option"
1043 * = 0 (0x00) .....0.. "B/R use same channel"
1044 * COMH[1] "Color bar test pattern"
1045 * = 0 (0x00) ......0. "Off"
1046 * COMH[0] "Reserved"
1047 * = 0 (0x00) .......0
1048 */
1049 { 0x12, 0x40 },
1050
1051 /*
1052 * 17 HREFST "Horizontal window start"
1053 * = 31 (0x1F) 00011111
1054 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1055 * = 31 (0x1F) 00011111
1056 */
1057 { 0x17, 0x1F },
1058
1059 /*
1060 * 18 HREFEND "Horizontal window end"
1061 * = 95 (0x5F) 01011111
1062 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1063 * = 95 (0x5F) 01011111
1064 */
1065 { 0x18, 0x5F },
1066
1067 /*
1068 * 19 VSTRT "Vertical window start"
1069 * = 0 (0x00) 00000000
1070 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1071 * = 0 (0x00) 00000000
1072 */
1073 { 0x19, 0x00 },
1074
1075 /*
1076 * 1A VEND "Vertical window end"
1077 * = 96 (0x60) 01100000
1078 * VEND[7:0] "Vertical Window End, 8 MSBs"
1079 * = 96 (0x60) 01100000
1080 */
1081 { 0x1a, 0x60 },
1082
1083 /*
1084 * 32 COMM "Common Control M"
1085 * = 18 (0x12) 00010010
1086 * COMM[7:6] "Pixel clock divide option"
1087 * = 0 (0x00) 00...... "/1"
1088 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1089 * = 2 (0x02) ..010...
1090 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1091 * = 2 (0x02) .....010
1092 */
1093 { 0x32, 0x12 },
1094
1095 /*
1096 * 03 COMA "Common Control A"
1097 * = 74 (0x4A) 01001010
1098 * COMA[7:4] "AWB Update Threshold"
1099 * = 4 (0x04) 0100....
1100 * COMA[3:2] "Vertical window end line control 2 LSBs"
1101 * = 2 (0x02) ....10..
1102 * COMA[1:0] "Vertical window start line control 2 LSBs"
1103 * = 2 (0x02) ......10
1104 */
1105 { 0x03, 0x4A },
1106
1107 /*
1108 * 11 CLKRC "Clock Rate Control"
1109 * = 128 (0x80) 10000000
1110 * CLKRC[7] "Internal frequency doublers on off seclection"
1111 * = 1 (0x01) 1....... "On"
1112 * CLKRC[6] "Digital video master slave selection"
1113 * = 0 (0x00) .0...... "Master mode, sensor
1114 * provides PCLK"
1115 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1116 * = 0 (0x00) ..000000
1117 */
1118 { 0x11, 0x80 },
1119
1120 /*
1121 * 12 COMH "Common Control H"
1122 * = 0 (0x00) 00000000
1123 * COMH[7] "SRST"
1124 * = 0 (0x00) 0....... "No-op"
1125 * COMH[6:4] "Resolution selection"
1126 * = 0 (0x00) .000.... "QXGA"
1127 * COMH[3] "Master slave selection"
1128 * = 0 (0x00) ....0... "Master mode"
1129 * COMH[2] "Internal B/R channel option"
1130 * = 0 (0x00) .....0.. "B/R use same channel"
1131 * COMH[1] "Color bar test pattern"
1132 * = 0 (0x00) ......0. "Off"
1133 * COMH[0] "Reserved"
1134 * = 0 (0x00) .......0
1135 */
1136 { 0x12, 0x00 },
1137
1138 /*
1139 * 12 COMH "Common Control H"
1140 * = 64 (0x40) 01000000
1141 * COMH[7] "SRST"
1142 * = 0 (0x00) 0....... "No-op"
1143 * COMH[6:4] "Resolution selection"
1144 * = 4 (0x04) .100.... "XGA"
1145 * COMH[3] "Master slave selection"
1146 * = 0 (0x00) ....0... "Master mode"
1147 * COMH[2] "Internal B/R channel option"
1148 * = 0 (0x00) .....0.. "B/R use same channel"
1149 * COMH[1] "Color bar test pattern"
1150 * = 0 (0x00) ......0. "Off"
1151 * COMH[0] "Reserved"
1152 * = 0 (0x00) .......0
1153 */
1154 { 0x12, 0x40 },
1155
1156 /*
1157 * 17 HREFST "Horizontal window start"
1158 * = 31 (0x1F) 00011111
1159 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1160 * = 31 (0x1F) 00011111
1161 */
1162 { 0x17, 0x1F },
1163
1164 /*
1165 * 18 HREFEND "Horizontal window end"
1166 * = 95 (0x5F) 01011111
1167 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1168 * = 95 (0x5F) 01011111
1169 */
1170 { 0x18, 0x5F },
1171
1172 /*
1173 * 19 VSTRT "Vertical window start"
1174 * = 0 (0x00) 00000000
1175 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1176 * = 0 (0x00) 00000000
1177 */
1178 { 0x19, 0x00 },
1179
1180 /*
1181 * 1A VEND "Vertical window end"
1182 * = 96 (0x60) 01100000
1183 * VEND[7:0] "Vertical Window End, 8 MSBs"
1184 * = 96 (0x60) 01100000
1185 */
1186 { 0x1a, 0x60 },
1187
1188 /*
1189 * 32 COMM "Common Control M"
1190 * = 18 (0x12) 00010010
1191 * COMM[7:6] "Pixel clock divide option"
1192 * = 0 (0x00) 00...... "/1"
1193 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1194 * = 2 (0x02) ..010...
1195 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1196 * = 2 (0x02) .....010
1197 */
1198 { 0x32, 0x12 },
1199
1200 /*
1201 * 03 COMA "Common Control A"
1202 * = 74 (0x4A) 01001010
1203 * COMA[7:4] "AWB Update Threshold"
1204 * = 4 (0x04) 0100....
1205 * COMA[3:2] "Vertical window end line control 2 LSBs"
1206 * = 2 (0x02) ....10..
1207 * COMA[1:0] "Vertical window start line control 2 LSBs"
1208 * = 2 (0x02) ......10
1209 */
1210 { 0x03, 0x4A },
1211
1212 /*
1213 * 02 RED "Red Gain Control"
1214 * = 175 (0xAF) 10101111
1215 * RED[7] "Action"
1216 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1217 * RED[6:0] "Value"
1218 * = 47 (0x2F) .0101111
1219 */
1220 { 0x02, 0xAF },
1221
1222 /*
1223 * 2D ADDVSL "VSYNC Pulse Width"
1224 * = 210 (0xD2) 11010010
1225 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1226 * = 210 (0xD2) 11010010
1227 */
1228 { 0x2d, 0xD2 },
1229
1230 /*
1231 * 00 GAIN = 24 (0x18) 00011000
1232 * GAIN[7:6] "Reserved"
1233 * = 0 (0x00) 00......
1234 * GAIN[5] "Double"
1235 * = 0 (0x00) ..0..... "False"
1236 * GAIN[4] "Double"
1237 * = 1 (0x01) ...1.... "True"
1238 * GAIN[3:0] "Range"
1239 * = 8 (0x08) ....1000
1240 */
1241 { 0x00, 0x18 },
1242
1243 /*
1244 * 01 BLUE "Blue Gain Control"
1245 * = 240 (0xF0) 11110000
1246 * BLUE[7] "Action"
1247 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1248 * BLUE[6:0] "Value"
1249 * = 112 (0x70) .1110000
1250 */
1251 { 0x01, 0xF0 },
1252
1253 /*
1254 * 10 AEC "Automatic Exposure Control"
1255 * = 10 (0x0A) 00001010
1256 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1257 * = 10 (0x0A) 00001010
1258 */
1259 { 0x10, 0x0A },
1260
1261 { 0xE1, 0x67 },
1262 { 0xE3, 0x03 },
1263 { 0xE4, 0x26 },
1264 { 0xE5, 0x3E },
1265 { 0xF8, 0x01 },
1266 { 0xFF, 0x01 },
1267};
1268
4202f71c
JFM		 1269static const struct ov_i2c_regvals norm_6x20[] = {
1270 { 0x12, 0x80 }, /* reset */
1271 { 0x11, 0x01 },
1272 { 0x03, 0x60 },
1273 { 0x05, 0x7f }, /* For when autoadjust is off */
1274 { 0x07, 0xa8 },
1275 /* The ratio of 0x0c and 0x0d controls the white point */
1276 { 0x0c, 0x24 },
1277 { 0x0d, 0x24 },
1278 { 0x0f, 0x15 }, /* COMS */
1279 { 0x10, 0x75 }, /* AEC Exposure time */
1280 { 0x12, 0x24 }, /* Enable AGC */
1281 { 0x14, 0x04 },
1282 /* 0x16: 0x06 helps frame stability with moving objects */
1283 { 0x16, 0x06 },
1284/* { 0x20, 0x30 }, * Aperture correction enable */
1285 { 0x26, 0xb2 }, /* BLC enable */
1286 /* 0x28: 0x05 Selects RGB format if RGB on */
1287 { 0x28, 0x05 },
1288 { 0x2a, 0x04 }, /* Disable framerate adjust */
1289/* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
ae49c404 1290 { 0x2d, 0x85 },
4202f71c
JFM		 1291 { 0x33, 0xa0 }, /* Color Processing Parameter */
1292 { 0x34, 0xd2 }, /* Max A/D range */
1293 { 0x38, 0x8b },
1294 { 0x39, 0x40 },
1295
1296 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1297 { 0x3c, 0x3c }, /* Change AEC mode */
1298 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1299
1300 { 0x3d, 0x80 },
1301 /* These next two registers (0x4a, 0x4b) are undocumented.
1302 * They control the color balance */
1303 { 0x4a, 0x80 },
1304 { 0x4b, 0x80 },
1305 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1306 { 0x4e, 0xc1 },
1307 { 0x4f, 0x04 },
1308/* Do 50-53 have any effect? */
1309/* Toggle 0x12[2] off and on here? */
1310};
1311
1312static const struct ov_i2c_regvals norm_6x30[] = {
1313 { 0x12, 0x80 }, /* Reset */
1314 { 0x00, 0x1f }, /* Gain */
1315 { 0x01, 0x99 }, /* Blue gain */
1316 { 0x02, 0x7c }, /* Red gain */
1317 { 0x03, 0xc0 }, /* Saturation */
1318 { 0x05, 0x0a }, /* Contrast */
1319 { 0x06, 0x95 }, /* Brightness */
1320 { 0x07, 0x2d }, /* Sharpness */
1321 { 0x0c, 0x20 },
1322 { 0x0d, 0x20 },
02ab18b0 1323 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
4202f71c
JFM		 1324 { 0x0f, 0x05 },
1325 { 0x10, 0x9a },
1326 { 0x11, 0x00 }, /* Pixel clock = fastest */
1327 { 0x12, 0x24 }, /* Enable AGC and AWB */
1328 { 0x13, 0x21 },
1329 { 0x14, 0x80 },
1330 { 0x15, 0x01 },
1331 { 0x16, 0x03 },
1332 { 0x17, 0x38 },
1333 { 0x18, 0xea },
1334 { 0x19, 0x04 },
1335 { 0x1a, 0x93 },
1336 { 0x1b, 0x00 },
1337 { 0x1e, 0xc4 },
1338 { 0x1f, 0x04 },
1339 { 0x20, 0x20 },
1340 { 0x21, 0x10 },
1341 { 0x22, 0x88 },
1342 { 0x23, 0xc0 }, /* Crystal circuit power level */
1343 { 0x25, 0x9a }, /* Increase AEC black ratio */
1344 { 0x26, 0xb2 }, /* BLC enable */
1345 { 0x27, 0xa2 },
1346 { 0x28, 0x00 },
1347 { 0x29, 0x00 },
1348 { 0x2a, 0x84 }, /* 60 Hz power */
1349 { 0x2b, 0xa8 }, /* 60 Hz power */
1350 { 0x2c, 0xa0 },
1351 { 0x2d, 0x95 }, /* Enable auto-brightness */
1352 { 0x2e, 0x88 },
1353 { 0x33, 0x26 },
1354 { 0x34, 0x03 },
1355 { 0x36, 0x8f },
1356 { 0x37, 0x80 },
1357 { 0x38, 0x83 },
1358 { 0x39, 0x80 },
1359 { 0x3a, 0x0f },
1360 { 0x3b, 0x3c },
1361 { 0x3c, 0x1a },
1362 { 0x3d, 0x80 },
1363 { 0x3e, 0x80 },
1364 { 0x3f, 0x0e },
1365 { 0x40, 0x00 }, /* White bal */
1366 { 0x41, 0x00 }, /* White bal */
1367 { 0x42, 0x80 },
1368 { 0x43, 0x3f }, /* White bal */
1369 { 0x44, 0x80 },
1370 { 0x45, 0x20 },
1371 { 0x46, 0x20 },
1372 { 0x47, 0x80 },
1373 { 0x48, 0x7f },
1374 { 0x49, 0x00 },
1375 { 0x4a, 0x00 },
1376 { 0x4b, 0x80 },
1377 { 0x4c, 0xd0 },
1378 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1379 { 0x4e, 0x40 },
1380 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1381 { 0x50, 0xff },
1382 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1383 { 0x55, 0xff },
1384 { 0x56, 0x12 },
1385 { 0x57, 0x81 },
1386 { 0x58, 0x75 },
1387 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1388 { 0x5a, 0x2c },
1389 { 0x5b, 0x0f }, /* AWB chrominance levels */
1390 { 0x5c, 0x10 },
1391 { 0x3d, 0x80 },
1392 { 0x27, 0xa6 },
1393 { 0x12, 0x20 }, /* Toggle AWB */
1394 { 0x12, 0x24 },
1395};
1396
1397/* Lawrence Glaister <lg@jfm.bc.ca> reports:
1398 *
1399 * Register 0x0f in the 7610 has the following effects:
1400 *
1401 * 0x85 (AEC method 1): Best overall, good contrast range
1402 * 0x45 (AEC method 2): Very overexposed
1403 * 0xa5 (spec sheet default): Ok, but the black level is
1404 * shifted resulting in loss of contrast
1405 * 0x05 (old driver setting): very overexposed, too much
1406 * contrast
1407 */
1408static const struct ov_i2c_regvals norm_7610[] = {
1409 { 0x10, 0xff },
1410 { 0x16, 0x06 },
1411 { 0x28, 0x24 },
1412 { 0x2b, 0xac },
1413 { 0x12, 0x00 },
1414 { 0x38, 0x81 },
1415 { 0x28, 0x24 }, /* 0c */
1416 { 0x0f, 0x85 }, /* lg's setting */
1417 { 0x15, 0x01 },
1418 { 0x20, 0x1c },
1419 { 0x23, 0x2a },
1420 { 0x24, 0x10 },
1421 { 0x25, 0x8a },
1422 { 0x26, 0xa2 },
1423 { 0x27, 0xc2 },
1424 { 0x2a, 0x04 },
1425 { 0x2c, 0xfe },
1426 { 0x2d, 0x93 },
1427 { 0x30, 0x71 },
1428 { 0x31, 0x60 },
1429 { 0x32, 0x26 },
1430 { 0x33, 0x20 },
1431 { 0x34, 0x48 },
1432 { 0x12, 0x24 },
1433 { 0x11, 0x01 },
1434 { 0x0c, 0x24 },
1435 { 0x0d, 0x24 },
1436};
1437
1438static const struct ov_i2c_regvals norm_7620[] = {
1439 { 0x00, 0x00 }, /* gain */
1440 { 0x01, 0x80 }, /* blue gain */
1441 { 0x02, 0x80 }, /* red gain */
1442 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1443 { 0x06, 0x60 },
1444 { 0x07, 0x00 },
1445 { 0x0c, 0x24 },
1446 { 0x0c, 0x24 },
1447 { 0x0d, 0x24 },
1448 { 0x11, 0x01 },
1449 { 0x12, 0x24 },
1450 { 0x13, 0x01 },
1451 { 0x14, 0x84 },
1452 { 0x15, 0x01 },
1453 { 0x16, 0x03 },
1454 { 0x17, 0x2f },
1455 { 0x18, 0xcf },
1456 { 0x19, 0x06 },
1457 { 0x1a, 0xf5 },
1458 { 0x1b, 0x00 },
1459 { 0x20, 0x18 },
1460 { 0x21, 0x80 },
1461 { 0x22, 0x80 },
1462 { 0x23, 0x00 },
1463 { 0x26, 0xa2 },
1464 { 0x27, 0xea },
b282d873 1465 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
4202f71c
JFM		 1466 { 0x29, 0x00 },
1467 { 0x2a, 0x10 },
1468 { 0x2b, 0x00 },
1469 { 0x2c, 0x88 },
1470 { 0x2d, 0x91 },
1471 { 0x2e, 0x80 },
1472 { 0x2f, 0x44 },
1473 { 0x60, 0x27 },
1474 { 0x61, 0x02 },
1475 { 0x62, 0x5f },
1476 { 0x63, 0xd5 },
1477 { 0x64, 0x57 },
1478 { 0x65, 0x83 },
1479 { 0x66, 0x55 },
1480 { 0x67, 0x92 },
1481 { 0x68, 0xcf },
1482 { 0x69, 0x76 },
1483 { 0x6a, 0x22 },
1484 { 0x6b, 0x00 },
1485 { 0x6c, 0x02 },
1486 { 0x6d, 0x44 },
1487 { 0x6e, 0x80 },
1488 { 0x6f, 0x1d },
1489 { 0x70, 0x8b },
1490 { 0x71, 0x00 },
1491 { 0x72, 0x14 },
1492 { 0x73, 0x54 },
1493 { 0x74, 0x00 },
1494 { 0x75, 0x8e },
1495 { 0x76, 0x00 },
1496 { 0x77, 0xff },
1497 { 0x78, 0x80 },
1498 { 0x79, 0x80 },
1499 { 0x7a, 0x80 },
1500 { 0x7b, 0xe2 },
1501 { 0x7c, 0x00 },
1502};
1503
1504/* 7640 and 7648. The defaults should be OK for most registers. */
1505static const struct ov_i2c_regvals norm_7640[] = {
1506 { 0x12, 0x80 },
1507 { 0x12, 0x14 },
1508};
1509
1510/* 7670. Defaults taken from OmniVision provided data,
1511* as provided by Jonathan Corbet of OLPC */
1512static const struct ov_i2c_regvals norm_7670[] = {
1513 { OV7670_REG_COM7, OV7670_COM7_RESET },
1514 { OV7670_REG_TSLB, 0x04 }, /* OV */
1515 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1516 { OV7670_REG_CLKRC, 0x01 },
1517/*
1518 * Set the hardware window. These values from OV don't entirely
1519 * make sense - hstop is less than hstart. But they work...
1520 */
1521 { OV7670_REG_HSTART, 0x13 },
1522 { OV7670_REG_HSTOP, 0x01 },
1523 { OV7670_REG_HREF, 0xb6 },
1524 { OV7670_REG_VSTART, 0x02 },
1525 { OV7670_REG_VSTOP, 0x7a },
1526 { OV7670_REG_VREF, 0x0a },
1527
ac40b1fa
JFM		 1528 { OV7670_REG_COM3, 0x00 },
1529 { OV7670_REG_COM14, 0x00 },
4202f71c
JFM		 1530/* Mystery scaling numbers */
1531 { 0x70, 0x3a },
1532 { 0x71, 0x35 },
1533 { 0x72, 0x11 },
1534 { 0x73, 0xf0 },
1535 { 0xa2, 0x02 },
1536/* { OV7670_REG_COM10, 0x0 }, */
1537
1538/* Gamma curve values */
1539 { 0x7a, 0x20 },
1540 { 0x7b, 0x10 },
1541 { 0x7c, 0x1e },
1542 { 0x7d, 0x35 },
1543 { 0x7e, 0x5a },
1544 { 0x7f, 0x69 },
1545 { 0x80, 0x76 },
1546 { 0x81, 0x80 },
1547 { 0x82, 0x88 },
1548 { 0x83, 0x8f },
1549 { 0x84, 0x96 },
1550 { 0x85, 0xa3 },
1551 { 0x86, 0xaf },
1552 { 0x87, 0xc4 },
1553 { 0x88, 0xd7 },
1554 { 0x89, 0xe8 },
1555
1556/* AGC and AEC parameters. Note we start by disabling those features,
1557 then turn them only after tweaking the values. */
1558 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1559 | OV7670_COM8_AECSTEP
1560 | OV7670_COM8_BFILT },
ac40b1fa
JFM		 1561 { OV7670_REG_GAIN, 0x00 },
1562 { OV7670_REG_AECH, 0x00 },
4202f71c
JFM		 1563 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1564 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1565 { OV7670_REG_BD50MAX, 0x05 },
1566 { OV7670_REG_BD60MAX, 0x07 },
1567 { OV7670_REG_AEW, 0x95 },
1568 { OV7670_REG_AEB, 0x33 },
1569 { OV7670_REG_VPT, 0xe3 },
1570 { OV7670_REG_HAECC1, 0x78 },
1571 { OV7670_REG_HAECC2, 0x68 },
1572 { 0xa1, 0x03 }, /* magic */
1573 { OV7670_REG_HAECC3, 0xd8 },
1574 { OV7670_REG_HAECC4, 0xd8 },
1575 { OV7670_REG_HAECC5, 0xf0 },
1576 { OV7670_REG_HAECC6, 0x90 },
1577 { OV7670_REG_HAECC7, 0x94 },
1578 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1579 | OV7670_COM8_AECSTEP
1580 | OV7670_COM8_BFILT
1581 | OV7670_COM8_AGC
1582 | OV7670_COM8_AEC },
1583
1584/* Almost all of these are magic "reserved" values. */
1585 { OV7670_REG_COM5, 0x61 },
1586 { OV7670_REG_COM6, 0x4b },
1587 { 0x16, 0x02 },
1588 { OV7670_REG_MVFP, 0x07 },
1589 { 0x21, 0x02 },
1590 { 0x22, 0x91 },
1591 { 0x29, 0x07 },
1592 { 0x33, 0x0b },
1593 { 0x35, 0x0b },
1594 { 0x37, 0x1d },
1595 { 0x38, 0x71 },
1596 { 0x39, 0x2a },
1597 { OV7670_REG_COM12, 0x78 },
1598 { 0x4d, 0x40 },
1599 { 0x4e, 0x20 },
ac40b1fa 1600 { OV7670_REG_GFIX, 0x00 },
4202f71c
JFM		 1601 { 0x6b, 0x4a },
1602 { 0x74, 0x10 },
1603 { 0x8d, 0x4f },
ac40b1fa
JFM		 1604 { 0x8e, 0x00 },
1605 { 0x8f, 0x00 },
1606 { 0x90, 0x00 },
1607 { 0x91, 0x00 },
1608 { 0x96, 0x00 },
1609 { 0x9a, 0x00 },
4202f71c
JFM		 1610 { 0xb0, 0x84 },
1611 { 0xb1, 0x0c },
1612 { 0xb2, 0x0e },
1613 { 0xb3, 0x82 },
1614 { 0xb8, 0x0a },
1615
1616/* More reserved magic, some of which tweaks white balance */
1617 { 0x43, 0x0a },
1618 { 0x44, 0xf0 },
1619 { 0x45, 0x34 },
1620 { 0x46, 0x58 },
1621 { 0x47, 0x28 },
1622 { 0x48, 0x3a },
1623 { 0x59, 0x88 },
1624 { 0x5a, 0x88 },
1625 { 0x5b, 0x44 },
1626 { 0x5c, 0x67 },
1627 { 0x5d, 0x49 },
1628 { 0x5e, 0x0e },
1629 { 0x6c, 0x0a },
1630 { 0x6d, 0x55 },
1631 { 0x6e, 0x11 },
1632 { 0x6f, 0x9f },
1633 /* "9e for advance AWB" */
1634 { 0x6a, 0x40 },
1635 { OV7670_REG_BLUE, 0x40 },
1636 { OV7670_REG_RED, 0x60 },
1637 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1638 | OV7670_COM8_AECSTEP
1639 | OV7670_COM8_BFILT
1640 | OV7670_COM8_AGC
1641 | OV7670_COM8_AEC
1642 | OV7670_COM8_AWB },
1643
1644/* Matrix coefficients */
1645 { 0x4f, 0x80 },
1646 { 0x50, 0x80 },
ac40b1fa 1647 { 0x51, 0x00 },
4202f71c
JFM		 1648 { 0x52, 0x22 },
1649 { 0x53, 0x5e },
1650 { 0x54, 0x80 },
1651 { 0x58, 0x9e },
1652
1653 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
ac40b1fa 1654 { OV7670_REG_EDGE, 0x00 },
4202f71c
JFM		 1655 { 0x75, 0x05 },
1656 { 0x76, 0xe1 },
ac40b1fa 1657 { 0x4c, 0x00 },
4202f71c
JFM		 1658 { 0x77, 0x01 },
1659 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1660 | OV7670_COM13_UVSAT
1661 | 2}, /* was 3 */
1662 { 0x4b, 0x09 },
1663 { 0xc9, 0x60 },
1664 { OV7670_REG_COM16, 0x38 },
1665 { 0x56, 0x40 },
1666
1667 { 0x34, 0x11 },
1668 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1669 { 0xa4, 0x88 },
ac40b1fa 1670 { 0x96, 0x00 },
4202f71c
JFM		 1671 { 0x97, 0x30 },
1672 { 0x98, 0x20 },
1673 { 0x99, 0x30 },
1674 { 0x9a, 0x84 },
1675 { 0x9b, 0x29 },
1676 { 0x9c, 0x03 },
1677 { 0x9d, 0x4c },
1678 { 0x9e, 0x3f },
1679 { 0x78, 0x04 },
1680
1681/* Extra-weird stuff. Some sort of multiplexor register */
1682 { 0x79, 0x01 },
1683 { 0xc8, 0xf0 },
1684 { 0x79, 0x0f },
1685 { 0xc8, 0x00 },
1686 { 0x79, 0x10 },
1687 { 0xc8, 0x7e },
1688 { 0x79, 0x0a },
1689 { 0xc8, 0x80 },
1690 { 0x79, 0x0b },
1691 { 0xc8, 0x01 },
1692 { 0x79, 0x0c },
1693 { 0xc8, 0x0f },
1694 { 0x79, 0x0d },
1695 { 0xc8, 0x20 },
1696 { 0x79, 0x09 },
1697 { 0xc8, 0x80 },
1698 { 0x79, 0x02 },
1699 { 0xc8, 0xc0 },
1700 { 0x79, 0x03 },
1701 { 0xc8, 0x40 },
1702 { 0x79, 0x05 },
1703 { 0xc8, 0x30 },
1704 { 0x79, 0x26 },
1705};
1706
1707static const struct ov_i2c_regvals norm_8610[] = {
1708 { 0x12, 0x80 },
1709 { 0x00, 0x00 },
1710 { 0x01, 0x80 },
1711 { 0x02, 0x80 },
1712 { 0x03, 0xc0 },
1713 { 0x04, 0x30 },
1714 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1715 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1716 { 0x0a, 0x86 },
1717 { 0x0b, 0xb0 },
1718 { 0x0c, 0x20 },
1719 { 0x0d, 0x20 },
1720 { 0x11, 0x01 },
1721 { 0x12, 0x25 },
1722 { 0x13, 0x01 },
1723 { 0x14, 0x04 },
1724 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1725 { 0x16, 0x03 },
1726 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1727 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1728 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1729 { 0x1a, 0xf5 },
1730 { 0x1b, 0x00 },
1731 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1732 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1733 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1734 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1735 { 0x26, 0xa2 },
1736 { 0x27, 0xea },
1737 { 0x28, 0x00 },
1738 { 0x29, 0x00 },
1739 { 0x2a, 0x80 },
1740 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1741 { 0x2c, 0xac },
1742 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1743 { 0x2e, 0x80 },
1744 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1745 { 0x4c, 0x00 },
1746 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1747 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1748 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1749 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1750 { 0x63, 0xff },
1751 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1752 * maybe thats wrong */
1753 { 0x65, 0x00 },
1754 { 0x66, 0x55 },
1755 { 0x67, 0xb0 },
1756 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1757 { 0x69, 0x02 },
1758 { 0x6a, 0x22 },
1759 { 0x6b, 0x00 },
1760 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1761 * deleting bit7 colors the first images red */
1762 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1763 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1764 { 0x6f, 0x01 },
1765 { 0x70, 0x8b },
1766 { 0x71, 0x00 },
1767 { 0x72, 0x14 },
1768 { 0x73, 0x54 },
1769 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1770 { 0x75, 0x0e },
1771 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1772 { 0x77, 0xff },
1773 { 0x78, 0x80 },
1774 { 0x79, 0x80 },
1775 { 0x7a, 0x80 },
1776 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1777 { 0x7c, 0x00 },
1778 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1779 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1780 { 0x7f, 0xfb },
1781 { 0x80, 0x28 },
1782 { 0x81, 0x00 },
1783 { 0x82, 0x23 },
1784 { 0x83, 0x0b },
1785 { 0x84, 0x00 },
1786 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1787 { 0x86, 0xc9 },
1788 { 0x87, 0x00 },
1789 { 0x88, 0x00 },
1790 { 0x89, 0x01 },
1791 { 0x12, 0x20 },
1792 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1793};
1794
6a7eba24
JFM		 1795static unsigned char ov7670_abs_to_sm(unsigned char v)
1796{
1797 if (v > 127)
1798 return v & 0x7f;
1799 return (128 - v) | 0x80;
1800}
1801
1802/* Write a OV519 register */
1803static int reg_w(struct sd *sd, __u16 index, __u8 value)
1804{
1805 int ret;
49809d6a 1806 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
6a7eba24 1807
739570bb 1808 sd->gspca_dev.usb_buf[0] = value;
6a7eba24
JFM		 1809 ret = usb_control_msg(sd->gspca_dev.dev,
1810 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1811 req,
6a7eba24
JFM		 1812 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1813 0, index,
739570bb 1814 sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 1815 if (ret < 0)
1816 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
1817 return ret;
1818}
1819
1820/* Read from a OV519 register */
1821/* returns: negative is error, pos or zero is data */
1822static int reg_r(struct sd *sd, __u16 index)
1823{
1824 int ret;
49809d6a 1825 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
6a7eba24
JFM		 1826
1827 ret = usb_control_msg(sd->gspca_dev.dev,
1828 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1829 req,
6a7eba24 1830 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1831 0, index, sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 1832
1833 if (ret >= 0)
739570bb 1834 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1835 else
1836 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1837 return ret;
1838}
1839
1840/* Read 8 values from a OV519 register */
1841static int reg_r8(struct sd *sd,
a5ae2062 1842 __u16 index)
6a7eba24
JFM		 1843{
1844 int ret;
6a7eba24
JFM		 1845
1846 ret = usb_control_msg(sd->gspca_dev.dev,
1847 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1848 1, /* REQ_IO */
1849 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1850 0, index, sd->gspca_dev.usb_buf, 8, 500);
6a7eba24
JFM		 1851
1852 if (ret >= 0)
739570bb 1853 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1854 else
1855 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1856 return ret;
1857}
1858
1859/*
1860 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1861 * the same position as 1's in "mask" are cleared and set to "value". Bits
1862 * that are in the same position as 0's in "mask" are preserved, regardless
1863 * of their respective state in "value".
1864 */
1865static int reg_w_mask(struct sd *sd,
1866 __u16 index,
1867 __u8 value,
1868 __u8 mask)
1869{
1870 int ret;
1871 __u8 oldval;
1872
1873 if (mask != 0xff) {
1874 value &= mask; /* Enforce mask on value */
1875 ret = reg_r(sd, index);
1876 if (ret < 0)
1877 return ret;
1878
1879 oldval = ret & ~mask; /* Clear the masked bits */
1880 value |= oldval; /* Set the desired bits */
1881 }
1882 return reg_w(sd, index, value);
1883}
1884
49809d6a
HG		 1885/*
1886 * Writes multiple (n) byte value to a single register. Only valid with certain
1887 * registers (0x30 and 0xc4 - 0xce).
1888 */
1889static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1890{
1891 int ret;
1892
1893 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1894
1895 ret = usb_control_msg(sd->gspca_dev.dev,
1896 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1897 1 /* REG_IO */,
1898 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1899 0, index,
1900 sd->gspca_dev.usb_buf, n, 500);
1901 if (ret < 0)
1902 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1903 return ret;
1904}
1905
1876bb92
HG		 1906static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
1907{
1908 int rc, retries;
1909
1910 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1911
1912 /* Three byte write cycle */
1913 for (retries = 6; ; ) {
1914 /* Select camera register */
1915 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1916 if (rc < 0)
1917 return rc;
1918
1919 /* Write "value" to I2C data port of OV511 */
1920 rc = reg_w(sd, R51x_I2C_DATA, value);
1921 if (rc < 0)
1922 return rc;
1923
1924 /* Initiate 3-byte write cycle */
1925 rc = reg_w(sd, R511_I2C_CTL, 0x01);
1926 if (rc < 0)
1927 return rc;
1928
1929 do
1930 rc = reg_r(sd, R511_I2C_CTL);
1931 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1932
1933 if (rc < 0)
1934 return rc;
1935
1936 if ((rc & 2) == 0) /* Ack? */
1937 break;
1938 if (--retries < 0) {
1939 PDEBUG(D_USBO, "i2c write retries exhausted");
1940 return -1;
1941 }
1942 }
1943
1944 return 0;
1945}
1946
1947static int ov511_i2c_r(struct sd *sd, __u8 reg)
1948{
1949 int rc, value, retries;
1950
1951 /* Two byte write cycle */
1952 for (retries = 6; ; ) {
1953 /* Select camera register */
1954 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1955 if (rc < 0)
1956 return rc;
1957
1958 /* Initiate 2-byte write cycle */
1959 rc = reg_w(sd, R511_I2C_CTL, 0x03);
1960 if (rc < 0)
1961 return rc;
1962
1963 do
1964 rc = reg_r(sd, R511_I2C_CTL);
1965 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1966
1967 if (rc < 0)
1968 return rc;
1969
1970 if ((rc & 2) == 0) /* Ack? */
1971 break;
1972
1973 /* I2C abort */
1974 reg_w(sd, R511_I2C_CTL, 0x10);
1975
1976 if (--retries < 0) {
1977 PDEBUG(D_USBI, "i2c write retries exhausted");
1978 return -1;
1979 }
1980 }
1981
1982 /* Two byte read cycle */
1983 for (retries = 6; ; ) {
1984 /* Initiate 2-byte read cycle */
1985 rc = reg_w(sd, R511_I2C_CTL, 0x05);
1986 if (rc < 0)
1987 return rc;
1988
1989 do
1990 rc = reg_r(sd, R511_I2C_CTL);
1991 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1992
1993 if (rc < 0)
1994 return rc;
1995
1996 if ((rc & 2) == 0) /* Ack? */
1997 break;
1998
1999 /* I2C abort */
2000 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2001 if (rc < 0)
2002 return rc;
2003
2004 if (--retries < 0) {
2005 PDEBUG(D_USBI, "i2c read retries exhausted");
2006 return -1;
2007 }
2008 }
2009
2010 value = reg_r(sd, R51x_I2C_DATA);
2011
2012 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2013
2014 /* This is needed to make i2c_w() work */
2015 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2016 if (rc < 0)
2017 return rc;
2018
2019 return value;
2020}
49809d6a 2021
6a7eba24
JFM		 2022/*
2023 * The OV518 I2C I/O procedure is different, hence, this function.
2024 * This is normally only called from i2c_w(). Note that this function
2025 * always succeeds regardless of whether the sensor is present and working.
2026 */
1876bb92 2027static int ov518_i2c_w(struct sd *sd,
6a7eba24
JFM		 2028 __u8 reg,
2029 __u8 value)
2030{
2031 int rc;
2032
2033 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2034
2035 /* Select camera register */
2036 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2037 if (rc < 0)
2038 return rc;
2039
2040 /* Write "value" to I2C data port of OV511 */
2041 rc = reg_w(sd, R51x_I2C_DATA, value);
2042 if (rc < 0)
2043 return rc;
2044
2045 /* Initiate 3-byte write cycle */
2046 rc = reg_w(sd, R518_I2C_CTL, 0x01);
ac40b1fa
JFM		 2047 if (rc < 0)
2048 return rc;
6a7eba24
JFM		 2049
2050 /* wait for write complete */
2051 msleep(4);
6a7eba24
JFM		 2052 return reg_r8(sd, R518_I2C_CTL);
2053}
2054
2055/*
2056 * returns: negative is error, pos or zero is data
2057 *
2058 * The OV518 I2C I/O procedure is different, hence, this function.
2059 * This is normally only called from i2c_r(). Note that this function
2060 * always succeeds regardless of whether the sensor is present and working.
2061 */
1876bb92 2062static int ov518_i2c_r(struct sd *sd, __u8 reg)
6a7eba24
JFM		 2063{
2064 int rc, value;
2065
2066 /* Select camera register */
2067 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2068 if (rc < 0)
2069 return rc;
2070
2071 /* Initiate 2-byte write cycle */
2072 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2073 if (rc < 0)
2074 return rc;
2075
2076 /* Initiate 2-byte read cycle */
2077 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2078 if (rc < 0)
2079 return rc;
2080 value = reg_r(sd, R51x_I2C_DATA);
2081 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2082 return value;
2083}
2084
1876bb92
HG		 2085static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2086{
2087 switch (sd->bridge) {
2088 case BRIDGE_OV511:
2089 case BRIDGE_OV511PLUS:
2090 return ov511_i2c_w(sd, reg, value);
2091 case BRIDGE_OV518:
2092 case BRIDGE_OV518PLUS:
2093 case BRIDGE_OV519:
2094 return ov518_i2c_w(sd, reg, value);
2095 }
2096 return -1; /* Should never happen */
2097}
2098
2099static int i2c_r(struct sd *sd, __u8 reg)
2100{
2101 switch (sd->bridge) {
2102 case BRIDGE_OV511:
2103 case BRIDGE_OV511PLUS:
2104 return ov511_i2c_r(sd, reg);
2105 case BRIDGE_OV518:
2106 case BRIDGE_OV518PLUS:
2107 case BRIDGE_OV519:
2108 return ov518_i2c_r(sd, reg);
2109 }
2110 return -1; /* Should never happen */
2111}
2112
6a7eba24
JFM		 2113/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2114 * the same position as 1's in "mask" are cleared and set to "value". Bits
2115 * that are in the same position as 0's in "mask" are preserved, regardless
2116 * of their respective state in "value".
2117 */
2118static int i2c_w_mask(struct sd *sd,
2119 __u8 reg,
2120 __u8 value,
2121 __u8 mask)
2122{
2123 int rc;
2124 __u8 oldval;
2125
2126 value &= mask; /* Enforce mask on value */
2127 rc = i2c_r(sd, reg);
2128 if (rc < 0)
2129 return rc;
2130 oldval = rc & ~mask; /* Clear the masked bits */
2131 value |= oldval; /* Set the desired bits */
2132 return i2c_w(sd, reg, value);
2133}
2134
2135/* Temporarily stops OV511 from functioning. Must do this before changing
2136 * registers while the camera is streaming */
2137static inline int ov51x_stop(struct sd *sd)
2138{
2139 PDEBUG(D_STREAM, "stopping");
2140 sd->stopped = 1;
49809d6a
HG		 2141 switch (sd->bridge) {
2142 case BRIDGE_OV511:
2143 case BRIDGE_OV511PLUS:
2144 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2145 case BRIDGE_OV518:
2146 case BRIDGE_OV518PLUS:
2147 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2148 case BRIDGE_OV519:
2149 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2150 }
2151
2152 return 0;
6a7eba24
JFM		 2153}
2154
2155/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2156 * actually stopped (for performance). */
2157static inline int ov51x_restart(struct sd *sd)
2158{
49809d6a
HG		 2159 int rc;
2160
6a7eba24
JFM		 2161 PDEBUG(D_STREAM, "restarting");
2162 if (!sd->stopped)
2163 return 0;
2164 sd->stopped = 0;
2165
2166 /* Reinitialize the stream */
49809d6a
HG		 2167 switch (sd->bridge) {
2168 case BRIDGE_OV511:
2169 case BRIDGE_OV511PLUS:
2170 return reg_w(sd, R51x_SYS_RESET, 0x00);
2171 case BRIDGE_OV518:
2172 case BRIDGE_OV518PLUS:
2173 rc = reg_w(sd, 0x2f, 0x80);
2174 if (rc < 0)
2175 return rc;
2176 return reg_w(sd, R51x_SYS_RESET, 0x00);
2177 case BRIDGE_OV519:
2178 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2179 }
2180
2181 return 0;
6a7eba24
JFM		 2182}
2183
229bb7dc
HG		 2184static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2185
6a7eba24
JFM		 2186/* This does an initial reset of an OmniVision sensor and ensures that I2C
2187 * is synchronized. Returns <0 on failure.
2188 */
229bb7dc 2189static int init_ov_sensor(struct sd *sd, __u8 slave)
6a7eba24 2190{
ac40b1fa 2191 int i;
6a7eba24 2192
229bb7dc
HG		 2193 if (ov51x_set_slave_ids(sd, slave) < 0)
2194 return -EIO;
2195
6a7eba24
JFM		 2196 /* Reset the sensor */
2197 if (i2c_w(sd, 0x12, 0x80) < 0)
2198 return -EIO;
2199
2200 /* Wait for it to initialize */
2201 msleep(150);
2202
ac40b1fa 2203 for (i = 0; i < i2c_detect_tries; i++) {
6a7eba24
JFM		 2204 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2205 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
ac40b1fa
JFM		 2206 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2207 return 0;
6a7eba24
JFM		 2208 }
2209
2210 /* Reset the sensor */
2211 if (i2c_w(sd, 0x12, 0x80) < 0)
2212 return -EIO;
2213 /* Wait for it to initialize */
2214 msleep(150);
2215 /* Dummy read to sync I2C */
2216 if (i2c_r(sd, 0x00) < 0)
2217 return -EIO;
2218 }
ac40b1fa 2219 return -EIO;
6a7eba24
JFM		 2220}
2221
6a7eba24
JFM		 2222/* Set the read and write slave IDs. The "slave" argument is the write slave,
2223 * and the read slave will be set to (slave + 1).
2224 * This should not be called from outside the i2c I/O functions.
2225 * Sets I2C read and write slave IDs. Returns <0 for error
2226 */
2227static int ov51x_set_slave_ids(struct sd *sd,
2228 __u8 slave)
2229{
2230 int rc;
2231
2232 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2233 if (rc < 0)
2234 return rc;
2235 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2236}
2237
6a7eba24 2238static int write_regvals(struct sd *sd,
a5ae2062 2239 const struct ov_regvals *regvals,
6a7eba24
JFM		 2240 int n)
2241{
2242 int rc;
2243
2244 while (--n >= 0) {
2245 rc = reg_w(sd, regvals->reg, regvals->val);
2246 if (rc < 0)
2247 return rc;
2248 regvals++;
2249 }
2250 return 0;
2251}
2252
2253static int write_i2c_regvals(struct sd *sd,
a5ae2062 2254 const struct ov_i2c_regvals *regvals,
6a7eba24
JFM		 2255 int n)
2256{
2257 int rc;
2258
2259 while (--n >= 0) {
2260 rc = i2c_w(sd, regvals->reg, regvals->val);
2261 if (rc < 0)
2262 return rc;
2263 regvals++;
2264 }
2265 return 0;
2266}
2267
2268/****************************************************************************
2269 *
2270 * OV511 and sensor configuration
2271 *
2272 ***************************************************************************/
2273
635118d5
HG		 2274/* This initializes the OV2x10 / OV3610 / OV3620 */
2275static int ov_hires_configure(struct sd *sd)
2276{
2277 int high, low;
2278
2279 if (sd->bridge != BRIDGE_OVFX2) {
2280 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2281 return -1;
2282 }
2283
2284 PDEBUG(D_PROBE, "starting ov hires configuration");
2285
2286 /* Detect sensor (sub)type */
2287 high = i2c_r(sd, 0x0a);
2288 low = i2c_r(sd, 0x0b);
2289 /* info("%x, %x", high, low); */
2290 if (high == 0x96 && low == 0x40) {
2291 PDEBUG(D_PROBE, "Sensor is an OV2610");
2292 sd->sensor = SEN_OV2610;
2293 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2294 PDEBUG(D_PROBE, "Sensor is an OV3610");
2295 sd->sensor = SEN_OV3610;
2296 } else {
2297 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2298 high, low);
2299 return -1;
2300 }
2301
2302 /* Set sensor-specific vars */
2303 return 0;
2304}
2305
2306
6a7eba24
JFM		 2307/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2308 * the same register settings as the OV8610, since they are very similar.
2309 */
2310static int ov8xx0_configure(struct sd *sd)
2311{
2312 int rc;
6a7eba24
JFM		 2313
2314 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2315
6a7eba24
JFM		 2316 /* Detect sensor (sub)type */
2317 rc = i2c_r(sd, OV7610_REG_COM_I);
2318 if (rc < 0) {
2319 PDEBUG(D_ERR, "Error detecting sensor type");
2320 return -1;
2321 }
2322 if ((rc & 3) == 1) {
6a7eba24
JFM		 2323 sd->sensor = SEN_OV8610;
2324 } else {
2325 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2326 return -1;
2327 }
6a7eba24
JFM		 2328
2329 /* Set sensor-specific vars */
6a7eba24
JFM		 2330 return 0;
2331}
2332
2333/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2334 * the same register settings as the OV7610, since they are very similar.
2335 */
2336static int ov7xx0_configure(struct sd *sd)
2337{
2338 int rc, high, low;
2339
6a7eba24
JFM		 2340
2341 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2342
6a7eba24
JFM		 2343 /* Detect sensor (sub)type */
2344 rc = i2c_r(sd, OV7610_REG_COM_I);
2345
2346 /* add OV7670 here
2347 * it appears to be wrongly detected as a 7610 by default */
2348 if (rc < 0) {
2349 PDEBUG(D_ERR, "Error detecting sensor type");
2350 return -1;
2351 }
2352 if ((rc & 3) == 3) {
2353 /* quick hack to make OV7670s work */
2354 high = i2c_r(sd, 0x0a);
2355 low = i2c_r(sd, 0x0b);
2356 /* info("%x, %x", high, low); */
2357 if (high == 0x76 && low == 0x73) {
2358 PDEBUG(D_PROBE, "Sensor is an OV7670");
2359 sd->sensor = SEN_OV7670;
2360 } else {
2361 PDEBUG(D_PROBE, "Sensor is an OV7610");
2362 sd->sensor = SEN_OV7610;
2363 }
2364 } else if ((rc & 3) == 1) {
2365 /* I don't know what's different about the 76BE yet. */
b282d873 2366 if (i2c_r(sd, 0x15) & 1) {
6a7eba24 2367 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
b282d873
HG		 2368 sd->sensor = SEN_OV7620;
2369 } else {
6a7eba24 2370 PDEBUG(D_PROBE, "Sensor is an OV76BE");
b282d873
HG		 2371 sd->sensor = SEN_OV76BE;
2372 }
6a7eba24
JFM		 2373 } else if ((rc & 3) == 0) {
2374 /* try to read product id registers */
2375 high = i2c_r(sd, 0x0a);
2376 if (high < 0) {
2377 PDEBUG(D_ERR, "Error detecting camera chip PID");
2378 return high;
2379 }
2380 low = i2c_r(sd, 0x0b);
2381 if (low < 0) {
2382 PDEBUG(D_ERR, "Error detecting camera chip VER");
2383 return low;
2384 }
2385 if (high == 0x76) {
594f5b8b
JFM		 2386 switch (low) {
2387 case 0x30:
6a7eba24 2388 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
4202f71c
JFM		 2389 PDEBUG(D_ERR,
2390 "7630 is not supported by this driver");
2391 return -1;
594f5b8b 2392 case 0x40:
6a7eba24
JFM		 2393 PDEBUG(D_PROBE, "Sensor is an OV7645");
2394 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2395 break;
2396 case 0x45:
6a7eba24
JFM		 2397 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2398 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2399 break;
2400 case 0x48:
6a7eba24
JFM		 2401 PDEBUG(D_PROBE, "Sensor is an OV7648");
2402 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2403 break;
2404 default:
2405 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
6a7eba24
JFM		 2406 return -1;
2407 }
2408 } else {
2409 PDEBUG(D_PROBE, "Sensor is an OV7620");
2410 sd->sensor = SEN_OV7620;
2411 }
2412 } else {
2413 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2414 return -1;
2415 }
2416
6a7eba24 2417 /* Set sensor-specific vars */
6a7eba24
JFM		 2418 return 0;
2419}
2420
2421/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2422static int ov6xx0_configure(struct sd *sd)
2423{
2424 int rc;
4202f71c 2425 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
6a7eba24
JFM		 2426
2427 /* Detect sensor (sub)type */
2428 rc = i2c_r(sd, OV7610_REG_COM_I);
2429 if (rc < 0) {
2430 PDEBUG(D_ERR, "Error detecting sensor type");
2431 return -1;
2432 }
2433
2434 /* Ugh. The first two bits are the version bits, but
2435 * the entire register value must be used. I guess OVT
2436 * underestimated how many variants they would make. */
594f5b8b
JFM		 2437 switch (rc) {
2438 case 0x00:
6a7eba24
JFM		 2439 sd->sensor = SEN_OV6630;
2440 PDEBUG(D_ERR,
2441 "WARNING: Sensor is an OV66308. Your camera may have");
2442 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 2443 break;
2444 case 0x01:
6a7eba24 2445 sd->sensor = SEN_OV6620;
7d971373 2446 PDEBUG(D_PROBE, "Sensor is an OV6620");
594f5b8b
JFM		 2447 break;
2448 case 0x02:
6a7eba24
JFM		 2449 sd->sensor = SEN_OV6630;
2450 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
594f5b8b
JFM		 2451 break;
2452 case 0x03:
7d971373 2453 sd->sensor = SEN_OV66308AF;
6a7eba24 2454 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
594f5b8b
JFM		 2455 break;
2456 case 0x90:
6a7eba24
JFM		 2457 sd->sensor = SEN_OV6630;
2458 PDEBUG(D_ERR,
2459 "WARNING: Sensor is an OV66307. Your camera may have");
2460 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 2461 break;
2462 default:
6a7eba24
JFM		 2463 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2464 return -1;
2465 }
2466
2467 /* Set sensor-specific vars */
594f5b8b 2468 sd->sif = 1;
6a7eba24 2469
6a7eba24
JFM		 2470 return 0;
2471}
2472
2473/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2474static void ov51x_led_control(struct sd *sd, int on)
2475{
9e4d8258
HG		 2476 if (sd->invert_led)
2477 on = !on;
2478
49809d6a
HG		 2479 switch (sd->bridge) {
2480 /* OV511 has no LED control */
2481 case BRIDGE_OV511PLUS:
2482 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2483 break;
2484 case BRIDGE_OV518:
2485 case BRIDGE_OV518PLUS:
2486 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2487 break;
2488 case BRIDGE_OV519:
2489 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2490 break;
2491 }
6a7eba24
JFM		 2492}
2493
1876bb92 2494static int ov51x_upload_quan_tables(struct sd *sd)
49809d6a 2495{
1876bb92
HG		 2496 const unsigned char yQuanTable511[] = {
2497 0, 1, 1, 2, 2, 3, 3, 4,
2498 1, 1, 1, 2, 2, 3, 4, 4,
2499 1, 1, 2, 2, 3, 4, 4, 4,
2500 2, 2, 2, 3, 4, 4, 4, 4,
2501 2, 2, 3, 4, 4, 5, 5, 5,
2502 3, 3, 4, 4, 5, 5, 5, 5,
2503 3, 4, 4, 4, 5, 5, 5, 5,
2504 4, 4, 4, 4, 5, 5, 5, 5
2505 };
2506
2507 const unsigned char uvQuanTable511[] = {
2508 0, 2, 2, 3, 4, 4, 4, 4,
2509 2, 2, 2, 4, 4, 4, 4, 4,
2510 2, 2, 3, 4, 4, 4, 4, 4,
2511 3, 4, 4, 4, 4, 4, 4, 4,
2512 4, 4, 4, 4, 4, 4, 4, 4,
2513 4, 4, 4, 4, 4, 4, 4, 4,
2514 4, 4, 4, 4, 4, 4, 4, 4,
2515 4, 4, 4, 4, 4, 4, 4, 4
2516 };
2517
2518 /* OV518 quantization tables are 8x4 (instead of 8x8) */
49809d6a
HG		 2519 const unsigned char yQuanTable518[] = {
2520 5, 4, 5, 6, 6, 7, 7, 7,
2521 5, 5, 5, 5, 6, 7, 7, 7,
2522 6, 6, 6, 6, 7, 7, 7, 8,
2523 7, 7, 6, 7, 7, 7, 8, 8
2524 };
2525
2526 const unsigned char uvQuanTable518[] = {
2527 6, 6, 6, 7, 7, 7, 7, 7,
2528 6, 6, 6, 7, 7, 7, 7, 7,
2529 6, 6, 6, 7, 7, 7, 7, 8,
2530 7, 7, 7, 7, 7, 7, 8, 8
2531 };
2532
1876bb92 2533 const unsigned char *pYTable, *pUVTable;
49809d6a 2534 unsigned char val0, val1;
1876bb92 2535 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
49809d6a
HG		 2536
2537 PDEBUG(D_PROBE, "Uploading quantization tables");
2538
1876bb92
HG		 2539 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2540 pYTable = yQuanTable511;
2541 pUVTable = uvQuanTable511;
2542 size = 32;
2543 } else {
2544 pYTable = yQuanTable518;
2545 pUVTable = uvQuanTable518;
2546 size = 16;
2547 }
2548
2549 for (i = 0; i < size; i++) {
49809d6a
HG		 2550 val0 = *pYTable++;
2551 val1 = *pYTable++;
2552 val0 &= 0x0f;
2553 val1 &= 0x0f;
2554 val0 |= val1 << 4;
2555 rc = reg_w(sd, reg, val0);
2556 if (rc < 0)
2557 return rc;
2558
2559 val0 = *pUVTable++;
2560 val1 = *pUVTable++;
2561 val0 &= 0x0f;
2562 val1 &= 0x0f;
2563 val0 |= val1 << 4;
1876bb92 2564 rc = reg_w(sd, reg + size, val0);
49809d6a
HG		 2565 if (rc < 0)
2566 return rc;
2567
2568 reg++;
2569 }
2570
2571 return 0;
2572}
2573
1876bb92
HG		 2574/* This initializes the OV511/OV511+ and the sensor */
2575static int ov511_configure(struct gspca_dev *gspca_dev)
2576{
2577 struct sd *sd = (struct sd *) gspca_dev;
2578 int rc;
2579
2580 /* For 511 and 511+ */
2581 const struct ov_regvals init_511[] = {
2582 { R51x_SYS_RESET, 0x7f },
2583 { R51x_SYS_INIT, 0x01 },
2584 { R51x_SYS_RESET, 0x7f },
2585 { R51x_SYS_INIT, 0x01 },
2586 { R51x_SYS_RESET, 0x3f },
2587 { R51x_SYS_INIT, 0x01 },
2588 { R51x_SYS_RESET, 0x3d },
2589 };
2590
2591 const struct ov_regvals norm_511[] = {
2592 { R511_DRAM_FLOW_CTL, 0x01 },
2593 { R51x_SYS_SNAP, 0x00 },
2594 { R51x_SYS_SNAP, 0x02 },
2595 { R51x_SYS_SNAP, 0x00 },
2596 { R511_FIFO_OPTS, 0x1f },
2597 { R511_COMP_EN, 0x00 },
2598 { R511_COMP_LUT_EN, 0x03 },
2599 };
2600
2601 const struct ov_regvals norm_511_p[] = {
2602 { R511_DRAM_FLOW_CTL, 0xff },
2603 { R51x_SYS_SNAP, 0x00 },
2604 { R51x_SYS_SNAP, 0x02 },
2605 { R51x_SYS_SNAP, 0x00 },
2606 { R511_FIFO_OPTS, 0xff },
2607 { R511_COMP_EN, 0x00 },
2608 { R511_COMP_LUT_EN, 0x03 },
2609 };
2610
2611 const struct ov_regvals compress_511[] = {
2612 { 0x70, 0x1f },
2613 { 0x71, 0x05 },
2614 { 0x72, 0x06 },
2615 { 0x73, 0x06 },
2616 { 0x74, 0x14 },
2617 { 0x75, 0x03 },
2618 { 0x76, 0x04 },
2619 { 0x77, 0x04 },
2620 };
2621
2622 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2623
2624 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2625 if (rc < 0)
2626 return rc;
2627
2628 switch (sd->bridge) {
2629 case BRIDGE_OV511:
2630 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2631 if (rc < 0)
2632 return rc;
2633 break;
2634 case BRIDGE_OV511PLUS:
2635 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2636 if (rc < 0)
2637 return rc;
2638 break;
2639 }
2640
2641 /* Init compression */
2642 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2643 if (rc < 0)
2644 return rc;
2645
2646 rc = ov51x_upload_quan_tables(sd);
2647 if (rc < 0) {
2648 PDEBUG(D_ERR, "Error uploading quantization tables");
2649 return rc;
2650 }
2651
2652 return 0;
2653}
2654
49809d6a
HG		 2655/* This initializes the OV518/OV518+ and the sensor */
2656static int ov518_configure(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 2657{
2658 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 2659 int rc;
2660
2661 /* For 518 and 518+ */
e080fcd9 2662 const struct ov_regvals init_518[] = {
49809d6a
HG		 2663 { R51x_SYS_RESET, 0x40 },
2664 { R51x_SYS_INIT, 0xe1 },
2665 { R51x_SYS_RESET, 0x3e },
2666 { R51x_SYS_INIT, 0xe1 },
2667 { R51x_SYS_RESET, 0x00 },
2668 { R51x_SYS_INIT, 0xe1 },
2669 { 0x46, 0x00 },
2670 { 0x5d, 0x03 },
2671 };
2672
e080fcd9 2673 const struct ov_regvals norm_518[] = {
49809d6a
HG		 2674 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2675 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2676 { 0x31, 0x0f },
2677 { 0x5d, 0x03 },
2678 { 0x24, 0x9f },
2679 { 0x25, 0x90 },
2680 { 0x20, 0x00 },
2681 { 0x51, 0x04 },
2682 { 0x71, 0x19 },
2683 { 0x2f, 0x80 },
2684 };
2685
e080fcd9 2686 const struct ov_regvals norm_518_p[] = {
49809d6a
HG		 2687 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2688 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2689 { 0x31, 0x0f },
2690 { 0x5d, 0x03 },
2691 { 0x24, 0x9f },
2692 { 0x25, 0x90 },
2693 { 0x20, 0x60 },
2694 { 0x51, 0x02 },
2695 { 0x71, 0x19 },
2696 { 0x40, 0xff },
2697 { 0x41, 0x42 },
2698 { 0x46, 0x00 },
2699 { 0x33, 0x04 },
2700 { 0x21, 0x19 },
2701 { 0x3f, 0x10 },
2702 { 0x2f, 0x80 },
2703 };
2704
2705 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2706 PDEBUG(D_PROBE, "Device revision %d",
2707 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2708
2709 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2710 if (rc < 0)
2711 return rc;
2712
2713 /* Set LED GPIO pin to output mode */
2714 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2715 if (rc < 0)
2716 return rc;
6a7eba24 2717
49809d6a
HG		 2718 switch (sd->bridge) {
2719 case BRIDGE_OV518:
2720 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2721 if (rc < 0)
2722 return rc;
2723 break;
2724 case BRIDGE_OV518PLUS:
2725 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2726 if (rc < 0)
2727 return rc;
2728 break;
2729 }
2730
1876bb92 2731 rc = ov51x_upload_quan_tables(sd);
49809d6a
HG		 2732 if (rc < 0) {
2733 PDEBUG(D_ERR, "Error uploading quantization tables");
2734 return rc;
2735 }
2736
2737 rc = reg_w(sd, 0x2f, 0x80);
2738 if (rc < 0)
2739 return rc;
2740
2741 return 0;
2742}
2743
2744static int ov519_configure(struct sd *sd)
2745{
a5ae2062 2746 static const struct ov_regvals init_519[] = {
6a7eba24 2747 { 0x5a, 0x6d }, /* EnableSystem */
6a7eba24
JFM		 2748 { 0x53, 0x9b },
2749 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2750 { 0x5d, 0x03 },
2751 { 0x49, 0x01 },
2752 { 0x48, 0x00 },
2753 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2754 * detection will fail. This deserves further investigation. */
2755 { OV519_GPIO_IO_CTRL0, 0xee },
2756 { 0x51, 0x0f }, /* SetUsbInit */
2757 { 0x51, 0x00 },
2758 { 0x22, 0x00 },
2759 /* windows reads 0x55 at this point*/
2760 };
2761
49809d6a
HG		 2762 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2763}
2764
2765/* this function is called at probe time */
2766static int sd_config(struct gspca_dev *gspca_dev,
2767 const struct usb_device_id *id)
2768{
2769 struct sd *sd = (struct sd *) gspca_dev;
2770 struct cam *cam;
2771 int ret = 0;
2772
9e4d8258
HG		 2773 sd->bridge = id->driver_info & BRIDGE_MASK;
2774 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
49809d6a
HG		 2775
2776 switch (sd->bridge) {
1876bb92
HG		 2777 case BRIDGE_OV511:
2778 case BRIDGE_OV511PLUS:
2779 ret = ov511_configure(gspca_dev);
2780 break;
49809d6a
HG		 2781 case BRIDGE_OV518:
2782 case BRIDGE_OV518PLUS:
2783 ret = ov518_configure(gspca_dev);
2784 break;
2785 case BRIDGE_OV519:
2786 ret = ov519_configure(sd);
2787 break;
2788 }
2789
2790 if (ret)
6a7eba24 2791 goto error;
49809d6a 2792
6a7eba24
JFM		 2793 ov51x_led_control(sd, 0); /* turn LED off */
2794
6a7eba24
JFM		 2795 /* The OV519 must be more aggressive about sensor detection since
2796 * I2C write will never fail if the sensor is not present. We have
2797 * to try to initialize the sensor to detect its presence */
229bb7dc
HG		 2798
2799 /* Test for 76xx */
2800 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
4202f71c
JFM		 2801 if (ov7xx0_configure(sd) < 0) {
2802 PDEBUG(D_ERR, "Failed to configure OV7xx0");
2803 goto error;
2804 }
229bb7dc
HG		 2805 /* Test for 6xx0 */
2806 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
2807 if (ov6xx0_configure(sd) < 0) {
2808 PDEBUG(D_ERR, "Failed to configure OV6xx0");
2809 goto error;
2810 }
2811 /* Test for 8xx0 */
2812 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
2813 if (ov8xx0_configure(sd) < 0) {
2814 PDEBUG(D_ERR, "Failed to configure OV8xx0");
6a7eba24 2815 goto error;
6a7eba24 2816 }
635118d5
HG		 2817 /* Test for 3xxx / 2xxx */
2818 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
2819 if (ov_hires_configure(sd) < 0) {
2820 PDEBUG(D_ERR, "Failed to configure high res OV");
2821 goto error;
2822 }
229bb7dc
HG		 2823 } else {
2824 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
2825 goto error;
6a7eba24
JFM		 2826 }
2827
2828 cam = &gspca_dev->cam;
49809d6a 2829 switch (sd->bridge) {
1876bb92
HG		 2830 case BRIDGE_OV511:
2831 case BRIDGE_OV511PLUS:
2832 if (!sd->sif) {
2833 cam->cam_mode = ov511_vga_mode;
2834 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
2835 } else {
2836 cam->cam_mode = ov511_sif_mode;
2837 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
2838 }
2839 break;
49809d6a
HG		 2840 case BRIDGE_OV518:
2841 case BRIDGE_OV518PLUS:
2842 if (!sd->sif) {
2843 cam->cam_mode = ov518_vga_mode;
2844 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
2845 } else {
2846 cam->cam_mode = ov518_sif_mode;
2847 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
2848 }
2849 break;
2850 case BRIDGE_OV519:
2851 if (!sd->sif) {
2852 cam->cam_mode = ov519_vga_mode;
2853 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
2854 } else {
2855 cam->cam_mode = ov519_sif_mode;
2856 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
2857 }
2858 break;
635118d5
HG		 2859 case BRIDGE_OVFX2:
2860 if (sd->sensor == SEN_OV2610) {
2861 cam->cam_mode = ovfx2_ov2610_mode;
2862 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
2863 } else if (sd->sensor == SEN_OV3610) {
2864 cam->cam_mode = ovfx2_ov3610_mode;
2865 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
2866 } else if (!sd->sif) {
2867 cam->cam_mode = ov519_vga_mode;
2868 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
2869 } else {
2870 cam->cam_mode = ov519_sif_mode;
2871 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
2872 }
2873 break;
6a7eba24 2874 }
594f5b8b 2875 sd->brightness = BRIGHTNESS_DEF;
f5cee95c
HG		 2876 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
2877 sd->contrast = 200; /* The default is too low for the ov6630 */
2878 else
2879 sd->contrast = CONTRAST_DEF;
594f5b8b 2880 sd->colors = COLOR_DEF;
0cd6759d
JFM		 2881 sd->hflip = HFLIP_DEF;
2882 sd->vflip = VFLIP_DEF;
02ab18b0
HG		 2883 sd->autobrightness = AUTOBRIGHT_DEF;
2884 if (sd->sensor == SEN_OV7670) {
2885 sd->freq = OV7670_FREQ_DEF;
2886 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
2887 } else {
2888 sd->freq = FREQ_DEF;
2889 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
2890 (1 << OV7670_FREQ_IDX);
2891 }
2892 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
2893 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
2894 /* OV8610 Frequency filter control should work but needs testing */
2895 if (sd->sensor == SEN_OV8610)
2896 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
635118d5
HG		 2897 /* No controls for the OV2610/OV3610 */
2898 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
2899 gspca_dev->ctrl_dis |= 0xFF;
02ab18b0 2900
6a7eba24
JFM		 2901 return 0;
2902error:
2903 PDEBUG(D_ERR, "OV519 Config failed");
2904 return -EBUSY;
2905}
2906
012d6b02
JFM		 2907/* this function is called at probe and resume time */
2908static int sd_init(struct gspca_dev *gspca_dev)
6a7eba24 2909{
4202f71c
JFM		 2910 struct sd *sd = (struct sd *) gspca_dev;
2911
2912 /* initialize the sensor */
2913 switch (sd->sensor) {
635118d5
HG		 2914 case SEN_OV2610:
2915 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
2916 return -EIO;
2917 /* Enable autogain, autoexpo, awb, bandfilter */
2918 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
2919 return -EIO;
2920 break;
2921 case SEN_OV3610:
2922 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
2923 return -EIO;
2924 /* Enable autogain, autoexpo, awb, bandfilter */
2925 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
2926 return -EIO;
2927 break;
4202f71c
JFM		 2928 case SEN_OV6620:
2929 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
2930 return -EIO;
2931 break;
2932 case SEN_OV6630:
7d971373 2933 case SEN_OV66308AF:
4202f71c
JFM		 2934 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
2935 return -EIO;
2936 break;
2937 default:
2938/* case SEN_OV7610: */
2939/* case SEN_OV76BE: */
2940 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
2941 return -EIO;
ae49c404
HG		 2942 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
2943 return -EIO;
4202f71c
JFM		 2944 break;
2945 case SEN_OV7620:
2946 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
2947 return -EIO;
2948 break;
2949 case SEN_OV7640:
2950 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
2951 return -EIO;
2952 break;
2953 case SEN_OV7670:
2954 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
2955 return -EIO;
2956 break;
2957 case SEN_OV8610:
2958 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
2959 return -EIO;
2960 break;
2961 }
6a7eba24
JFM		 2962 return 0;
2963}
2964
1876bb92
HG		 2965/* Set up the OV511/OV511+ with the given image parameters.
2966 *
2967 * Do not put any sensor-specific code in here (including I2C I/O functions)
2968 */
2969static int ov511_mode_init_regs(struct sd *sd)
2970{
2971 int hsegs, vsegs, packet_size, fps, needed;
2972 int interlaced = 0;
2973 struct usb_host_interface *alt;
2974 struct usb_interface *intf;
2975
2976 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
2977 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
2978 if (!alt) {
2979 PDEBUG(D_ERR, "Couldn't get altsetting");
2980 return -EIO;
2981 }
2982
2983 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
2984 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
2985
2986 reg_w(sd, R511_CAM_UV_EN, 0x01);
2987 reg_w(sd, R511_SNAP_UV_EN, 0x01);
2988 reg_w(sd, R511_SNAP_OPTS, 0x03);
2989
2990 /* Here I'm assuming that snapshot size == image size.
2991 * I hope that's always true. --claudio
2992 */
2993 hsegs = (sd->gspca_dev.width >> 3) - 1;
2994 vsegs = (sd->gspca_dev.height >> 3) - 1;
2995
2996 reg_w(sd, R511_CAM_PXCNT, hsegs);
2997 reg_w(sd, R511_CAM_LNCNT, vsegs);
2998 reg_w(sd, R511_CAM_PXDIV, 0x00);
2999 reg_w(sd, R511_CAM_LNDIV, 0x00);
3000
3001 /* YUV420, low pass filter on */
3002 reg_w(sd, R511_CAM_OPTS, 0x03);
3003
3004 /* Snapshot additions */
3005 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3006 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3007 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3008 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3009
3010 /******** Set the framerate ********/
3011 if (frame_rate > 0)
3012 sd->frame_rate = frame_rate;
3013
3014 switch (sd->sensor) {
3015 case SEN_OV6620:
3016 /* No framerate control, doesn't like higher rates yet */
3017 sd->clockdiv = 3;
3018 break;
3019
3020 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3021 for more sensors we need to do this for them too */
3022 case SEN_OV7620:
3023 case SEN_OV7640:
b282d873 3024 case SEN_OV76BE:
1876bb92
HG		 3025 if (sd->gspca_dev.width == 320)
3026 interlaced = 1;
3027 /* Fall through */
3028 case SEN_OV6630:
1876bb92
HG		 3029 case SEN_OV7610:
3030 case SEN_OV7670:
3031 switch (sd->frame_rate) {
3032 case 30:
3033 case 25:
3034 /* Not enough bandwidth to do 640x480 @ 30 fps */
3035 if (sd->gspca_dev.width != 640) {
3036 sd->clockdiv = 0;
3037 break;
3038 }
3039 /* Fall through for 640x480 case */
3040 default:
3041/* case 20: */
3042/* case 15: */
3043 sd->clockdiv = 1;
3044 break;
3045 case 10:
3046 sd->clockdiv = 2;
3047 break;
3048 case 5:
3049 sd->clockdiv = 5;
3050 break;
3051 }
3052 if (interlaced) {
3053 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3054 /* Higher then 10 does not work */
3055 if (sd->clockdiv > 10)
3056 sd->clockdiv = 10;
3057 }
3058 break;
3059
3060 case SEN_OV8610:
3061 /* No framerate control ?? */
3062 sd->clockdiv = 0;
3063 break;
3064 }
3065
3066 /* Check if we have enough bandwidth to disable compression */
3067 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3068 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3069 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3070 if (needed > 1400 * packet_size) {
3071 /* Enable Y and UV quantization and compression */
3072 reg_w(sd, R511_COMP_EN, 0x07);
3073 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3074 } else {
3075 reg_w(sd, R511_COMP_EN, 0x06);
3076 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3077 }
3078
3079 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3080 reg_w(sd, R51x_SYS_RESET, 0);
3081
3082 return 0;
3083}
3084
49809d6a
HG		 3085/* Sets up the OV518/OV518+ with the given image parameters
3086 *
3087 * OV518 needs a completely different approach, until we can figure out what
3088 * the individual registers do. Also, only 15 FPS is supported now.
3089 *
3090 * Do not put any sensor-specific code in here (including I2C I/O functions)
3091 */
3092static int ov518_mode_init_regs(struct sd *sd)
3093{
b282d873
HG		 3094 int hsegs, vsegs, packet_size;
3095 struct usb_host_interface *alt;
3096 struct usb_interface *intf;
3097
3098 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3099 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3100 if (!alt) {
3101 PDEBUG(D_ERR, "Couldn't get altsetting");
3102 return -EIO;
3103 }
3104
3105 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3106 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
49809d6a
HG		 3107
3108 /******** Set the mode ********/
3109
3110 reg_w(sd, 0x2b, 0);
3111 reg_w(sd, 0x2c, 0);
3112 reg_w(sd, 0x2d, 0);
3113 reg_w(sd, 0x2e, 0);
3114 reg_w(sd, 0x3b, 0);
3115 reg_w(sd, 0x3c, 0);
3116 reg_w(sd, 0x3d, 0);
3117 reg_w(sd, 0x3e, 0);
3118
3119 if (sd->bridge == BRIDGE_OV518) {
3120 /* Set 8-bit (YVYU) input format */
3121 reg_w_mask(sd, 0x20, 0x08, 0x08);
3122
3123 /* Set 12-bit (4:2:0) output format */
3124 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3125 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3126 } else {
3127 reg_w(sd, 0x28, 0x80);
3128 reg_w(sd, 0x38, 0x80);
3129 }
3130
3131 hsegs = sd->gspca_dev.width / 16;
3132 vsegs = sd->gspca_dev.height / 4;
3133
3134 reg_w(sd, 0x29, hsegs);
3135 reg_w(sd, 0x2a, vsegs);
3136
3137 reg_w(sd, 0x39, hsegs);
3138 reg_w(sd, 0x3a, vsegs);
3139
3140 /* Windows driver does this here; who knows why */
3141 reg_w(sd, 0x2f, 0x80);
3142
b282d873
HG		 3143 /******** Set the framerate ********/
3144 sd->clockdiv = 1;
49809d6a
HG		 3145
3146 /* Mode independent, but framerate dependent, regs */
b282d873
HG		 3147 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3148 reg_w(sd, 0x51, 0x04);
49809d6a
HG		 3149 reg_w(sd, 0x22, 0x18);
3150 reg_w(sd, 0x23, 0xff);
3151
b282d873
HG		 3152 if (sd->bridge == BRIDGE_OV518PLUS) {
3153 switch (sd->sensor) {
3154 case SEN_OV7620:
3155 if (sd->gspca_dev.width == 320) {
3156 reg_w(sd, 0x20, 0x00);
3157 reg_w(sd, 0x21, 0x19);
3158 } else {
3159 reg_w(sd, 0x20, 0x60);
3160 reg_w(sd, 0x21, 0x1f);
3161 }
3162 break;
3163 default:
3164 reg_w(sd, 0x21, 0x19);
3165 }
3166 } else
49809d6a
HG		 3167 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3168
3169 /* FIXME: Sensor-specific */
3170 /* Bit 5 is what matters here. Of course, it is "reserved" */
3171 i2c_w(sd, 0x54, 0x23);
3172
3173 reg_w(sd, 0x2f, 0x80);
3174
3175 if (sd->bridge == BRIDGE_OV518PLUS) {
3176 reg_w(sd, 0x24, 0x94);
3177 reg_w(sd, 0x25, 0x90);
3178 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3179 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3180 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3181 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3182 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3183 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3184 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3185 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3186 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3187 } else {
3188 reg_w(sd, 0x24, 0x9f);
3189 reg_w(sd, 0x25, 0x90);
3190 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3191 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3192 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3193 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3194 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3195 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3196 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3197 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3198 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3199 }
3200
3201 reg_w(sd, 0x2f, 0x80);
3202
3203 return 0;
3204}
3205
3206
6a7eba24
JFM		 3207/* Sets up the OV519 with the given image parameters
3208 *
3209 * OV519 needs a completely different approach, until we can figure out what
3210 * the individual registers do.
3211 *
3212 * Do not put any sensor-specific code in here (including I2C I/O functions)
3213 */
594f5b8b 3214static int ov519_mode_init_regs(struct sd *sd)
6a7eba24 3215{
a5ae2062 3216 static const struct ov_regvals mode_init_519_ov7670[] = {
6a7eba24
JFM		 3217 { 0x5d, 0x03 }, /* Turn off suspend mode */
3218 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3219 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3220 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3221 { 0xa3, 0x18 },
3222 { 0xa4, 0x04 },
3223 { 0xa5, 0x28 },
3224 { 0x37, 0x00 }, /* SetUsbInit */
3225 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3226 /* Enable both fields, YUV Input, disable defect comp (why?) */
3227 { 0x20, 0x0c },
3228 { 0x21, 0x38 },
3229 { 0x22, 0x1d },
3230 { 0x17, 0x50 }, /* undocumented */
3231 { 0x37, 0x00 }, /* undocumented */
3232 { 0x40, 0xff }, /* I2C timeout counter */
3233 { 0x46, 0x00 }, /* I2C clock prescaler */
3234 { 0x59, 0x04 }, /* new from windrv 090403 */
3235 { 0xff, 0x00 }, /* undocumented */
3236 /* windows reads 0x55 at this point, why? */
3237 };
3238
a5ae2062 3239 static const struct ov_regvals mode_init_519[] = {
6a7eba24
JFM		 3240 { 0x5d, 0x03 }, /* Turn off suspend mode */
3241 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3242 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3243 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3244 { 0xa3, 0x18 },
3245 { 0xa4, 0x04 },
3246 { 0xa5, 0x28 },
3247 { 0x37, 0x00 }, /* SetUsbInit */
3248 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3249 /* Enable both fields, YUV Input, disable defect comp (why?) */
3250 { 0x22, 0x1d },
3251 { 0x17, 0x50 }, /* undocumented */
3252 { 0x37, 0x00 }, /* undocumented */
3253 { 0x40, 0xff }, /* I2C timeout counter */
3254 { 0x46, 0x00 }, /* I2C clock prescaler */
3255 { 0x59, 0x04 }, /* new from windrv 090403 */
3256 { 0xff, 0x00 }, /* undocumented */
3257 /* windows reads 0x55 at this point, why? */
3258 };
3259
6a7eba24
JFM		 3260 /******** Set the mode ********/
3261 if (sd->sensor != SEN_OV7670) {
3262 if (write_regvals(sd, mode_init_519,
a5ae2062 3263 ARRAY_SIZE(mode_init_519)))
6a7eba24 3264 return -EIO;
594f5b8b
JFM		 3265 if (sd->sensor == SEN_OV7640) {
3266 /* Select 8-bit input mode */
ac40b1fa 3267 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
594f5b8b 3268 }
6a7eba24
JFM		 3269 } else {
3270 if (write_regvals(sd, mode_init_519_ov7670,
a5ae2062 3271 ARRAY_SIZE(mode_init_519_ov7670)))
6a7eba24
JFM		 3272 return -EIO;
3273 }
3274
ac40b1fa
JFM		 3275 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3276 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
80142efa
HG		 3277 if (sd->sensor == SEN_OV7670 &&
3278 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3279 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3280 else
3281 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
ac40b1fa
JFM		 3282 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3283 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3284 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3285 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3286 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
6a7eba24
JFM		 3287 reg_w(sd, 0x26, 0x00); /* Undocumented */
3288
3289 /******** Set the framerate ********/
3290 if (frame_rate > 0)
3291 sd->frame_rate = frame_rate;
3292
3293/* FIXME: These are only valid at the max resolution. */
3294 sd->clockdiv = 0;
594f5b8b
JFM		 3295 switch (sd->sensor) {
3296 case SEN_OV7640:
6a7eba24 3297 switch (sd->frame_rate) {
53e74515
JFM		 3298 default:
3299/* case 30: */
6a7eba24
JFM		 3300 reg_w(sd, 0xa4, 0x0c);
3301 reg_w(sd, 0x23, 0xff);
3302 break;
3303 case 25:
3304 reg_w(sd, 0xa4, 0x0c);
3305 reg_w(sd, 0x23, 0x1f);
3306 break;
3307 case 20:
3308 reg_w(sd, 0xa4, 0x0c);
3309 reg_w(sd, 0x23, 0x1b);
3310 break;
53e74515 3311 case 15:
6a7eba24
JFM		 3312 reg_w(sd, 0xa4, 0x04);
3313 reg_w(sd, 0x23, 0xff);
3314 sd->clockdiv = 1;
3315 break;
3316 case 10:
3317 reg_w(sd, 0xa4, 0x04);
3318 reg_w(sd, 0x23, 0x1f);
3319 sd->clockdiv = 1;
3320 break;
3321 case 5:
3322 reg_w(sd, 0xa4, 0x04);
3323 reg_w(sd, 0x23, 0x1b);
3324 sd->clockdiv = 1;
3325 break;
3326 }
594f5b8b
JFM		 3327 break;
3328 case SEN_OV8610:
6a7eba24
JFM		 3329 switch (sd->frame_rate) {
3330 default: /* 15 fps */
3331/* case 15: */
3332 reg_w(sd, 0xa4, 0x06);
3333 reg_w(sd, 0x23, 0xff);
3334 break;
3335 case 10:
3336 reg_w(sd, 0xa4, 0x06);
3337 reg_w(sd, 0x23, 0x1f);
3338 break;
3339 case 5:
3340 reg_w(sd, 0xa4, 0x06);
3341 reg_w(sd, 0x23, 0x1b);
3342 break;
3343 }
594f5b8b
JFM		 3344 break;
3345 case SEN_OV7670: /* guesses, based on 7640 */
6a7eba24
JFM		 3346 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3347 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
594f5b8b 3348 reg_w(sd, 0xa4, 0x10);
6a7eba24
JFM		 3349 switch (sd->frame_rate) {
3350 case 30:
6a7eba24
JFM		 3351 reg_w(sd, 0x23, 0xff);
3352 break;
3353 case 20:
6a7eba24
JFM		 3354 reg_w(sd, 0x23, 0x1b);
3355 break;
594f5b8b
JFM		 3356 default:
3357/* case 15: */
6a7eba24
JFM		 3358 reg_w(sd, 0x23, 0xff);
3359 sd->clockdiv = 1;
3360 break;
3361 }
594f5b8b 3362 break;
6a7eba24 3363 }
6a7eba24
JFM		 3364 return 0;
3365}
3366
594f5b8b 3367static int mode_init_ov_sensor_regs(struct sd *sd)
6a7eba24 3368{
594f5b8b
JFM		 3369 struct gspca_dev *gspca_dev;
3370 int qvga;
3371
3372 gspca_dev = &sd->gspca_dev;
124cc9c0 3373 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
6a7eba24
JFM		 3374
3375 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3376 switch (sd->sensor) {
635118d5
HG		 3377 case SEN_OV2610:
3378 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3379 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3380 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3381 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3382 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3383 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3384 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3385 return 0;
3386 case SEN_OV3610: {
3387 int xstart, xend, ystart, yend;
3388
3389 if (qvga) {
3390 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3391 ystart = (772 - gspca_dev->height) / 2;
3392 } else {
3393 xstart = (2080 - gspca_dev->width) / 2 + (0x10 << 4);
3394 ystart = (1544 - gspca_dev->height) / 2;
3395 }
3396 xend = xstart + gspca_dev->width;
3397 yend = ystart + gspca_dev->height;
3398 /* Writing to the COMH register resets the other windowing regs
3399 to their default values, so we must do this first. */
3400 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3401 i2c_w_mask(sd, 0x32,
3402 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3403 0x3f);
3404 i2c_w_mask(sd, 0x03,
3405 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3406 0x0f);
3407 i2c_w(sd, 0x17, xstart >> 4);
3408 i2c_w(sd, 0x18, xend >> 4);
3409 i2c_w(sd, 0x19, ystart >> 3);
3410 i2c_w(sd, 0x1a, yend >> 3);
3411 return 0;
3412 }
6a7eba24
JFM		 3413 case SEN_OV8610:
3414 /* For OV8610 qvga means qsvga */
3415 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3416 break;
3417 case SEN_OV7610:
3418 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3419 break;
3420 case SEN_OV7620:
b282d873 3421 case SEN_OV76BE:
6a7eba24
JFM		 3422 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3423 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3424 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3425 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3426 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
b282d873 3427 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
6a7eba24
JFM		 3428 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3429 break;
6a7eba24 3430 case SEN_OV7640:
6a7eba24
JFM		 3431 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3432 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3433/* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
3434/* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
3435/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
3436/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
3437/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
3438 break;
3439 case SEN_OV7670:
3440 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3441 * do we need to set anything else?
3442 * HSTART etc are set in set_ov_sensor_window itself */
3443 i2c_w_mask(sd, OV7670_REG_COM7,
3444 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3445 OV7670_COM7_FMT_MASK);
3446 break;
3447 case SEN_OV6620:
6a7eba24 3448 case SEN_OV6630:
7d971373 3449 case SEN_OV66308AF:
6a7eba24
JFM		 3450 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3451 break;
3452 default:
3453 return -EINVAL;
3454 }
3455
3456 /******** Palette-specific regs ********/
6a7eba24 3457
594f5b8b
JFM		 3458 /* The OV518 needs special treatment. Although both the OV518
3459 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
3460 * bus is actually used. The UV bus is tied to ground.
3461 * Therefore, the OV6630 needs to be in 8-bit multiplexed
3462 * output mode */
6a7eba24 3463
594f5b8b 3464 /* OV7640 is 8-bit only */
6a7eba24 3465
7d971373
HG		 3466 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF &&
3467 sd->sensor != SEN_OV7640)
594f5b8b 3468 i2c_w_mask(sd, 0x13, 0x00, 0x20);
6a7eba24
JFM		 3469
3470 /******** Clock programming ********/
ae49c404 3471 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24
JFM		 3472
3473 /******** Special Features ********/
3474/* no evidence this is possible with OV7670, either */
3475 /* Test Pattern */
3476 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
3477 i2c_w_mask(sd, 0x12, 0x00, 0x02);
3478
3479 /* Enable auto white balance */
3480 if (sd->sensor == SEN_OV7670)
3481 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3482 OV7670_COM8_AWB);
3483 else
3484 i2c_w_mask(sd, 0x12, 0x04, 0x04);
3485
3486 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
3487 /* is fully tested. */
3488 /* 7620/6620/6630? don't have register 0x35, so play it safe */
3489 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
594f5b8b 3490 if (!qvga)
6a7eba24
JFM		 3491 i2c_w(sd, 0x35, 0x9e);
3492 else
3493 i2c_w(sd, 0x35, 0x1e);
3494 }
3495 return 0;
3496}
3497
594f5b8b 3498static void sethvflip(struct sd *sd)
0cd6759d 3499{
594f5b8b
JFM		 3500 if (sd->sensor != SEN_OV7670)
3501 return;
0cd6759d
JFM		 3502 if (sd->gspca_dev.streaming)
3503 ov51x_stop(sd);
3504 i2c_w_mask(sd, OV7670_REG_MVFP,
594f5b8b
JFM		 3505 OV7670_MVFP_MIRROR * sd->hflip
3506 | OV7670_MVFP_VFLIP * sd->vflip,
3507 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
0cd6759d
JFM		 3508 if (sd->gspca_dev.streaming)
3509 ov51x_restart(sd);
3510}
3511
594f5b8b 3512static int set_ov_sensor_window(struct sd *sd)
6a7eba24 3513{
594f5b8b 3514 struct gspca_dev *gspca_dev;
124cc9c0 3515 int qvga, crop;
6a7eba24
JFM		 3516 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3517 int ret, hstart, hstop, vstop, vstart;
3518 __u8 v;
3519
635118d5
HG		 3520 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3521 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3522 return mode_init_ov_sensor_regs(sd);
3523
594f5b8b 3524 gspca_dev = &sd->gspca_dev;
124cc9c0
HG		 3525 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3526 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
594f5b8b 3527
6a7eba24
JFM		 3528 /* The different sensor ICs handle setting up of window differently.
3529 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3530 switch (sd->sensor) {
3531 case SEN_OV8610:
3532 hwsbase = 0x1e;
3533 hwebase = 0x1e;
3534 vwsbase = 0x02;
3535 vwebase = 0x02;
3536 break;
3537 case SEN_OV7610:
3538 case SEN_OV76BE:
3539 hwsbase = 0x38;
3540 hwebase = 0x3a;
3541 vwsbase = vwebase = 0x05;
3542 break;
3543 case SEN_OV6620:
3544 case SEN_OV6630:
7d971373 3545 case SEN_OV66308AF:
6a7eba24
JFM		 3546 hwsbase = 0x38;
3547 hwebase = 0x3a;
3548 vwsbase = 0x05;
3549 vwebase = 0x06;
7d971373 3550 if (sd->sensor == SEN_OV66308AF && qvga)
49809d6a 3551 /* HDG: this fixes U and V getting swapped */
7d971373 3552 hwsbase++;
124cc9c0
HG		 3553 if (crop) {
3554 hwsbase += 8;
3555 hwebase += 8;
3556 vwsbase += 11;
3557 vwebase += 11;
3558 }
6a7eba24
JFM		 3559 break;
3560 case SEN_OV7620:
3561 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3562 hwebase = 0x2f;
3563 vwsbase = vwebase = 0x05;
3564 break;
3565 case SEN_OV7640:
3566 hwsbase = 0x1a;
3567 hwebase = 0x1a;
3568 vwsbase = vwebase = 0x03;
3569 break;
3570 case SEN_OV7670:
3571 /*handling of OV7670 hardware sensor start and stop values
3572 * is very odd, compared to the other OV sensors */
3573 vwsbase = vwebase = hwebase = hwsbase = 0x00;
3574 break;
3575 default:
3576 return -EINVAL;
3577 }
3578
3579 switch (sd->sensor) {
3580 case SEN_OV6620:
3581 case SEN_OV6630:
7d971373 3582 case SEN_OV66308AF:
594f5b8b 3583 if (qvga) { /* QCIF */
6a7eba24
JFM		 3584 hwscale = 0;
3585 vwscale = 0;
3586 } else { /* CIF */
3587 hwscale = 1;
3588 vwscale = 1; /* The datasheet says 0;
3589 * it's wrong */
3590 }
3591 break;
3592 case SEN_OV8610:
594f5b8b 3593 if (qvga) { /* QSVGA */
6a7eba24
JFM		 3594 hwscale = 1;
3595 vwscale = 1;
3596 } else { /* SVGA */
3597 hwscale = 2;
3598 vwscale = 2;
3599 }
3600 break;
3601 default: /* SEN_OV7xx0 */
594f5b8b 3602 if (qvga) { /* QVGA */
6a7eba24
JFM		 3603 hwscale = 1;
3604 vwscale = 0;
3605 } else { /* VGA */
3606 hwscale = 2;
3607 vwscale = 1;
3608 }
3609 }
3610
594f5b8b 3611 ret = mode_init_ov_sensor_regs(sd);
6a7eba24
JFM		 3612 if (ret < 0)
3613 return ret;
3614
3615 if (sd->sensor == SEN_OV8610) {
3616 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
3617 /* old 0x95, new 0x05 from windrv 090403 */
3618 /* bits 5-7: reserved */
3619 i2c_w_mask(sd, 0x28, 0x20, 0x20);
3620 /* bit 5: progressive mode on */
3621 }
3622
3623 /* The below is wrong for OV7670s because their window registers
3624 * only store the high bits in 0x17 to 0x1a */
3625
3626 /* SRH Use sd->max values instead of requested win values */
3627 /* SCS Since we're sticking with only the max hardware widths
3628 * for a given mode */
3629 /* I can hard code this for OV7670s */
3630 /* Yes, these numbers do look odd, but they're tested and work! */
3631 if (sd->sensor == SEN_OV7670) {
594f5b8b 3632 if (qvga) { /* QVGA from ov7670.c by
6a7eba24
JFM		 3633 * Jonathan Corbet */
3634 hstart = 164;
80142efa 3635 hstop = 28;
6a7eba24
JFM		 3636 vstart = 14;
3637 vstop = 494;
3638 } else { /* VGA */
3639 hstart = 158;
3640 hstop = 14;
3641 vstart = 10;
3642 vstop = 490;
3643 }
3644 /* OV7670 hardware window registers are split across
3645 * multiple locations */
594f5b8b
JFM		 3646 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
3647 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
6a7eba24
JFM		 3648 v = i2c_r(sd, OV7670_REG_HREF);
3649 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
3650 msleep(10); /* need to sleep between read and write to
3651 * same reg! */
3652 i2c_w(sd, OV7670_REG_HREF, v);
3653
594f5b8b
JFM		 3654 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
3655 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
6a7eba24
JFM		 3656 v = i2c_r(sd, OV7670_REG_VREF);
3657 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
3658 msleep(10); /* need to sleep between read and write to
3659 * same reg! */
3660 i2c_w(sd, OV7670_REG_VREF, v);
6a7eba24 3661 } else {
594f5b8b
JFM		 3662 i2c_w(sd, 0x17, hwsbase);
3663 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
3664 i2c_w(sd, 0x19, vwsbase);
3665 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
6a7eba24
JFM		 3666 }
3667 return 0;
3668}
3669
6a7eba24 3670/* -- start the camera -- */
72ab97ce 3671static int sd_start(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 3672{
3673 struct sd *sd = (struct sd *) gspca_dev;
49809d6a 3674 int ret = 0;
6a7eba24 3675
49809d6a 3676 switch (sd->bridge) {
1876bb92
HG		 3677 case BRIDGE_OV511:
3678 case BRIDGE_OV511PLUS:
3679 ret = ov511_mode_init_regs(sd);
3680 break;
49809d6a
HG		 3681 case BRIDGE_OV518:
3682 case BRIDGE_OV518PLUS:
3683 ret = ov518_mode_init_regs(sd);
3684 break;
3685 case BRIDGE_OV519:
3686 ret = ov519_mode_init_regs(sd);
3687 break;
3688 }
6a7eba24
JFM		 3689 if (ret < 0)
3690 goto out;
49809d6a 3691
594f5b8b 3692 ret = set_ov_sensor_window(sd);
6a7eba24
JFM		 3693 if (ret < 0)
3694 goto out;
3695
49809d6a
HG		 3696 setcontrast(gspca_dev);
3697 setbrightness(gspca_dev);
3698 setcolors(gspca_dev);
02ab18b0
HG		 3699 sethvflip(sd);
3700 setautobrightness(sd);
3701 setfreq(sd);
49809d6a 3702
594f5b8b 3703 ret = ov51x_restart(sd);
6a7eba24
JFM		 3704 if (ret < 0)
3705 goto out;
6a7eba24 3706 ov51x_led_control(sd, 1);
72ab97ce 3707 return 0;
6a7eba24
JFM		 3708out:
3709 PDEBUG(D_ERR, "camera start error:%d", ret);
72ab97ce 3710 return ret;
6a7eba24
JFM		 3711}
3712
3713static void sd_stopN(struct gspca_dev *gspca_dev)
3714{
ac40b1fa
JFM		 3715 struct sd *sd = (struct sd *) gspca_dev;
3716
3717 ov51x_stop(sd);
3718 ov51x_led_control(sd, 0);
6a7eba24
JFM		 3719}
3720
1876bb92
HG		 3721static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3722 struct gspca_frame *frame, /* target */
3723 __u8 *in, /* isoc packet */
3724 int len) /* iso packet length */
3725{
3726 struct sd *sd = (struct sd *) gspca_dev;
3727
3728 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3729 * byte non-zero. The EOF packet has image width/height in the
3730 * 10th and 11th bytes. The 9th byte is given as follows:
3731 *
3732 * bit 7: EOF
3733 * 6: compression enabled
3734 * 5: 422/420/400 modes
3735 * 4: 422/420/400 modes
3736 * 3: 1
3737 * 2: snapshot button on
3738 * 1: snapshot frame
3739 * 0: even/odd field
3740 */
3741 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3742 (in[8] & 0x08)) {
3743 if (in[8] & 0x80) {
3744 /* Frame end */
3745 if ((in[9] + 1) * 8 != gspca_dev->width ||
3746 (in[10] + 1) * 8 != gspca_dev->height) {
3747 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
3748 " requested: %dx%d\n",
3749 (in[9] + 1) * 8, (in[10] + 1) * 8,
3750 gspca_dev->width, gspca_dev->height);
3751 gspca_dev->last_packet_type = DISCARD_PACKET;
3752 return;
3753 }
3754 /* Add 11 byte footer to frame, might be usefull */
3755 gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11);
3756 return;
3757 } else {
3758 /* Frame start */
3759 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0);
3760 sd->packet_nr = 0;
3761 }
3762 }
3763
3764 /* Ignore the packet number */
3765 len--;
3766
3767 /* intermediate packet */
3768 gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len);
3769}
3770
49809d6a
HG		 3771static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3772 struct gspca_frame *frame, /* target */
3773 __u8 *data, /* isoc packet */
3774 int len) /* iso packet length */
3775{
92918a53 3776 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 3777
3778 /* A false positive here is likely, until OVT gives me
3779 * the definitive SOF/EOF format */
3780 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
1381dfd5 3781 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
49809d6a 3782 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
92918a53
HG		 3783 sd->packet_nr = 0;
3784 }
3785
3786 if (gspca_dev->last_packet_type == DISCARD_PACKET)
3787 return;
3788
3789 /* Does this device use packet numbers ? */
3790 if (len & 7) {
3791 len--;
3792 if (sd->packet_nr == data[len])
3793 sd->packet_nr++;
3794 /* The last few packets of the frame (which are all 0's
3795 except that they may contain part of the footer), are
3796 numbered 0 */
3797 else if (sd->packet_nr == 0 || data[len]) {
3798 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
3799 (int)data[len], (int)sd->packet_nr);
3800 gspca_dev->last_packet_type = DISCARD_PACKET;
3801 return;
3802 }
49809d6a
HG		 3803 }
3804
3805 /* intermediate packet */
3806 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
3807}
3808
3809static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
6a7eba24 3810 struct gspca_frame *frame, /* target */
a5ae2062 3811 __u8 *data, /* isoc packet */
6a7eba24
JFM		 3812 int len) /* iso packet length */
3813{
3814 /* Header of ov519 is 16 bytes:
3815 * Byte Value Description
3816 * 0 0xff magic
3817 * 1 0xff magic
3818 * 2 0xff magic
3819 * 3 0xXX 0x50 = SOF, 0x51 = EOF
3820 * 9 0xXX 0x01 initial frame without data,
3821 * 0x00 standard frame with image
3822 * 14 Lo in EOF: length of image data / 8
3823 * 15 Hi
3824 */
3825
3826 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
3827 switch (data[3]) {
3828 case 0x50: /* start of frame */
3829#define HDRSZ 16
3830 data += HDRSZ;
3831 len -= HDRSZ;
3832#undef HDRSZ
3833 if (data[0] == 0xff || data[1] == 0xd8)
3834 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
3835 data, len);
3836 else
3837 gspca_dev->last_packet_type = DISCARD_PACKET;
3838 return;
3839 case 0x51: /* end of frame */
3840 if (data[9] != 0)
3841 gspca_dev->last_packet_type = DISCARD_PACKET;
3842 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
3843 data, 0);
3844 return;
3845 }
3846 }
3847
3848 /* intermediate packet */
3849 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
3850 data, len);
3851}
3852
49809d6a
HG		 3853static void sd_pkt_scan(struct gspca_dev *gspca_dev,
3854 struct gspca_frame *frame, /* target */
3855 __u8 *data, /* isoc packet */
3856 int len) /* iso packet length */
3857{
3858 struct sd *sd = (struct sd *) gspca_dev;
3859
3860 switch (sd->bridge) {
3861 case BRIDGE_OV511:
3862 case BRIDGE_OV511PLUS:
1876bb92 3863 ov511_pkt_scan(gspca_dev, frame, data, len);
49809d6a
HG		 3864 break;
3865 case BRIDGE_OV518:
3866 case BRIDGE_OV518PLUS:
3867 ov518_pkt_scan(gspca_dev, frame, data, len);
3868 break;
3869 case BRIDGE_OV519:
3870 ov519_pkt_scan(gspca_dev, frame, data, len);
3871 break;
3872 }
3873}
3874
6a7eba24
JFM		 3875/* -- management routines -- */
3876
3877static void setbrightness(struct gspca_dev *gspca_dev)
3878{
3879 struct sd *sd = (struct sd *) gspca_dev;
3880 int val;
6a7eba24
JFM		 3881
3882 val = sd->brightness;
6a7eba24
JFM		 3883 switch (sd->sensor) {
3884 case SEN_OV8610:
3885 case SEN_OV7610:
3886 case SEN_OV76BE:
3887 case SEN_OV6620:
3888 case SEN_OV6630:
7d971373 3889 case SEN_OV66308AF:
6a7eba24
JFM		 3890 case SEN_OV7640:
3891 i2c_w(sd, OV7610_REG_BRT, val);
3892 break;
3893 case SEN_OV7620:
3894 /* 7620 doesn't like manual changes when in auto mode */
02ab18b0 3895 if (!sd->autobrightness)
6a7eba24
JFM		 3896 i2c_w(sd, OV7610_REG_BRT, val);
3897 break;
3898 case SEN_OV7670:
594f5b8b 3899/*win trace
6a7eba24
JFM		 3900 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
3901 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
3902 break;
3903 }
6a7eba24
JFM		 3904}
3905
3906static void setcontrast(struct gspca_dev *gspca_dev)
3907{
3908 struct sd *sd = (struct sd *) gspca_dev;
3909 int val;
6a7eba24
JFM		 3910
3911 val = sd->contrast;
6a7eba24
JFM		 3912 switch (sd->sensor) {
3913 case SEN_OV7610:
3914 case SEN_OV6620:
3915 i2c_w(sd, OV7610_REG_CNT, val);
3916 break;
3917 case SEN_OV6630:
7d971373 3918 case SEN_OV66308AF:
6a7eba24 3919 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
49809d6a 3920 break;
6a7eba24 3921 case SEN_OV8610: {
a5ae2062 3922 static const __u8 ctab[] = {
6a7eba24
JFM		 3923 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
3924 };
3925
3926 /* Use Y gamma control instead. Bit 0 enables it. */
3927 i2c_w(sd, 0x64, ctab[val >> 5]);
3928 break;
3929 }
3930 case SEN_OV7620: {
a5ae2062 3931 static const __u8 ctab[] = {
6a7eba24
JFM		 3932 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
3933 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
3934 };
3935
3936 /* Use Y gamma control instead. Bit 0 enables it. */
3937 i2c_w(sd, 0x64, ctab[val >> 4]);
3938 break;
3939 }
3940 case SEN_OV7640:
3941 /* Use gain control instead. */
3942 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
3943 break;
3944 case SEN_OV7670:
3945 /* check that this isn't just the same as ov7610 */
3946 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
3947 break;
3948 }
6a7eba24
JFM		 3949}
3950
3951static void setcolors(struct gspca_dev *gspca_dev)
3952{
3953 struct sd *sd = (struct sd *) gspca_dev;
3954 int val;
6a7eba24
JFM		 3955
3956 val = sd->colors;
6a7eba24
JFM		 3957 switch (sd->sensor) {
3958 case SEN_OV8610:
3959 case SEN_OV7610:
3960 case SEN_OV76BE:
3961 case SEN_OV6620:
3962 case SEN_OV6630:
7d971373 3963 case SEN_OV66308AF:
6a7eba24
JFM		 3964 i2c_w(sd, OV7610_REG_SAT, val);
3965 break;
3966 case SEN_OV7620:
3967 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
3968/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
3969 if (rc < 0)
3970 goto out; */
3971 i2c_w(sd, OV7610_REG_SAT, val);
3972 break;
3973 case SEN_OV7640:
3974 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
3975 break;
3976 case SEN_OV7670:
3977 /* supported later once I work out how to do it
3978 * transparently fail now! */
3979 /* set REG_COM13 values for UV sat auto mode */
3980 break;
3981 }
6a7eba24
JFM		 3982}
3983
02ab18b0
HG		 3984static void setautobrightness(struct sd *sd)
3985{
635118d5
HG		 3986 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 ||
3987 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
02ab18b0
HG		 3988 return;
3989
3990 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
3991}
3992
3993static void setfreq(struct sd *sd)
3994{
635118d5
HG		 3995 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3996 return;
3997
02ab18b0
HG		 3998 if (sd->sensor == SEN_OV7670) {
3999 switch (sd->freq) {
4000 case 0: /* Banding filter disabled */
4001 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4002 break;
4003 case 1: /* 50 hz */
4004 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4005 OV7670_COM8_BFILT);
4006 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4007 break;
4008 case 2: /* 60 hz */
4009 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4010 OV7670_COM8_BFILT);
4011 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4012 break;
4013 case 3: /* Auto hz */
4014 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4015 OV7670_COM8_BFILT);
4016 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4017 0x18);
4018 break;
4019 }
4020 } else {
4021 switch (sd->freq) {
4022 case 0: /* Banding filter disabled */
4023 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4024 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4025 break;
4026 case 1: /* 50 hz (filter on and framerate adj) */
4027 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4028 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4029 /* 20 fps -> 16.667 fps */
4030 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4031 sd->sensor == SEN_OV6630 ||
4032 sd->sensor == SEN_OV66308AF)
02ab18b0
HG		 4033 i2c_w(sd, 0x2b, 0x5e);
4034 else
4035 i2c_w(sd, 0x2b, 0xac);
4036 break;
4037 case 2: /* 60 hz (filter on, ...) */
4038 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4039 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4040 sd->sensor == SEN_OV6630 ||
4041 sd->sensor == SEN_OV66308AF) {
02ab18b0
HG		 4042 /* 20 fps -> 15 fps */
4043 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4044 i2c_w(sd, 0x2b, 0xa8);
4045 } else {
4046 /* no framerate adj. */
4047 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4048 }
4049 break;
4050 }
4051 }
4052}
4053
6a7eba24
JFM		 4054static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4055{
4056 struct sd *sd = (struct sd *) gspca_dev;
4057
4058 sd->brightness = val;
ac40b1fa
JFM		 4059 if (gspca_dev->streaming)
4060 setbrightness(gspca_dev);
6a7eba24
JFM		 4061 return 0;
4062}
4063
4064static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4065{
4066 struct sd *sd = (struct sd *) gspca_dev;
4067
4068 *val = sd->brightness;
4069 return 0;
4070}
4071
4072static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4073{
4074 struct sd *sd = (struct sd *) gspca_dev;
4075
4076 sd->contrast = val;
ac40b1fa
JFM		 4077 if (gspca_dev->streaming)
4078 setcontrast(gspca_dev);
6a7eba24
JFM		 4079 return 0;
4080}
4081
4082static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4083{
4084 struct sd *sd = (struct sd *) gspca_dev;
4085
4086 *val = sd->contrast;
4087 return 0;
4088}
4089
4090static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4091{
4092 struct sd *sd = (struct sd *) gspca_dev;
4093
4094 sd->colors = val;
ac40b1fa
JFM		 4095 if (gspca_dev->streaming)
4096 setcolors(gspca_dev);
6a7eba24
JFM		 4097 return 0;
4098}
4099
4100static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4101{
4102 struct sd *sd = (struct sd *) gspca_dev;
4103
4104 *val = sd->colors;
4105 return 0;
4106}
4107
0cd6759d
JFM		 4108static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4109{
4110 struct sd *sd = (struct sd *) gspca_dev;
4111
4112 sd->hflip = val;
ac40b1fa
JFM		 4113 if (gspca_dev->streaming)
4114 sethvflip(sd);
0cd6759d
JFM		 4115 return 0;
4116}
4117
4118static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4119{
4120 struct sd *sd = (struct sd *) gspca_dev;
4121
4122 *val = sd->hflip;
4123 return 0;
4124}
4125
4126static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4127{
4128 struct sd *sd = (struct sd *) gspca_dev;
4129
4130 sd->vflip = val;
ac40b1fa
JFM		 4131 if (gspca_dev->streaming)
4132 sethvflip(sd);
0cd6759d
JFM		 4133 return 0;
4134}
4135
4136static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4137{
4138 struct sd *sd = (struct sd *) gspca_dev;
4139
4140 *val = sd->vflip;
4141 return 0;
4142}
4143
02ab18b0
HG		 4144static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4145{
4146 struct sd *sd = (struct sd *) gspca_dev;
4147
4148 sd->autobrightness = val;
4149 if (gspca_dev->streaming)
4150 setautobrightness(sd);
4151 return 0;
4152}
4153
4154static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4155{
4156 struct sd *sd = (struct sd *) gspca_dev;
4157
4158 *val = sd->autobrightness;
4159 return 0;
4160}
4161
4162static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4163{
4164 struct sd *sd = (struct sd *) gspca_dev;
4165
4166 sd->freq = val;
4167 if (gspca_dev->streaming)
4168 setfreq(sd);
4169 return 0;
4170}
4171
4172static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4173{
4174 struct sd *sd = (struct sd *) gspca_dev;
4175
4176 *val = sd->freq;
4177 return 0;
4178}
4179
4180static int sd_querymenu(struct gspca_dev *gspca_dev,
4181 struct v4l2_querymenu *menu)
4182{
4183 struct sd *sd = (struct sd *) gspca_dev;
4184
4185 switch (menu->id) {
4186 case V4L2_CID_POWER_LINE_FREQUENCY:
4187 switch (menu->index) {
4188 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4189 strcpy((char *) menu->name, "NoFliker");
4190 return 0;
4191 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4192 strcpy((char *) menu->name, "50 Hz");
4193 return 0;
4194 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4195 strcpy((char *) menu->name, "60 Hz");
4196 return 0;
4197 case 3:
4198 if (sd->sensor != SEN_OV7670)
4199 return -EINVAL;
4200
4201 strcpy((char *) menu->name, "Automatic");
4202 return 0;
4203 }
4204 break;
4205 }
4206 return -EINVAL;
4207}
4208
6a7eba24 4209/* sub-driver description */
a5ae2062 4210static const struct sd_desc sd_desc = {
6a7eba24
JFM		 4211 .name = MODULE_NAME,
4212 .ctrls = sd_ctrls,
4213 .nctrls = ARRAY_SIZE(sd_ctrls),
4214 .config = sd_config,
012d6b02 4215 .init = sd_init,
6a7eba24
JFM		 4216 .start = sd_start,
4217 .stopN = sd_stopN,
6a7eba24 4218 .pkt_scan = sd_pkt_scan,
02ab18b0 4219 .querymenu = sd_querymenu,
6a7eba24
JFM		 4220};
4221
4222/* -- module initialisation -- */
a5ae2062 4223static const __devinitdata struct usb_device_id device_table[] = {
49809d6a
HG		 4224 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4225 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4226 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4227 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 4228 {USB_DEVICE(0x041e, 0x4064),
4229 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
518c8df7 4230 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 4231 {USB_DEVICE(0x041e, 0x4068),
4232 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
49809d6a
HG		 4233 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4234 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4235 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
1876bb92 4236 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
49809d6a
HG		 4237 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4238 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4239 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4240 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4241 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
1876bb92 4242 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
49809d6a 4243 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
1876bb92 4244 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
6a7eba24
JFM		 4245 {}
4246};
ac40b1fa 4247
6a7eba24
JFM		 4248MODULE_DEVICE_TABLE(usb, device_table);
4249
4250/* -- device connect -- */
4251static int sd_probe(struct usb_interface *intf,
4252 const struct usb_device_id *id)
4253{
4254 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4255 THIS_MODULE);
4256}
4257
4258static struct usb_driver sd_driver = {
4259 .name = MODULE_NAME,
4260 .id_table = device_table,
4261 .probe = sd_probe,
4262 .disconnect = gspca_disconnect,
6a709749
JFM		 4263#ifdef CONFIG_PM
4264 .suspend = gspca_suspend,
4265 .resume = gspca_resume,
4266#endif
6a7eba24
JFM		 4267};
4268
4269/* -- module insert / remove -- */
4270static int __init sd_mod_init(void)
4271{
f69e9529
AK		 4272 int ret;
4273 ret = usb_register(&sd_driver);
4274 if (ret < 0)
e6b14849 4275 return ret;
10b0e96e 4276 PDEBUG(D_PROBE, "registered");
6a7eba24
JFM		 4277 return 0;
4278}
4279static void __exit sd_mod_exit(void)
4280{
4281 usb_deregister(&sd_driver);
4282 PDEBUG(D_PROBE, "deregistered");
4283}
4284
4285module_init(sd_mod_init);
4286module_exit(sd_mod_exit);
4287
4288module_param(frame_rate, int, 0644);
4289MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
Linux kernel - Deliverables
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