V4L/DVB: IR/streamzap: functional in-kernel decoding
[deliverable/linux.git] / drivers / media / video / ivtv / ivtv-driver.h
CommitLineData
1a0adaf3
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1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39#include <linux/version.h>
40#include <linux/module.h>
1a0adaf3
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41#include <linux/init.h>
42#include <linux/delay.h>
43#include <linux/sched.h>
44#include <linux/fs.h>
45#include <linux/pci.h>
46#include <linux/interrupt.h>
47#include <linux/spinlock.h>
48#include <linux/i2c.h>
49#include <linux/i2c-algo-bit.h>
50#include <linux/list.h>
51#include <linux/unistd.h>
1a0adaf3 52#include <linux/pagemap.h>
11763609 53#include <linux/scatterlist.h>
7bc46560 54#include <linux/kthread.h>
1a0adaf3 55#include <linux/mutex.h>
5a0e3ad6 56#include <linux/slab.h>
1a0adaf3
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57#include <asm/uaccess.h>
58#include <asm/system.h>
1a651a00 59#include <asm/byteorder.h>
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60
61#include <linux/dvb/video.h>
62#include <linux/dvb/audio.h>
63#include <media/v4l2-common.h>
35ea11ff 64#include <media/v4l2-ioctl.h>
f7b80e69 65#include <media/v4l2-ctrls.h>
67ec09fd 66#include <media/v4l2-device.h>
09250193 67#include <media/v4l2-fh.h>
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68#include <media/tuner.h>
69#include <media/cx2341x.h>
ad2fe2d4 70#include <media/ir-kbd-i2c.h>
1a0adaf3 71
51b39dfa 72#include <linux/ivtv.h>
1a0adaf3 73
33c0fcad 74/* Memory layout */
1a0adaf3 75#define IVTV_ENCODER_OFFSET 0x00000000
33c0fcad 76#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3 77#define IVTV_DECODER_OFFSET 0x01000000
33c0fcad 78#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3
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79#define IVTV_REG_OFFSET 0x02000000
80#define IVTV_REG_SIZE 0x00010000
81
32db7754
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82/* Maximum ivtv driver instances. Some people have a huge number of
83 capture cards, so set this to a high value. */
84#define IVTV_MAX_CARDS 32
1a0adaf3 85
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86#define IVTV_ENC_STREAM_TYPE_MPG 0
87#define IVTV_ENC_STREAM_TYPE_YUV 1
88#define IVTV_ENC_STREAM_TYPE_VBI 2
89#define IVTV_ENC_STREAM_TYPE_PCM 3
90#define IVTV_ENC_STREAM_TYPE_RAD 4
91#define IVTV_DEC_STREAM_TYPE_MPG 5
92#define IVTV_DEC_STREAM_TYPE_VBI 6
93#define IVTV_DEC_STREAM_TYPE_VOUT 7
94#define IVTV_DEC_STREAM_TYPE_YUV 8
95#define IVTV_MAX_STREAMS 9
96
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97#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
98
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99/* DMA Registers */
100#define IVTV_REG_DMAXFER (0x0000)
101#define IVTV_REG_DMASTATUS (0x0004)
102#define IVTV_REG_DECDMAADDR (0x0008)
103#define IVTV_REG_ENCDMAADDR (0x000c)
104#define IVTV_REG_DMACONTROL (0x0010)
105#define IVTV_REG_IRQSTATUS (0x0040)
106#define IVTV_REG_IRQMASK (0x0048)
107
108/* Setup Registers */
109#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
110#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
111#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
112#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
113#define IVTV_REG_VDM (0x2800)
114#define IVTV_REG_AO (0x2D00)
115#define IVTV_REG_BYTEFLUSH (0x2D24)
116#define IVTV_REG_SPU (0x9050)
117#define IVTV_REG_HW_BLOCKS (0x9054)
118#define IVTV_REG_VPU (0x9058)
119#define IVTV_REG_APU (0xA064)
120
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121/* Other registers */
122#define IVTV_REG_DEC_LINE_FIELD (0x28C0)
123
1a0adaf3 124/* debugging */
33c0fcad 125extern int ivtv_debug;
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126#ifdef CONFIG_VIDEO_ADV_DEBUG
127extern int ivtv_fw_debug;
128#endif
1a0adaf3 129
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130#define IVTV_DBGFLG_WARN (1 << 0)
131#define IVTV_DBGFLG_INFO (1 << 1)
132#define IVTV_DBGFLG_MB (1 << 2)
133#define IVTV_DBGFLG_IOCTL (1 << 3)
134#define IVTV_DBGFLG_FILE (1 << 4)
135#define IVTV_DBGFLG_DMA (1 << 5)
136#define IVTV_DBGFLG_IRQ (1 << 6)
137#define IVTV_DBGFLG_DEC (1 << 7)
138#define IVTV_DBGFLG_YUV (1 << 8)
139#define IVTV_DBGFLG_I2C (1 << 9)
bd58df6d 140/* Flag to turn on high volume debugging */
1aa32c2f 141#define IVTV_DBGFLG_HIGHVOL (1 << 10)
1a0adaf3 142
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143#define IVTV_DEBUG(x, type, fmt, args...) \
144 do { \
145 if ((x) & ivtv_debug) \
8ac05ae3 146 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
1a0adaf3 147 } while (0)
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148#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
149#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
150#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
151#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
1a0adaf3 152#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
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153#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
154#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
155#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
156#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
157#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
1a0adaf3 158
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159#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
160 do { \
67ec09fd 161 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
8ac05ae3 162 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
bd58df6d 163 } while (0)
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164#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
165#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
166#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
167#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
bd58df6d 168#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
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169#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
170#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
171#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
172#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
173#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
bd58df6d 174
1a0adaf3 175/* Standard kernel messages */
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176#define IVTV_ERR(fmt, args...) v4l2_err(&itv->v4l2_dev, fmt , ## args)
177#define IVTV_WARN(fmt, args...) v4l2_warn(&itv->v4l2_dev, fmt , ## args)
178#define IVTV_INFO(fmt, args...) v4l2_info(&itv->v4l2_dev, fmt , ## args)
1a0adaf3 179
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180/* output modes (cx23415 only) */
181#define OUT_NONE 0
182#define OUT_MPG 1
183#define OUT_YUV 2
184#define OUT_UDMA_YUV 3
185#define OUT_PASSTHROUGH 4
186
187#define IVTV_MAX_PGM_INDEX (400)
188
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189/* Default I2C SCL period in microseconds */
190#define IVTV_DEFAULT_I2C_CLOCK_PERIOD 20
191
1a0adaf3 192struct ivtv_options {
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193 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
194 int cardtype; /* force card type on load */
195 int tuner; /* set tuner on load */
196 int radio; /* enable/disable radio */
197 int newi2c; /* new I2C algorithm */
f412d36a 198 int i2c_clock_period; /* period of SCL for I2C bus */
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199};
200
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201/* ivtv-specific mailbox template */
202struct ivtv_mailbox {
203 u32 flags;
204 u32 cmd;
205 u32 retval;
206 u32 timeout;
207 u32 data[CX2341X_MBOX_MAX_DATA];
208};
209
210struct ivtv_api_cache {
211 unsigned long last_jiffies; /* when last command was issued */
212 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
213};
214
215struct ivtv_mailbox_data {
216 volatile struct ivtv_mailbox __iomem *mbox;
217 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
218 If the bit is set, then the corresponding mailbox is in use by the driver. */
219 unsigned long busy;
220 u8 max_mbox;
221};
222
223/* per-buffer bit flags */
f4071b85 224#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
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225
226/* per-stream, s_flags */
227#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
228#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
229#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
230
231#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
232#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
233#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
234#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
235#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
236#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
237
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238#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
239#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
240
1a0adaf3 241/* per-ivtv, i_flags */
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242#define IVTV_F_I_DMA 0 /* DMA in progress */
243#define IVTV_F_I_UDMA 1 /* UDMA in progress */
244#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
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245#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
246#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
247#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
248#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
1e13f9e3 249#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
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250#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
251#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
252#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
253#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
254#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
1a0adaf3 255#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
a158f355 256#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
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257#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
258#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
259#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
260#define IVTV_F_I_PIO 19 /* PIO in progress */
ac425144 261#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
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262#define IVTV_F_I_INITED 21 /* set after first open */
263#define IVTV_F_I_FAILED 22 /* set if first open failed */
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264
265/* Event notifications */
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266#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
267#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
268#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
269#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
1a0adaf3
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270
271/* Scatter-Gather array element, used in DMA transfers */
37093b1e 272struct ivtv_sg_element {
b0510f8d
AV
273 __le32 src;
274 __le32 dst;
275 __le32 size;
276};
277
278struct ivtv_sg_host_element {
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279 u32 src;
280 u32 dst;
281 u32 size;
282};
283
284struct ivtv_user_dma {
285 struct mutex lock;
286 int page_count;
287 struct page *map[IVTV_DMA_SG_OSD_ENT];
0989fd2c
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288 /* Needed when dealing with highmem userspace buffers */
289 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
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290
291 /* Base Dev SG Array for cx23415/6 */
37093b1e 292 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
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293 dma_addr_t SG_handle;
294 int SG_length;
295
296 /* SG List of Buffers */
297 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
298};
299
300struct ivtv_dma_page_info {
301 unsigned long uaddr;
302 unsigned long first;
303 unsigned long last;
304 unsigned int offset;
305 unsigned int tail;
306 int page_count;
307};
308
309struct ivtv_buffer {
310 struct list_head list;
311 dma_addr_t dma_handle;
f4071b85
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312 unsigned short b_flags;
313 unsigned short dma_xfer_cnt;
1a0adaf3 314 char *buf;
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315 u32 bytesused;
316 u32 readpos;
317};
318
319struct ivtv_queue {
a158f355
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320 struct list_head list; /* the list of buffers in this queue */
321 u32 buffers; /* number of buffers in this queue */
322 u32 length; /* total number of bytes of available buffer space */
323 u32 bytesused; /* total number of bytes used in this queue */
1a0adaf3
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324};
325
a158f355 326struct ivtv; /* forward reference */
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327
328struct ivtv_stream {
329 /* These first four fields are always set, even if the stream
330 is not actually created. */
8ac05ae3 331 struct video_device *vdev; /* NULL when stream not created */
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332 struct ivtv *itv; /* for ease of use */
333 const char *name; /* name of the stream */
334 int type; /* stream type */
335
336 u32 id;
a158f355
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337 spinlock_t qlock; /* locks access to the queues */
338 unsigned long s_flags; /* status flags, see above */
339 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
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340 u32 pending_offset;
341 u32 pending_backup;
342 u64 pending_pts;
343
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344 u32 dma_offset;
345 u32 dma_backup;
346 u64 dma_pts;
347
348 int subtype;
349 wait_queue_head_t waitq;
350 u32 dma_last_offset;
351
352 /* Buffer Stats */
353 u32 buffers;
354 u32 buf_size;
355 u32 buffers_stolen;
356
357 /* Buffer Queues */
358 struct ivtv_queue q_free; /* free buffers */
359 struct ivtv_queue q_full; /* full buffers */
360 struct ivtv_queue q_io; /* waiting for I/O */
361 struct ivtv_queue q_dma; /* waiting for DMA */
362 struct ivtv_queue q_predma; /* waiting for DMA */
363
f4071b85
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364 /* DMA xfer counter, buffers belonging to the same DMA
365 xfer will have the same dma_xfer_cnt. */
366 u16 dma_xfer_cnt;
367
1a0adaf3 368 /* Base Dev SG Array for cx23415/6 */
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369 struct ivtv_sg_host_element *sg_pending;
370 struct ivtv_sg_host_element *sg_processing;
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371 struct ivtv_sg_element *sg_dma;
372 dma_addr_t sg_handle;
373 int sg_pending_size;
374 int sg_processing_size;
375 int sg_processed;
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376
377 /* SG List of Buffers */
378 struct scatterlist *SGlist;
379};
380
381struct ivtv_open_id {
09250193 382 struct v4l2_fh fh;
a158f355
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383 u32 open_id; /* unique ID for this file descriptor */
384 int type; /* stream type */
385 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
386 enum v4l2_priority prio; /* priority */
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387 struct ivtv *itv;
388};
389
09250193
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390static inline struct ivtv_open_id *fh2id(struct v4l2_fh *fh)
391{
392 return container_of(fh, struct ivtv_open_id, fh);
393}
394
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395struct yuv_frame_info
396{
397 u32 update;
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398 s32 src_x;
399 s32 src_y;
400 u32 src_w;
401 u32 src_h;
402 s32 dst_x;
403 s32 dst_y;
404 u32 dst_w;
405 u32 dst_h;
406 s32 pan_x;
407 s32 pan_y;
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408 u32 vis_w;
409 u32 vis_h;
410 u32 interlaced_y;
411 u32 interlaced_uv;
33c0fcad 412 s32 tru_x;
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413 u32 tru_w;
414 u32 tru_h;
415 u32 offset_y;
33c0fcad 416 s32 lace_mode;
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417 u32 sync_field;
418 u32 delay;
419 u32 interlaced;
1a0adaf3
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420};
421
422#define IVTV_YUV_MODE_INTERLACED 0x00
423#define IVTV_YUV_MODE_PROGRESSIVE 0x01
424#define IVTV_YUV_MODE_AUTO 0x02
425#define IVTV_YUV_MODE_MASK 0x03
426
427#define IVTV_YUV_SYNC_EVEN 0x00
428#define IVTV_YUV_SYNC_ODD 0x04
429#define IVTV_YUV_SYNC_MASK 0x04
430
a3e5f5e2
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431#define IVTV_YUV_BUFFERS 8
432
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433struct yuv_playback_info
434{
435 u32 reg_2834;
436 u32 reg_2838;
437 u32 reg_283c;
438 u32 reg_2840;
439 u32 reg_2844;
440 u32 reg_2848;
441 u32 reg_2854;
442 u32 reg_285c;
443 u32 reg_2864;
444
445 u32 reg_2870;
446 u32 reg_2874;
447 u32 reg_2890;
448 u32 reg_2898;
449 u32 reg_289c;
450
451 u32 reg_2918;
452 u32 reg_291c;
453 u32 reg_2920;
454 u32 reg_2924;
455 u32 reg_2928;
456 u32 reg_292c;
457 u32 reg_2930;
458
459 u32 reg_2934;
460
461 u32 reg_2938;
462 u32 reg_293c;
463 u32 reg_2940;
464 u32 reg_2944;
465 u32 reg_2948;
466 u32 reg_294c;
467 u32 reg_2950;
468 u32 reg_2954;
469 u32 reg_2958;
470 u32 reg_295c;
471 u32 reg_2960;
472 u32 reg_2964;
473 u32 reg_2968;
474 u32 reg_296c;
475
476 u32 reg_2970;
477
478 int v_filter_1;
479 int v_filter_2;
480 int h_filter;
481
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482 u8 track_osd; /* Should yuv output track the OSD size & position */
483
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484 u32 osd_x_offset;
485 u32 osd_y_offset;
486
487 u32 osd_x_pan;
488 u32 osd_y_pan;
489
490 u32 osd_vis_w;
491 u32 osd_vis_h;
492
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493 u32 osd_full_w;
494 u32 osd_full_h;
495
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496 int decode_height;
497
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498 int lace_mode;
499 int lace_threshold;
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500 int lace_sync_field;
501
502 atomic_t next_dma_frame;
503 atomic_t next_fill_frame;
504
505 u32 yuv_forced_update;
506 int update_frame;
bfd7beac 507
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IA
508 u8 fields_lapsed; /* Counter used when delaying a frame */
509
a3e5f5e2 510 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
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511 struct yuv_frame_info old_frame_info;
512 struct yuv_frame_info old_frame_info_args;
513
514 void *blanking_ptr;
515 dma_addr_t blanking_dmaptr;
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516
517 int stream_size;
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518
519 u8 draw_frame; /* PVR350 buffer to draw into */
520 u8 max_frames_buffered; /* Maximum number of frames to buffer */
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521
522 struct v4l2_rect main_rect;
523 u32 v4l2_src_w;
524 u32 v4l2_src_h;
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525
526 u8 running; /* Have any frames been displayed */
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527};
528
529#define IVTV_VBI_FRAMES 32
530
531/* VBI data */
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532struct vbi_cc {
533 u8 odd[2]; /* two-byte payload of odd field */
534 u8 even[2]; /* two-byte payload of even field */;
535};
536
537struct vbi_vps {
538 u8 data[5]; /* five-byte VPS payload */
539};
540
1a0adaf3 541struct vbi_info {
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542 /* VBI general data, does not change during streaming */
543
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544 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
545 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
546 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
547 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
548 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
549 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
550
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551 u32 start[2]; /* start of first VBI line in the odd/even fields */
552 u32 count; /* number of VBI lines per field */
553 u32 raw_size; /* size of raw VBI line from the digitizer */
554 u32 sliced_size; /* size of sliced VBI line from the digitizer */
555
556 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
557 u32 enc_start; /* start in encoder memory of VBI capture buffers */
558 u32 enc_size; /* size of VBI capture area */
559 int fpi; /* number of VBI frames per interrupt */
560
561 struct v4l2_format in; /* current VBI capture format */
562 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
563 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
564
565 /* Raw VBI compatibility hack */
566
567 u32 frame; /* frame counter hack needed for backwards compatibility
568 of old VBI software */
569
570 /* Sliced VBI output data */
571
572 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
2f3a9893 573 prevent dropping CC data if they couldn't be
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574 processed fast enough */
575 int cc_payload_idx; /* index in cc_payload */
576 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
577 int wss_payload; /* sliced VBI WSS payload */
578 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
579 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
580
581 /* Sliced VBI capture data */
582
583 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
584 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
585
586 /* VBI Embedding data */
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587
588 /* Buffer for VBI data inserted into MPEG stream.
589 The first byte is a dummy byte that's never used.
590 The next 16 bytes contain the MPEG header for the VBI data,
591 the remainder is the actual VBI data.
592 The max size accepted by the MPEG VBI reinsertion turns out
593 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
594 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
595 a single line header byte and 2 * 18 is the number of VBI lines per frame.
596
597 However, it seems that the data must be 1K aligned, so we have to
598 pad the data until the 1 or 2 K boundary.
599
600 This pointer array will allocate 2049 bytes to store each VBI frame. */
601 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
602 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
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603 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
604 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
605 to be inserted in the MPEG stream */
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606};
607
608/* forward declaration of struct defined in ivtv-cards.h */
609struct ivtv_card;
610
611/* Struct to hold info about ivtv cards */
612struct ivtv {
fd8b281a 613 /* General fixed card data */
8ac05ae3 614 struct pci_dev *pdev; /* PCI device */
1a0adaf3 615 const struct ivtv_card *card; /* card information */
fd8b281a 616 const char *card_name; /* full name of the card */
d9009201 617 const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
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618 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
619 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
620 u8 nof_inputs; /* number of video inputs */
621 u8 nof_audio_inputs; /* number of audio inputs */
622 u32 v4l2_cap; /* V4L2 capabilities of card */
623 u32 hw_flags; /* hardware description of the board */
fd8b281a 624 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
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625 struct v4l2_subdev *sd_video; /* controlling video decoder subdev */
626 struct v4l2_subdev *sd_audio; /* controlling audio subdev */
627 struct v4l2_subdev *sd_muxer; /* controlling audio muxer subdev */
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628 u32 base_addr; /* PCI resource base address */
629 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
630 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
631 volatile void __iomem *reg_mem; /* pointer to mapped registers */
632 struct ivtv_options options; /* user options */
633
8ac05ae3 634 struct v4l2_device v4l2_dev;
f7b80e69 635 struct cx2341x_handler cxhdl;
2fd78144 636 struct v4l2_ctrl_handler hdl_gpio;
f7b80e69 637 struct v4l2_subdev sd_gpio; /* GPIO sub-device */
67ec09fd 638 u16 instance;
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639
640 /* High-level state info */
641 unsigned long i_flags; /* global ivtv flags */
642 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
643 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
644 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
645 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
646 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
647 u32 audio_input; /* current audio input */
648 u32 active_input; /* current video input */
649 u32 active_output; /* current video output */
650 v4l2_std_id std; /* current capture TV standard */
651 v4l2_std_id std_out; /* current TV output standard */
652 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
653 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
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654
655
656 /* Locking */
657 spinlock_t lock; /* lock access to this struct */
a158f355 658 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
fd8b281a 659
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660 /* Streams */
661 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
662 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
663 atomic_t capturing; /* count number of active capture streams */
664 atomic_t decoding; /* count number of active decoding streams */
665
666
667 /* Interrupts & DMA */
668 u32 irqmask; /* active interrupts */
669 u32 irq_rr_idx; /* round-robin stream index */
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670 struct kthread_worker irq_worker; /* kthread worker for PIO/YUV/VBI actions */
671 struct task_struct *irq_worker_task; /* task for irq_worker */
672 struct kthread_work irq_work; /* kthread work entry */
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673 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
674 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
675 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
676 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
677 u32 dma_data_req_size; /* store size of current DMA request */
678 int dma_retries; /* current DMA retry attempt */
679 struct ivtv_user_dma udma; /* user based DMA for OSD */
680 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
a158f355 681 u32 last_vsync_field; /* last seen vsync field */
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682 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
683 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
684 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
685 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
686
687
688 /* Mailbox */
689 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
690 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
691 struct ivtv_api_cache api_cache[256]; /* cached API commands */
692
693
694 /* I2C */
695 struct i2c_adapter i2c_adap;
696 struct i2c_algo_bit_data i2c_algo;
697 struct i2c_client i2c_client;
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698 int i2c_state; /* i2c bit state */
699 struct mutex i2c_bus_lock; /* lock i2c bus */
700
ad2fe2d4 701 struct IR_i2c_init_data ir_i2c_init_data;
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702
703 /* Program Index information */
704 u32 pgm_info_offset; /* start of pgm info in encoder memory */
705 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
706 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
707 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
708 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
709
710
711 /* Miscellaneous */
712 u32 open_id; /* incremented each time an open occurs, is >= 1 */
713 struct v4l2_prio_state prio; /* priority state */
714 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
715 int speed; /* current playback speed setting */
716 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
717 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
718 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
719 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
720 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
0d82fe80 721 u32 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
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722
723
724 /* VBI state info */
725 struct vbi_info vbi; /* VBI-specific data */
726
727
728 /* YUV playback */
729 struct yuv_playback_info yuv_info; /* YUV playback data */
1a0adaf3 730
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731
732 /* OSD support */
733 unsigned long osd_video_pbase;
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734 int osd_global_alpha_state; /* 1 = global alpha is on */
735 int osd_local_alpha_state; /* 1 = local alpha is on */
736 int osd_chroma_key_state; /* 1 = chroma-keying is on */
737 u8 osd_global_alpha; /* current global alpha */
738 u32 osd_chroma_key; /* current chroma key */
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739 struct v4l2_rect osd_rect; /* current OSD position and size */
740 struct v4l2_rect main_rect; /* current Main window position and size */
7b3a0d49 741 struct osd_info *osd_info; /* ivtvfb private OSD info */
215659d1 742 void (*ivtvfb_restore)(struct ivtv *itv); /* Used for a warm start */
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743};
744
8ac05ae3 745static inline struct ivtv *to_ivtv(struct v4l2_device *v4l2_dev)
67ec09fd 746{
8ac05ae3 747 return container_of(v4l2_dev, struct ivtv, v4l2_dev);
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748}
749
1a0adaf3 750/* Globals */
1a0adaf3 751extern int ivtv_first_minor;
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752
753/*==============Prototypes==================*/
754
755/* Hardware/IRQ */
756void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
757void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
758
759/* try to set output mode, return current mode. */
760int ivtv_set_output_mode(struct ivtv *itv, int mode);
761
762/* return current output stream based on current mode */
763struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
764
765/* Return non-zero if a signal is pending */
201700d3 766int ivtv_msleep_timeout(unsigned int msecs, int intr);
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767
768/* Wait on queue, returns -EINTR if interrupted */
769int ivtv_waitq(wait_queue_head_t *waitq);
770
771/* Read Hauppauge eeprom */
772struct tveeprom; /* forward reference */
773void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
774
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775/* First-open initialization: load firmware, init cx25840, etc. */
776int ivtv_init_on_first_open(struct ivtv *itv);
777
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778/* Test if the current VBI mode is raw (1) or sliced (0) */
779static inline int ivtv_raw_vbi(const struct ivtv *itv)
780{
781 return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
782}
783
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784/* This is a PCI post thing, where if the pci register is not read, then
785 the write doesn't always take effect right away. By reading back the
786 register any pending PCI writes will be performed (in order), and so
787 you can be sure that the writes are guaranteed to be done.
788
789 Rarely needed, only in some timing sensitive cases.
790 Apparently if this is not done some motherboards seem
791 to kill the firmware and get into the broken state until computer is
792 rebooted. */
793#define write_sync(val, reg) \
794 do { writel(val, reg); readl(reg); } while (0)
795
796#define read_reg(reg) readl(itv->reg_mem + (reg))
797#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
798#define write_reg_sync(val, reg) \
799 do { write_reg(val, reg); read_reg(reg); } while (0)
800
801#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
802#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
803#define write_enc_sync(val, addr) \
804 do { write_enc(val, addr); read_enc(addr); } while (0)
805
806#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
807#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
808#define write_dec_sync(val, addr) \
809 do { write_dec(val, addr); read_dec(addr); } while (0)
810
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811/* Call the specified callback for all subdevs matching hw (if 0, then
812 match them all). Ignore any errors. */
813#define ivtv_call_hw(itv, hw, o, f, args...) \
8ac05ae3 814 __v4l2_device_call_subdevs(&(itv)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
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815
816#define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)
817
818/* Call the specified callback for all subdevs matching hw (if 0, then
819 match them all). If the callback returns an error other than 0 or
820 -ENOIOCTLCMD, then return with that error code. */
821#define ivtv_call_hw_err(itv, hw, o, f, args...) \
8ac05ae3 822 __v4l2_device_call_subdevs_until_err(&(itv)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
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823
824#define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)
825
612570f2 826#endif
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