V4L/DVB (6764): ivtv: select VIDEO_IR in Kconfig
[deliverable/linux.git] / drivers / media / video / ivtv / ivtv-driver.h
CommitLineData
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1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39#include <linux/version.h>
40#include <linux/module.h>
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41#include <linux/init.h>
42#include <linux/delay.h>
43#include <linux/sched.h>
44#include <linux/fs.h>
45#include <linux/pci.h>
46#include <linux/interrupt.h>
47#include <linux/spinlock.h>
48#include <linux/i2c.h>
49#include <linux/i2c-algo-bit.h>
50#include <linux/list.h>
51#include <linux/unistd.h>
52#include <linux/byteorder/swab.h>
53#include <linux/pagemap.h>
11763609 54#include <linux/scatterlist.h>
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55#include <linux/workqueue.h>
56#include <linux/mutex.h>
57#include <asm/uaccess.h>
58#include <asm/system.h>
59
60#include <linux/dvb/video.h>
61#include <linux/dvb/audio.h>
62#include <media/v4l2-common.h>
63#include <media/tuner.h>
64#include <media/cx2341x.h>
65
51b39dfa 66#include <linux/ivtv.h>
1a0adaf3 67
37297805 68
33c0fcad 69/* Memory layout */
1a0adaf3 70#define IVTV_ENCODER_OFFSET 0x00000000
33c0fcad 71#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3 72#define IVTV_DECODER_OFFSET 0x01000000
33c0fcad 73#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
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74#define IVTV_REG_OFFSET 0x02000000
75#define IVTV_REG_SIZE 0x00010000
76
32db7754
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77/* Maximum ivtv driver instances. Some people have a huge number of
78 capture cards, so set this to a high value. */
79#define IVTV_MAX_CARDS 32
1a0adaf3 80
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81#define IVTV_ENC_STREAM_TYPE_MPG 0
82#define IVTV_ENC_STREAM_TYPE_YUV 1
83#define IVTV_ENC_STREAM_TYPE_VBI 2
84#define IVTV_ENC_STREAM_TYPE_PCM 3
85#define IVTV_ENC_STREAM_TYPE_RAD 4
86#define IVTV_DEC_STREAM_TYPE_MPG 5
87#define IVTV_DEC_STREAM_TYPE_VBI 6
88#define IVTV_DEC_STREAM_TYPE_VOUT 7
89#define IVTV_DEC_STREAM_TYPE_YUV 8
90#define IVTV_MAX_STREAMS 9
91
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92#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
93
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94/* DMA Registers */
95#define IVTV_REG_DMAXFER (0x0000)
96#define IVTV_REG_DMASTATUS (0x0004)
97#define IVTV_REG_DECDMAADDR (0x0008)
98#define IVTV_REG_ENCDMAADDR (0x000c)
99#define IVTV_REG_DMACONTROL (0x0010)
100#define IVTV_REG_IRQSTATUS (0x0040)
101#define IVTV_REG_IRQMASK (0x0048)
102
103/* Setup Registers */
104#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
105#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
106#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
107#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
108#define IVTV_REG_VDM (0x2800)
109#define IVTV_REG_AO (0x2D00)
110#define IVTV_REG_BYTEFLUSH (0x2D24)
111#define IVTV_REG_SPU (0x9050)
112#define IVTV_REG_HW_BLOCKS (0x9054)
113#define IVTV_REG_VPU (0x9058)
114#define IVTV_REG_APU (0xA064)
115
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116/* i2c stuff */
117#define I2C_CLIENTS_MAX 16
118
119/* debugging */
33c0fcad 120extern int ivtv_debug;
1a0adaf3 121
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122#define IVTV_DBGFLG_WARN (1 << 0)
123#define IVTV_DBGFLG_INFO (1 << 1)
124#define IVTV_DBGFLG_MB (1 << 2)
125#define IVTV_DBGFLG_IOCTL (1 << 3)
126#define IVTV_DBGFLG_FILE (1 << 4)
127#define IVTV_DBGFLG_DMA (1 << 5)
128#define IVTV_DBGFLG_IRQ (1 << 6)
129#define IVTV_DBGFLG_DEC (1 << 7)
130#define IVTV_DBGFLG_YUV (1 << 8)
131#define IVTV_DBGFLG_I2C (1 << 9)
bd58df6d 132/* Flag to turn on high volume debugging */
1aa32c2f 133#define IVTV_DBGFLG_HIGHVOL (1 << 10)
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134
135/* NOTE: extra space before comma in 'itv->num , ## args' is required for
136 gcc-2.95, otherwise it won't compile. */
137#define IVTV_DEBUG(x, type, fmt, args...) \
138 do { \
139 if ((x) & ivtv_debug) \
140 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
141 } while (0)
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142#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
143#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
144#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
145#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
1a0adaf3 146#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
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147#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
148#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
149#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
150#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
151#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
1a0adaf3 152
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153#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
154 do { \
155 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
156 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
157 } while (0)
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158#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
159#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
160#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
161#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
bd58df6d 162#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
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163#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
164#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
165#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
166#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
167#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
bd58df6d 168
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169/* Standard kernel messages */
170#define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
171#define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
172#define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
1a0adaf3 173
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174/* output modes (cx23415 only) */
175#define OUT_NONE 0
176#define OUT_MPG 1
177#define OUT_YUV 2
178#define OUT_UDMA_YUV 3
179#define OUT_PASSTHROUGH 4
180
181#define IVTV_MAX_PGM_INDEX (400)
182
1a0adaf3 183struct ivtv_options {
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184 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
185 int cardtype; /* force card type on load */
186 int tuner; /* set tuner on load */
187 int radio; /* enable/disable radio */
188 int newi2c; /* new I2C algorithm */
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189};
190
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191/* ivtv-specific mailbox template */
192struct ivtv_mailbox {
193 u32 flags;
194 u32 cmd;
195 u32 retval;
196 u32 timeout;
197 u32 data[CX2341X_MBOX_MAX_DATA];
198};
199
200struct ivtv_api_cache {
201 unsigned long last_jiffies; /* when last command was issued */
202 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
203};
204
205struct ivtv_mailbox_data {
206 volatile struct ivtv_mailbox __iomem *mbox;
207 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
208 If the bit is set, then the corresponding mailbox is in use by the driver. */
209 unsigned long busy;
210 u8 max_mbox;
211};
212
213/* per-buffer bit flags */
f4071b85 214#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
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215
216/* per-stream, s_flags */
217#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
218#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
219#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
220
221#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
222#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
223#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
224#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
225#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
226#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
227
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228#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
229#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
230
1a0adaf3 231/* per-ivtv, i_flags */
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232#define IVTV_F_I_DMA 0 /* DMA in progress */
233#define IVTV_F_I_UDMA 1 /* UDMA in progress */
234#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
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235#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
236#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
237#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
238#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
1e13f9e3 239#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
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240#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
241#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
242#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
243#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
244#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
1a0adaf3 245#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
a158f355 246#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
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247#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
248#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
249#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
250#define IVTV_F_I_PIO 19 /* PIO in progress */
ac425144 251#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
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252#define IVTV_F_I_INITED 21 /* set after first open */
253#define IVTV_F_I_FAILED 22 /* set if first open failed */
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254
255/* Event notifications */
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256#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
257#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
258#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
259#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
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260
261/* Scatter-Gather array element, used in DMA transfers */
37093b1e 262struct ivtv_sg_element {
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263 u32 src;
264 u32 dst;
265 u32 size;
266};
267
268struct ivtv_user_dma {
269 struct mutex lock;
270 int page_count;
271 struct page *map[IVTV_DMA_SG_OSD_ENT];
0989fd2c
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272 /* Needed when dealing with highmem userspace buffers */
273 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
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274
275 /* Base Dev SG Array for cx23415/6 */
37093b1e 276 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
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277 dma_addr_t SG_handle;
278 int SG_length;
279
280 /* SG List of Buffers */
281 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
282};
283
284struct ivtv_dma_page_info {
285 unsigned long uaddr;
286 unsigned long first;
287 unsigned long last;
288 unsigned int offset;
289 unsigned int tail;
290 int page_count;
291};
292
293struct ivtv_buffer {
294 struct list_head list;
295 dma_addr_t dma_handle;
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296 unsigned short b_flags;
297 unsigned short dma_xfer_cnt;
1a0adaf3 298 char *buf;
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299 u32 bytesused;
300 u32 readpos;
301};
302
303struct ivtv_queue {
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304 struct list_head list; /* the list of buffers in this queue */
305 u32 buffers; /* number of buffers in this queue */
306 u32 length; /* total number of bytes of available buffer space */
307 u32 bytesused; /* total number of bytes used in this queue */
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308};
309
a158f355 310struct ivtv; /* forward reference */
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311
312struct ivtv_stream {
313 /* These first four fields are always set, even if the stream
314 is not actually created. */
315 struct video_device *v4l2dev; /* NULL when stream not created */
316 struct ivtv *itv; /* for ease of use */
317 const char *name; /* name of the stream */
318 int type; /* stream type */
319
320 u32 id;
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321 spinlock_t qlock; /* locks access to the queues */
322 unsigned long s_flags; /* status flags, see above */
323 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
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324 u32 pending_offset;
325 u32 pending_backup;
326 u64 pending_pts;
327
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328 u32 dma_offset;
329 u32 dma_backup;
330 u64 dma_pts;
331
332 int subtype;
333 wait_queue_head_t waitq;
334 u32 dma_last_offset;
335
336 /* Buffer Stats */
337 u32 buffers;
338 u32 buf_size;
339 u32 buffers_stolen;
340
341 /* Buffer Queues */
342 struct ivtv_queue q_free; /* free buffers */
343 struct ivtv_queue q_full; /* full buffers */
344 struct ivtv_queue q_io; /* waiting for I/O */
345 struct ivtv_queue q_dma; /* waiting for DMA */
346 struct ivtv_queue q_predma; /* waiting for DMA */
347
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348 /* DMA xfer counter, buffers belonging to the same DMA
349 xfer will have the same dma_xfer_cnt. */
350 u16 dma_xfer_cnt;
351
1a0adaf3 352 /* Base Dev SG Array for cx23415/6 */
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353 struct ivtv_sg_element *sg_pending;
354 struct ivtv_sg_element *sg_processing;
355 struct ivtv_sg_element *sg_dma;
356 dma_addr_t sg_handle;
357 int sg_pending_size;
358 int sg_processing_size;
359 int sg_processed;
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360
361 /* SG List of Buffers */
362 struct scatterlist *SGlist;
363};
364
365struct ivtv_open_id {
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366 u32 open_id; /* unique ID for this file descriptor */
367 int type; /* stream type */
368 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
369 enum v4l2_priority prio; /* priority */
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370 struct ivtv *itv;
371};
372
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373struct yuv_frame_info
374{
375 u32 update;
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376 s32 src_x;
377 s32 src_y;
378 u32 src_w;
379 u32 src_h;
380 s32 dst_x;
381 s32 dst_y;
382 u32 dst_w;
383 u32 dst_h;
384 s32 pan_x;
385 s32 pan_y;
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386 u32 vis_w;
387 u32 vis_h;
388 u32 interlaced_y;
389 u32 interlaced_uv;
33c0fcad 390 s32 tru_x;
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391 u32 tru_w;
392 u32 tru_h;
393 u32 offset_y;
33c0fcad 394 s32 lace_mode;
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395 u32 sync_field;
396 u32 delay;
397 u32 interlaced;
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398};
399
400#define IVTV_YUV_MODE_INTERLACED 0x00
401#define IVTV_YUV_MODE_PROGRESSIVE 0x01
402#define IVTV_YUV_MODE_AUTO 0x02
403#define IVTV_YUV_MODE_MASK 0x03
404
405#define IVTV_YUV_SYNC_EVEN 0x00
406#define IVTV_YUV_SYNC_ODD 0x04
407#define IVTV_YUV_SYNC_MASK 0x04
408
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409#define IVTV_YUV_BUFFERS 8
410
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411struct yuv_playback_info
412{
413 u32 reg_2834;
414 u32 reg_2838;
415 u32 reg_283c;
416 u32 reg_2840;
417 u32 reg_2844;
418 u32 reg_2848;
419 u32 reg_2854;
420 u32 reg_285c;
421 u32 reg_2864;
422
423 u32 reg_2870;
424 u32 reg_2874;
425 u32 reg_2890;
426 u32 reg_2898;
427 u32 reg_289c;
428
429 u32 reg_2918;
430 u32 reg_291c;
431 u32 reg_2920;
432 u32 reg_2924;
433 u32 reg_2928;
434 u32 reg_292c;
435 u32 reg_2930;
436
437 u32 reg_2934;
438
439 u32 reg_2938;
440 u32 reg_293c;
441 u32 reg_2940;
442 u32 reg_2944;
443 u32 reg_2948;
444 u32 reg_294c;
445 u32 reg_2950;
446 u32 reg_2954;
447 u32 reg_2958;
448 u32 reg_295c;
449 u32 reg_2960;
450 u32 reg_2964;
451 u32 reg_2968;
452 u32 reg_296c;
453
454 u32 reg_2970;
455
456 int v_filter_1;
457 int v_filter_2;
458 int h_filter;
459
460 u32 osd_x_offset;
461 u32 osd_y_offset;
462
463 u32 osd_x_pan;
464 u32 osd_y_pan;
465
466 u32 osd_vis_w;
467 u32 osd_vis_h;
468
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469 u32 osd_full_w;
470 u32 osd_full_h;
471
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472 int decode_height;
473
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474 int lace_mode;
475 int lace_threshold;
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476 int lace_sync_field;
477
478 atomic_t next_dma_frame;
479 atomic_t next_fill_frame;
480
481 u32 yuv_forced_update;
482 int update_frame;
bfd7beac 483
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484 u8 fields_lapsed; /* Counter used when delaying a frame */
485
a3e5f5e2 486 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
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487 struct yuv_frame_info old_frame_info;
488 struct yuv_frame_info old_frame_info_args;
489
490 void *blanking_ptr;
491 dma_addr_t blanking_dmaptr;
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492
493 int stream_size;
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494
495 u8 draw_frame; /* PVR350 buffer to draw into */
496 u8 max_frames_buffered; /* Maximum number of frames to buffer */
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497
498 struct v4l2_rect main_rect;
499 u32 v4l2_src_w;
500 u32 v4l2_src_h;
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501};
502
503#define IVTV_VBI_FRAMES 32
504
505/* VBI data */
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506struct vbi_cc {
507 u8 odd[2]; /* two-byte payload of odd field */
508 u8 even[2]; /* two-byte payload of even field */;
509};
510
511struct vbi_vps {
512 u8 data[5]; /* five-byte VPS payload */
513};
514
1a0adaf3 515struct vbi_info {
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516 /* VBI general data, does not change during streaming */
517
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518 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
519 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
520 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
521 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
522 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
523 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
524
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525 u32 start[2]; /* start of first VBI line in the odd/even fields */
526 u32 count; /* number of VBI lines per field */
527 u32 raw_size; /* size of raw VBI line from the digitizer */
528 u32 sliced_size; /* size of sliced VBI line from the digitizer */
529
530 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
531 u32 enc_start; /* start in encoder memory of VBI capture buffers */
532 u32 enc_size; /* size of VBI capture area */
533 int fpi; /* number of VBI frames per interrupt */
534
535 struct v4l2_format in; /* current VBI capture format */
536 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
537 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
538
539 /* Raw VBI compatibility hack */
540
541 u32 frame; /* frame counter hack needed for backwards compatibility
542 of old VBI software */
543
544 /* Sliced VBI output data */
545
546 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
2f3a9893 547 prevent dropping CC data if they couldn't be
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548 processed fast enough */
549 int cc_payload_idx; /* index in cc_payload */
550 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
551 int wss_payload; /* sliced VBI WSS payload */
552 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
553 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
554
555 /* Sliced VBI capture data */
556
557 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
558 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
559
560 /* VBI Embedding data */
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561
562 /* Buffer for VBI data inserted into MPEG stream.
563 The first byte is a dummy byte that's never used.
564 The next 16 bytes contain the MPEG header for the VBI data,
565 the remainder is the actual VBI data.
566 The max size accepted by the MPEG VBI reinsertion turns out
567 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
568 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
569 a single line header byte and 2 * 18 is the number of VBI lines per frame.
570
571 However, it seems that the data must be 1K aligned, so we have to
572 pad the data until the 1 or 2 K boundary.
573
574 This pointer array will allocate 2049 bytes to store each VBI frame. */
575 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
576 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
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577 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
578 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
579 to be inserted in the MPEG stream */
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580};
581
582/* forward declaration of struct defined in ivtv-cards.h */
583struct ivtv_card;
584
585/* Struct to hold info about ivtv cards */
586struct ivtv {
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587 /* General fixed card data */
588 int num; /* board number, -1 during init! */
589 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
590 struct pci_dev *dev; /* PCI device */
1a0adaf3 591 const struct ivtv_card *card; /* card information */
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592 const char *card_name; /* full name of the card */
593 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
594 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
595 u8 nof_inputs; /* number of video inputs */
596 u8 nof_audio_inputs; /* number of audio inputs */
597 u32 v4l2_cap; /* V4L2 capabilities of card */
598 u32 hw_flags; /* hardware description of the board */
599 int tunerid; /* userspace tuner ID for experimental Xceive tuner support */
600 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
601 /* controlling video decoder function */
1a0adaf3 602 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
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603 u32 base_addr; /* PCI resource base address */
604 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
605 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
606 volatile void __iomem *reg_mem; /* pointer to mapped registers */
607 struct ivtv_options options; /* user options */
608
609
610 /* High-level state info */
611 unsigned long i_flags; /* global ivtv flags */
612 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
613 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
614 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
615 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
616 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
617 u32 audio_input; /* current audio input */
618 u32 active_input; /* current video input */
619 u32 active_output; /* current video output */
620 v4l2_std_id std; /* current capture TV standard */
621 v4l2_std_id std_out; /* current TV output standard */
622 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
623 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
624 struct cx2341x_mpeg_params params; /* current encoder parameters */
625
626
627 /* Locking */
628 spinlock_t lock; /* lock access to this struct */
a158f355 629 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
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630
631
632 /* Streams */
633 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
634 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
635 atomic_t capturing; /* count number of active capture streams */
636 atomic_t decoding; /* count number of active decoding streams */
637
638
639 /* Interrupts & DMA */
640 u32 irqmask; /* active interrupts */
641 u32 irq_rr_idx; /* round-robin stream index */
642 struct workqueue_struct *irq_work_queues; /* workqueue for PIO/YUV/VBI actions */
643 struct work_struct irq_work_queue; /* work entry */
644 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
645 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
646 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
647 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
648 u32 dma_data_req_size; /* store size of current DMA request */
649 int dma_retries; /* current DMA retry attempt */
650 struct ivtv_user_dma udma; /* user based DMA for OSD */
651 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
a158f355 652 u32 last_vsync_field; /* last seen vsync field */
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653 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
654 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
655 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
656 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
657
658
659 /* Mailbox */
660 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
661 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
662 struct ivtv_api_cache api_cache[256]; /* cached API commands */
663
664
665 /* I2C */
666 struct i2c_adapter i2c_adap;
667 struct i2c_algo_bit_data i2c_algo;
668 struct i2c_client i2c_client;
669 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];/* pointers to all I2C clients */
670 int i2c_state; /* i2c bit state */
671 struct mutex i2c_bus_lock; /* lock i2c bus */
672
673
674 /* Program Index information */
675 u32 pgm_info_offset; /* start of pgm info in encoder memory */
676 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
677 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
678 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
679 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
680
681
682 /* Miscellaneous */
683 u32 open_id; /* incremented each time an open occurs, is >= 1 */
684 struct v4l2_prio_state prio; /* priority state */
685 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
686 int speed; /* current playback speed setting */
687 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
688 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
689 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
690 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
691 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
692 u16 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
693
694
695 /* VBI state info */
696 struct vbi_info vbi; /* VBI-specific data */
697
698
699 /* YUV playback */
700 struct yuv_playback_info yuv_info; /* YUV playback data */
1a0adaf3 701
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702
703 /* OSD support */
704 unsigned long osd_video_pbase;
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705 int osd_global_alpha_state; /* 1 = global alpha is on */
706 int osd_local_alpha_state; /* 1 = local alpha is on */
707 int osd_chroma_key_state; /* 1 = chroma-keying is on */
708 u8 osd_global_alpha; /* current global alpha */
709 u32 osd_chroma_key; /* current chroma key */
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710 struct v4l2_rect osd_rect; /* current OSD position and size */
711 struct v4l2_rect main_rect; /* current Main window position and size */
7b3a0d49 712 struct osd_info *osd_info; /* ivtvfb private OSD info */
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713};
714
715/* Globals */
716extern struct ivtv *ivtv_cards[];
717extern int ivtv_cards_active;
718extern int ivtv_first_minor;
719extern spinlock_t ivtv_cards_lock;
720
721/*==============Prototypes==================*/
722
723/* Hardware/IRQ */
724void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
725void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
726
727/* try to set output mode, return current mode. */
728int ivtv_set_output_mode(struct ivtv *itv, int mode);
729
730/* return current output stream based on current mode */
731struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
732
733/* Return non-zero if a signal is pending */
201700d3 734int ivtv_msleep_timeout(unsigned int msecs, int intr);
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735
736/* Wait on queue, returns -EINTR if interrupted */
737int ivtv_waitq(wait_queue_head_t *waitq);
738
739/* Read Hauppauge eeprom */
740struct tveeprom; /* forward reference */
741void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
742
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743/* First-open initialization: load firmware, init cx25840, etc. */
744int ivtv_init_on_first_open(struct ivtv *itv);
745
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746/* This is a PCI post thing, where if the pci register is not read, then
747 the write doesn't always take effect right away. By reading back the
748 register any pending PCI writes will be performed (in order), and so
749 you can be sure that the writes are guaranteed to be done.
750
751 Rarely needed, only in some timing sensitive cases.
752 Apparently if this is not done some motherboards seem
753 to kill the firmware and get into the broken state until computer is
754 rebooted. */
755#define write_sync(val, reg) \
756 do { writel(val, reg); readl(reg); } while (0)
757
758#define read_reg(reg) readl(itv->reg_mem + (reg))
759#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
760#define write_reg_sync(val, reg) \
761 do { write_reg(val, reg); read_reg(reg); } while (0)
762
763#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
764#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
765#define write_enc_sync(val, addr) \
766 do { write_enc(val, addr); read_enc(addr); } while (0)
767
768#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
769#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
770#define write_dec_sync(val, addr) \
771 do { write_dec(val, addr); read_dec(addr); } while (0)
772
612570f2 773#endif
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