[media] vivi: set device_caps
[deliverable/linux.git] / drivers / media / video / ivtv / ivtv-driver.h
CommitLineData
1a0adaf3
HV
1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
1a0adaf3 39#include <linux/module.h>
1a0adaf3
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40#include <linux/init.h>
41#include <linux/delay.h>
42#include <linux/sched.h>
43#include <linux/fs.h>
44#include <linux/pci.h>
45#include <linux/interrupt.h>
46#include <linux/spinlock.h>
47#include <linux/i2c.h>
48#include <linux/i2c-algo-bit.h>
49#include <linux/list.h>
50#include <linux/unistd.h>
1a0adaf3 51#include <linux/pagemap.h>
11763609 52#include <linux/scatterlist.h>
7bc46560 53#include <linux/kthread.h>
1a0adaf3 54#include <linux/mutex.h>
5a0e3ad6 55#include <linux/slab.h>
1a0adaf3
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56#include <asm/uaccess.h>
57#include <asm/system.h>
1a651a00 58#include <asm/byteorder.h>
1a0adaf3
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59
60#include <linux/dvb/video.h>
61#include <linux/dvb/audio.h>
62#include <media/v4l2-common.h>
35ea11ff 63#include <media/v4l2-ioctl.h>
f7b80e69 64#include <media/v4l2-ctrls.h>
67ec09fd 65#include <media/v4l2-device.h>
09250193 66#include <media/v4l2-fh.h>
1a0adaf3
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67#include <media/tuner.h>
68#include <media/cx2341x.h>
ad2fe2d4 69#include <media/ir-kbd-i2c.h>
1a0adaf3 70
51b39dfa 71#include <linux/ivtv.h>
1a0adaf3 72
33c0fcad 73/* Memory layout */
1a0adaf3 74#define IVTV_ENCODER_OFFSET 0x00000000
33c0fcad 75#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3 76#define IVTV_DECODER_OFFSET 0x01000000
33c0fcad 77#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3
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78#define IVTV_REG_OFFSET 0x02000000
79#define IVTV_REG_SIZE 0x00010000
80
32db7754
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81/* Maximum ivtv driver instances. Some people have a huge number of
82 capture cards, so set this to a high value. */
83#define IVTV_MAX_CARDS 32
1a0adaf3 84
1a0adaf3
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85#define IVTV_ENC_STREAM_TYPE_MPG 0
86#define IVTV_ENC_STREAM_TYPE_YUV 1
87#define IVTV_ENC_STREAM_TYPE_VBI 2
88#define IVTV_ENC_STREAM_TYPE_PCM 3
89#define IVTV_ENC_STREAM_TYPE_RAD 4
90#define IVTV_DEC_STREAM_TYPE_MPG 5
91#define IVTV_DEC_STREAM_TYPE_VBI 6
92#define IVTV_DEC_STREAM_TYPE_VOUT 7
93#define IVTV_DEC_STREAM_TYPE_YUV 8
94#define IVTV_MAX_STREAMS 9
95
1a0adaf3
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96#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
97
1a0adaf3
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98/* DMA Registers */
99#define IVTV_REG_DMAXFER (0x0000)
100#define IVTV_REG_DMASTATUS (0x0004)
101#define IVTV_REG_DECDMAADDR (0x0008)
102#define IVTV_REG_ENCDMAADDR (0x000c)
103#define IVTV_REG_DMACONTROL (0x0010)
104#define IVTV_REG_IRQSTATUS (0x0040)
105#define IVTV_REG_IRQMASK (0x0048)
106
107/* Setup Registers */
108#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
109#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
110#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
111#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
112#define IVTV_REG_VDM (0x2800)
113#define IVTV_REG_AO (0x2D00)
114#define IVTV_REG_BYTEFLUSH (0x2D24)
115#define IVTV_REG_SPU (0x9050)
116#define IVTV_REG_HW_BLOCKS (0x9054)
117#define IVTV_REG_VPU (0x9058)
118#define IVTV_REG_APU (0xA064)
119
4e1af31a
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120/* Other registers */
121#define IVTV_REG_DEC_LINE_FIELD (0x28C0)
122
1a0adaf3 123/* debugging */
33c0fcad 124extern int ivtv_debug;
914610e8
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125#ifdef CONFIG_VIDEO_ADV_DEBUG
126extern int ivtv_fw_debug;
127#endif
1a0adaf3 128
1aa32c2f
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129#define IVTV_DBGFLG_WARN (1 << 0)
130#define IVTV_DBGFLG_INFO (1 << 1)
131#define IVTV_DBGFLG_MB (1 << 2)
132#define IVTV_DBGFLG_IOCTL (1 << 3)
133#define IVTV_DBGFLG_FILE (1 << 4)
134#define IVTV_DBGFLG_DMA (1 << 5)
135#define IVTV_DBGFLG_IRQ (1 << 6)
136#define IVTV_DBGFLG_DEC (1 << 7)
137#define IVTV_DBGFLG_YUV (1 << 8)
138#define IVTV_DBGFLG_I2C (1 << 9)
bd58df6d 139/* Flag to turn on high volume debugging */
1aa32c2f 140#define IVTV_DBGFLG_HIGHVOL (1 << 10)
1a0adaf3 141
1a0adaf3
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142#define IVTV_DEBUG(x, type, fmt, args...) \
143 do { \
144 if ((x) & ivtv_debug) \
8ac05ae3 145 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
1a0adaf3 146 } while (0)
1aa32c2f
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147#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
148#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
149#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
150#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
1a0adaf3 151#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
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152#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
153#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
154#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
155#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
156#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
1a0adaf3 157
bd58df6d
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158#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
159 do { \
67ec09fd 160 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
8ac05ae3 161 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
bd58df6d 162 } while (0)
1aa32c2f
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163#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
164#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
165#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
166#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
bd58df6d 167#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
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168#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
169#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
170#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
171#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
172#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
bd58df6d 173
1a0adaf3 174/* Standard kernel messages */
8ac05ae3
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175#define IVTV_ERR(fmt, args...) v4l2_err(&itv->v4l2_dev, fmt , ## args)
176#define IVTV_WARN(fmt, args...) v4l2_warn(&itv->v4l2_dev, fmt , ## args)
177#define IVTV_INFO(fmt, args...) v4l2_info(&itv->v4l2_dev, fmt , ## args)
1a0adaf3 178
1a0adaf3
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179/* output modes (cx23415 only) */
180#define OUT_NONE 0
181#define OUT_MPG 1
182#define OUT_YUV 2
183#define OUT_UDMA_YUV 3
184#define OUT_PASSTHROUGH 4
185
186#define IVTV_MAX_PGM_INDEX (400)
187
f412d36a
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188/* Default I2C SCL period in microseconds */
189#define IVTV_DEFAULT_I2C_CLOCK_PERIOD 20
190
1a0adaf3 191struct ivtv_options {
a158f355
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192 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
193 int cardtype; /* force card type on load */
194 int tuner; /* set tuner on load */
195 int radio; /* enable/disable radio */
196 int newi2c; /* new I2C algorithm */
f412d36a 197 int i2c_clock_period; /* period of SCL for I2C bus */
1a0adaf3
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198};
199
1a0adaf3
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200/* ivtv-specific mailbox template */
201struct ivtv_mailbox {
202 u32 flags;
203 u32 cmd;
204 u32 retval;
205 u32 timeout;
206 u32 data[CX2341X_MBOX_MAX_DATA];
207};
208
209struct ivtv_api_cache {
210 unsigned long last_jiffies; /* when last command was issued */
211 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
212};
213
214struct ivtv_mailbox_data {
215 volatile struct ivtv_mailbox __iomem *mbox;
216 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
217 If the bit is set, then the corresponding mailbox is in use by the driver. */
218 unsigned long busy;
219 u8 max_mbox;
220};
221
222/* per-buffer bit flags */
f4071b85 223#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
1a0adaf3
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224
225/* per-stream, s_flags */
226#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
227#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
228#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
229
230#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
231#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
232#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
233#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
234#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
235#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
236
dc02d50a
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237#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
238#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
239
1a0adaf3 240/* per-ivtv, i_flags */
1e13f9e3
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241#define IVTV_F_I_DMA 0 /* DMA in progress */
242#define IVTV_F_I_UDMA 1 /* UDMA in progress */
243#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
a158f355
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244#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
245#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
246#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
247#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
1e13f9e3 248#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
1e13f9e3
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249#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
250#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
251#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
252#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
253#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
1a0adaf3 254#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
a158f355 255#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
dc02d50a
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256#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
257#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
258#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
259#define IVTV_F_I_PIO 19 /* PIO in progress */
ac425144 260#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
c976bc82
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261#define IVTV_F_I_INITED 21 /* set after first open */
262#define IVTV_F_I_FAILED 22 /* set if first open failed */
1a0adaf3
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263
264/* Event notifications */
1e13f9e3
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265#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
266#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
267#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
268#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
1a0adaf3
HV
269
270/* Scatter-Gather array element, used in DMA transfers */
37093b1e 271struct ivtv_sg_element {
b0510f8d
AV
272 __le32 src;
273 __le32 dst;
274 __le32 size;
275};
276
277struct ivtv_sg_host_element {
1a0adaf3
HV
278 u32 src;
279 u32 dst;
280 u32 size;
281};
282
283struct ivtv_user_dma {
284 struct mutex lock;
285 int page_count;
286 struct page *map[IVTV_DMA_SG_OSD_ENT];
0989fd2c
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287 /* Needed when dealing with highmem userspace buffers */
288 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
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289
290 /* Base Dev SG Array for cx23415/6 */
37093b1e 291 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
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292 dma_addr_t SG_handle;
293 int SG_length;
294
295 /* SG List of Buffers */
296 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
297};
298
299struct ivtv_dma_page_info {
300 unsigned long uaddr;
301 unsigned long first;
302 unsigned long last;
303 unsigned int offset;
304 unsigned int tail;
305 int page_count;
306};
307
308struct ivtv_buffer {
309 struct list_head list;
310 dma_addr_t dma_handle;
f4071b85
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311 unsigned short b_flags;
312 unsigned short dma_xfer_cnt;
1a0adaf3 313 char *buf;
1a0adaf3
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314 u32 bytesused;
315 u32 readpos;
316};
317
318struct ivtv_queue {
a158f355
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319 struct list_head list; /* the list of buffers in this queue */
320 u32 buffers; /* number of buffers in this queue */
321 u32 length; /* total number of bytes of available buffer space */
322 u32 bytesused; /* total number of bytes used in this queue */
1a0adaf3
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323};
324
a158f355 325struct ivtv; /* forward reference */
1a0adaf3
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326
327struct ivtv_stream {
328 /* These first four fields are always set, even if the stream
329 is not actually created. */
8ac05ae3 330 struct video_device *vdev; /* NULL when stream not created */
1a0adaf3
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331 struct ivtv *itv; /* for ease of use */
332 const char *name; /* name of the stream */
333 int type; /* stream type */
334
61bb725e 335 struct v4l2_fh *fh; /* pointer to the streaming filehandle */
a158f355
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336 spinlock_t qlock; /* locks access to the queues */
337 unsigned long s_flags; /* status flags, see above */
338 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
37093b1e
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339 u32 pending_offset;
340 u32 pending_backup;
341 u64 pending_pts;
342
1a0adaf3
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343 u32 dma_offset;
344 u32 dma_backup;
345 u64 dma_pts;
346
347 int subtype;
348 wait_queue_head_t waitq;
349 u32 dma_last_offset;
350
351 /* Buffer Stats */
352 u32 buffers;
353 u32 buf_size;
354 u32 buffers_stolen;
355
356 /* Buffer Queues */
357 struct ivtv_queue q_free; /* free buffers */
358 struct ivtv_queue q_full; /* full buffers */
359 struct ivtv_queue q_io; /* waiting for I/O */
360 struct ivtv_queue q_dma; /* waiting for DMA */
361 struct ivtv_queue q_predma; /* waiting for DMA */
362
f4071b85
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363 /* DMA xfer counter, buffers belonging to the same DMA
364 xfer will have the same dma_xfer_cnt. */
365 u16 dma_xfer_cnt;
366
1a0adaf3 367 /* Base Dev SG Array for cx23415/6 */
b0510f8d
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368 struct ivtv_sg_host_element *sg_pending;
369 struct ivtv_sg_host_element *sg_processing;
37093b1e
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370 struct ivtv_sg_element *sg_dma;
371 dma_addr_t sg_handle;
372 int sg_pending_size;
373 int sg_processing_size;
374 int sg_processed;
1a0adaf3
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375
376 /* SG List of Buffers */
377 struct scatterlist *SGlist;
378};
379
380struct ivtv_open_id {
09250193 381 struct v4l2_fh fh;
a158f355
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382 int type; /* stream type */
383 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
1a0adaf3
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384 struct ivtv *itv;
385};
386
09250193
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387static inline struct ivtv_open_id *fh2id(struct v4l2_fh *fh)
388{
389 return container_of(fh, struct ivtv_open_id, fh);
390}
391
1a0adaf3
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392struct yuv_frame_info
393{
394 u32 update;
33c0fcad
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395 s32 src_x;
396 s32 src_y;
397 u32 src_w;
398 u32 src_h;
399 s32 dst_x;
400 s32 dst_y;
401 u32 dst_w;
402 u32 dst_h;
403 s32 pan_x;
404 s32 pan_y;
1a0adaf3
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405 u32 vis_w;
406 u32 vis_h;
407 u32 interlaced_y;
408 u32 interlaced_uv;
33c0fcad 409 s32 tru_x;
1a0adaf3
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410 u32 tru_w;
411 u32 tru_h;
412 u32 offset_y;
33c0fcad 413 s32 lace_mode;
3b5c1c8e
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414 u32 sync_field;
415 u32 delay;
416 u32 interlaced;
1a0adaf3
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417};
418
419#define IVTV_YUV_MODE_INTERLACED 0x00
420#define IVTV_YUV_MODE_PROGRESSIVE 0x01
421#define IVTV_YUV_MODE_AUTO 0x02
422#define IVTV_YUV_MODE_MASK 0x03
423
424#define IVTV_YUV_SYNC_EVEN 0x00
425#define IVTV_YUV_SYNC_ODD 0x04
426#define IVTV_YUV_SYNC_MASK 0x04
427
a3e5f5e2
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428#define IVTV_YUV_BUFFERS 8
429
1a0adaf3
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430struct yuv_playback_info
431{
432 u32 reg_2834;
433 u32 reg_2838;
434 u32 reg_283c;
435 u32 reg_2840;
436 u32 reg_2844;
437 u32 reg_2848;
438 u32 reg_2854;
439 u32 reg_285c;
440 u32 reg_2864;
441
442 u32 reg_2870;
443 u32 reg_2874;
444 u32 reg_2890;
445 u32 reg_2898;
446 u32 reg_289c;
447
448 u32 reg_2918;
449 u32 reg_291c;
450 u32 reg_2920;
451 u32 reg_2924;
452 u32 reg_2928;
453 u32 reg_292c;
454 u32 reg_2930;
455
456 u32 reg_2934;
457
458 u32 reg_2938;
459 u32 reg_293c;
460 u32 reg_2940;
461 u32 reg_2944;
462 u32 reg_2948;
463 u32 reg_294c;
464 u32 reg_2950;
465 u32 reg_2954;
466 u32 reg_2958;
467 u32 reg_295c;
468 u32 reg_2960;
469 u32 reg_2964;
470 u32 reg_2968;
471 u32 reg_296c;
472
473 u32 reg_2970;
474
475 int v_filter_1;
476 int v_filter_2;
477 int h_filter;
478
88ab075a
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479 u8 track_osd; /* Should yuv output track the OSD size & position */
480
1a0adaf3
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481 u32 osd_x_offset;
482 u32 osd_y_offset;
483
484 u32 osd_x_pan;
485 u32 osd_y_pan;
486
487 u32 osd_vis_w;
488 u32 osd_vis_h;
489
77aded6b
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490 u32 osd_full_w;
491 u32 osd_full_h;
492
1a0adaf3
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493 int decode_height;
494
1a0adaf3
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495 int lace_mode;
496 int lace_threshold;
1a0adaf3
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497 int lace_sync_field;
498
499 atomic_t next_dma_frame;
500 atomic_t next_fill_frame;
501
502 u32 yuv_forced_update;
503 int update_frame;
bfd7beac 504
bfd7beac
IA
505 u8 fields_lapsed; /* Counter used when delaying a frame */
506
a3e5f5e2 507 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
1a0adaf3
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508 struct yuv_frame_info old_frame_info;
509 struct yuv_frame_info old_frame_info_args;
510
511 void *blanking_ptr;
512 dma_addr_t blanking_dmaptr;
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513
514 int stream_size;
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515
516 u8 draw_frame; /* PVR350 buffer to draw into */
517 u8 max_frames_buffered; /* Maximum number of frames to buffer */
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518
519 struct v4l2_rect main_rect;
520 u32 v4l2_src_w;
521 u32 v4l2_src_h;
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522
523 u8 running; /* Have any frames been displayed */
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524};
525
526#define IVTV_VBI_FRAMES 32
527
528/* VBI data */
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529struct vbi_cc {
530 u8 odd[2]; /* two-byte payload of odd field */
531 u8 even[2]; /* two-byte payload of even field */;
532};
533
534struct vbi_vps {
535 u8 data[5]; /* five-byte VPS payload */
536};
537
1a0adaf3 538struct vbi_info {
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539 /* VBI general data, does not change during streaming */
540
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541 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
542 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
543 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
544 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
545 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
546 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
547
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548 u32 start[2]; /* start of first VBI line in the odd/even fields */
549 u32 count; /* number of VBI lines per field */
550 u32 raw_size; /* size of raw VBI line from the digitizer */
551 u32 sliced_size; /* size of sliced VBI line from the digitizer */
552
553 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
554 u32 enc_start; /* start in encoder memory of VBI capture buffers */
555 u32 enc_size; /* size of VBI capture area */
556 int fpi; /* number of VBI frames per interrupt */
557
558 struct v4l2_format in; /* current VBI capture format */
559 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
560 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
561
562 /* Raw VBI compatibility hack */
563
564 u32 frame; /* frame counter hack needed for backwards compatibility
565 of old VBI software */
566
567 /* Sliced VBI output data */
568
569 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
2f3a9893 570 prevent dropping CC data if they couldn't be
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571 processed fast enough */
572 int cc_payload_idx; /* index in cc_payload */
573 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
574 int wss_payload; /* sliced VBI WSS payload */
575 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
576 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
577
578 /* Sliced VBI capture data */
579
580 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
581 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
582
583 /* VBI Embedding data */
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584
585 /* Buffer for VBI data inserted into MPEG stream.
586 The first byte is a dummy byte that's never used.
587 The next 16 bytes contain the MPEG header for the VBI data,
588 the remainder is the actual VBI data.
589 The max size accepted by the MPEG VBI reinsertion turns out
590 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
591 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
592 a single line header byte and 2 * 18 is the number of VBI lines per frame.
593
594 However, it seems that the data must be 1K aligned, so we have to
595 pad the data until the 1 or 2 K boundary.
596
597 This pointer array will allocate 2049 bytes to store each VBI frame. */
598 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
599 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
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600 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
601 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
602 to be inserted in the MPEG stream */
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603};
604
605/* forward declaration of struct defined in ivtv-cards.h */
606struct ivtv_card;
607
608/* Struct to hold info about ivtv cards */
609struct ivtv {
fd8b281a 610 /* General fixed card data */
8ac05ae3 611 struct pci_dev *pdev; /* PCI device */
1a0adaf3 612 const struct ivtv_card *card; /* card information */
fd8b281a 613 const char *card_name; /* full name of the card */
d9009201 614 const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
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615 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
616 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
617 u8 nof_inputs; /* number of video inputs */
618 u8 nof_audio_inputs; /* number of audio inputs */
619 u32 v4l2_cap; /* V4L2 capabilities of card */
620 u32 hw_flags; /* hardware description of the board */
fd8b281a 621 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
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622 struct v4l2_subdev *sd_video; /* controlling video decoder subdev */
623 struct v4l2_subdev *sd_audio; /* controlling audio subdev */
624 struct v4l2_subdev *sd_muxer; /* controlling audio muxer subdev */
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625 u32 base_addr; /* PCI resource base address */
626 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
627 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
628 volatile void __iomem *reg_mem; /* pointer to mapped registers */
629 struct ivtv_options options; /* user options */
630
8ac05ae3 631 struct v4l2_device v4l2_dev;
f7b80e69 632 struct cx2341x_handler cxhdl;
2fd78144 633 struct v4l2_ctrl_handler hdl_gpio;
f7b80e69 634 struct v4l2_subdev sd_gpio; /* GPIO sub-device */
67ec09fd 635 u16 instance;
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636
637 /* High-level state info */
638 unsigned long i_flags; /* global ivtv flags */
639 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
640 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
641 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
642 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
643 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
644 u32 audio_input; /* current audio input */
645 u32 active_input; /* current video input */
646 u32 active_output; /* current video output */
647 v4l2_std_id std; /* current capture TV standard */
648 v4l2_std_id std_out; /* current TV output standard */
649 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
650 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
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651
652
653 /* Locking */
654 spinlock_t lock; /* lock access to this struct */
a158f355 655 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
fd8b281a 656
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657 /* Streams */
658 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
659 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
660 atomic_t capturing; /* count number of active capture streams */
661 atomic_t decoding; /* count number of active decoding streams */
662
663
664 /* Interrupts & DMA */
665 u32 irqmask; /* active interrupts */
666 u32 irq_rr_idx; /* round-robin stream index */
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667 struct kthread_worker irq_worker; /* kthread worker for PIO/YUV/VBI actions */
668 struct task_struct *irq_worker_task; /* task for irq_worker */
669 struct kthread_work irq_work; /* kthread work entry */
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670 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
671 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
672 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
673 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
674 u32 dma_data_req_size; /* store size of current DMA request */
675 int dma_retries; /* current DMA retry attempt */
676 struct ivtv_user_dma udma; /* user based DMA for OSD */
677 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
a158f355 678 u32 last_vsync_field; /* last seen vsync field */
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679 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
680 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
681 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
682 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
683
684
685 /* Mailbox */
686 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
687 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
688 struct ivtv_api_cache api_cache[256]; /* cached API commands */
689
690
691 /* I2C */
692 struct i2c_adapter i2c_adap;
693 struct i2c_algo_bit_data i2c_algo;
694 struct i2c_client i2c_client;
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695 int i2c_state; /* i2c bit state */
696 struct mutex i2c_bus_lock; /* lock i2c bus */
697
ad2fe2d4 698 struct IR_i2c_init_data ir_i2c_init_data;
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699
700 /* Program Index information */
701 u32 pgm_info_offset; /* start of pgm info in encoder memory */
702 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
703 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
704 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
705 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
706
707
708 /* Miscellaneous */
709 u32 open_id; /* incremented each time an open occurs, is >= 1 */
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710 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
711 int speed; /* current playback speed setting */
712 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
713 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
714 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
715 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
716 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
0d82fe80 717 u32 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
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718
719
720 /* VBI state info */
721 struct vbi_info vbi; /* VBI-specific data */
722
723
724 /* YUV playback */
725 struct yuv_playback_info yuv_info; /* YUV playback data */
1a0adaf3 726
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727
728 /* OSD support */
729 unsigned long osd_video_pbase;
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730 int osd_global_alpha_state; /* 1 = global alpha is on */
731 int osd_local_alpha_state; /* 1 = local alpha is on */
732 int osd_chroma_key_state; /* 1 = chroma-keying is on */
733 u8 osd_global_alpha; /* current global alpha */
734 u32 osd_chroma_key; /* current chroma key */
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735 struct v4l2_rect osd_rect; /* current OSD position and size */
736 struct v4l2_rect main_rect; /* current Main window position and size */
7b3a0d49 737 struct osd_info *osd_info; /* ivtvfb private OSD info */
215659d1 738 void (*ivtvfb_restore)(struct ivtv *itv); /* Used for a warm start */
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739};
740
8ac05ae3 741static inline struct ivtv *to_ivtv(struct v4l2_device *v4l2_dev)
67ec09fd 742{
8ac05ae3 743 return container_of(v4l2_dev, struct ivtv, v4l2_dev);
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744}
745
1a0adaf3 746/* Globals */
1a0adaf3 747extern int ivtv_first_minor;
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748
749/*==============Prototypes==================*/
750
751/* Hardware/IRQ */
752void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
753void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
754
755/* try to set output mode, return current mode. */
756int ivtv_set_output_mode(struct ivtv *itv, int mode);
757
758/* return current output stream based on current mode */
759struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
760
761/* Return non-zero if a signal is pending */
201700d3 762int ivtv_msleep_timeout(unsigned int msecs, int intr);
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763
764/* Wait on queue, returns -EINTR if interrupted */
765int ivtv_waitq(wait_queue_head_t *waitq);
766
767/* Read Hauppauge eeprom */
768struct tveeprom; /* forward reference */
769void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
770
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771/* First-open initialization: load firmware, init cx25840, etc. */
772int ivtv_init_on_first_open(struct ivtv *itv);
773
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774/* Test if the current VBI mode is raw (1) or sliced (0) */
775static inline int ivtv_raw_vbi(const struct ivtv *itv)
776{
777 return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
778}
779
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780/* This is a PCI post thing, where if the pci register is not read, then
781 the write doesn't always take effect right away. By reading back the
782 register any pending PCI writes will be performed (in order), and so
783 you can be sure that the writes are guaranteed to be done.
784
785 Rarely needed, only in some timing sensitive cases.
786 Apparently if this is not done some motherboards seem
787 to kill the firmware and get into the broken state until computer is
788 rebooted. */
789#define write_sync(val, reg) \
790 do { writel(val, reg); readl(reg); } while (0)
791
792#define read_reg(reg) readl(itv->reg_mem + (reg))
793#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
794#define write_reg_sync(val, reg) \
795 do { write_reg(val, reg); read_reg(reg); } while (0)
796
797#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
798#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
799#define write_enc_sync(val, addr) \
800 do { write_enc(val, addr); read_enc(addr); } while (0)
801
802#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
803#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
804#define write_dec_sync(val, addr) \
805 do { write_dec(val, addr); read_dec(addr); } while (0)
806
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807/* Call the specified callback for all subdevs matching hw (if 0, then
808 match them all). Ignore any errors. */
809#define ivtv_call_hw(itv, hw, o, f, args...) \
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810 do { \
811 struct v4l2_subdev *__sd; \
812 __v4l2_device_call_subdevs_p(&(itv)->v4l2_dev, __sd, \
813 !(hw) || (__sd->grp_id & (hw)), o, f , ##args); \
814 } while (0)
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815
816#define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)
817
818/* Call the specified callback for all subdevs matching hw (if 0, then
819 match them all). If the callback returns an error other than 0 or
820 -ENOIOCTLCMD, then return with that error code. */
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821#define ivtv_call_hw_err(itv, hw, o, f, args...) \
822({ \
823 struct v4l2_subdev *__sd; \
824 __v4l2_device_call_subdevs_until_err_p(&(itv)->v4l2_dev, __sd, \
825 !(hw) || (__sd->grp_id & (hw)), o, f , ##args); \
826})
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827
828#define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)
829
612570f2 830#endif
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