V4L/DVB (13443): ivtv: Defer legacy I2C IR probing until after setup of known I2C...
[deliverable/linux.git] / drivers / media / video / ivtv / ivtv-driver.h
CommitLineData
1a0adaf3
HV
1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39#include <linux/version.h>
40#include <linux/module.h>
1a0adaf3
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41#include <linux/init.h>
42#include <linux/delay.h>
43#include <linux/sched.h>
44#include <linux/fs.h>
45#include <linux/pci.h>
46#include <linux/interrupt.h>
47#include <linux/spinlock.h>
48#include <linux/i2c.h>
49#include <linux/i2c-algo-bit.h>
50#include <linux/list.h>
51#include <linux/unistd.h>
1a0adaf3 52#include <linux/pagemap.h>
11763609 53#include <linux/scatterlist.h>
1a0adaf3
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54#include <linux/workqueue.h>
55#include <linux/mutex.h>
56#include <asm/uaccess.h>
57#include <asm/system.h>
1a651a00 58#include <asm/byteorder.h>
1a0adaf3
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59
60#include <linux/dvb/video.h>
61#include <linux/dvb/audio.h>
62#include <media/v4l2-common.h>
35ea11ff 63#include <media/v4l2-ioctl.h>
67ec09fd 64#include <media/v4l2-device.h>
1a0adaf3
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65#include <media/tuner.h>
66#include <media/cx2341x.h>
67
51b39dfa 68#include <linux/ivtv.h>
1a0adaf3 69
33c0fcad 70/* Memory layout */
1a0adaf3 71#define IVTV_ENCODER_OFFSET 0x00000000
33c0fcad 72#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3 73#define IVTV_DECODER_OFFSET 0x01000000
33c0fcad 74#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3
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75#define IVTV_REG_OFFSET 0x02000000
76#define IVTV_REG_SIZE 0x00010000
77
32db7754
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78/* Maximum ivtv driver instances. Some people have a huge number of
79 capture cards, so set this to a high value. */
80#define IVTV_MAX_CARDS 32
1a0adaf3 81
1a0adaf3
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82#define IVTV_ENC_STREAM_TYPE_MPG 0
83#define IVTV_ENC_STREAM_TYPE_YUV 1
84#define IVTV_ENC_STREAM_TYPE_VBI 2
85#define IVTV_ENC_STREAM_TYPE_PCM 3
86#define IVTV_ENC_STREAM_TYPE_RAD 4
87#define IVTV_DEC_STREAM_TYPE_MPG 5
88#define IVTV_DEC_STREAM_TYPE_VBI 6
89#define IVTV_DEC_STREAM_TYPE_VOUT 7
90#define IVTV_DEC_STREAM_TYPE_YUV 8
91#define IVTV_MAX_STREAMS 9
92
1a0adaf3
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93#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
94
1a0adaf3
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95/* DMA Registers */
96#define IVTV_REG_DMAXFER (0x0000)
97#define IVTV_REG_DMASTATUS (0x0004)
98#define IVTV_REG_DECDMAADDR (0x0008)
99#define IVTV_REG_ENCDMAADDR (0x000c)
100#define IVTV_REG_DMACONTROL (0x0010)
101#define IVTV_REG_IRQSTATUS (0x0040)
102#define IVTV_REG_IRQMASK (0x0048)
103
104/* Setup Registers */
105#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
106#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
107#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
108#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
109#define IVTV_REG_VDM (0x2800)
110#define IVTV_REG_AO (0x2D00)
111#define IVTV_REG_BYTEFLUSH (0x2D24)
112#define IVTV_REG_SPU (0x9050)
113#define IVTV_REG_HW_BLOCKS (0x9054)
114#define IVTV_REG_VPU (0x9058)
115#define IVTV_REG_APU (0xA064)
116
1a0adaf3 117/* debugging */
33c0fcad 118extern int ivtv_debug;
1a0adaf3 119
1aa32c2f
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120#define IVTV_DBGFLG_WARN (1 << 0)
121#define IVTV_DBGFLG_INFO (1 << 1)
122#define IVTV_DBGFLG_MB (1 << 2)
123#define IVTV_DBGFLG_IOCTL (1 << 3)
124#define IVTV_DBGFLG_FILE (1 << 4)
125#define IVTV_DBGFLG_DMA (1 << 5)
126#define IVTV_DBGFLG_IRQ (1 << 6)
127#define IVTV_DBGFLG_DEC (1 << 7)
128#define IVTV_DBGFLG_YUV (1 << 8)
129#define IVTV_DBGFLG_I2C (1 << 9)
bd58df6d 130/* Flag to turn on high volume debugging */
1aa32c2f 131#define IVTV_DBGFLG_HIGHVOL (1 << 10)
1a0adaf3 132
1a0adaf3
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133#define IVTV_DEBUG(x, type, fmt, args...) \
134 do { \
135 if ((x) & ivtv_debug) \
8ac05ae3 136 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
1a0adaf3 137 } while (0)
1aa32c2f
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138#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
139#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
140#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
141#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
1a0adaf3 142#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
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143#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
144#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
145#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
146#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
147#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
1a0adaf3 148
bd58df6d
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149#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
150 do { \
67ec09fd 151 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
8ac05ae3 152 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
bd58df6d 153 } while (0)
1aa32c2f
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154#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
155#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
156#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
157#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
bd58df6d 158#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
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159#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
160#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
161#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
162#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
163#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
bd58df6d 164
1a0adaf3 165/* Standard kernel messages */
8ac05ae3
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166#define IVTV_ERR(fmt, args...) v4l2_err(&itv->v4l2_dev, fmt , ## args)
167#define IVTV_WARN(fmt, args...) v4l2_warn(&itv->v4l2_dev, fmt , ## args)
168#define IVTV_INFO(fmt, args...) v4l2_info(&itv->v4l2_dev, fmt , ## args)
1a0adaf3 169
1a0adaf3
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170/* output modes (cx23415 only) */
171#define OUT_NONE 0
172#define OUT_MPG 1
173#define OUT_YUV 2
174#define OUT_UDMA_YUV 3
175#define OUT_PASSTHROUGH 4
176
177#define IVTV_MAX_PGM_INDEX (400)
178
f412d36a
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179/* Default I2C SCL period in microseconds */
180#define IVTV_DEFAULT_I2C_CLOCK_PERIOD 20
181
1a0adaf3 182struct ivtv_options {
a158f355
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183 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
184 int cardtype; /* force card type on load */
185 int tuner; /* set tuner on load */
186 int radio; /* enable/disable radio */
187 int newi2c; /* new I2C algorithm */
f412d36a 188 int i2c_clock_period; /* period of SCL for I2C bus */
1a0adaf3
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189};
190
1a0adaf3
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191/* ivtv-specific mailbox template */
192struct ivtv_mailbox {
193 u32 flags;
194 u32 cmd;
195 u32 retval;
196 u32 timeout;
197 u32 data[CX2341X_MBOX_MAX_DATA];
198};
199
200struct ivtv_api_cache {
201 unsigned long last_jiffies; /* when last command was issued */
202 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
203};
204
205struct ivtv_mailbox_data {
206 volatile struct ivtv_mailbox __iomem *mbox;
207 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
208 If the bit is set, then the corresponding mailbox is in use by the driver. */
209 unsigned long busy;
210 u8 max_mbox;
211};
212
213/* per-buffer bit flags */
f4071b85 214#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
1a0adaf3
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215
216/* per-stream, s_flags */
217#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
218#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
219#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
220
221#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
222#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
223#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
224#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
225#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
226#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
227
dc02d50a
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228#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
229#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
230
1a0adaf3 231/* per-ivtv, i_flags */
1e13f9e3
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232#define IVTV_F_I_DMA 0 /* DMA in progress */
233#define IVTV_F_I_UDMA 1 /* UDMA in progress */
234#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
a158f355
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235#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
236#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
237#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
238#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
1e13f9e3 239#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
1e13f9e3
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240#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
241#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
242#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
243#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
244#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
1a0adaf3 245#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
a158f355 246#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
dc02d50a
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247#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
248#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
249#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
250#define IVTV_F_I_PIO 19 /* PIO in progress */
ac425144 251#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
c976bc82
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252#define IVTV_F_I_INITED 21 /* set after first open */
253#define IVTV_F_I_FAILED 22 /* set if first open failed */
d526afe0 254#define IVTV_F_I_WORK_INITED 23 /* worker thread was initialized */
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255
256/* Event notifications */
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257#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
258#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
259#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
260#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
1a0adaf3
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261
262/* Scatter-Gather array element, used in DMA transfers */
37093b1e 263struct ivtv_sg_element {
b0510f8d
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264 __le32 src;
265 __le32 dst;
266 __le32 size;
267};
268
269struct ivtv_sg_host_element {
1a0adaf3
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270 u32 src;
271 u32 dst;
272 u32 size;
273};
274
275struct ivtv_user_dma {
276 struct mutex lock;
277 int page_count;
278 struct page *map[IVTV_DMA_SG_OSD_ENT];
0989fd2c
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279 /* Needed when dealing with highmem userspace buffers */
280 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
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281
282 /* Base Dev SG Array for cx23415/6 */
37093b1e 283 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
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284 dma_addr_t SG_handle;
285 int SG_length;
286
287 /* SG List of Buffers */
288 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
289};
290
291struct ivtv_dma_page_info {
292 unsigned long uaddr;
293 unsigned long first;
294 unsigned long last;
295 unsigned int offset;
296 unsigned int tail;
297 int page_count;
298};
299
300struct ivtv_buffer {
301 struct list_head list;
302 dma_addr_t dma_handle;
f4071b85
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303 unsigned short b_flags;
304 unsigned short dma_xfer_cnt;
1a0adaf3 305 char *buf;
1a0adaf3
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306 u32 bytesused;
307 u32 readpos;
308};
309
310struct ivtv_queue {
a158f355
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311 struct list_head list; /* the list of buffers in this queue */
312 u32 buffers; /* number of buffers in this queue */
313 u32 length; /* total number of bytes of available buffer space */
314 u32 bytesused; /* total number of bytes used in this queue */
1a0adaf3
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315};
316
a158f355 317struct ivtv; /* forward reference */
1a0adaf3
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318
319struct ivtv_stream {
320 /* These first four fields are always set, even if the stream
321 is not actually created. */
8ac05ae3 322 struct video_device *vdev; /* NULL when stream not created */
1a0adaf3
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323 struct ivtv *itv; /* for ease of use */
324 const char *name; /* name of the stream */
325 int type; /* stream type */
326
327 u32 id;
a158f355
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328 spinlock_t qlock; /* locks access to the queues */
329 unsigned long s_flags; /* status flags, see above */
330 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
37093b1e
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331 u32 pending_offset;
332 u32 pending_backup;
333 u64 pending_pts;
334
1a0adaf3
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335 u32 dma_offset;
336 u32 dma_backup;
337 u64 dma_pts;
338
339 int subtype;
340 wait_queue_head_t waitq;
341 u32 dma_last_offset;
342
343 /* Buffer Stats */
344 u32 buffers;
345 u32 buf_size;
346 u32 buffers_stolen;
347
348 /* Buffer Queues */
349 struct ivtv_queue q_free; /* free buffers */
350 struct ivtv_queue q_full; /* full buffers */
351 struct ivtv_queue q_io; /* waiting for I/O */
352 struct ivtv_queue q_dma; /* waiting for DMA */
353 struct ivtv_queue q_predma; /* waiting for DMA */
354
f4071b85
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355 /* DMA xfer counter, buffers belonging to the same DMA
356 xfer will have the same dma_xfer_cnt. */
357 u16 dma_xfer_cnt;
358
1a0adaf3 359 /* Base Dev SG Array for cx23415/6 */
b0510f8d
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360 struct ivtv_sg_host_element *sg_pending;
361 struct ivtv_sg_host_element *sg_processing;
37093b1e
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362 struct ivtv_sg_element *sg_dma;
363 dma_addr_t sg_handle;
364 int sg_pending_size;
365 int sg_processing_size;
366 int sg_processed;
1a0adaf3
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367
368 /* SG List of Buffers */
369 struct scatterlist *SGlist;
370};
371
372struct ivtv_open_id {
a158f355
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373 u32 open_id; /* unique ID for this file descriptor */
374 int type; /* stream type */
375 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
376 enum v4l2_priority prio; /* priority */
1a0adaf3
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377 struct ivtv *itv;
378};
379
1a0adaf3
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380struct yuv_frame_info
381{
382 u32 update;
33c0fcad
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383 s32 src_x;
384 s32 src_y;
385 u32 src_w;
386 u32 src_h;
387 s32 dst_x;
388 s32 dst_y;
389 u32 dst_w;
390 u32 dst_h;
391 s32 pan_x;
392 s32 pan_y;
1a0adaf3
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393 u32 vis_w;
394 u32 vis_h;
395 u32 interlaced_y;
396 u32 interlaced_uv;
33c0fcad 397 s32 tru_x;
1a0adaf3
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398 u32 tru_w;
399 u32 tru_h;
400 u32 offset_y;
33c0fcad 401 s32 lace_mode;
3b5c1c8e
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402 u32 sync_field;
403 u32 delay;
404 u32 interlaced;
1a0adaf3
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405};
406
407#define IVTV_YUV_MODE_INTERLACED 0x00
408#define IVTV_YUV_MODE_PROGRESSIVE 0x01
409#define IVTV_YUV_MODE_AUTO 0x02
410#define IVTV_YUV_MODE_MASK 0x03
411
412#define IVTV_YUV_SYNC_EVEN 0x00
413#define IVTV_YUV_SYNC_ODD 0x04
414#define IVTV_YUV_SYNC_MASK 0x04
415
a3e5f5e2
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416#define IVTV_YUV_BUFFERS 8
417
1a0adaf3
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418struct yuv_playback_info
419{
420 u32 reg_2834;
421 u32 reg_2838;
422 u32 reg_283c;
423 u32 reg_2840;
424 u32 reg_2844;
425 u32 reg_2848;
426 u32 reg_2854;
427 u32 reg_285c;
428 u32 reg_2864;
429
430 u32 reg_2870;
431 u32 reg_2874;
432 u32 reg_2890;
433 u32 reg_2898;
434 u32 reg_289c;
435
436 u32 reg_2918;
437 u32 reg_291c;
438 u32 reg_2920;
439 u32 reg_2924;
440 u32 reg_2928;
441 u32 reg_292c;
442 u32 reg_2930;
443
444 u32 reg_2934;
445
446 u32 reg_2938;
447 u32 reg_293c;
448 u32 reg_2940;
449 u32 reg_2944;
450 u32 reg_2948;
451 u32 reg_294c;
452 u32 reg_2950;
453 u32 reg_2954;
454 u32 reg_2958;
455 u32 reg_295c;
456 u32 reg_2960;
457 u32 reg_2964;
458 u32 reg_2968;
459 u32 reg_296c;
460
461 u32 reg_2970;
462
463 int v_filter_1;
464 int v_filter_2;
465 int h_filter;
466
88ab075a
IA
467 u8 track_osd; /* Should yuv output track the OSD size & position */
468
1a0adaf3
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469 u32 osd_x_offset;
470 u32 osd_y_offset;
471
472 u32 osd_x_pan;
473 u32 osd_y_pan;
474
475 u32 osd_vis_w;
476 u32 osd_vis_h;
477
77aded6b
IA
478 u32 osd_full_w;
479 u32 osd_full_h;
480
1a0adaf3
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481 int decode_height;
482
1a0adaf3
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483 int lace_mode;
484 int lace_threshold;
1a0adaf3
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485 int lace_sync_field;
486
487 atomic_t next_dma_frame;
488 atomic_t next_fill_frame;
489
490 u32 yuv_forced_update;
491 int update_frame;
bfd7beac 492
bfd7beac
IA
493 u8 fields_lapsed; /* Counter used when delaying a frame */
494
a3e5f5e2 495 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
1a0adaf3
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496 struct yuv_frame_info old_frame_info;
497 struct yuv_frame_info old_frame_info_args;
498
499 void *blanking_ptr;
500 dma_addr_t blanking_dmaptr;
c240ad00
IA
501
502 int stream_size;
a3e5f5e2
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503
504 u8 draw_frame; /* PVR350 buffer to draw into */
505 u8 max_frames_buffered; /* Maximum number of frames to buffer */
77aded6b
IA
506
507 struct v4l2_rect main_rect;
508 u32 v4l2_src_w;
509 u32 v4l2_src_h;
2bd7ac55
IA
510
511 u8 running; /* Have any frames been displayed */
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512};
513
514#define IVTV_VBI_FRAMES 32
515
516/* VBI data */
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517struct vbi_cc {
518 u8 odd[2]; /* two-byte payload of odd field */
519 u8 even[2]; /* two-byte payload of even field */;
520};
521
522struct vbi_vps {
523 u8 data[5]; /* five-byte VPS payload */
524};
525
1a0adaf3 526struct vbi_info {
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527 /* VBI general data, does not change during streaming */
528
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529 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
530 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
531 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
532 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
533 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
534 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
535
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536 u32 start[2]; /* start of first VBI line in the odd/even fields */
537 u32 count; /* number of VBI lines per field */
538 u32 raw_size; /* size of raw VBI line from the digitizer */
539 u32 sliced_size; /* size of sliced VBI line from the digitizer */
540
541 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
542 u32 enc_start; /* start in encoder memory of VBI capture buffers */
543 u32 enc_size; /* size of VBI capture area */
544 int fpi; /* number of VBI frames per interrupt */
545
546 struct v4l2_format in; /* current VBI capture format */
547 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
548 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
549
550 /* Raw VBI compatibility hack */
551
552 u32 frame; /* frame counter hack needed for backwards compatibility
553 of old VBI software */
554
555 /* Sliced VBI output data */
556
557 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
2f3a9893 558 prevent dropping CC data if they couldn't be
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559 processed fast enough */
560 int cc_payload_idx; /* index in cc_payload */
561 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
562 int wss_payload; /* sliced VBI WSS payload */
563 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
564 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
565
566 /* Sliced VBI capture data */
567
568 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
569 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
570
571 /* VBI Embedding data */
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572
573 /* Buffer for VBI data inserted into MPEG stream.
574 The first byte is a dummy byte that's never used.
575 The next 16 bytes contain the MPEG header for the VBI data,
576 the remainder is the actual VBI data.
577 The max size accepted by the MPEG VBI reinsertion turns out
578 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
579 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
580 a single line header byte and 2 * 18 is the number of VBI lines per frame.
581
582 However, it seems that the data must be 1K aligned, so we have to
583 pad the data until the 1 or 2 K boundary.
584
585 This pointer array will allocate 2049 bytes to store each VBI frame. */
586 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
587 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
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588 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
589 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
590 to be inserted in the MPEG stream */
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591};
592
593/* forward declaration of struct defined in ivtv-cards.h */
594struct ivtv_card;
595
596/* Struct to hold info about ivtv cards */
597struct ivtv {
fd8b281a 598 /* General fixed card data */
8ac05ae3 599 struct pci_dev *pdev; /* PCI device */
1a0adaf3 600 const struct ivtv_card *card; /* card information */
fd8b281a 601 const char *card_name; /* full name of the card */
d9009201 602 const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
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603 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
604 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
605 u8 nof_inputs; /* number of video inputs */
606 u8 nof_audio_inputs; /* number of audio inputs */
607 u32 v4l2_cap; /* V4L2 capabilities of card */
608 u32 hw_flags; /* hardware description of the board */
fd8b281a 609 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
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610 struct v4l2_subdev *sd_video; /* controlling video decoder subdev */
611 struct v4l2_subdev *sd_audio; /* controlling audio subdev */
612 struct v4l2_subdev *sd_muxer; /* controlling audio muxer subdev */
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613 u32 base_addr; /* PCI resource base address */
614 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
615 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
616 volatile void __iomem *reg_mem; /* pointer to mapped registers */
617 struct ivtv_options options; /* user options */
618
8ac05ae3 619 struct v4l2_device v4l2_dev;
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620 struct v4l2_subdev sd_gpio; /* GPIO sub-device */
621 u16 instance;
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622
623 /* High-level state info */
624 unsigned long i_flags; /* global ivtv flags */
625 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
626 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
627 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
628 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
629 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
630 u32 audio_input; /* current audio input */
631 u32 active_input; /* current video input */
632 u32 active_output; /* current video output */
633 v4l2_std_id std; /* current capture TV standard */
634 v4l2_std_id std_out; /* current TV output standard */
635 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
636 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
637 struct cx2341x_mpeg_params params; /* current encoder parameters */
638
639
640 /* Locking */
641 spinlock_t lock; /* lock access to this struct */
a158f355 642 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
fd8b281a 643
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644 /* Streams */
645 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
646 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
647 atomic_t capturing; /* count number of active capture streams */
648 atomic_t decoding; /* count number of active decoding streams */
649
650
651 /* Interrupts & DMA */
652 u32 irqmask; /* active interrupts */
653 u32 irq_rr_idx; /* round-robin stream index */
654 struct workqueue_struct *irq_work_queues; /* workqueue for PIO/YUV/VBI actions */
655 struct work_struct irq_work_queue; /* work entry */
656 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
657 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
658 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
659 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
660 u32 dma_data_req_size; /* store size of current DMA request */
661 int dma_retries; /* current DMA retry attempt */
662 struct ivtv_user_dma udma; /* user based DMA for OSD */
663 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
a158f355 664 u32 last_vsync_field; /* last seen vsync field */
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665 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
666 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
667 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
668 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
669
670
671 /* Mailbox */
672 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
673 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
674 struct ivtv_api_cache api_cache[256]; /* cached API commands */
675
676
677 /* I2C */
678 struct i2c_adapter i2c_adap;
679 struct i2c_algo_bit_data i2c_algo;
680 struct i2c_client i2c_client;
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681 int i2c_state; /* i2c bit state */
682 struct mutex i2c_bus_lock; /* lock i2c bus */
683
684
685 /* Program Index information */
686 u32 pgm_info_offset; /* start of pgm info in encoder memory */
687 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
688 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
689 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
690 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
691
692
693 /* Miscellaneous */
694 u32 open_id; /* incremented each time an open occurs, is >= 1 */
695 struct v4l2_prio_state prio; /* priority state */
696 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
697 int speed; /* current playback speed setting */
698 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
699 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
700 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
701 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
702 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
0d82fe80 703 u32 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
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704
705
706 /* VBI state info */
707 struct vbi_info vbi; /* VBI-specific data */
708
709
710 /* YUV playback */
711 struct yuv_playback_info yuv_info; /* YUV playback data */
1a0adaf3 712
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713
714 /* OSD support */
715 unsigned long osd_video_pbase;
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716 int osd_global_alpha_state; /* 1 = global alpha is on */
717 int osd_local_alpha_state; /* 1 = local alpha is on */
718 int osd_chroma_key_state; /* 1 = chroma-keying is on */
719 u8 osd_global_alpha; /* current global alpha */
720 u32 osd_chroma_key; /* current chroma key */
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721 struct v4l2_rect osd_rect; /* current OSD position and size */
722 struct v4l2_rect main_rect; /* current Main window position and size */
7b3a0d49 723 struct osd_info *osd_info; /* ivtvfb private OSD info */
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724};
725
8ac05ae3 726static inline struct ivtv *to_ivtv(struct v4l2_device *v4l2_dev)
67ec09fd 727{
8ac05ae3 728 return container_of(v4l2_dev, struct ivtv, v4l2_dev);
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729}
730
1a0adaf3 731/* Globals */
1a0adaf3 732extern int ivtv_first_minor;
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733
734/*==============Prototypes==================*/
735
736/* Hardware/IRQ */
737void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
738void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
739
740/* try to set output mode, return current mode. */
741int ivtv_set_output_mode(struct ivtv *itv, int mode);
742
743/* return current output stream based on current mode */
744struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
745
746/* Return non-zero if a signal is pending */
201700d3 747int ivtv_msleep_timeout(unsigned int msecs, int intr);
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748
749/* Wait on queue, returns -EINTR if interrupted */
750int ivtv_waitq(wait_queue_head_t *waitq);
751
752/* Read Hauppauge eeprom */
753struct tveeprom; /* forward reference */
754void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
755
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756/* First-open initialization: load firmware, init cx25840, etc. */
757int ivtv_init_on_first_open(struct ivtv *itv);
758
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759/* Test if the current VBI mode is raw (1) or sliced (0) */
760static inline int ivtv_raw_vbi(const struct ivtv *itv)
761{
762 return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
763}
764
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765/* This is a PCI post thing, where if the pci register is not read, then
766 the write doesn't always take effect right away. By reading back the
767 register any pending PCI writes will be performed (in order), and so
768 you can be sure that the writes are guaranteed to be done.
769
770 Rarely needed, only in some timing sensitive cases.
771 Apparently if this is not done some motherboards seem
772 to kill the firmware and get into the broken state until computer is
773 rebooted. */
774#define write_sync(val, reg) \
775 do { writel(val, reg); readl(reg); } while (0)
776
777#define read_reg(reg) readl(itv->reg_mem + (reg))
778#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
779#define write_reg_sync(val, reg) \
780 do { write_reg(val, reg); read_reg(reg); } while (0)
781
782#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
783#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
784#define write_enc_sync(val, addr) \
785 do { write_enc(val, addr); read_enc(addr); } while (0)
786
787#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
788#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
789#define write_dec_sync(val, addr) \
790 do { write_dec(val, addr); read_dec(addr); } while (0)
791
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792/* Call the specified callback for all subdevs matching hw (if 0, then
793 match them all). Ignore any errors. */
794#define ivtv_call_hw(itv, hw, o, f, args...) \
8ac05ae3 795 __v4l2_device_call_subdevs(&(itv)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
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796
797#define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)
798
799/* Call the specified callback for all subdevs matching hw (if 0, then
800 match them all). If the callback returns an error other than 0 or
801 -ENOIOCTLCMD, then return with that error code. */
802#define ivtv_call_hw_err(itv, hw, o, f, args...) \
8ac05ae3 803 __v4l2_device_call_subdevs_until_err(&(itv)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
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804
805#define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)
806
612570f2 807#endif
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