V4L/DVB (10487): doc: update hm12 documentation.
[deliverable/linux.git] / drivers / media / video / ivtv / ivtv-driver.h
CommitLineData
1a0adaf3
HV
1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39#include <linux/version.h>
40#include <linux/module.h>
1a0adaf3
HV
41#include <linux/init.h>
42#include <linux/delay.h>
43#include <linux/sched.h>
44#include <linux/fs.h>
45#include <linux/pci.h>
46#include <linux/interrupt.h>
47#include <linux/spinlock.h>
48#include <linux/i2c.h>
49#include <linux/i2c-algo-bit.h>
50#include <linux/list.h>
51#include <linux/unistd.h>
1a0adaf3 52#include <linux/pagemap.h>
11763609 53#include <linux/scatterlist.h>
1a0adaf3
HV
54#include <linux/workqueue.h>
55#include <linux/mutex.h>
56#include <asm/uaccess.h>
57#include <asm/system.h>
1a651a00 58#include <asm/byteorder.h>
1a0adaf3
HV
59
60#include <linux/dvb/video.h>
61#include <linux/dvb/audio.h>
62#include <media/v4l2-common.h>
35ea11ff 63#include <media/v4l2-ioctl.h>
67ec09fd 64#include <media/v4l2-device.h>
1a0adaf3
HV
65#include <media/tuner.h>
66#include <media/cx2341x.h>
67
51b39dfa 68#include <linux/ivtv.h>
1a0adaf3 69
33c0fcad 70/* Memory layout */
1a0adaf3 71#define IVTV_ENCODER_OFFSET 0x00000000
33c0fcad 72#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3 73#define IVTV_DECODER_OFFSET 0x01000000
33c0fcad 74#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
1a0adaf3
HV
75#define IVTV_REG_OFFSET 0x02000000
76#define IVTV_REG_SIZE 0x00010000
77
32db7754
HV
78/* Maximum ivtv driver instances. Some people have a huge number of
79 capture cards, so set this to a high value. */
80#define IVTV_MAX_CARDS 32
1a0adaf3 81
1a0adaf3
HV
82#define IVTV_ENC_STREAM_TYPE_MPG 0
83#define IVTV_ENC_STREAM_TYPE_YUV 1
84#define IVTV_ENC_STREAM_TYPE_VBI 2
85#define IVTV_ENC_STREAM_TYPE_PCM 3
86#define IVTV_ENC_STREAM_TYPE_RAD 4
87#define IVTV_DEC_STREAM_TYPE_MPG 5
88#define IVTV_DEC_STREAM_TYPE_VBI 6
89#define IVTV_DEC_STREAM_TYPE_VOUT 7
90#define IVTV_DEC_STREAM_TYPE_YUV 8
91#define IVTV_MAX_STREAMS 9
92
1a0adaf3
HV
93#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
94
1a0adaf3
HV
95/* DMA Registers */
96#define IVTV_REG_DMAXFER (0x0000)
97#define IVTV_REG_DMASTATUS (0x0004)
98#define IVTV_REG_DECDMAADDR (0x0008)
99#define IVTV_REG_ENCDMAADDR (0x000c)
100#define IVTV_REG_DMACONTROL (0x0010)
101#define IVTV_REG_IRQSTATUS (0x0040)
102#define IVTV_REG_IRQMASK (0x0048)
103
104/* Setup Registers */
105#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
106#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
107#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
108#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
109#define IVTV_REG_VDM (0x2800)
110#define IVTV_REG_AO (0x2D00)
111#define IVTV_REG_BYTEFLUSH (0x2D24)
112#define IVTV_REG_SPU (0x9050)
113#define IVTV_REG_HW_BLOCKS (0x9054)
114#define IVTV_REG_VPU (0x9058)
115#define IVTV_REG_APU (0xA064)
116
1a0adaf3 117/* debugging */
33c0fcad 118extern int ivtv_debug;
1a0adaf3 119
1aa32c2f
HV
120#define IVTV_DBGFLG_WARN (1 << 0)
121#define IVTV_DBGFLG_INFO (1 << 1)
122#define IVTV_DBGFLG_MB (1 << 2)
123#define IVTV_DBGFLG_IOCTL (1 << 3)
124#define IVTV_DBGFLG_FILE (1 << 4)
125#define IVTV_DBGFLG_DMA (1 << 5)
126#define IVTV_DBGFLG_IRQ (1 << 6)
127#define IVTV_DBGFLG_DEC (1 << 7)
128#define IVTV_DBGFLG_YUV (1 << 8)
129#define IVTV_DBGFLG_I2C (1 << 9)
bd58df6d 130/* Flag to turn on high volume debugging */
1aa32c2f 131#define IVTV_DBGFLG_HIGHVOL (1 << 10)
1a0adaf3 132
1a0adaf3
HV
133#define IVTV_DEBUG(x, type, fmt, args...) \
134 do { \
135 if ((x) & ivtv_debug) \
67ec09fd 136 v4l2_info(&itv->device, " " type ": " fmt , ##args); \
1a0adaf3 137 } while (0)
1aa32c2f
HV
138#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
139#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
140#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
141#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
1a0adaf3 142#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
HV
143#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
144#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
145#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
146#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
147#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
1a0adaf3 148
bd58df6d
HV
149#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
150 do { \
67ec09fd
HV
151 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
152 v4l2_info(&itv->device, " " type ": " fmt , ##args); \
bd58df6d 153 } while (0)
1aa32c2f
HV
154#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
155#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
156#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
157#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
bd58df6d 158#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
1aa32c2f
HV
159#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
160#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
161#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
162#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
163#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
bd58df6d 164
1a0adaf3 165/* Standard kernel messages */
67ec09fd
HV
166#define IVTV_ERR(fmt, args...) v4l2_err(&itv->device, fmt , ## args)
167#define IVTV_WARN(fmt, args...) v4l2_warn(&itv->device, fmt , ## args)
168#define IVTV_INFO(fmt, args...) v4l2_info(&itv->device, fmt , ## args)
1a0adaf3 169
1a0adaf3
HV
170/* output modes (cx23415 only) */
171#define OUT_NONE 0
172#define OUT_MPG 1
173#define OUT_YUV 2
174#define OUT_UDMA_YUV 3
175#define OUT_PASSTHROUGH 4
176
177#define IVTV_MAX_PGM_INDEX (400)
178
1a0adaf3 179struct ivtv_options {
a158f355
HV
180 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
181 int cardtype; /* force card type on load */
182 int tuner; /* set tuner on load */
183 int radio; /* enable/disable radio */
184 int newi2c; /* new I2C algorithm */
1a0adaf3
HV
185};
186
1a0adaf3
HV
187/* ivtv-specific mailbox template */
188struct ivtv_mailbox {
189 u32 flags;
190 u32 cmd;
191 u32 retval;
192 u32 timeout;
193 u32 data[CX2341X_MBOX_MAX_DATA];
194};
195
196struct ivtv_api_cache {
197 unsigned long last_jiffies; /* when last command was issued */
198 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
199};
200
201struct ivtv_mailbox_data {
202 volatile struct ivtv_mailbox __iomem *mbox;
203 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
204 If the bit is set, then the corresponding mailbox is in use by the driver. */
205 unsigned long busy;
206 u8 max_mbox;
207};
208
209/* per-buffer bit flags */
f4071b85 210#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
1a0adaf3
HV
211
212/* per-stream, s_flags */
213#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
214#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
215#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
216
217#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
218#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
219#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
220#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
221#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
222#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
223
dc02d50a
HV
224#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
225#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
226
1a0adaf3 227/* per-ivtv, i_flags */
1e13f9e3
HV
228#define IVTV_F_I_DMA 0 /* DMA in progress */
229#define IVTV_F_I_UDMA 1 /* UDMA in progress */
230#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
a158f355
HV
231#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
232#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
233#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
234#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
1e13f9e3 235#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
1e13f9e3
HV
236#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
237#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
238#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
239#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
240#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
1a0adaf3 241#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
a158f355 242#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
dc02d50a
HV
243#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
244#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
245#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
246#define IVTV_F_I_PIO 19 /* PIO in progress */
ac425144 247#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
c976bc82
HV
248#define IVTV_F_I_INITED 21 /* set after first open */
249#define IVTV_F_I_FAILED 22 /* set if first open failed */
d526afe0 250#define IVTV_F_I_WORK_INITED 23 /* worker thread was initialized */
1a0adaf3
HV
251
252/* Event notifications */
1e13f9e3
HV
253#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
254#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
255#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
256#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
1a0adaf3
HV
257
258/* Scatter-Gather array element, used in DMA transfers */
37093b1e 259struct ivtv_sg_element {
b0510f8d
AV
260 __le32 src;
261 __le32 dst;
262 __le32 size;
263};
264
265struct ivtv_sg_host_element {
1a0adaf3
HV
266 u32 src;
267 u32 dst;
268 u32 size;
269};
270
271struct ivtv_user_dma {
272 struct mutex lock;
273 int page_count;
274 struct page *map[IVTV_DMA_SG_OSD_ENT];
0989fd2c
HV
275 /* Needed when dealing with highmem userspace buffers */
276 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
HV
277
278 /* Base Dev SG Array for cx23415/6 */
37093b1e 279 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
1a0adaf3
HV
280 dma_addr_t SG_handle;
281 int SG_length;
282
283 /* SG List of Buffers */
284 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
285};
286
287struct ivtv_dma_page_info {
288 unsigned long uaddr;
289 unsigned long first;
290 unsigned long last;
291 unsigned int offset;
292 unsigned int tail;
293 int page_count;
294};
295
296struct ivtv_buffer {
297 struct list_head list;
298 dma_addr_t dma_handle;
f4071b85
HV
299 unsigned short b_flags;
300 unsigned short dma_xfer_cnt;
1a0adaf3 301 char *buf;
1a0adaf3
HV
302 u32 bytesused;
303 u32 readpos;
304};
305
306struct ivtv_queue {
a158f355
HV
307 struct list_head list; /* the list of buffers in this queue */
308 u32 buffers; /* number of buffers in this queue */
309 u32 length; /* total number of bytes of available buffer space */
310 u32 bytesused; /* total number of bytes used in this queue */
1a0adaf3
HV
311};
312
a158f355 313struct ivtv; /* forward reference */
1a0adaf3
HV
314
315struct ivtv_stream {
316 /* These first four fields are always set, even if the stream
317 is not actually created. */
318 struct video_device *v4l2dev; /* NULL when stream not created */
319 struct ivtv *itv; /* for ease of use */
320 const char *name; /* name of the stream */
321 int type; /* stream type */
322
323 u32 id;
a158f355
HV
324 spinlock_t qlock; /* locks access to the queues */
325 unsigned long s_flags; /* status flags, see above */
326 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
37093b1e
HV
327 u32 pending_offset;
328 u32 pending_backup;
329 u64 pending_pts;
330
1a0adaf3
HV
331 u32 dma_offset;
332 u32 dma_backup;
333 u64 dma_pts;
334
335 int subtype;
336 wait_queue_head_t waitq;
337 u32 dma_last_offset;
338
339 /* Buffer Stats */
340 u32 buffers;
341 u32 buf_size;
342 u32 buffers_stolen;
343
344 /* Buffer Queues */
345 struct ivtv_queue q_free; /* free buffers */
346 struct ivtv_queue q_full; /* full buffers */
347 struct ivtv_queue q_io; /* waiting for I/O */
348 struct ivtv_queue q_dma; /* waiting for DMA */
349 struct ivtv_queue q_predma; /* waiting for DMA */
350
f4071b85
HV
351 /* DMA xfer counter, buffers belonging to the same DMA
352 xfer will have the same dma_xfer_cnt. */
353 u16 dma_xfer_cnt;
354
1a0adaf3 355 /* Base Dev SG Array for cx23415/6 */
b0510f8d
AV
356 struct ivtv_sg_host_element *sg_pending;
357 struct ivtv_sg_host_element *sg_processing;
37093b1e
HV
358 struct ivtv_sg_element *sg_dma;
359 dma_addr_t sg_handle;
360 int sg_pending_size;
361 int sg_processing_size;
362 int sg_processed;
1a0adaf3
HV
363
364 /* SG List of Buffers */
365 struct scatterlist *SGlist;
366};
367
368struct ivtv_open_id {
a158f355
HV
369 u32 open_id; /* unique ID for this file descriptor */
370 int type; /* stream type */
371 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
372 enum v4l2_priority prio; /* priority */
1a0adaf3
HV
373 struct ivtv *itv;
374};
375
1a0adaf3
HV
376struct yuv_frame_info
377{
378 u32 update;
33c0fcad
HV
379 s32 src_x;
380 s32 src_y;
381 u32 src_w;
382 u32 src_h;
383 s32 dst_x;
384 s32 dst_y;
385 u32 dst_w;
386 u32 dst_h;
387 s32 pan_x;
388 s32 pan_y;
1a0adaf3
HV
389 u32 vis_w;
390 u32 vis_h;
391 u32 interlaced_y;
392 u32 interlaced_uv;
33c0fcad 393 s32 tru_x;
1a0adaf3
HV
394 u32 tru_w;
395 u32 tru_h;
396 u32 offset_y;
33c0fcad 397 s32 lace_mode;
3b5c1c8e
IA
398 u32 sync_field;
399 u32 delay;
400 u32 interlaced;
1a0adaf3
HV
401};
402
403#define IVTV_YUV_MODE_INTERLACED 0x00
404#define IVTV_YUV_MODE_PROGRESSIVE 0x01
405#define IVTV_YUV_MODE_AUTO 0x02
406#define IVTV_YUV_MODE_MASK 0x03
407
408#define IVTV_YUV_SYNC_EVEN 0x00
409#define IVTV_YUV_SYNC_ODD 0x04
410#define IVTV_YUV_SYNC_MASK 0x04
411
a3e5f5e2
IA
412#define IVTV_YUV_BUFFERS 8
413
1a0adaf3
HV
414struct yuv_playback_info
415{
416 u32 reg_2834;
417 u32 reg_2838;
418 u32 reg_283c;
419 u32 reg_2840;
420 u32 reg_2844;
421 u32 reg_2848;
422 u32 reg_2854;
423 u32 reg_285c;
424 u32 reg_2864;
425
426 u32 reg_2870;
427 u32 reg_2874;
428 u32 reg_2890;
429 u32 reg_2898;
430 u32 reg_289c;
431
432 u32 reg_2918;
433 u32 reg_291c;
434 u32 reg_2920;
435 u32 reg_2924;
436 u32 reg_2928;
437 u32 reg_292c;
438 u32 reg_2930;
439
440 u32 reg_2934;
441
442 u32 reg_2938;
443 u32 reg_293c;
444 u32 reg_2940;
445 u32 reg_2944;
446 u32 reg_2948;
447 u32 reg_294c;
448 u32 reg_2950;
449 u32 reg_2954;
450 u32 reg_2958;
451 u32 reg_295c;
452 u32 reg_2960;
453 u32 reg_2964;
454 u32 reg_2968;
455 u32 reg_296c;
456
457 u32 reg_2970;
458
459 int v_filter_1;
460 int v_filter_2;
461 int h_filter;
462
88ab075a
IA
463 u8 track_osd; /* Should yuv output track the OSD size & position */
464
1a0adaf3
HV
465 u32 osd_x_offset;
466 u32 osd_y_offset;
467
468 u32 osd_x_pan;
469 u32 osd_y_pan;
470
471 u32 osd_vis_w;
472 u32 osd_vis_h;
473
77aded6b
IA
474 u32 osd_full_w;
475 u32 osd_full_h;
476
1a0adaf3
HV
477 int decode_height;
478
1a0adaf3
HV
479 int lace_mode;
480 int lace_threshold;
1a0adaf3
HV
481 int lace_sync_field;
482
483 atomic_t next_dma_frame;
484 atomic_t next_fill_frame;
485
486 u32 yuv_forced_update;
487 int update_frame;
bfd7beac 488
bfd7beac
IA
489 u8 fields_lapsed; /* Counter used when delaying a frame */
490
a3e5f5e2 491 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
1a0adaf3
HV
492 struct yuv_frame_info old_frame_info;
493 struct yuv_frame_info old_frame_info_args;
494
495 void *blanking_ptr;
496 dma_addr_t blanking_dmaptr;
c240ad00
IA
497
498 int stream_size;
a3e5f5e2
IA
499
500 u8 draw_frame; /* PVR350 buffer to draw into */
501 u8 max_frames_buffered; /* Maximum number of frames to buffer */
77aded6b
IA
502
503 struct v4l2_rect main_rect;
504 u32 v4l2_src_w;
505 u32 v4l2_src_h;
2bd7ac55
IA
506
507 u8 running; /* Have any frames been displayed */
1a0adaf3
HV
508};
509
510#define IVTV_VBI_FRAMES 32
511
512/* VBI data */
2f3a9893
HV
513struct vbi_cc {
514 u8 odd[2]; /* two-byte payload of odd field */
515 u8 even[2]; /* two-byte payload of even field */;
516};
517
518struct vbi_vps {
519 u8 data[5]; /* five-byte VPS payload */
520};
521
1a0adaf3 522struct vbi_info {
effa0b08
HV
523 /* VBI general data, does not change during streaming */
524
a158f355
HV
525 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
526 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
527 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
528 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
529 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
530 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
531
effa0b08
HV
532 u32 start[2]; /* start of first VBI line in the odd/even fields */
533 u32 count; /* number of VBI lines per field */
534 u32 raw_size; /* size of raw VBI line from the digitizer */
535 u32 sliced_size; /* size of sliced VBI line from the digitizer */
536
537 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
538 u32 enc_start; /* start in encoder memory of VBI capture buffers */
539 u32 enc_size; /* size of VBI capture area */
540 int fpi; /* number of VBI frames per interrupt */
541
542 struct v4l2_format in; /* current VBI capture format */
543 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
544 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
545
546 /* Raw VBI compatibility hack */
547
548 u32 frame; /* frame counter hack needed for backwards compatibility
549 of old VBI software */
550
551 /* Sliced VBI output data */
552
553 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
2f3a9893 554 prevent dropping CC data if they couldn't be
effa0b08
HV
555 processed fast enough */
556 int cc_payload_idx; /* index in cc_payload */
557 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
558 int wss_payload; /* sliced VBI WSS payload */
559 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
560 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
561
562 /* Sliced VBI capture data */
563
564 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
565 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
566
567 /* VBI Embedding data */
1a0adaf3
HV
568
569 /* Buffer for VBI data inserted into MPEG stream.
570 The first byte is a dummy byte that's never used.
571 The next 16 bytes contain the MPEG header for the VBI data,
572 the remainder is the actual VBI data.
573 The max size accepted by the MPEG VBI reinsertion turns out
574 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
575 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
576 a single line header byte and 2 * 18 is the number of VBI lines per frame.
577
578 However, it seems that the data must be 1K aligned, so we have to
579 pad the data until the 1 or 2 K boundary.
580
581 This pointer array will allocate 2049 bytes to store each VBI frame. */
582 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
583 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
effa0b08
HV
584 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
585 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
586 to be inserted in the MPEG stream */
1a0adaf3
HV
587};
588
589/* forward declaration of struct defined in ivtv-cards.h */
590struct ivtv_card;
591
592/* Struct to hold info about ivtv cards */
593struct ivtv {
fd8b281a 594 /* General fixed card data */
fd8b281a 595 struct pci_dev *dev; /* PCI device */
1a0adaf3 596 const struct ivtv_card *card; /* card information */
fd8b281a 597 const char *card_name; /* full name of the card */
d9009201 598 const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
fd8b281a
HV
599 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
600 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
601 u8 nof_inputs; /* number of video inputs */
602 u8 nof_audio_inputs; /* number of audio inputs */
603 u32 v4l2_cap; /* V4L2 capabilities of card */
604 u32 hw_flags; /* hardware description of the board */
fd8b281a 605 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
67ec09fd
HV
606 struct v4l2_subdev *sd_video; /* controlling video decoder subdev */
607 struct v4l2_subdev *sd_audio; /* controlling audio subdev */
608 struct v4l2_subdev *sd_muxer; /* controlling audio muxer subdev */
fd8b281a
HV
609 u32 base_addr; /* PCI resource base address */
610 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
611 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
612 volatile void __iomem *reg_mem; /* pointer to mapped registers */
613 struct ivtv_options options; /* user options */
614
67ec09fd
HV
615 struct v4l2_device device;
616 struct v4l2_subdev sd_gpio; /* GPIO sub-device */
617 u16 instance;
fd8b281a
HV
618
619 /* High-level state info */
620 unsigned long i_flags; /* global ivtv flags */
621 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
622 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
623 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
624 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
625 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
626 u32 audio_input; /* current audio input */
627 u32 active_input; /* current video input */
628 u32 active_output; /* current video output */
629 v4l2_std_id std; /* current capture TV standard */
630 v4l2_std_id std_out; /* current TV output standard */
631 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
632 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
633 struct cx2341x_mpeg_params params; /* current encoder parameters */
634
635
636 /* Locking */
637 spinlock_t lock; /* lock access to this struct */
a158f355 638 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
fd8b281a 639
fd8b281a
HV
640 /* Streams */
641 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
642 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
643 atomic_t capturing; /* count number of active capture streams */
644 atomic_t decoding; /* count number of active decoding streams */
645
646
647 /* Interrupts & DMA */
648 u32 irqmask; /* active interrupts */
649 u32 irq_rr_idx; /* round-robin stream index */
650 struct workqueue_struct *irq_work_queues; /* workqueue for PIO/YUV/VBI actions */
651 struct work_struct irq_work_queue; /* work entry */
652 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
653 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
654 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
655 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
656 u32 dma_data_req_size; /* store size of current DMA request */
657 int dma_retries; /* current DMA retry attempt */
658 struct ivtv_user_dma udma; /* user based DMA for OSD */
659 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
a158f355 660 u32 last_vsync_field; /* last seen vsync field */
fd8b281a
HV
661 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
662 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
663 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
664 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
665
666
667 /* Mailbox */
668 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
669 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
670 struct ivtv_api_cache api_cache[256]; /* cached API commands */
671
672
673 /* I2C */
674 struct i2c_adapter i2c_adap;
675 struct i2c_algo_bit_data i2c_algo;
676 struct i2c_client i2c_client;
fd8b281a
HV
677 int i2c_state; /* i2c bit state */
678 struct mutex i2c_bus_lock; /* lock i2c bus */
679
680
681 /* Program Index information */
682 u32 pgm_info_offset; /* start of pgm info in encoder memory */
683 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
684 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
685 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
686 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
687
688
689 /* Miscellaneous */
690 u32 open_id; /* incremented each time an open occurs, is >= 1 */
691 struct v4l2_prio_state prio; /* priority state */
692 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
693 int speed; /* current playback speed setting */
694 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
695 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
696 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
697 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
698 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
0d82fe80 699 u32 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
fd8b281a
HV
700
701
702 /* VBI state info */
703 struct vbi_info vbi; /* VBI-specific data */
704
705
706 /* YUV playback */
707 struct yuv_playback_info yuv_info; /* YUV playback data */
1a0adaf3 708
1a0adaf3
HV
709
710 /* OSD support */
711 unsigned long osd_video_pbase;
fd8b281a
HV
712 int osd_global_alpha_state; /* 1 = global alpha is on */
713 int osd_local_alpha_state; /* 1 = local alpha is on */
714 int osd_chroma_key_state; /* 1 = chroma-keying is on */
715 u8 osd_global_alpha; /* current global alpha */
716 u32 osd_chroma_key; /* current chroma key */
fd8b281a
HV
717 struct v4l2_rect osd_rect; /* current OSD position and size */
718 struct v4l2_rect main_rect; /* current Main window position and size */
7b3a0d49 719 struct osd_info *osd_info; /* ivtvfb private OSD info */
1a0adaf3
HV
720};
721
67ec09fd
HV
722static inline struct ivtv *to_ivtv(struct v4l2_device *dev)
723{
724 return container_of(dev, struct ivtv, device);
725}
726
1a0adaf3 727/* Globals */
1a0adaf3 728extern int ivtv_first_minor;
1a0adaf3
HV
729
730/*==============Prototypes==================*/
731
732/* Hardware/IRQ */
733void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
734void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
735
736/* try to set output mode, return current mode. */
737int ivtv_set_output_mode(struct ivtv *itv, int mode);
738
739/* return current output stream based on current mode */
740struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
741
742/* Return non-zero if a signal is pending */
201700d3 743int ivtv_msleep_timeout(unsigned int msecs, int intr);
1a0adaf3
HV
744
745/* Wait on queue, returns -EINTR if interrupted */
746int ivtv_waitq(wait_queue_head_t *waitq);
747
748/* Read Hauppauge eeprom */
749struct tveeprom; /* forward reference */
750void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
751
c976bc82
HV
752/* First-open initialization: load firmware, init cx25840, etc. */
753int ivtv_init_on_first_open(struct ivtv *itv);
754
a8b86435
HV
755/* Test if the current VBI mode is raw (1) or sliced (0) */
756static inline int ivtv_raw_vbi(const struct ivtv *itv)
757{
758 return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
759}
760
1a0adaf3
HV
761/* This is a PCI post thing, where if the pci register is not read, then
762 the write doesn't always take effect right away. By reading back the
763 register any pending PCI writes will be performed (in order), and so
764 you can be sure that the writes are guaranteed to be done.
765
766 Rarely needed, only in some timing sensitive cases.
767 Apparently if this is not done some motherboards seem
768 to kill the firmware and get into the broken state until computer is
769 rebooted. */
770#define write_sync(val, reg) \
771 do { writel(val, reg); readl(reg); } while (0)
772
773#define read_reg(reg) readl(itv->reg_mem + (reg))
774#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
775#define write_reg_sync(val, reg) \
776 do { write_reg(val, reg); read_reg(reg); } while (0)
777
778#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
779#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
780#define write_enc_sync(val, addr) \
781 do { write_enc(val, addr); read_enc(addr); } while (0)
782
783#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
784#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
785#define write_dec_sync(val, addr) \
786 do { write_dec(val, addr); read_dec(addr); } while (0)
787
67ec09fd
HV
788/* Call the specified callback for all subdevs matching hw (if 0, then
789 match them all). Ignore any errors. */
790#define ivtv_call_hw(itv, hw, o, f, args...) \
791 __v4l2_device_call_subdevs(&(itv)->device, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
792
793#define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)
794
795/* Call the specified callback for all subdevs matching hw (if 0, then
796 match them all). If the callback returns an error other than 0 or
797 -ENOIOCTLCMD, then return with that error code. */
798#define ivtv_call_hw_err(itv, hw, o, f, args...) \
799 __v4l2_device_call_subdevs_until_err(&(itv)->device, !(hw) || (sd->grp_id & (hw)), o, f , ##args)
800
801#define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)
802
612570f2 803#endif
This page took 0.333292 seconds and 5 git commands to generate.