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fbe60daa MS |
1 | /* |
2 | * Video Capture Driver (Video for Linux 1/2) | |
3 | * for the Matrox Marvel G200,G400 and Rainbow Runner-G series | |
4 | * | |
5 | * This module is an interface to the KS0127 video decoder chip. | |
6 | * | |
7 | * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version 2 | |
12 | * of the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | * | |
23 | ***************************************************************************** | |
24 | * | |
25 | * Modified and extended by | |
26 | * Mike Bernson <mike@mlb.org> | |
27 | * Gerard v.d. Horst | |
28 | * Leon van Stuivenberg <l.vanstuivenberg@chello.nl> | |
29 | * Gernot Ziegler <gz@lysator.liu.se> | |
30 | * | |
31 | * Version History: | |
32 | * V1.0 Ryan Drake Initial version by Ryan Drake | |
33 | * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard | |
34 | */ | |
35 | ||
fbe60daa MS |
36 | #include <linux/init.h> |
37 | #include <linux/module.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/errno.h> | |
40 | #include <linux/kernel.h> | |
fbe60daa | 41 | #include <linux/i2c.h> |
0750e971 | 42 | #include <linux/videodev2.h> |
5a0e3ad6 | 43 | #include <linux/slab.h> |
0750e971 HV |
44 | #include <media/v4l2-device.h> |
45 | #include <media/v4l2-chip-ident.h> | |
9875c0fb | 46 | #include "ks0127.h" |
fbe60daa | 47 | |
9875c0fb HV |
48 | MODULE_DESCRIPTION("KS0127 video decoder driver"); |
49 | MODULE_AUTHOR("Ryan Drake"); | |
50 | MODULE_LICENSE("GPL"); | |
fbe60daa | 51 | |
2d26698e | 52 | /* Addresses */ |
0750e971 HV |
53 | #define I2C_KS0127_ADDON 0xD8 |
54 | #define I2C_KS0127_ONBOARD 0xDA | |
55 | ||
fbe60daa MS |
56 | |
57 | /* ks0127 control registers */ | |
58 | #define KS_STAT 0x00 | |
59 | #define KS_CMDA 0x01 | |
60 | #define KS_CMDB 0x02 | |
61 | #define KS_CMDC 0x03 | |
62 | #define KS_CMDD 0x04 | |
63 | #define KS_HAVB 0x05 | |
64 | #define KS_HAVE 0x06 | |
65 | #define KS_HS1B 0x07 | |
66 | #define KS_HS1E 0x08 | |
67 | #define KS_HS2B 0x09 | |
68 | #define KS_HS2E 0x0a | |
69 | #define KS_AGC 0x0b | |
70 | #define KS_HXTRA 0x0c | |
71 | #define KS_CDEM 0x0d | |
72 | #define KS_PORTAB 0x0e | |
73 | #define KS_LUMA 0x0f | |
74 | #define KS_CON 0x10 | |
75 | #define KS_BRT 0x11 | |
76 | #define KS_CHROMA 0x12 | |
77 | #define KS_CHROMB 0x13 | |
78 | #define KS_DEMOD 0x14 | |
79 | #define KS_SAT 0x15 | |
80 | #define KS_HUE 0x16 | |
81 | #define KS_VERTIA 0x17 | |
82 | #define KS_VERTIB 0x18 | |
83 | #define KS_VERTIC 0x19 | |
84 | #define KS_HSCLL 0x1a | |
85 | #define KS_HSCLH 0x1b | |
86 | #define KS_VSCLL 0x1c | |
87 | #define KS_VSCLH 0x1d | |
88 | #define KS_OFMTA 0x1e | |
89 | #define KS_OFMTB 0x1f | |
90 | #define KS_VBICTL 0x20 | |
91 | #define KS_CCDAT2 0x21 | |
92 | #define KS_CCDAT1 0x22 | |
93 | #define KS_VBIL30 0x23 | |
94 | #define KS_VBIL74 0x24 | |
95 | #define KS_VBIL118 0x25 | |
96 | #define KS_VBIL1512 0x26 | |
97 | #define KS_TTFRAM 0x27 | |
98 | #define KS_TESTA 0x28 | |
99 | #define KS_UVOFFH 0x29 | |
100 | #define KS_UVOFFL 0x2a | |
101 | #define KS_UGAIN 0x2b | |
102 | #define KS_VGAIN 0x2c | |
103 | #define KS_VAVB 0x2d | |
104 | #define KS_VAVE 0x2e | |
105 | #define KS_CTRACK 0x2f | |
106 | #define KS_POLCTL 0x30 | |
107 | #define KS_REFCOD 0x31 | |
108 | #define KS_INVALY 0x32 | |
109 | #define KS_INVALU 0x33 | |
110 | #define KS_INVALV 0x34 | |
111 | #define KS_UNUSEY 0x35 | |
112 | #define KS_UNUSEU 0x36 | |
113 | #define KS_UNUSEV 0x37 | |
114 | #define KS_USRSAV 0x38 | |
115 | #define KS_USREAV 0x39 | |
116 | #define KS_SHS1A 0x3a | |
117 | #define KS_SHS1B 0x3b | |
118 | #define KS_SHS1C 0x3c | |
119 | #define KS_CMDE 0x3d | |
120 | #define KS_VSDEL 0x3e | |
121 | #define KS_CMDF 0x3f | |
122 | #define KS_GAMMA0 0x40 | |
123 | #define KS_GAMMA1 0x41 | |
124 | #define KS_GAMMA2 0x42 | |
125 | #define KS_GAMMA3 0x43 | |
126 | #define KS_GAMMA4 0x44 | |
127 | #define KS_GAMMA5 0x45 | |
128 | #define KS_GAMMA6 0x46 | |
129 | #define KS_GAMMA7 0x47 | |
130 | #define KS_GAMMA8 0x48 | |
131 | #define KS_GAMMA9 0x49 | |
132 | #define KS_GAMMA10 0x4a | |
133 | #define KS_GAMMA11 0x4b | |
134 | #define KS_GAMMA12 0x4c | |
135 | #define KS_GAMMA13 0x4d | |
136 | #define KS_GAMMA14 0x4e | |
137 | #define KS_GAMMA15 0x4f | |
138 | #define KS_GAMMA16 0x50 | |
139 | #define KS_GAMMA17 0x51 | |
140 | #define KS_GAMMA18 0x52 | |
141 | #define KS_GAMMA19 0x53 | |
142 | #define KS_GAMMA20 0x54 | |
143 | #define KS_GAMMA21 0x55 | |
144 | #define KS_GAMMA22 0x56 | |
145 | #define KS_GAMMA23 0x57 | |
146 | #define KS_GAMMA24 0x58 | |
147 | #define KS_GAMMA25 0x59 | |
148 | #define KS_GAMMA26 0x5a | |
149 | #define KS_GAMMA27 0x5b | |
150 | #define KS_GAMMA28 0x5c | |
151 | #define KS_GAMMA29 0x5d | |
152 | #define KS_GAMMA30 0x5e | |
153 | #define KS_GAMMA31 0x5f | |
154 | #define KS_GAMMAD0 0x60 | |
155 | #define KS_GAMMAD1 0x61 | |
156 | #define KS_GAMMAD2 0x62 | |
157 | #define KS_GAMMAD3 0x63 | |
158 | #define KS_GAMMAD4 0x64 | |
159 | #define KS_GAMMAD5 0x65 | |
160 | #define KS_GAMMAD6 0x66 | |
161 | #define KS_GAMMAD7 0x67 | |
162 | #define KS_GAMMAD8 0x68 | |
163 | #define KS_GAMMAD9 0x69 | |
164 | #define KS_GAMMAD10 0x6a | |
165 | #define KS_GAMMAD11 0x6b | |
166 | #define KS_GAMMAD12 0x6c | |
167 | #define KS_GAMMAD13 0x6d | |
168 | #define KS_GAMMAD14 0x6e | |
169 | #define KS_GAMMAD15 0x6f | |
170 | #define KS_GAMMAD16 0x70 | |
171 | #define KS_GAMMAD17 0x71 | |
172 | #define KS_GAMMAD18 0x72 | |
173 | #define KS_GAMMAD19 0x73 | |
174 | #define KS_GAMMAD20 0x74 | |
175 | #define KS_GAMMAD21 0x75 | |
176 | #define KS_GAMMAD22 0x76 | |
177 | #define KS_GAMMAD23 0x77 | |
178 | #define KS_GAMMAD24 0x78 | |
179 | #define KS_GAMMAD25 0x79 | |
180 | #define KS_GAMMAD26 0x7a | |
181 | #define KS_GAMMAD27 0x7b | |
182 | #define KS_GAMMAD28 0x7c | |
183 | #define KS_GAMMAD29 0x7d | |
184 | #define KS_GAMMAD30 0x7e | |
185 | #define KS_GAMMAD31 0x7f | |
186 | ||
187 | ||
188 | /**************************************************************************** | |
189 | * mga_dev : represents one ks0127 chip. | |
190 | ****************************************************************************/ | |
191 | ||
192 | struct adjust { | |
193 | int contrast; | |
194 | int bright; | |
195 | int hue; | |
196 | int ugain; | |
197 | int vgain; | |
198 | }; | |
199 | ||
200 | struct ks0127 { | |
0750e971 | 201 | struct v4l2_subdev sd; |
107063c6 | 202 | v4l2_std_id norm; |
0750e971 | 203 | int ident; |
fbe60daa MS |
204 | u8 regs[256]; |
205 | }; | |
206 | ||
0750e971 HV |
207 | static inline struct ks0127 *to_ks0127(struct v4l2_subdev *sd) |
208 | { | |
209 | return container_of(sd, struct ks0127, sd); | |
210 | } | |
211 | ||
fbe60daa MS |
212 | |
213 | static int debug; /* insmod parameter */ | |
214 | ||
215 | module_param(debug, int, 0); | |
216 | MODULE_PARM_DESC(debug, "Debug output"); | |
fbe60daa MS |
217 | |
218 | static u8 reg_defaults[64]; | |
219 | ||
fbe60daa MS |
220 | static void init_reg_defaults(void) |
221 | { | |
9875c0fb | 222 | static int initialized; |
fbe60daa MS |
223 | u8 *table = reg_defaults; |
224 | ||
9875c0fb HV |
225 | if (initialized) |
226 | return; | |
227 | initialized = 1; | |
228 | ||
fbe60daa MS |
229 | table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */ |
230 | table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */ | |
231 | table[KS_CMDC] = 0x00; /* Test options */ | |
232 | /* clock & input select, write 1 to PORTA */ | |
233 | table[KS_CMDD] = 0x01; | |
234 | table[KS_HAVB] = 0x00; /* HAV Start Control */ | |
235 | table[KS_HAVE] = 0x00; /* HAV End Control */ | |
236 | table[KS_HS1B] = 0x10; /* HS1 Start Control */ | |
237 | table[KS_HS1E] = 0x00; /* HS1 End Control */ | |
238 | table[KS_HS2B] = 0x00; /* HS2 Start Control */ | |
239 | table[KS_HS2E] = 0x00; /* HS2 End Control */ | |
240 | table[KS_AGC] = 0x53; /* Manual setting for AGC */ | |
241 | table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */ | |
242 | table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */ | |
243 | table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */ | |
244 | table[KS_LUMA] = 0x01; /* Luma control */ | |
245 | table[KS_CON] = 0x00; /* Contrast Control */ | |
246 | table[KS_BRT] = 0x00; /* Brightness Control */ | |
247 | table[KS_CHROMA] = 0x2a; /* Chroma control A */ | |
248 | table[KS_CHROMB] = 0x90; /* Chroma control B */ | |
249 | table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */ | |
250 | table[KS_SAT] = 0x00; /* Color Saturation Control*/ | |
251 | table[KS_HUE] = 0x00; /* Hue Control */ | |
252 | table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */ | |
253 | /* Vertical Processing Control B, luma 1 line delayed */ | |
254 | table[KS_VERTIB] = 0x12; | |
255 | table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */ | |
256 | table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */ | |
257 | table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */ | |
258 | table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */ | |
259 | table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */ | |
260 | /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */ | |
261 | table[KS_OFMTA] = 0x30; | |
262 | table[KS_OFMTB] = 0x00; /* Output Control B */ | |
263 | /* VBI Decoder Control; 4bit fmt: avoid Y overflow */ | |
264 | table[KS_VBICTL] = 0x5d; | |
265 | table[KS_CCDAT2] = 0x00; /* Read Only register */ | |
266 | table[KS_CCDAT1] = 0x00; /* Read Only register */ | |
267 | table[KS_VBIL30] = 0xa8; /* VBI data decoding options */ | |
268 | table[KS_VBIL74] = 0xaa; /* VBI data decoding options */ | |
269 | table[KS_VBIL118] = 0x2a; /* VBI data decoding options */ | |
270 | table[KS_VBIL1512] = 0x00; /* VBI data decoding options */ | |
271 | table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */ | |
272 | table[KS_TESTA] = 0x00; /* test register, shouldn't be written */ | |
273 | table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */ | |
274 | table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */ | |
275 | table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */ | |
276 | table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */ | |
277 | table[KS_VAVB] = 0x07; /* VAV Begin */ | |
278 | table[KS_VAVE] = 0x00; /* VAV End */ | |
279 | table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */ | |
280 | table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */ | |
281 | table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */ | |
282 | table[KS_INVALY] = 0x10; /* Invalid Y Code */ | |
283 | table[KS_INVALU] = 0x80; /* Invalid U Code */ | |
284 | table[KS_INVALV] = 0x80; /* Invalid V Code */ | |
285 | table[KS_UNUSEY] = 0x10; /* Unused Y Code */ | |
286 | table[KS_UNUSEU] = 0x80; /* Unused U Code */ | |
287 | table[KS_UNUSEV] = 0x80; /* Unused V Code */ | |
288 | table[KS_USRSAV] = 0x00; /* reserved */ | |
289 | table[KS_USREAV] = 0x00; /* reserved */ | |
290 | table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */ | |
291 | /* User Defined SHS1 B, ALT656=1 on 0127B */ | |
292 | table[KS_SHS1B] = 0x80; | |
293 | table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */ | |
294 | table[KS_CMDE] = 0x00; /* Command Register E */ | |
295 | table[KS_VSDEL] = 0x00; /* VS Delay Control */ | |
296 | /* Command Register F, update -immediately- */ | |
297 | /* (there might come no vsync)*/ | |
298 | table[KS_CMDF] = 0x02; | |
299 | } | |
300 | ||
301 | ||
302 | /* We need to manually read because of a bug in the KS0127 chip. | |
303 | * | |
304 | * An explanation from kayork@mail.utexas.edu: | |
305 | * | |
306 | * During I2C reads, the KS0127 only samples for a stop condition | |
9875c0fb | 307 | * during the place where the acknowledge bit should be. Any standard |
fbe60daa MS |
308 | * I2C implementation (correctly) throws in another clock transition |
309 | * at the 9th bit, and the KS0127 will not recognize the stop condition | |
310 | * and will continue to clock out data. | |
311 | * | |
312 | * So we have to do the read ourself. Big deal. | |
9875c0fb | 313 | * workaround in i2c-algo-bit |
fbe60daa MS |
314 | */ |
315 | ||
316 | ||
0750e971 | 317 | static u8 ks0127_read(struct v4l2_subdev *sd, u8 reg) |
fbe60daa | 318 | { |
0750e971 | 319 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
fbe60daa MS |
320 | char val = 0; |
321 | struct i2c_msg msgs[] = { | |
0750e971 HV |
322 | { client->addr, 0, sizeof(reg), ® }, |
323 | { client->addr, I2C_M_RD | I2C_M_NO_RD_ACK, sizeof(val), &val } | |
9875c0fb | 324 | }; |
fbe60daa MS |
325 | int ret; |
326 | ||
0750e971 | 327 | ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); |
fbe60daa | 328 | if (ret != ARRAY_SIZE(msgs)) |
0750e971 | 329 | v4l2_dbg(1, debug, sd, "read error\n"); |
fbe60daa MS |
330 | |
331 | return val; | |
332 | } | |
333 | ||
334 | ||
0750e971 | 335 | static void ks0127_write(struct v4l2_subdev *sd, u8 reg, u8 val) |
fbe60daa | 336 | { |
0750e971 HV |
337 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
338 | struct ks0127 *ks = to_ks0127(sd); | |
9875c0fb | 339 | char msg[] = { reg, val }; |
fbe60daa | 340 | |
0750e971 HV |
341 | if (i2c_master_send(client, msg, sizeof(msg)) != sizeof(msg)) |
342 | v4l2_dbg(1, debug, sd, "write error\n"); | |
fbe60daa MS |
343 | |
344 | ks->regs[reg] = val; | |
345 | } | |
346 | ||
347 | ||
348 | /* generic bit-twiddling */ | |
0750e971 | 349 | static void ks0127_and_or(struct v4l2_subdev *sd, u8 reg, u8 and_v, u8 or_v) |
fbe60daa | 350 | { |
0750e971 | 351 | struct ks0127 *ks = to_ks0127(sd); |
9875c0fb | 352 | |
fbe60daa MS |
353 | u8 val = ks->regs[reg]; |
354 | val = (val & and_v) | or_v; | |
0750e971 | 355 | ks0127_write(sd, reg, val); |
fbe60daa MS |
356 | } |
357 | ||
358 | ||
359 | ||
360 | /**************************************************************************** | |
361 | * ks0127 private api | |
362 | ****************************************************************************/ | |
0750e971 | 363 | static void ks0127_init(struct v4l2_subdev *sd) |
fbe60daa | 364 | { |
0750e971 | 365 | struct ks0127 *ks = to_ks0127(sd); |
fbe60daa | 366 | u8 *table = reg_defaults; |
9875c0fb | 367 | int i; |
fbe60daa | 368 | |
0750e971 | 369 | ks->ident = V4L2_IDENT_KS0127; |
fbe60daa | 370 | |
0750e971 | 371 | v4l2_dbg(1, debug, sd, "reset\n"); |
fbe60daa MS |
372 | msleep(1); |
373 | ||
374 | /* initialize all registers to known values */ | |
375 | /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */ | |
376 | ||
9875c0fb | 377 | for (i = 1; i < 33; i++) |
0750e971 | 378 | ks0127_write(sd, i, table[i]); |
fbe60daa | 379 | |
9875c0fb | 380 | for (i = 35; i < 40; i++) |
0750e971 | 381 | ks0127_write(sd, i, table[i]); |
fbe60daa | 382 | |
9875c0fb | 383 | for (i = 41; i < 56; i++) |
0750e971 | 384 | ks0127_write(sd, i, table[i]); |
fbe60daa | 385 | |
9875c0fb | 386 | for (i = 58; i < 64; i++) |
0750e971 | 387 | ks0127_write(sd, i, table[i]); |
fbe60daa MS |
388 | |
389 | ||
0750e971 HV |
390 | if ((ks0127_read(sd, KS_STAT) & 0x80) == 0) { |
391 | ks->ident = V4L2_IDENT_KS0122S; | |
392 | v4l2_dbg(1, debug, sd, "ks0122s found\n"); | |
fbe60daa MS |
393 | return; |
394 | } | |
395 | ||
0750e971 | 396 | switch (ks0127_read(sd, KS_CMDE) & 0x0f) { |
fbe60daa | 397 | case 0: |
0750e971 | 398 | v4l2_dbg(1, debug, sd, "ks0127 found\n"); |
fbe60daa MS |
399 | break; |
400 | ||
401 | case 9: | |
0750e971 HV |
402 | ks->ident = V4L2_IDENT_KS0127B; |
403 | v4l2_dbg(1, debug, sd, "ks0127B Revision A found\n"); | |
fbe60daa MS |
404 | break; |
405 | ||
406 | default: | |
0750e971 | 407 | v4l2_dbg(1, debug, sd, "unknown revision\n"); |
fbe60daa MS |
408 | break; |
409 | } | |
410 | } | |
411 | ||
5325b427 HV |
412 | static int ks0127_s_routing(struct v4l2_subdev *sd, |
413 | u32 input, u32 output, u32 config) | |
fbe60daa | 414 | { |
0750e971 HV |
415 | struct ks0127 *ks = to_ks0127(sd); |
416 | ||
5325b427 | 417 | switch (input) { |
0750e971 HV |
418 | case KS_INPUT_COMPOSITE_1: |
419 | case KS_INPUT_COMPOSITE_2: | |
420 | case KS_INPUT_COMPOSITE_3: | |
421 | case KS_INPUT_COMPOSITE_4: | |
422 | case KS_INPUT_COMPOSITE_5: | |
423 | case KS_INPUT_COMPOSITE_6: | |
424 | v4l2_dbg(1, debug, sd, | |
5325b427 | 425 | "s_routing %d: Composite\n", input); |
0750e971 HV |
426 | /* autodetect 50/60 Hz */ |
427 | ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00); | |
428 | /* VSE=0 */ | |
429 | ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00); | |
430 | /* set input line */ | |
5325b427 | 431 | ks0127_and_or(sd, KS_CMDB, 0xb0, input); |
0750e971 HV |
432 | /* non-freerunning mode */ |
433 | ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a); | |
434 | /* analog input */ | |
435 | ks0127_and_or(sd, KS_CMDD, 0x03, 0x00); | |
436 | /* enable chroma demodulation */ | |
437 | ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00); | |
438 | /* chroma trap, HYBWR=1 */ | |
439 | ks0127_and_or(sd, KS_LUMA, 0x00, | |
440 | (reg_defaults[KS_LUMA])|0x0c); | |
441 | /* scaler fullbw, luma comb off */ | |
442 | ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81); | |
443 | /* manual chroma comb .25 .5 .25 */ | |
444 | ks0127_and_or(sd, KS_VERTIC, 0x0f, 0x90); | |
445 | ||
446 | /* chroma path delay */ | |
447 | ks0127_and_or(sd, KS_CHROMB, 0x0f, 0x90); | |
448 | ||
449 | ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]); | |
450 | ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]); | |
451 | ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]); | |
452 | ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]); | |
fbe60daa MS |
453 | break; |
454 | ||
0750e971 HV |
455 | case KS_INPUT_SVIDEO_1: |
456 | case KS_INPUT_SVIDEO_2: | |
457 | case KS_INPUT_SVIDEO_3: | |
458 | v4l2_dbg(1, debug, sd, | |
5325b427 | 459 | "s_routing %d: S-Video\n", input); |
0750e971 HV |
460 | /* autodetect 50/60 Hz */ |
461 | ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00); | |
462 | /* VSE=0 */ | |
463 | ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00); | |
464 | /* set input line */ | |
5325b427 | 465 | ks0127_and_or(sd, KS_CMDB, 0xb0, input); |
0750e971 HV |
466 | /* non-freerunning mode */ |
467 | ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a); | |
468 | /* analog input */ | |
469 | ks0127_and_or(sd, KS_CMDD, 0x03, 0x00); | |
470 | /* enable chroma demodulation */ | |
471 | ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00); | |
472 | ks0127_and_or(sd, KS_LUMA, 0x00, | |
473 | reg_defaults[KS_LUMA]); | |
474 | /* disable luma comb */ | |
475 | ks0127_and_or(sd, KS_VERTIA, 0x08, | |
476 | (reg_defaults[KS_VERTIA]&0xf0)|0x01); | |
477 | ks0127_and_or(sd, KS_VERTIC, 0x0f, | |
478 | reg_defaults[KS_VERTIC]&0xf0); | |
479 | ||
480 | ks0127_and_or(sd, KS_CHROMB, 0x0f, | |
481 | reg_defaults[KS_CHROMB]&0xf0); | |
482 | ||
483 | ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]); | |
484 | ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]); | |
485 | ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]); | |
486 | ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]); | |
fbe60daa MS |
487 | break; |
488 | ||
0750e971 | 489 | case KS_INPUT_YUV656: |
bccfa449 | 490 | v4l2_dbg(1, debug, sd, "s_routing 15: YUV656\n"); |
0750e971 HV |
491 | if (ks->norm & V4L2_STD_525_60) |
492 | /* force 60 Hz */ | |
493 | ks0127_and_or(sd, KS_CMDA, 0xfc, 0x03); | |
494 | else | |
495 | /* force 50 Hz */ | |
496 | ks0127_and_or(sd, KS_CMDA, 0xfc, 0x02); | |
497 | ||
498 | ks0127_and_or(sd, KS_CMDA, 0xff, 0x40); /* VSE=1 */ | |
499 | /* set input line and VALIGN */ | |
5325b427 | 500 | ks0127_and_or(sd, KS_CMDB, 0xb0, (input | 0x40)); |
0750e971 HV |
501 | /* freerunning mode, */ |
502 | /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/ | |
503 | ks0127_and_or(sd, KS_CMDC, 0x70, 0x87); | |
504 | /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */ | |
505 | ks0127_and_or(sd, KS_CMDD, 0x03, 0x08); | |
506 | /* disable chroma demodulation */ | |
507 | ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x30); | |
508 | /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */ | |
509 | ks0127_and_or(sd, KS_LUMA, 0x00, 0x71); | |
510 | ks0127_and_or(sd, KS_VERTIC, 0x0f, | |
511 | reg_defaults[KS_VERTIC]&0xf0); | |
512 | ||
513 | /* scaler fullbw, luma comb off */ | |
514 | ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81); | |
515 | ||
516 | ks0127_and_or(sd, KS_CHROMB, 0x0f, | |
517 | reg_defaults[KS_CHROMB]&0xf0); | |
518 | ||
519 | ks0127_and_or(sd, KS_CON, 0x00, 0x00); | |
520 | ks0127_and_or(sd, KS_BRT, 0x00, 32); /* spec: 34 */ | |
521 | /* spec: 229 (e5) */ | |
522 | ks0127_and_or(sd, KS_SAT, 0x00, 0xe8); | |
523 | ks0127_and_or(sd, KS_HUE, 0x00, 0); | |
524 | ||
525 | ks0127_and_or(sd, KS_UGAIN, 0x00, 238); | |
526 | ks0127_and_or(sd, KS_VGAIN, 0x00, 0x00); | |
527 | ||
528 | /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */ | |
529 | ks0127_and_or(sd, KS_UVOFFH, 0x00, 0x4f); | |
530 | ks0127_and_or(sd, KS_UVOFFL, 0x00, 0x00); | |
fbe60daa MS |
531 | break; |
532 | ||
0750e971 HV |
533 | default: |
534 | v4l2_dbg(1, debug, sd, | |
5325b427 | 535 | "s_routing: Unknown input %d\n", input); |
fbe60daa | 536 | break; |
9875c0fb | 537 | } |
fbe60daa | 538 | |
0750e971 HV |
539 | /* hack: CDMLPF sometimes spontaneously switches on; */ |
540 | /* force back off */ | |
541 | ks0127_write(sd, KS_DEMOD, reg_defaults[KS_DEMOD]); | |
542 | return 0; | |
543 | } | |
544 | ||
545 | static int ks0127_s_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
546 | { | |
547 | struct ks0127 *ks = to_ks0127(sd); | |
548 | ||
549 | /* Set to automatic SECAM/Fsc mode */ | |
550 | ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00); | |
551 | ||
552 | ks->norm = std; | |
553 | if (std & V4L2_STD_NTSC) { | |
554 | v4l2_dbg(1, debug, sd, | |
bccfa449 | 555 | "s_std: NTSC_M\n"); |
0750e971 HV |
556 | ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20); |
557 | } else if (std & V4L2_STD_PAL_N) { | |
558 | v4l2_dbg(1, debug, sd, | |
bccfa449 | 559 | "s_std: NTSC_N (fixme)\n"); |
0750e971 HV |
560 | ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40); |
561 | } else if (std & V4L2_STD_PAL) { | |
562 | v4l2_dbg(1, debug, sd, | |
bccfa449 | 563 | "s_std: PAL_N\n"); |
0750e971 HV |
564 | ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20); |
565 | } else if (std & V4L2_STD_PAL_M) { | |
566 | v4l2_dbg(1, debug, sd, | |
bccfa449 | 567 | "s_std: PAL_M (fixme)\n"); |
0750e971 HV |
568 | ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40); |
569 | } else if (std & V4L2_STD_SECAM) { | |
570 | v4l2_dbg(1, debug, sd, | |
bccfa449 | 571 | "s_std: SECAM\n"); |
0750e971 HV |
572 | |
573 | /* set to secam autodetection */ | |
574 | ks0127_and_or(sd, KS_CHROMA, 0xdf, 0x20); | |
575 | ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00); | |
576 | schedule_timeout_interruptible(HZ/10+1); | |
577 | ||
578 | /* did it autodetect? */ | |
579 | if (!(ks0127_read(sd, KS_DEMOD) & 0x40)) | |
580 | /* force to secam mode */ | |
581 | ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x0f); | |
582 | } else { | |
bccfa449 | 583 | v4l2_dbg(1, debug, sd, "s_std: Unknown norm %llx\n", |
cc5cef8e | 584 | (unsigned long long)std); |
107063c6 | 585 | } |
0750e971 HV |
586 | return 0; |
587 | } | |
fbe60daa | 588 | |
0750e971 HV |
589 | static int ks0127_s_stream(struct v4l2_subdev *sd, int enable) |
590 | { | |
591 | v4l2_dbg(1, debug, sd, "s_stream(%d)\n", enable); | |
592 | if (enable) { | |
593 | /* All output pins on */ | |
594 | ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x30); | |
595 | /* Obey the OEN pin */ | |
596 | ks0127_and_or(sd, KS_CDEM, 0x7f, 0x00); | |
597 | } else { | |
598 | /* Video output pins off */ | |
599 | ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x00); | |
600 | /* Ignore the OEN pin */ | |
601 | ks0127_and_or(sd, KS_CDEM, 0x7f, 0x80); | |
fbe60daa MS |
602 | } |
603 | return 0; | |
604 | } | |
605 | ||
0750e971 HV |
606 | static int ks0127_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd) |
607 | { | |
608 | int stat = V4L2_IN_ST_NO_SIGNAL; | |
609 | u8 status; | |
610 | v4l2_std_id std = V4L2_STD_ALL; | |
611 | ||
0750e971 HV |
612 | status = ks0127_read(sd, KS_STAT); |
613 | if (!(status & 0x20)) /* NOVID not set */ | |
614 | stat = 0; | |
615 | if (!(status & 0x01)) /* CLOCK set */ | |
616 | stat |= V4L2_IN_ST_NO_COLOR; | |
617 | if ((status & 0x08)) /* PALDET set */ | |
618 | std = V4L2_STD_PAL; | |
619 | else | |
620 | std = V4L2_STD_NTSC; | |
621 | if (pstd) | |
622 | *pstd = std; | |
623 | if (pstatus) | |
624 | *pstatus = stat; | |
625 | return 0; | |
626 | } | |
fbe60daa | 627 | |
0750e971 HV |
628 | static int ks0127_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) |
629 | { | |
bccfa449 | 630 | v4l2_dbg(1, debug, sd, "querystd\n"); |
0750e971 HV |
631 | return ks0127_status(sd, NULL, std); |
632 | } | |
fbe60daa | 633 | |
0750e971 HV |
634 | static int ks0127_g_input_status(struct v4l2_subdev *sd, u32 *status) |
635 | { | |
bccfa449 | 636 | v4l2_dbg(1, debug, sd, "g_input_status\n"); |
0750e971 HV |
637 | return ks0127_status(sd, status, NULL); |
638 | } | |
639 | ||
640 | static int ks0127_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip) | |
641 | { | |
642 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
643 | struct ks0127 *ks = to_ks0127(sd); | |
644 | ||
645 | return v4l2_chip_ident_i2c_client(client, chip, ks->ident, 0); | |
646 | } | |
647 | ||
0750e971 HV |
648 | /* ----------------------------------------------------------------------- */ |
649 | ||
650 | static const struct v4l2_subdev_core_ops ks0127_core_ops = { | |
651 | .g_chip_ident = ks0127_g_chip_ident, | |
0750e971 HV |
652 | .s_std = ks0127_s_std, |
653 | }; | |
654 | ||
655 | static const struct v4l2_subdev_video_ops ks0127_video_ops = { | |
656 | .s_routing = ks0127_s_routing, | |
657 | .s_stream = ks0127_s_stream, | |
658 | .querystd = ks0127_querystd, | |
659 | .g_input_status = ks0127_g_input_status, | |
660 | }; | |
fbe60daa | 661 | |
0750e971 HV |
662 | static const struct v4l2_subdev_ops ks0127_ops = { |
663 | .core = &ks0127_core_ops, | |
0750e971 HV |
664 | .video = &ks0127_video_ops, |
665 | }; | |
666 | ||
667 | /* ----------------------------------------------------------------------- */ | |
668 | ||
669 | ||
670 | static int ks0127_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
fbe60daa MS |
671 | { |
672 | struct ks0127 *ks; | |
0750e971 | 673 | struct v4l2_subdev *sd; |
fbe60daa | 674 | |
0750e971 HV |
675 | v4l_info(client, "%s chip found @ 0x%x (%s)\n", |
676 | client->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board", | |
677 | client->addr << 1, client->adapter->name); | |
fbe60daa MS |
678 | |
679 | ks = kzalloc(sizeof(*ks), GFP_KERNEL); | |
9875c0fb | 680 | if (ks == NULL) |
fbe60daa | 681 | return -ENOMEM; |
0750e971 HV |
682 | sd = &ks->sd; |
683 | v4l2_i2c_subdev_init(sd, client, &ks0127_ops); | |
fbe60daa MS |
684 | |
685 | /* power up */ | |
9875c0fb | 686 | init_reg_defaults(); |
0750e971 | 687 | ks0127_write(sd, KS_CMDA, 0x2c); |
fbe60daa MS |
688 | mdelay(10); |
689 | ||
690 | /* reset the device */ | |
0750e971 | 691 | ks0127_init(sd); |
fbe60daa MS |
692 | return 0; |
693 | } | |
694 | ||
0750e971 | 695 | static int ks0127_remove(struct i2c_client *client) |
fbe60daa | 696 | { |
0750e971 | 697 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
fbe60daa | 698 | |
0750e971 HV |
699 | v4l2_device_unregister_subdev(sd); |
700 | ks0127_write(sd, KS_OFMTA, 0x20); /* tristate */ | |
701 | ks0127_write(sd, KS_CMDA, 0x2c | 0x80); /* power down */ | |
702 | kfree(to_ks0127(sd)); | |
fbe60daa MS |
703 | return 0; |
704 | } | |
705 | ||
9875c0fb HV |
706 | static const struct i2c_device_id ks0127_id[] = { |
707 | { "ks0127", 0 }, | |
18d135ad HV |
708 | { "ks0127b", 0 }, |
709 | { "ks0122s", 0 }, | |
9875c0fb HV |
710 | { } |
711 | }; | |
712 | MODULE_DEVICE_TABLE(i2c, ks0127_id); | |
713 | ||
da48a8dd HV |
714 | static struct i2c_driver ks0127_driver = { |
715 | .driver = { | |
716 | .owner = THIS_MODULE, | |
717 | .name = "ks0127", | |
718 | }, | |
719 | .probe = ks0127_probe, | |
720 | .remove = ks0127_remove, | |
721 | .id_table = ks0127_id, | |
9875c0fb | 722 | }; |
da48a8dd | 723 | |
c6e8d86f | 724 | module_i2c_driver(ks0127_driver); |