[media] V4L: mt9m111: propagate higher level abstraction down in functions
[deliverable/linux.git] / drivers / media / video / mt9m111.c
CommitLineData
77110abb 1/*
c8cf078e 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
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3 *
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/videodev2.h>
11#include <linux/slab.h>
12#include <linux/i2c.h>
13#include <linux/log2.h>
14#include <linux/gpio.h>
15#include <linux/delay.h>
16
17#include <media/v4l2-common.h>
18#include <media/v4l2-chip-ident.h>
19#include <media/soc_camera.h>
20
21/*
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22 * MT9M111, MT9M112 and MT9M131:
23 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
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24 * The platform has to define i2c_board_info and call i2c_register_board_info()
25 */
26
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27/*
28 * Sensor core register addresses (0x000..0x0ff)
29 */
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30#define MT9M111_CHIP_VERSION 0x000
31#define MT9M111_ROW_START 0x001
32#define MT9M111_COLUMN_START 0x002
33#define MT9M111_WINDOW_HEIGHT 0x003
34#define MT9M111_WINDOW_WIDTH 0x004
35#define MT9M111_HORIZONTAL_BLANKING_B 0x005
36#define MT9M111_VERTICAL_BLANKING_B 0x006
37#define MT9M111_HORIZONTAL_BLANKING_A 0x007
38#define MT9M111_VERTICAL_BLANKING_A 0x008
39#define MT9M111_SHUTTER_WIDTH 0x009
40#define MT9M111_ROW_SPEED 0x00a
41#define MT9M111_EXTRA_DELAY 0x00b
42#define MT9M111_SHUTTER_DELAY 0x00c
43#define MT9M111_RESET 0x00d
44#define MT9M111_READ_MODE_B 0x020
45#define MT9M111_READ_MODE_A 0x021
46#define MT9M111_FLASH_CONTROL 0x023
47#define MT9M111_GREEN1_GAIN 0x02b
48#define MT9M111_BLUE_GAIN 0x02c
49#define MT9M111_RED_GAIN 0x02d
50#define MT9M111_GREEN2_GAIN 0x02e
51#define MT9M111_GLOBAL_GAIN 0x02f
52#define MT9M111_CONTEXT_CONTROL 0x0c8
53#define MT9M111_PAGE_MAP 0x0f0
54#define MT9M111_BYTE_WISE_ADDR 0x0f1
55
56#define MT9M111_RESET_SYNC_CHANGES (1 << 15)
57#define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
58#define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
59#define MT9M111_RESET_RESET_SOC (1 << 5)
60#define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
61#define MT9M111_RESET_CHIP_ENABLE (1 << 3)
62#define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
63#define MT9M111_RESET_RESTART_FRAME (1 << 1)
64#define MT9M111_RESET_RESET_MODE (1 << 0)
65
66#define MT9M111_RMB_MIRROR_COLS (1 << 1)
67#define MT9M111_RMB_MIRROR_ROWS (1 << 0)
68#define MT9M111_CTXT_CTRL_RESTART (1 << 15)
69#define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
70#define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
71#define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
72#define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
73#define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
74#define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
75#define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
76#define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
77#define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
c8cf078e 78
77110abb 79/*
c8cf078e 80 * Colorpipe register addresses (0x100..0x1ff)
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81 */
82#define MT9M111_OPER_MODE_CTRL 0x106
83#define MT9M111_OUTPUT_FORMAT_CTRL 0x108
84#define MT9M111_REDUCER_XZOOM_B 0x1a0
85#define MT9M111_REDUCER_XSIZE_B 0x1a1
86#define MT9M111_REDUCER_YZOOM_B 0x1a3
87#define MT9M111_REDUCER_YSIZE_B 0x1a4
88#define MT9M111_REDUCER_XZOOM_A 0x1a6
89#define MT9M111_REDUCER_XSIZE_A 0x1a7
90#define MT9M111_REDUCER_YZOOM_A 0x1a9
91#define MT9M111_REDUCER_YSIZE_A 0x1aa
92
93#define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
94#define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
95
96#define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
39bf372f 97#define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
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98
99#define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
100#define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
101#define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
102#define MT9M111_OUTFMT_RGB (1 << 8)
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103#define MT9M111_OUTFMT_RGB565 (0 << 6)
104#define MT9M111_OUTFMT_RGB555 (1 << 6)
105#define MT9M111_OUTFMT_RGB444x (2 << 6)
106#define MT9M111_OUTFMT_RGBx444 (3 << 6)
107#define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
108#define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
109#define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
110#define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
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111#define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
112#define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
113#define MT9M111_OUTFMT_SWAP_YCbCr_C_Y (1 << 1)
114#define MT9M111_OUTFMT_SWAP_RGB_EVEN (1 << 1)
115#define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr (1 << 0)
c8cf078e 116
77110abb 117/*
c8cf078e 118 * Camera control register addresses (0x200..0x2ff not implemented)
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119 */
120
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121#define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
122#define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
123#define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
124#define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
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125
126#define MT9M111_MIN_DARK_ROWS 8
669470a8 127#define MT9M111_MIN_DARK_COLS 26
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128#define MT9M111_MAX_HEIGHT 1024
129#define MT9M111_MAX_WIDTH 1280
130
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131/* MT9M111 has only one fixed colorspace per pixelcode */
132struct mt9m111_datafmt {
133 enum v4l2_mbus_pixelcode code;
134 enum v4l2_colorspace colorspace;
135};
136
137/* Find a data format by a pixel code in an array */
138static const struct mt9m111_datafmt *mt9m111_find_datafmt(
139 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
140 int n)
141{
142 int i;
143 for (i = 0; i < n; i++)
144 if (fmt[i].code == code)
145 return fmt + i;
146
147 return NULL;
148}
149
150static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
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151 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
152 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
153 {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
154 {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
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155 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
156 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
157 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
158 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
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159};
160
161enum mt9m111_context {
162 HIGHPOWER = 0,
163 LOWPOWER,
164};
165
166struct mt9m111 {
979ea1dd 167 struct v4l2_subdev subdev;
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168 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
169 * from v4l2-chip-ident.h */
77110abb 170 enum mt9m111_context context;
09e231b3 171 struct v4l2_rect rect;
760697be 172 const struct mt9m111_datafmt *fmt;
96c75399 173 unsigned int gain;
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174 unsigned char autoexposure;
175 unsigned char datawidth;
176 unsigned int powered:1;
177 unsigned int hflip:1;
178 unsigned int vflip:1;
179 unsigned int swap_rgb_even_odd:1;
180 unsigned int swap_rgb_red_blue:1;
181 unsigned int swap_yuv_y_chromas:1;
182 unsigned int swap_yuv_cb_cr:1;
39bf372f 183 unsigned int autowhitebalance:1;
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184};
185
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186static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
187{
188 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
189}
190
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191static int reg_page_map_set(struct i2c_client *client, const u16 reg)
192{
193 int ret;
194 u16 page;
195 static int lastpage = -1; /* PageMap cache value */
196
197 page = (reg >> 8);
198 if (page == lastpage)
199 return 0;
200 if (page > 2)
201 return -EINVAL;
202
203 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
506c629a 204 if (!ret)
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205 lastpage = page;
206 return ret;
207}
208
9538e1c2 209static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
77110abb 210{
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211 int ret;
212
213 ret = reg_page_map_set(client, reg);
214 if (!ret)
6a6c8786 215 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
77110abb 216
9538e1c2 217 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
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218 return ret;
219}
220
9538e1c2 221static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
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222 const u16 data)
223{
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224 int ret;
225
226 ret = reg_page_map_set(client, reg);
506c629a 227 if (!ret)
40e2e092 228 ret = i2c_smbus_write_word_data(client, reg & 0xff,
77110abb 229 swab16(data));
9538e1c2 230 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
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231 return ret;
232}
233
9538e1c2 234static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
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235 const u16 data)
236{
237 int ret;
238
9538e1c2 239 ret = mt9m111_reg_read(client, reg);
77110abb 240 if (ret >= 0)
9538e1c2 241 ret = mt9m111_reg_write(client, reg, ret | data);
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242 return ret;
243}
244
9538e1c2 245static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
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246 const u16 data)
247{
248 int ret;
249
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250 ret = mt9m111_reg_read(client, reg);
251 return mt9m111_reg_write(client, reg, ret & ~data);
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252}
253
2768cbbb 254static int mt9m111_set_context(struct mt9m111 *mt9m111,
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255 enum mt9m111_context ctxt)
256{
2768cbbb 257 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
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258 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
259 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
260 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
261 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
262 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
263 int valA = MT9M111_CTXT_CTRL_RESTART;
264
265 if (ctxt == HIGHPOWER)
266 return reg_write(CONTEXT_CONTROL, valB);
267 else
268 return reg_write(CONTEXT_CONTROL, valA);
269}
270
2768cbbb 271static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
09e231b3 272 struct v4l2_rect *rect)
77110abb 273{
2768cbbb 274 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
506c629a 275 int ret, is_raw_format;
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276 int width = rect->width;
277 int height = rect->height;
77110abb 278
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279 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
280 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
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281 is_raw_format = 1;
282 else
283 is_raw_format = 0;
284
09e231b3 285 ret = reg_write(COLUMN_START, rect->left);
506c629a 286 if (!ret)
09e231b3 287 ret = reg_write(ROW_START, rect->top);
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288
289 if (is_raw_format) {
506c629a 290 if (!ret)
77110abb 291 ret = reg_write(WINDOW_WIDTH, width);
506c629a 292 if (!ret)
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293 ret = reg_write(WINDOW_HEIGHT, height);
294 } else {
506c629a 295 if (!ret)
77110abb 296 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
506c629a 297 if (!ret)
77110abb 298 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
506c629a 299 if (!ret)
77110abb 300 ret = reg_write(REDUCER_XSIZE_B, width);
506c629a 301 if (!ret)
77110abb 302 ret = reg_write(REDUCER_YSIZE_B, height);
506c629a 303 if (!ret)
77110abb 304 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
506c629a 305 if (!ret)
77110abb 306 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
506c629a 307 if (!ret)
77110abb 308 ret = reg_write(REDUCER_XSIZE_A, width);
506c629a 309 if (!ret)
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310 ret = reg_write(REDUCER_YSIZE_A, height);
311 }
312
313 return ret;
314}
315
979ea1dd 316static int mt9m111_setup_pixfmt(struct i2c_client *client, u16 outfmt)
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317{
318 int ret;
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319 u16 mask = MT9M111_OUTFMT_PROCESSED_BAYER | MT9M111_OUTFMT_RGB |
320 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_SWAP_RGB_EVEN |
321 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
322 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr |
323 MT9M111_OUTFMT_SWAP_YCbCr_C_Y;
77110abb 324
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325 ret = reg_read(OUTPUT_FORMAT_CTRL2_A);
326 if (ret >= 0)
327 ret = reg_write(OUTPUT_FORMAT_CTRL2_A, (ret & ~mask) | outfmt);
506c629a 328 if (!ret)
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329 ret = reg_read(OUTPUT_FORMAT_CTRL2_B);
330 if (ret >= 0)
331 ret = reg_write(OUTPUT_FORMAT_CTRL2_B, (ret & ~mask) | outfmt);
332
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333 return ret;
334}
335
2768cbbb 336static int mt9m111_setfmt_bayer8(struct mt9m111 *mt9m111)
77110abb 337{
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338 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
339
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340 return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER |
341 MT9M111_OUTFMT_RGB);
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342}
343
2768cbbb 344static int mt9m111_setfmt_bayer10(struct mt9m111 *mt9m111)
77110abb 345{
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346 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
347
979ea1dd 348 return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_BYPASS_IFP);
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349}
350
2768cbbb 351static int mt9m111_setfmt_rgb565(struct mt9m111 *mt9m111)
77110abb 352{
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353 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
354 int val = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
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355
356 if (mt9m111->swap_rgb_red_blue)
357 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
358 if (mt9m111->swap_rgb_even_odd)
359 val |= MT9M111_OUTFMT_SWAP_RGB_EVEN;
77110abb 360
979ea1dd 361 return mt9m111_setup_pixfmt(client, val);
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362}
363
2768cbbb 364static int mt9m111_setfmt_rgb555(struct mt9m111 *mt9m111)
77110abb 365{
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366 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
367 int val = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
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368
369 if (mt9m111->swap_rgb_red_blue)
370 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
371 if (mt9m111->swap_rgb_even_odd)
372 val |= MT9M111_OUTFMT_SWAP_RGB_EVEN;
77110abb 373
979ea1dd 374 return mt9m111_setup_pixfmt(client, val);
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375}
376
2768cbbb 377static int mt9m111_setfmt_yuv(struct mt9m111 *mt9m111)
77110abb 378{
2768cbbb 379 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
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380 int val = 0;
381
382 if (mt9m111->swap_yuv_cb_cr)
383 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
384 if (mt9m111->swap_yuv_y_chromas)
385 val |= MT9M111_OUTFMT_SWAP_YCbCr_C_Y;
386
979ea1dd 387 return mt9m111_setup_pixfmt(client, val);
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388}
389
2768cbbb 390static int mt9m111_enable(struct mt9m111 *mt9m111)
77110abb 391{
2768cbbb 392 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
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393 int ret;
394
395 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
506c629a 396 if (!ret)
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397 mt9m111->powered = 1;
398 return ret;
399}
400
2768cbbb 401static int mt9m111_reset(struct mt9m111 *mt9m111)
77110abb 402{
2768cbbb 403 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
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404 int ret;
405
406 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
506c629a 407 if (!ret)
77110abb 408 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
506c629a 409 if (!ret)
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410 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
411 | MT9M111_RESET_RESET_SOC);
afb13683 412
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413 return ret;
414}
415
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416static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd)
417{
40e2e092 418 struct soc_camera_link *icl = to_soc_camera_link(icd);
bd73b36f 419 unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |
77110abb 420 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
2d9329f3 421 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
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422
423 return soc_camera_apply_sensor_flags(icl, flags);
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424}
425
426static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f)
427{
428 return 0;
429}
430
2768cbbb 431static int mt9m111_make_rect(struct mt9m111 *mt9m111,
6a6c8786
GL
432 struct v4l2_rect *rect)
433{
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434 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
435 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
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436 /* Bayer format - even size lengths */
437 rect->width = ALIGN(rect->width, 2);
438 rect->height = ALIGN(rect->height, 2);
439 /* Let the user play with the starting pixel */
440 }
441
442 /* FIXME: the datasheet doesn't specify minimum sizes */
443 soc_camera_limit_side(&rect->left, &rect->width,
444 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
445
446 soc_camera_limit_side(&rect->top, &rect->height,
447 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
448
2768cbbb 449 return mt9m111_setup_rect(mt9m111, rect);
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GL
450}
451
08590b96 452static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
09e231b3 453{
6a6c8786 454 struct v4l2_rect rect = a->c;
c4ce6d14 455 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 456 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
09e231b3
GL
457 int ret;
458
85f8be68 459 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
6a6c8786 460 __func__, rect.left, rect.top, rect.width, rect.height);
09e231b3 461
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MG
462 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
463 return -EINVAL;
464
2768cbbb 465 ret = mt9m111_make_rect(mt9m111, &rect);
09e231b3 466 if (!ret)
6a6c8786 467 mt9m111->rect = rect;
09e231b3
GL
468 return ret;
469}
470
6a6c8786
GL
471static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
472{
2768cbbb 473 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
6a6c8786
GL
474
475 a->c = mt9m111->rect;
476 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
477
478 return 0;
479}
480
481static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
482{
6b6d33c7
MG
483 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
484 return -EINVAL;
485
6a6c8786
GL
486 a->bounds.left = MT9M111_MIN_DARK_COLS;
487 a->bounds.top = MT9M111_MIN_DARK_ROWS;
488 a->bounds.width = MT9M111_MAX_WIDTH;
489 a->bounds.height = MT9M111_MAX_HEIGHT;
490 a->defrect = a->bounds;
6a6c8786
GL
491 a->pixelaspect.numerator = 1;
492 a->pixelaspect.denominator = 1;
493
494 return 0;
495}
496
760697be
GL
497static int mt9m111_g_fmt(struct v4l2_subdev *sd,
498 struct v4l2_mbus_framefmt *mf)
6a6c8786 499{
2768cbbb 500 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
6a6c8786 501
760697be
GL
502 mf->width = mt9m111->rect.width;
503 mf->height = mt9m111->rect.height;
504 mf->code = mt9m111->fmt->code;
01f5a394 505 mf->colorspace = mt9m111->fmt->colorspace;
760697be 506 mf->field = V4L2_FIELD_NONE;
6a6c8786
GL
507
508 return 0;
509}
510
2768cbbb 511static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
760697be 512 enum v4l2_mbus_pixelcode code)
77110abb 513{
2768cbbb 514 struct i2c_client *client;
506c629a 515 int ret;
77110abb 516
760697be
GL
517 switch (code) {
518 case V4L2_MBUS_FMT_SBGGR8_1X8:
2768cbbb 519 ret = mt9m111_setfmt_bayer8(mt9m111);
77110abb 520 break;
760697be 521 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
2768cbbb 522 ret = mt9m111_setfmt_bayer10(mt9m111);
77110abb 523 break;
760697be 524 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
2768cbbb 525 ret = mt9m111_setfmt_rgb555(mt9m111);
77110abb 526 break;
760697be 527 case V4L2_MBUS_FMT_RGB565_2X8_LE:
2768cbbb 528 ret = mt9m111_setfmt_rgb565(mt9m111);
77110abb 529 break;
ace6e979 530 case V4L2_MBUS_FMT_UYVY8_2X8:
88f4b899
RJ
531 mt9m111->swap_yuv_y_chromas = 0;
532 mt9m111->swap_yuv_cb_cr = 0;
2768cbbb 533 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 534 break;
ace6e979 535 case V4L2_MBUS_FMT_VYUY8_2X8:
88f4b899
RJ
536 mt9m111->swap_yuv_y_chromas = 0;
537 mt9m111->swap_yuv_cb_cr = 1;
2768cbbb 538 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 539 break;
ace6e979 540 case V4L2_MBUS_FMT_YUYV8_2X8:
88f4b899
RJ
541 mt9m111->swap_yuv_y_chromas = 1;
542 mt9m111->swap_yuv_cb_cr = 0;
2768cbbb 543 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 544 break;
ace6e979 545 case V4L2_MBUS_FMT_YVYU8_2X8:
88f4b899
RJ
546 mt9m111->swap_yuv_y_chromas = 1;
547 mt9m111->swap_yuv_cb_cr = 1;
2768cbbb 548 ret = mt9m111_setfmt_yuv(mt9m111);
77110abb
RJ
549 break;
550 default:
2768cbbb 551 client = v4l2_get_subdevdata(&mt9m111->subdev);
96c75399 552 dev_err(&client->dev, "Pixel format not handled : %x\n",
760697be 553 code);
77110abb
RJ
554 ret = -EINVAL;
555 }
556
77110abb
RJ
557 return ret;
558}
559
760697be
GL
560static int mt9m111_s_fmt(struct v4l2_subdev *sd,
561 struct v4l2_mbus_framefmt *mf)
77110abb 562{
c4ce6d14 563 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be 564 const struct mt9m111_datafmt *fmt;
2768cbbb 565 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
09e231b3
GL
566 struct v4l2_rect rect = {
567 .left = mt9m111->rect.left,
568 .top = mt9m111->rect.top,
760697be
GL
569 .width = mf->width,
570 .height = mf->height,
09e231b3 571 };
506c629a 572 int ret;
77110abb 573
760697be
GL
574 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
575 ARRAY_SIZE(mt9m111_colour_fmts));
576 if (!fmt)
577 return -EINVAL;
578
96c75399 579 dev_dbg(&client->dev,
760697be
GL
580 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
581 mf->code, rect.left, rect.top, rect.width, rect.height);
77110abb 582
2768cbbb 583 ret = mt9m111_make_rect(mt9m111, &rect);
09e231b3 584 if (!ret)
2768cbbb 585 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
760697be
GL
586 if (!ret) {
587 mt9m111->rect = rect;
588 mt9m111->fmt = fmt;
589 mf->colorspace = fmt->colorspace;
590 }
591
506c629a 592 return ret;
77110abb
RJ
593}
594
760697be
GL
595static int mt9m111_try_fmt(struct v4l2_subdev *sd,
596 struct v4l2_mbus_framefmt *mf)
77110abb 597{
2768cbbb 598 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
760697be
GL
599 const struct mt9m111_datafmt *fmt;
600 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
601 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
602
603 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
604 ARRAY_SIZE(mt9m111_colour_fmts));
605 if (!fmt) {
606 fmt = mt9m111->fmt;
607 mf->code = fmt->code;
608 }
6a6c8786
GL
609
610 /*
611 * With Bayer format enforce even side lengths, but let the user play
612 * with the starting pixel
613 */
64f5905e 614
760697be
GL
615 if (mf->height > MT9M111_MAX_HEIGHT)
616 mf->height = MT9M111_MAX_HEIGHT;
617 else if (mf->height < 2)
618 mf->height = 2;
6a6c8786 619 else if (bayer)
760697be 620 mf->height = ALIGN(mf->height, 2);
6a6c8786 621
760697be
GL
622 if (mf->width > MT9M111_MAX_WIDTH)
623 mf->width = MT9M111_MAX_WIDTH;
624 else if (mf->width < 2)
625 mf->width = 2;
6a6c8786 626 else if (bayer)
760697be
GL
627 mf->width = ALIGN(mf->width, 2);
628
629 mf->colorspace = fmt->colorspace;
77110abb
RJ
630
631 return 0;
632}
633
979ea1dd
GL
634static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
635 struct v4l2_dbg_chip_ident *id)
77110abb 636{
c4ce6d14 637 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 638 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb 639
aecde8b5 640 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
77110abb
RJ
641 return -EINVAL;
642
40e2e092 643 if (id->match.addr != client->addr)
77110abb
RJ
644 return -ENODEV;
645
646 id->ident = mt9m111->model;
647 id->revision = 0;
648
649 return 0;
650}
651
652#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL
653static int mt9m111_g_register(struct v4l2_subdev *sd,
654 struct v4l2_dbg_register *reg)
77110abb 655{
c4ce6d14 656 struct i2c_client *client = v4l2_get_subdevdata(sd);
77110abb 657 int val;
77110abb 658
aecde8b5 659 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
77110abb 660 return -EINVAL;
9538e1c2 661 if (reg->match.addr != client->addr)
77110abb
RJ
662 return -ENODEV;
663
9538e1c2 664 val = mt9m111_reg_read(client, reg->reg);
aecde8b5 665 reg->size = 2;
77110abb
RJ
666 reg->val = (u64)val;
667
668 if (reg->val > 0xffff)
669 return -EIO;
670
671 return 0;
672}
673
979ea1dd
GL
674static int mt9m111_s_register(struct v4l2_subdev *sd,
675 struct v4l2_dbg_register *reg)
77110abb 676{
c4ce6d14 677 struct i2c_client *client = v4l2_get_subdevdata(sd);
77110abb 678
aecde8b5 679 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
77110abb
RJ
680 return -EINVAL;
681
9538e1c2 682 if (reg->match.addr != client->addr)
77110abb
RJ
683 return -ENODEV;
684
9538e1c2 685 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
77110abb
RJ
686 return -EIO;
687
688 return 0;
689}
690#endif
691
692static const struct v4l2_queryctrl mt9m111_controls[] = {
693 {
694 .id = V4L2_CID_VFLIP,
695 .type = V4L2_CTRL_TYPE_BOOLEAN,
696 .name = "Flip Verticaly",
697 .minimum = 0,
698 .maximum = 1,
699 .step = 1,
700 .default_value = 0,
701 }, {
702 .id = V4L2_CID_HFLIP,
703 .type = V4L2_CTRL_TYPE_BOOLEAN,
704 .name = "Flip Horizontaly",
705 .minimum = 0,
706 .maximum = 1,
707 .step = 1,
708 .default_value = 0,
709 }, { /* gain = 1/32*val (=>gain=1 if val==32) */
710 .id = V4L2_CID_GAIN,
711 .type = V4L2_CTRL_TYPE_INTEGER,
712 .name = "Gain",
713 .minimum = 0,
714 .maximum = 63 * 2 * 2,
715 .step = 1,
716 .default_value = 32,
717 .flags = V4L2_CTRL_FLAG_SLIDER,
718 }, {
719 .id = V4L2_CID_EXPOSURE_AUTO,
720 .type = V4L2_CTRL_TYPE_BOOLEAN,
721 .name = "Auto Exposure",
722 .minimum = 0,
723 .maximum = 1,
724 .step = 1,
725 .default_value = 1,
726 }
727};
728
77110abb 729static int mt9m111_resume(struct soc_camera_device *icd);
96c75399 730static int mt9m111_suspend(struct soc_camera_device *icd, pm_message_t state);
77110abb
RJ
731
732static struct soc_camera_ops mt9m111_ops = {
96c75399 733 .suspend = mt9m111_suspend,
77110abb 734 .resume = mt9m111_resume,
77110abb
RJ
735 .query_bus_param = mt9m111_query_bus_param,
736 .set_bus_param = mt9m111_set_bus_param,
737 .controls = mt9m111_controls,
738 .num_controls = ARRAY_SIZE(mt9m111_controls),
77110abb
RJ
739};
740
2768cbbb 741static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
77110abb 742{
2768cbbb 743 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
744 int ret;
745
746 if (mt9m111->context == HIGHPOWER) {
747 if (flip)
748 ret = reg_set(READ_MODE_B, mask);
749 else
750 ret = reg_clear(READ_MODE_B, mask);
751 } else {
752 if (flip)
753 ret = reg_set(READ_MODE_A, mask);
754 else
755 ret = reg_clear(READ_MODE_A, mask);
756 }
757
758 return ret;
759}
760
2768cbbb 761static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
77110abb 762{
2768cbbb 763 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
0f28b793 764 int data;
77110abb
RJ
765
766 data = reg_read(GLOBAL_GAIN);
767 if (data >= 0)
0f28b793 768 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
769 (1 << ((data >> 9) & 1));
770 return data;
77110abb 771}
0f28b793 772
2768cbbb 773static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
77110abb 774{
2768cbbb 775 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
776 u16 val;
777
778 if (gain > 63 * 2 * 2)
779 return -EINVAL;
780
96c75399 781 mt9m111->gain = gain;
77110abb
RJ
782 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
783 val = (1 << 10) | (1 << 9) | (gain / 4);
784 else if ((gain >= 64) && (gain < 64 * 2))
506c629a 785 val = (1 << 9) | (gain / 2);
77110abb
RJ
786 else
787 val = gain;
788
789 return reg_write(GLOBAL_GAIN, val);
790}
791
2768cbbb 792static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
77110abb 793{
2768cbbb 794 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
795 int ret;
796
797 if (on)
798 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
799 else
800 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
801
506c629a 802 if (!ret)
77110abb
RJ
803 mt9m111->autoexposure = on;
804
805 return ret;
806}
39bf372f 807
2768cbbb 808static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
39bf372f 809{
2768cbbb 810 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
39bf372f
RJ
811 int ret;
812
813 if (on)
814 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
815 else
816 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
817
818 if (!ret)
819 mt9m111->autowhitebalance = on;
820
821 return ret;
822}
823
979ea1dd 824static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
77110abb 825{
c4ce6d14 826 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 827 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb
RJ
828 int data;
829
830 switch (ctrl->id) {
831 case V4L2_CID_VFLIP:
832 if (mt9m111->context == HIGHPOWER)
833 data = reg_read(READ_MODE_B);
834 else
835 data = reg_read(READ_MODE_A);
836
837 if (data < 0)
838 return -EIO;
839 ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
840 break;
841 case V4L2_CID_HFLIP:
842 if (mt9m111->context == HIGHPOWER)
843 data = reg_read(READ_MODE_B);
844 else
845 data = reg_read(READ_MODE_A);
846
847 if (data < 0)
848 return -EIO;
849 ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
850 break;
851 case V4L2_CID_GAIN:
2768cbbb 852 data = mt9m111_get_global_gain(mt9m111);
77110abb
RJ
853 if (data < 0)
854 return data;
855 ctrl->value = data;
856 break;
857 case V4L2_CID_EXPOSURE_AUTO:
858 ctrl->value = mt9m111->autoexposure;
859 break;
39bf372f
RJ
860 case V4L2_CID_AUTO_WHITE_BALANCE:
861 ctrl->value = mt9m111->autowhitebalance;
862 break;
77110abb
RJ
863 }
864 return 0;
865}
866
979ea1dd 867static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
77110abb 868{
2768cbbb 869 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb 870 const struct v4l2_queryctrl *qctrl;
506c629a 871 int ret;
77110abb
RJ
872
873 qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
77110abb
RJ
874 if (!qctrl)
875 return -EINVAL;
876
877 switch (ctrl->id) {
878 case V4L2_CID_VFLIP:
879 mt9m111->vflip = ctrl->value;
2768cbbb 880 ret = mt9m111_set_flip(mt9m111, ctrl->value,
77110abb
RJ
881 MT9M111_RMB_MIRROR_ROWS);
882 break;
883 case V4L2_CID_HFLIP:
884 mt9m111->hflip = ctrl->value;
2768cbbb 885 ret = mt9m111_set_flip(mt9m111, ctrl->value,
77110abb
RJ
886 MT9M111_RMB_MIRROR_COLS);
887 break;
888 case V4L2_CID_GAIN:
2768cbbb 889 ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
77110abb
RJ
890 break;
891 case V4L2_CID_EXPOSURE_AUTO:
2768cbbb 892 ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
77110abb 893 break;
39bf372f 894 case V4L2_CID_AUTO_WHITE_BALANCE:
2768cbbb 895 ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
39bf372f 896 break;
77110abb
RJ
897 default:
898 ret = -EINVAL;
899 }
900
506c629a 901 return ret;
77110abb
RJ
902}
903
96c75399
GL
904static int mt9m111_suspend(struct soc_camera_device *icd, pm_message_t state)
905{
906 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
907 struct mt9m111 *mt9m111 = to_mt9m111(client);
908
2768cbbb 909 mt9m111->gain = mt9m111_get_global_gain(mt9m111);
96c75399
GL
910
911 return 0;
912}
913
2768cbbb 914static void mt9m111_restore_state(struct mt9m111 *mt9m111)
77110abb 915{
2768cbbb
GL
916 mt9m111_set_context(mt9m111, mt9m111->context);
917 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
918 mt9m111_setup_rect(mt9m111, &mt9m111->rect);
919 mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
920 mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
921 mt9m111_set_global_gain(mt9m111, mt9m111->gain);
922 mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
923 mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
77110abb
RJ
924}
925
926static int mt9m111_resume(struct soc_camera_device *icd)
927{
40e2e092 928 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
979ea1dd 929 struct mt9m111 *mt9m111 = to_mt9m111(client);
77110abb
RJ
930 int ret = 0;
931
932 if (mt9m111->powered) {
2768cbbb 933 ret = mt9m111_enable(mt9m111);
506c629a 934 if (!ret)
2768cbbb 935 ret = mt9m111_reset(mt9m111);
506c629a 936 if (!ret)
2768cbbb 937 mt9m111_restore_state(mt9m111);
77110abb
RJ
938 }
939 return ret;
940}
941
2768cbbb 942static int mt9m111_init(struct mt9m111 *mt9m111)
77110abb 943{
2768cbbb 944 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
945 int ret;
946
947 mt9m111->context = HIGHPOWER;
2768cbbb 948 ret = mt9m111_enable(mt9m111);
506c629a 949 if (!ret)
2768cbbb 950 ret = mt9m111_reset(mt9m111);
506c629a 951 if (!ret)
2768cbbb 952 ret = mt9m111_set_context(mt9m111, mt9m111->context);
506c629a 953 if (!ret)
2768cbbb 954 ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
506c629a 955 if (ret)
c8cf078e 956 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
506c629a 957 return ret;
77110abb
RJ
958}
959
77110abb
RJ
960/*
961 * Interface active, can use i2c. If it fails, it can indeed mean, that
962 * this wasn't our capture interface, so, we wait for the right one
963 */
40e2e092
GL
964static int mt9m111_video_probe(struct soc_camera_device *icd,
965 struct i2c_client *client)
77110abb 966{
979ea1dd 967 struct mt9m111 *mt9m111 = to_mt9m111(client);
77110abb
RJ
968 s32 data;
969 int ret;
970
971 /*
972 * We must have a parent by now. And it cannot be a wrong one.
973 * So this entire test is completely redundant.
974 */
975 if (!icd->dev.parent ||
976 to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
977 return -ENODEV;
978
a4c56fd8
GL
979 mt9m111->autoexposure = 1;
980 mt9m111->autowhitebalance = 1;
981
982 mt9m111->swap_rgb_even_odd = 1;
983 mt9m111->swap_rgb_red_blue = 1;
984
77110abb
RJ
985 data = reg_read(CHIP_VERSION);
986
987 switch (data) {
c8cf078e 988 case 0x143a: /* MT9M111 or MT9M131 */
77110abb 989 mt9m111->model = V4L2_IDENT_MT9M111;
c8cf078e
PW
990 dev_info(&client->dev,
991 "Detected a MT9M111/MT9M131 chip ID %x\n", data);
d7f83a51
MR
992 break;
993 case 0x148c: /* MT9M112 */
994 mt9m111->model = V4L2_IDENT_MT9M112;
c8cf078e 995 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
77110abb
RJ
996 break;
997 default:
998 ret = -ENODEV;
85f8be68 999 dev_err(&client->dev,
c8cf078e
PW
1000 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
1001 data);
77110abb
RJ
1002 goto ei2c;
1003 }
1004
2768cbbb 1005 ret = mt9m111_init(mt9m111);
175bad92 1006
77110abb
RJ
1007ei2c:
1008 return ret;
1009}
1010
979ea1dd
GL
1011static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
1012 .g_ctrl = mt9m111_g_ctrl,
1013 .s_ctrl = mt9m111_s_ctrl,
1014 .g_chip_ident = mt9m111_g_chip_ident,
1015#ifdef CONFIG_VIDEO_ADV_DEBUG
1016 .g_register = mt9m111_g_register,
1017 .s_register = mt9m111_s_register,
1018#endif
1019};
1020
3805f201 1021static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
760697be
GL
1022 enum v4l2_mbus_pixelcode *code)
1023{
3805f201 1024 if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
760697be
GL
1025 return -EINVAL;
1026
1027 *code = mt9m111_colour_fmts[index].code;
1028 return 0;
1029}
1030
979ea1dd 1031static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
760697be
GL
1032 .s_mbus_fmt = mt9m111_s_fmt,
1033 .g_mbus_fmt = mt9m111_g_fmt,
1034 .try_mbus_fmt = mt9m111_try_fmt,
08590b96 1035 .s_crop = mt9m111_s_crop,
6a6c8786
GL
1036 .g_crop = mt9m111_g_crop,
1037 .cropcap = mt9m111_cropcap,
760697be 1038 .enum_mbus_fmt = mt9m111_enum_fmt,
979ea1dd
GL
1039};
1040
1041static struct v4l2_subdev_ops mt9m111_subdev_ops = {
1042 .core = &mt9m111_subdev_core_ops,
1043 .video = &mt9m111_subdev_video_ops,
1044};
1045
77110abb
RJ
1046static int mt9m111_probe(struct i2c_client *client,
1047 const struct i2c_device_id *did)
1048{
1049 struct mt9m111 *mt9m111;
40e2e092 1050 struct soc_camera_device *icd = client->dev.platform_data;
77110abb 1051 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
40e2e092 1052 struct soc_camera_link *icl;
77110abb
RJ
1053 int ret;
1054
40e2e092 1055 if (!icd) {
c8cf078e 1056 dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
40e2e092
GL
1057 return -EINVAL;
1058 }
1059
1060 icl = to_soc_camera_link(icd);
77110abb 1061 if (!icl) {
c8cf078e 1062 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
77110abb
RJ
1063 return -EINVAL;
1064 }
1065
1066 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1067 dev_warn(&adapter->dev,
1068 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
1069 return -EIO;
1070 }
1071
1072 mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
1073 if (!mt9m111)
1074 return -ENOMEM;
1075
979ea1dd 1076 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
77110abb
RJ
1077
1078 /* Second stage probe - when a capture adapter is there */
a0705b07 1079 icd->ops = &mt9m111_ops;
77110abb 1080
6a6c8786
GL
1081 mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
1082 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
1083 mt9m111->rect.width = MT9M111_MAX_WIDTH;
1084 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
760697be 1085 mt9m111->fmt = &mt9m111_colour_fmts[0];
6a6c8786 1086
40e2e092
GL
1087 ret = mt9m111_video_probe(icd, client);
1088 if (ret) {
1089 icd->ops = NULL;
40e2e092
GL
1090 kfree(mt9m111);
1091 }
77110abb 1092
77110abb
RJ
1093 return ret;
1094}
1095
1096static int mt9m111_remove(struct i2c_client *client)
1097{
979ea1dd 1098 struct mt9m111 *mt9m111 = to_mt9m111(client);
40e2e092
GL
1099 struct soc_camera_device *icd = client->dev.platform_data;
1100
1101 icd->ops = NULL;
77110abb
RJ
1102 kfree(mt9m111);
1103
1104 return 0;
1105}
1106
1107static const struct i2c_device_id mt9m111_id[] = {
1108 { "mt9m111", 0 },
1109 { }
1110};
1111MODULE_DEVICE_TABLE(i2c, mt9m111_id);
1112
1113static struct i2c_driver mt9m111_i2c_driver = {
1114 .driver = {
1115 .name = "mt9m111",
1116 },
1117 .probe = mt9m111_probe,
1118 .remove = mt9m111_remove,
1119 .id_table = mt9m111_id,
1120};
1121
1122static int __init mt9m111_mod_init(void)
1123{
1124 return i2c_add_driver(&mt9m111_i2c_driver);
1125}
1126
1127static void __exit mt9m111_mod_exit(void)
1128{
1129 i2c_del_driver(&mt9m111_i2c_driver);
1130}
1131
1132module_init(mt9m111_mod_init);
1133module_exit(mt9m111_mod_exit);
1134
c8cf078e 1135MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
77110abb
RJ
1136MODULE_AUTHOR("Robert Jarzmik");
1137MODULE_LICENSE("GPL");
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