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7397bfbe GL |
1 | /* |
2 | * Driver for MT9V022 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/log2.h> | |
7a707b89 | 16 | #include <linux/module.h> |
7397bfbe | 17 | |
e8e2c70c GL |
18 | #include <media/soc_camera.h> |
19 | #include <media/soc_mediabus.h> | |
979ea1dd | 20 | #include <media/v4l2-subdev.h> |
7397bfbe | 21 | #include <media/v4l2-chip-ident.h> |
ab7b50ae | 22 | #include <media/v4l2-ctrls.h> |
7397bfbe | 23 | |
5d28d525 GL |
24 | /* |
25 | * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c | |
22cf83fa | 26 | * The platform has to define struct i2c_board_info objects and link to them |
5d28d525 GL |
27 | * from struct soc_camera_link |
28 | */ | |
7397bfbe GL |
29 | |
30 | static char *sensor_type; | |
31 | module_param(sensor_type, charp, S_IRUGO); | |
61a2d07d | 32 | MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\""); |
7397bfbe GL |
33 | |
34 | /* mt9v022 selected register addresses */ | |
35 | #define MT9V022_CHIP_VERSION 0x00 | |
36 | #define MT9V022_COLUMN_START 0x01 | |
37 | #define MT9V022_ROW_START 0x02 | |
38 | #define MT9V022_WINDOW_HEIGHT 0x03 | |
39 | #define MT9V022_WINDOW_WIDTH 0x04 | |
40 | #define MT9V022_HORIZONTAL_BLANKING 0x05 | |
41 | #define MT9V022_VERTICAL_BLANKING 0x06 | |
42 | #define MT9V022_CHIP_CONTROL 0x07 | |
43 | #define MT9V022_SHUTTER_WIDTH1 0x08 | |
44 | #define MT9V022_SHUTTER_WIDTH2 0x09 | |
45 | #define MT9V022_SHUTTER_WIDTH_CTRL 0x0a | |
46 | #define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b | |
47 | #define MT9V022_RESET 0x0c | |
48 | #define MT9V022_READ_MODE 0x0d | |
49 | #define MT9V022_MONITOR_MODE 0x0e | |
50 | #define MT9V022_PIXEL_OPERATION_MODE 0x0f | |
51 | #define MT9V022_LED_OUT_CONTROL 0x1b | |
52 | #define MT9V022_ADC_MODE_CONTROL 0x1c | |
96c75399 | 53 | #define MT9V022_ANALOG_GAIN 0x35 |
7397bfbe GL |
54 | #define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 |
55 | #define MT9V022_PIXCLK_FV_LV 0x74 | |
56 | #define MT9V022_DIGITAL_TEST_PATTERN 0x7f | |
57 | #define MT9V022_AEC_AGC_ENABLE 0xAF | |
58 | #define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD | |
59 | ||
60 | /* Progressive scan, master, defaults */ | |
61 | #define MT9V022_CHIP_CONTROL_DEFAULT 0x188 | |
62 | ||
6a6c8786 GL |
63 | #define MT9V022_MAX_WIDTH 752 |
64 | #define MT9V022_MAX_HEIGHT 480 | |
65 | #define MT9V022_MIN_WIDTH 48 | |
66 | #define MT9V022_MIN_HEIGHT 32 | |
67 | #define MT9V022_COLUMN_SKIP 1 | |
68 | #define MT9V022_ROW_SKIP 4 | |
69 | ||
760697be GL |
70 | /* MT9V022 has only one fixed colorspace per pixelcode */ |
71 | struct mt9v022_datafmt { | |
72 | enum v4l2_mbus_pixelcode code; | |
73 | enum v4l2_colorspace colorspace; | |
74 | }; | |
75 | ||
76 | /* Find a data format by a pixel code in an array */ | |
77 | static const struct mt9v022_datafmt *mt9v022_find_datafmt( | |
78 | enum v4l2_mbus_pixelcode code, const struct mt9v022_datafmt *fmt, | |
79 | int n) | |
80 | { | |
81 | int i; | |
82 | for (i = 0; i < n; i++) | |
83 | if (fmt[i].code == code) | |
84 | return fmt + i; | |
85 | ||
86 | return NULL; | |
87 | } | |
88 | ||
89 | static const struct mt9v022_datafmt mt9v022_colour_fmts[] = { | |
5d28d525 GL |
90 | /* |
91 | * Order important: first natively supported, | |
92 | * second supported with a GPIO extender | |
93 | */ | |
760697be GL |
94 | {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, |
95 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | |
bb55de3b GL |
96 | }; |
97 | ||
760697be | 98 | static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = { |
bb55de3b | 99 | /* Order important - see above */ |
760697be | 100 | {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG}, |
07670433 | 101 | {V4L2_MBUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG}, |
7397bfbe GL |
102 | }; |
103 | ||
104 | struct mt9v022 { | |
979ea1dd | 105 | struct v4l2_subdev subdev; |
ab7b50ae HV |
106 | struct v4l2_ctrl_handler hdl; |
107 | struct { | |
108 | /* exposure/auto-exposure cluster */ | |
109 | struct v4l2_ctrl *autoexposure; | |
110 | struct v4l2_ctrl *exposure; | |
111 | }; | |
112 | struct { | |
113 | /* gain/auto-gain cluster */ | |
114 | struct v4l2_ctrl *autogain; | |
115 | struct v4l2_ctrl *gain; | |
116 | }; | |
6a6c8786 | 117 | struct v4l2_rect rect; /* Sensor window */ |
760697be GL |
118 | const struct mt9v022_datafmt *fmt; |
119 | const struct mt9v022_datafmt *fmts; | |
120 | int num_fmts; | |
7fb0fd05 | 121 | int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */ |
7397bfbe | 122 | u16 chip_control; |
32536108 | 123 | unsigned short y_skip_top; /* Lines to skip at the top */ |
7397bfbe GL |
124 | }; |
125 | ||
979ea1dd GL |
126 | static struct mt9v022 *to_mt9v022(const struct i2c_client *client) |
127 | { | |
128 | return container_of(i2c_get_clientdata(client), struct mt9v022, subdev); | |
129 | } | |
130 | ||
9538e1c2 | 131 | static int reg_read(struct i2c_client *client, const u8 reg) |
7397bfbe | 132 | { |
3f877045 | 133 | return i2c_smbus_read_word_swapped(client, reg); |
7397bfbe GL |
134 | } |
135 | ||
9538e1c2 | 136 | static int reg_write(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
137 | const u16 data) |
138 | { | |
3f877045 | 139 | return i2c_smbus_write_word_swapped(client, reg, data); |
7397bfbe GL |
140 | } |
141 | ||
9538e1c2 | 142 | static int reg_set(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
143 | const u16 data) |
144 | { | |
145 | int ret; | |
146 | ||
9538e1c2 | 147 | ret = reg_read(client, reg); |
7397bfbe GL |
148 | if (ret < 0) |
149 | return ret; | |
9538e1c2 | 150 | return reg_write(client, reg, ret | data); |
7397bfbe GL |
151 | } |
152 | ||
9538e1c2 | 153 | static int reg_clear(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
154 | const u16 data) |
155 | { | |
156 | int ret; | |
157 | ||
9538e1c2 | 158 | ret = reg_read(client, reg); |
7397bfbe GL |
159 | if (ret < 0) |
160 | return ret; | |
9538e1c2 | 161 | return reg_write(client, reg, ret & ~data); |
7397bfbe GL |
162 | } |
163 | ||
a4c56fd8 | 164 | static int mt9v022_init(struct i2c_client *client) |
7397bfbe | 165 | { |
979ea1dd | 166 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
7397bfbe GL |
167 | int ret; |
168 | ||
5d28d525 GL |
169 | /* |
170 | * Almost the default mode: master, parallel, simultaneous, and an | |
7397bfbe | 171 | * undocumented bit 0x200, which is present in table 7, but not in 8, |
5d28d525 GL |
172 | * plus snapshot mode to disable scan for now |
173 | */ | |
7397bfbe | 174 | mt9v022->chip_control |= 0x10; |
9538e1c2 | 175 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); |
11211641 | 176 | if (!ret) |
9538e1c2 | 177 | ret = reg_write(client, MT9V022_READ_MODE, 0x300); |
7397bfbe GL |
178 | |
179 | /* All defaults */ | |
11211641 | 180 | if (!ret) |
7397bfbe | 181 | /* AEC, AGC on */ |
9538e1c2 | 182 | ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3); |
96c75399 GL |
183 | if (!ret) |
184 | ret = reg_write(client, MT9V022_ANALOG_GAIN, 16); | |
185 | if (!ret) | |
186 | ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480); | |
11211641 | 187 | if (!ret) |
9538e1c2 | 188 | ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480); |
11211641 | 189 | if (!ret) |
7397bfbe | 190 | /* default - auto */ |
9538e1c2 | 191 | ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); |
11211641 | 192 | if (!ret) |
9538e1c2 | 193 | ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0); |
ab7b50ae HV |
194 | if (!ret) |
195 | return v4l2_ctrl_handler_setup(&mt9v022->hdl); | |
7397bfbe | 196 | |
11211641 | 197 | return ret; |
7397bfbe GL |
198 | } |
199 | ||
979ea1dd | 200 | static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable) |
7397bfbe | 201 | { |
c4ce6d14 | 202 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 203 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
81034663 | 204 | |
979ea1dd GL |
205 | if (enable) |
206 | /* Switch to master "normal" mode */ | |
207 | mt9v022->chip_control &= ~0x10; | |
208 | else | |
209 | /* Switch to snapshot mode */ | |
210 | mt9v022->chip_control |= 0x10; | |
7397bfbe | 211 | |
979ea1dd | 212 | if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0) |
7397bfbe GL |
213 | return -EIO; |
214 | return 0; | |
215 | } | |
216 | ||
08590b96 | 217 | static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
ad5f2e85 | 218 | { |
c4ce6d14 | 219 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 GL |
220 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
221 | struct v4l2_rect rect = a->c; | |
ad5f2e85 GL |
222 | int ret; |
223 | ||
6a6c8786 | 224 | /* Bayer format - even size lengths */ |
760697be | 225 | if (mt9v022->fmts == mt9v022_colour_fmts) { |
6a6c8786 GL |
226 | rect.width = ALIGN(rect.width, 2); |
227 | rect.height = ALIGN(rect.height, 2); | |
228 | /* Let the user play with the starting pixel */ | |
229 | } | |
230 | ||
231 | soc_camera_limit_side(&rect.left, &rect.width, | |
232 | MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH); | |
233 | ||
234 | soc_camera_limit_side(&rect.top, &rect.height, | |
235 | MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT); | |
236 | ||
7397bfbe | 237 | /* Like in example app. Contradicts the datasheet though */ |
9538e1c2 | 238 | ret = reg_read(client, MT9V022_AEC_AGC_ENABLE); |
7397bfbe GL |
239 | if (ret >= 0) { |
240 | if (ret & 1) /* Autoexposure */ | |
9538e1c2 | 241 | ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, |
32536108 | 242 | rect.height + mt9v022->y_skip_top + 43); |
7397bfbe | 243 | else |
9538e1c2 | 244 | ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, |
32536108 | 245 | rect.height + mt9v022->y_skip_top + 43); |
7397bfbe GL |
246 | } |
247 | /* Setup frame format: defaults apart from width and height */ | |
11211641 | 248 | if (!ret) |
6a6c8786 | 249 | ret = reg_write(client, MT9V022_COLUMN_START, rect.left); |
11211641 | 250 | if (!ret) |
6a6c8786 | 251 | ret = reg_write(client, MT9V022_ROW_START, rect.top); |
11211641 | 252 | if (!ret) |
5d28d525 GL |
253 | /* |
254 | * Default 94, Phytec driver says: | |
255 | * "width + horizontal blank >= 660" | |
256 | */ | |
9538e1c2 | 257 | ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING, |
6a6c8786 GL |
258 | rect.width > 660 - 43 ? 43 : |
259 | 660 - rect.width); | |
11211641 | 260 | if (!ret) |
9538e1c2 | 261 | ret = reg_write(client, MT9V022_VERTICAL_BLANKING, 45); |
11211641 | 262 | if (!ret) |
6a6c8786 | 263 | ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width); |
11211641 | 264 | if (!ret) |
9538e1c2 | 265 | ret = reg_write(client, MT9V022_WINDOW_HEIGHT, |
32536108 | 266 | rect.height + mt9v022->y_skip_top); |
7397bfbe GL |
267 | |
268 | if (ret < 0) | |
269 | return ret; | |
270 | ||
e26b3144 | 271 | dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height); |
6a6c8786 GL |
272 | |
273 | mt9v022->rect = rect; | |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
278 | static int mt9v022_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
279 | { | |
c4ce6d14 | 280 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 GL |
281 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
282 | ||
283 | a->c = mt9v022->rect; | |
284 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
290 | { | |
291 | a->bounds.left = MT9V022_COLUMN_SKIP; | |
292 | a->bounds.top = MT9V022_ROW_SKIP; | |
293 | a->bounds.width = MT9V022_MAX_WIDTH; | |
294 | a->bounds.height = MT9V022_MAX_HEIGHT; | |
295 | a->defrect = a->bounds; | |
296 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
297 | a->pixelaspect.numerator = 1; | |
298 | a->pixelaspect.denominator = 1; | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
760697be GL |
303 | static int mt9v022_g_fmt(struct v4l2_subdev *sd, |
304 | struct v4l2_mbus_framefmt *mf) | |
6a6c8786 | 305 | { |
c4ce6d14 | 306 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 | 307 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
6a6c8786 | 308 | |
760697be GL |
309 | mf->width = mt9v022->rect.width; |
310 | mf->height = mt9v022->rect.height; | |
311 | mf->code = mt9v022->fmt->code; | |
312 | mf->colorspace = mt9v022->fmt->colorspace; | |
313 | mf->field = V4L2_FIELD_NONE; | |
7397bfbe | 314 | |
7397bfbe GL |
315 | return 0; |
316 | } | |
317 | ||
760697be GL |
318 | static int mt9v022_s_fmt(struct v4l2_subdev *sd, |
319 | struct v4l2_mbus_framefmt *mf) | |
09e231b3 | 320 | { |
c4ce6d14 | 321 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 322 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
08590b96 GL |
323 | struct v4l2_crop a = { |
324 | .c = { | |
6a6c8786 GL |
325 | .left = mt9v022->rect.left, |
326 | .top = mt9v022->rect.top, | |
760697be GL |
327 | .width = mf->width, |
328 | .height = mf->height, | |
08590b96 | 329 | }, |
09e231b3 | 330 | }; |
6a6c8786 | 331 | int ret; |
09e231b3 | 332 | |
5d28d525 GL |
333 | /* |
334 | * The caller provides a supported format, as verified per call to | |
14178aa5 | 335 | * .try_mbus_fmt(), datawidth is from our supported format list |
5d28d525 | 336 | */ |
760697be | 337 | switch (mf->code) { |
07670433 | 338 | case V4L2_MBUS_FMT_Y8_1X8: |
760697be | 339 | case V4L2_MBUS_FMT_Y10_1X10: |
09e231b3 GL |
340 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM) |
341 | return -EINVAL; | |
342 | break; | |
760697be GL |
343 | case V4L2_MBUS_FMT_SBGGR8_1X8: |
344 | case V4L2_MBUS_FMT_SBGGR10_1X10: | |
09e231b3 GL |
345 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) |
346 | return -EINVAL; | |
347 | break; | |
09e231b3 GL |
348 | default: |
349 | return -EINVAL; | |
350 | } | |
351 | ||
352 | /* No support for scaling on this camera, just crop. */ | |
6a6c8786 GL |
353 | ret = mt9v022_s_crop(sd, &a); |
354 | if (!ret) { | |
760697be GL |
355 | mf->width = mt9v022->rect.width; |
356 | mf->height = mt9v022->rect.height; | |
357 | mt9v022->fmt = mt9v022_find_datafmt(mf->code, | |
358 | mt9v022->fmts, mt9v022->num_fmts); | |
359 | mf->colorspace = mt9v022->fmt->colorspace; | |
6a6c8786 GL |
360 | } |
361 | ||
362 | return ret; | |
09e231b3 GL |
363 | } |
364 | ||
760697be GL |
365 | static int mt9v022_try_fmt(struct v4l2_subdev *sd, |
366 | struct v4l2_mbus_framefmt *mf) | |
7397bfbe | 367 | { |
c4ce6d14 | 368 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 | 369 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
760697be GL |
370 | const struct mt9v022_datafmt *fmt; |
371 | int align = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | |
372 | mf->code == V4L2_MBUS_FMT_SBGGR10_1X10; | |
64f5905e | 373 | |
760697be | 374 | v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH, |
6a6c8786 | 375 | MT9V022_MAX_WIDTH, align, |
760697be | 376 | &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top, |
32536108 | 377 | MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0); |
7397bfbe | 378 | |
760697be GL |
379 | fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts, |
380 | mt9v022->num_fmts); | |
381 | if (!fmt) { | |
382 | fmt = mt9v022->fmt; | |
383 | mf->code = fmt->code; | |
384 | } | |
385 | ||
386 | mf->colorspace = fmt->colorspace; | |
387 | ||
7397bfbe GL |
388 | return 0; |
389 | } | |
390 | ||
979ea1dd GL |
391 | static int mt9v022_g_chip_ident(struct v4l2_subdev *sd, |
392 | struct v4l2_dbg_chip_ident *id) | |
7397bfbe | 393 | { |
c4ce6d14 | 394 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 395 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
7397bfbe | 396 | |
aecde8b5 | 397 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
7397bfbe GL |
398 | return -EINVAL; |
399 | ||
40e2e092 | 400 | if (id->match.addr != client->addr) |
7397bfbe GL |
401 | return -ENODEV; |
402 | ||
403 | id->ident = mt9v022->model; | |
404 | id->revision = 0; | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
409 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
979ea1dd GL |
410 | static int mt9v022_g_register(struct v4l2_subdev *sd, |
411 | struct v4l2_dbg_register *reg) | |
7397bfbe | 412 | { |
c4ce6d14 | 413 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
7397bfbe | 414 | |
aecde8b5 | 415 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
416 | return -EINVAL; |
417 | ||
9538e1c2 | 418 | if (reg->match.addr != client->addr) |
7397bfbe GL |
419 | return -ENODEV; |
420 | ||
aecde8b5 | 421 | reg->size = 2; |
9538e1c2 | 422 | reg->val = reg_read(client, reg->reg); |
7397bfbe GL |
423 | |
424 | if (reg->val > 0xffff) | |
425 | return -EIO; | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
979ea1dd GL |
430 | static int mt9v022_s_register(struct v4l2_subdev *sd, |
431 | struct v4l2_dbg_register *reg) | |
7397bfbe | 432 | { |
c4ce6d14 | 433 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
7397bfbe | 434 | |
aecde8b5 | 435 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
436 | return -EINVAL; |
437 | ||
9538e1c2 | 438 | if (reg->match.addr != client->addr) |
7397bfbe GL |
439 | return -ENODEV; |
440 | ||
9538e1c2 | 441 | if (reg_write(client, reg->reg, reg->val) < 0) |
7397bfbe GL |
442 | return -EIO; |
443 | ||
444 | return 0; | |
445 | } | |
446 | #endif | |
447 | ||
ab7b50ae | 448 | static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl) |
7397bfbe | 449 | { |
ab7b50ae HV |
450 | struct mt9v022 *mt9v022 = container_of(ctrl->handler, |
451 | struct mt9v022, hdl); | |
452 | struct v4l2_subdev *sd = &mt9v022->subdev; | |
c4ce6d14 | 453 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
ab7b50ae HV |
454 | struct v4l2_ctrl *gain = mt9v022->gain; |
455 | struct v4l2_ctrl *exp = mt9v022->exposure; | |
96c75399 | 456 | unsigned long range; |
7397bfbe GL |
457 | int data; |
458 | ||
459 | switch (ctrl->id) { | |
7397bfbe | 460 | case V4L2_CID_AUTOGAIN: |
96c75399 GL |
461 | data = reg_read(client, MT9V022_ANALOG_GAIN); |
462 | if (data < 0) | |
463 | return -EIO; | |
464 | ||
ab7b50ae HV |
465 | range = gain->maximum - gain->minimum; |
466 | gain->val = ((data - 16) * range + 24) / 48 + gain->minimum; | |
467 | return 0; | |
468 | case V4L2_CID_EXPOSURE_AUTO: | |
96c75399 GL |
469 | data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH); |
470 | if (data < 0) | |
471 | return -EIO; | |
472 | ||
ab7b50ae HV |
473 | range = exp->maximum - exp->minimum; |
474 | exp->val = ((data - 1) * range + 239) / 479 + exp->minimum; | |
475 | return 0; | |
7397bfbe | 476 | } |
ab7b50ae | 477 | return -EINVAL; |
7397bfbe GL |
478 | } |
479 | ||
ab7b50ae | 480 | static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl) |
7397bfbe | 481 | { |
ab7b50ae HV |
482 | struct mt9v022 *mt9v022 = container_of(ctrl->handler, |
483 | struct mt9v022, hdl); | |
484 | struct v4l2_subdev *sd = &mt9v022->subdev; | |
c4ce6d14 | 485 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
ab7b50ae | 486 | int data; |
7397bfbe GL |
487 | |
488 | switch (ctrl->id) { | |
489 | case V4L2_CID_VFLIP: | |
ab7b50ae | 490 | if (ctrl->val) |
9538e1c2 | 491 | data = reg_set(client, MT9V022_READ_MODE, 0x10); |
7397bfbe | 492 | else |
9538e1c2 | 493 | data = reg_clear(client, MT9V022_READ_MODE, 0x10); |
7397bfbe GL |
494 | if (data < 0) |
495 | return -EIO; | |
ab7b50ae | 496 | return 0; |
7397bfbe | 497 | case V4L2_CID_HFLIP: |
ab7b50ae | 498 | if (ctrl->val) |
9538e1c2 | 499 | data = reg_set(client, MT9V022_READ_MODE, 0x20); |
7397bfbe | 500 | else |
9538e1c2 | 501 | data = reg_clear(client, MT9V022_READ_MODE, 0x20); |
7397bfbe GL |
502 | if (data < 0) |
503 | return -EIO; | |
ab7b50ae HV |
504 | return 0; |
505 | case V4L2_CID_AUTOGAIN: | |
506 | if (ctrl->val) { | |
507 | if (reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) | |
508 | return -EIO; | |
509 | } else { | |
510 | struct v4l2_ctrl *gain = mt9v022->gain; | |
511 | /* mt9v022 has minimum == default */ | |
512 | unsigned long range = gain->maximum - gain->minimum; | |
96c75399 | 513 | /* Valid values 16 to 64, 32 to 64 must be even. */ |
ab7b50ae | 514 | unsigned long gain_val = ((gain->val - gain->minimum) * |
96c75399 | 515 | 48 + range / 2) / range + 16; |
ab7b50ae HV |
516 | |
517 | if (gain_val >= 32) | |
518 | gain_val &= ~1; | |
519 | ||
5d28d525 GL |
520 | /* |
521 | * The user wants to set gain manually, hope, she | |
522 | * knows, what she's doing... Switch AGC off. | |
523 | */ | |
9538e1c2 | 524 | if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) |
7397bfbe GL |
525 | return -EIO; |
526 | ||
96c75399 | 527 | dev_dbg(&client->dev, "Setting gain from %d to %lu\n", |
ab7b50ae HV |
528 | reg_read(client, MT9V022_ANALOG_GAIN), gain_val); |
529 | if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0) | |
7397bfbe | 530 | return -EIO; |
7397bfbe | 531 | } |
ab7b50ae HV |
532 | return 0; |
533 | case V4L2_CID_EXPOSURE_AUTO: | |
534 | if (ctrl->val == V4L2_EXPOSURE_AUTO) { | |
535 | data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1); | |
536 | } else { | |
537 | struct v4l2_ctrl *exp = mt9v022->exposure; | |
538 | unsigned long range = exp->maximum - exp->minimum; | |
539 | unsigned long shutter = ((exp->val - exp->minimum) * | |
540 | 479 + range / 2) / range + 1; | |
541 | ||
5d28d525 GL |
542 | /* |
543 | * The user wants to set shutter width manually, hope, | |
544 | * she knows, what she's doing... Switch AEC off. | |
545 | */ | |
ab7b50ae HV |
546 | data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1); |
547 | if (data < 0) | |
7397bfbe | 548 | return -EIO; |
85f8be68 | 549 | dev_dbg(&client->dev, "Shutter width from %d to %lu\n", |
ab7b50ae HV |
550 | reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH), |
551 | shutter); | |
9538e1c2 | 552 | if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, |
ab7b50ae | 553 | shutter) < 0) |
7397bfbe | 554 | return -EIO; |
7397bfbe | 555 | } |
ab7b50ae | 556 | return 0; |
7397bfbe | 557 | } |
ab7b50ae | 558 | return -EINVAL; |
7397bfbe GL |
559 | } |
560 | ||
5d28d525 GL |
561 | /* |
562 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
563 | * this wasn't our capture interface, so, we wait for the right one | |
564 | */ | |
14178aa5 | 565 | static int mt9v022_video_probe(struct i2c_client *client) |
7397bfbe | 566 | { |
979ea1dd | 567 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
14178aa5 | 568 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe GL |
569 | s32 data; |
570 | int ret; | |
e958e27a | 571 | unsigned long flags; |
7397bfbe | 572 | |
7397bfbe | 573 | /* Read out the chip version register */ |
9538e1c2 | 574 | data = reg_read(client, MT9V022_CHIP_VERSION); |
7397bfbe GL |
575 | |
576 | /* must be 0x1311 or 0x1313 */ | |
577 | if (data != 0x1311 && data != 0x1313) { | |
578 | ret = -ENODEV; | |
85f8be68 | 579 | dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n", |
7397bfbe GL |
580 | data); |
581 | goto ei2c; | |
582 | } | |
583 | ||
584 | /* Soft reset */ | |
9538e1c2 | 585 | ret = reg_write(client, MT9V022_RESET, 1); |
7397bfbe GL |
586 | if (ret < 0) |
587 | goto ei2c; | |
588 | /* 15 clock cycles */ | |
589 | udelay(200); | |
9538e1c2 | 590 | if (reg_read(client, MT9V022_RESET)) { |
85f8be68 | 591 | dev_err(&client->dev, "Resetting MT9V022 failed!\n"); |
40e2e092 GL |
592 | if (ret > 0) |
593 | ret = -EIO; | |
7397bfbe GL |
594 | goto ei2c; |
595 | } | |
596 | ||
597 | /* Set monochrome or colour sensor type */ | |
598 | if (sensor_type && (!strcmp("colour", sensor_type) || | |
599 | !strcmp("color", sensor_type))) { | |
9538e1c2 | 600 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); |
7397bfbe | 601 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATC; |
760697be | 602 | mt9v022->fmts = mt9v022_colour_fmts; |
7397bfbe | 603 | } else { |
9538e1c2 | 604 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11); |
7397bfbe | 605 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATM; |
760697be | 606 | mt9v022->fmts = mt9v022_monochrome_fmts; |
7397bfbe GL |
607 | } |
608 | ||
e958e27a | 609 | if (ret < 0) |
40e2e092 | 610 | goto ei2c; |
e958e27a | 611 | |
760697be | 612 | mt9v022->num_fmts = 0; |
e958e27a SH |
613 | |
614 | /* | |
615 | * This is a 10bit sensor, so by default we only allow 10bit. | |
616 | * The platform may support different bus widths due to | |
617 | * different routing of the data lines. | |
618 | */ | |
619 | if (icl->query_bus_param) | |
620 | flags = icl->query_bus_param(icl); | |
621 | else | |
622 | flags = SOCAM_DATAWIDTH_10; | |
623 | ||
624 | if (flags & SOCAM_DATAWIDTH_10) | |
760697be | 625 | mt9v022->num_fmts++; |
e958e27a | 626 | else |
760697be | 627 | mt9v022->fmts++; |
e958e27a SH |
628 | |
629 | if (flags & SOCAM_DATAWIDTH_8) | |
760697be | 630 | mt9v022->num_fmts++; |
e958e27a | 631 | |
760697be | 632 | mt9v022->fmt = &mt9v022->fmts[0]; |
6a6c8786 | 633 | |
85f8be68 | 634 | dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", |
7397bfbe GL |
635 | data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ? |
636 | "monochrome" : "colour"); | |
637 | ||
a4c56fd8 GL |
638 | ret = mt9v022_init(client); |
639 | if (ret < 0) | |
640 | dev_err(&client->dev, "Failed to initialise the camera\n"); | |
641 | ||
7397bfbe GL |
642 | ei2c: |
643 | return ret; | |
644 | } | |
645 | ||
32536108 GL |
646 | static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) |
647 | { | |
c4ce6d14 | 648 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 GL |
649 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
650 | ||
651 | *lines = mt9v022->y_skip_top; | |
652 | ||
653 | return 0; | |
654 | } | |
655 | ||
ab7b50ae HV |
656 | static const struct v4l2_ctrl_ops mt9v022_ctrl_ops = { |
657 | .g_volatile_ctrl = mt9v022_g_volatile_ctrl, | |
658 | .s_ctrl = mt9v022_s_ctrl, | |
659 | }; | |
660 | ||
979ea1dd | 661 | static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = { |
979ea1dd GL |
662 | .g_chip_ident = mt9v022_g_chip_ident, |
663 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
664 | .g_register = mt9v022_g_register, | |
665 | .s_register = mt9v022_s_register, | |
666 | #endif | |
667 | }; | |
668 | ||
3805f201 | 669 | static int mt9v022_enum_fmt(struct v4l2_subdev *sd, unsigned int index, |
760697be GL |
670 | enum v4l2_mbus_pixelcode *code) |
671 | { | |
c4ce6d14 | 672 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
760697be GL |
673 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
674 | ||
3805f201 | 675 | if (index >= mt9v022->num_fmts) |
760697be GL |
676 | return -EINVAL; |
677 | ||
678 | *code = mt9v022->fmts[index].code; | |
679 | return 0; | |
680 | } | |
681 | ||
e8e2c70c GL |
682 | static int mt9v022_g_mbus_config(struct v4l2_subdev *sd, |
683 | struct v4l2_mbus_config *cfg) | |
684 | { | |
685 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
14178aa5 | 686 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
e8e2c70c GL |
687 | |
688 | cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE | | |
689 | V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | | |
690 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW | | |
691 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | | |
692 | V4L2_MBUS_DATA_ACTIVE_HIGH; | |
693 | cfg->type = V4L2_MBUS_PARALLEL; | |
694 | cfg->flags = soc_camera_apply_board_flags(icl, cfg); | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
699 | static int mt9v022_s_mbus_config(struct v4l2_subdev *sd, | |
700 | const struct v4l2_mbus_config *cfg) | |
701 | { | |
702 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
443f483a | 703 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
e8e2c70c GL |
704 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
705 | unsigned long flags = soc_camera_apply_board_flags(icl, cfg); | |
443f483a | 706 | unsigned int bps = soc_mbus_get_fmtdesc(mt9v022->fmt->code)->bits_per_sample; |
e8e2c70c GL |
707 | int ret; |
708 | u16 pixclk = 0; | |
709 | ||
e8e2c70c GL |
710 | if (icl->set_bus_param) { |
711 | ret = icl->set_bus_param(icl, 1 << (bps - 1)); | |
712 | if (ret) | |
713 | return ret; | |
714 | } else if (bps != 10) { | |
715 | /* | |
716 | * Without board specific bus width settings we only support the | |
717 | * sensors native bus width | |
718 | */ | |
719 | return -EINVAL; | |
720 | } | |
721 | ||
722 | if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) | |
723 | pixclk |= 0x10; | |
724 | ||
725 | if (!(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)) | |
726 | pixclk |= 0x1; | |
727 | ||
728 | if (!(flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)) | |
729 | pixclk |= 0x2; | |
730 | ||
731 | ret = reg_write(client, MT9V022_PIXCLK_FV_LV, pixclk); | |
732 | if (ret < 0) | |
733 | return ret; | |
734 | ||
735 | if (!(flags & V4L2_MBUS_MASTER)) | |
736 | mt9v022->chip_control &= ~0x8; | |
737 | ||
738 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
739 | if (ret < 0) | |
740 | return ret; | |
741 | ||
742 | dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", | |
743 | pixclk, mt9v022->chip_control); | |
744 | ||
745 | return 0; | |
746 | } | |
747 | ||
979ea1dd GL |
748 | static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = { |
749 | .s_stream = mt9v022_s_stream, | |
760697be GL |
750 | .s_mbus_fmt = mt9v022_s_fmt, |
751 | .g_mbus_fmt = mt9v022_g_fmt, | |
752 | .try_mbus_fmt = mt9v022_try_fmt, | |
08590b96 | 753 | .s_crop = mt9v022_s_crop, |
6a6c8786 GL |
754 | .g_crop = mt9v022_g_crop, |
755 | .cropcap = mt9v022_cropcap, | |
760697be | 756 | .enum_mbus_fmt = mt9v022_enum_fmt, |
e8e2c70c GL |
757 | .g_mbus_config = mt9v022_g_mbus_config, |
758 | .s_mbus_config = mt9v022_s_mbus_config, | |
979ea1dd GL |
759 | }; |
760 | ||
32536108 GL |
761 | static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = { |
762 | .g_skip_top_lines = mt9v022_g_skip_top_lines, | |
763 | }; | |
764 | ||
979ea1dd GL |
765 | static struct v4l2_subdev_ops mt9v022_subdev_ops = { |
766 | .core = &mt9v022_subdev_core_ops, | |
767 | .video = &mt9v022_subdev_video_ops, | |
32536108 | 768 | .sensor = &mt9v022_subdev_sensor_ops, |
979ea1dd GL |
769 | }; |
770 | ||
d2653e92 JD |
771 | static int mt9v022_probe(struct i2c_client *client, |
772 | const struct i2c_device_id *did) | |
7397bfbe GL |
773 | { |
774 | struct mt9v022 *mt9v022; | |
14178aa5 | 775 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe | 776 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
7397bfbe GL |
777 | int ret; |
778 | ||
779 | if (!icl) { | |
780 | dev_err(&client->dev, "MT9V022 driver needs platform data\n"); | |
781 | return -EINVAL; | |
782 | } | |
783 | ||
784 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
785 | dev_warn(&adapter->dev, | |
786 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
787 | return -EIO; | |
788 | } | |
789 | ||
790 | mt9v022 = kzalloc(sizeof(struct mt9v022), GFP_KERNEL); | |
791 | if (!mt9v022) | |
792 | return -ENOMEM; | |
793 | ||
979ea1dd | 794 | v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops); |
ab7b50ae HV |
795 | v4l2_ctrl_handler_init(&mt9v022->hdl, 6); |
796 | v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
797 | V4L2_CID_VFLIP, 0, 1, 1, 0); | |
798 | v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
799 | V4L2_CID_HFLIP, 0, 1, 1, 0); | |
800 | mt9v022->autogain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
801 | V4L2_CID_AUTOGAIN, 0, 1, 1, 1); | |
802 | mt9v022->gain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
803 | V4L2_CID_GAIN, 0, 127, 1, 64); | |
804 | ||
805 | /* | |
806 | * Simulated autoexposure. If enabled, we calculate shutter width | |
807 | * ourselves in the driver based on vertical blanking and frame width | |
808 | */ | |
809 | mt9v022->autoexposure = v4l2_ctrl_new_std_menu(&mt9v022->hdl, | |
810 | &mt9v022_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, | |
811 | V4L2_EXPOSURE_AUTO); | |
812 | mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
813 | V4L2_CID_EXPOSURE, 1, 255, 1, 255); | |
814 | ||
815 | mt9v022->subdev.ctrl_handler = &mt9v022->hdl; | |
816 | if (mt9v022->hdl.error) { | |
817 | int err = mt9v022->hdl.error; | |
818 | ||
819 | kfree(mt9v022); | |
820 | return err; | |
821 | } | |
822 | v4l2_ctrl_auto_cluster(2, &mt9v022->autoexposure, | |
823 | V4L2_EXPOSURE_MANUAL, true); | |
824 | v4l2_ctrl_auto_cluster(2, &mt9v022->autogain, 0, true); | |
979ea1dd | 825 | |
7397bfbe | 826 | mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; |
7397bfbe | 827 | |
96c75399 GL |
828 | /* |
829 | * MT9V022 _really_ corrupts the first read out line. | |
830 | * TODO: verify on i.MX31 | |
831 | */ | |
32536108 | 832 | mt9v022->y_skip_top = 1; |
6a6c8786 GL |
833 | mt9v022->rect.left = MT9V022_COLUMN_SKIP; |
834 | mt9v022->rect.top = MT9V022_ROW_SKIP; | |
835 | mt9v022->rect.width = MT9V022_MAX_WIDTH; | |
836 | mt9v022->rect.height = MT9V022_MAX_HEIGHT; | |
837 | ||
14178aa5 | 838 | ret = mt9v022_video_probe(client); |
40e2e092 | 839 | if (ret) { |
ab7b50ae | 840 | v4l2_ctrl_handler_free(&mt9v022->hdl); |
40e2e092 GL |
841 | kfree(mt9v022); |
842 | } | |
7397bfbe | 843 | |
7397bfbe GL |
844 | return ret; |
845 | } | |
846 | ||
847 | static int mt9v022_remove(struct i2c_client *client) | |
848 | { | |
979ea1dd | 849 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
14178aa5 | 850 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe | 851 | |
ab7b50ae | 852 | v4l2_device_unregister_subdev(&mt9v022->subdev); |
14178aa5 GL |
853 | if (icl->free_bus) |
854 | icl->free_bus(icl); | |
ab7b50ae | 855 | v4l2_ctrl_handler_free(&mt9v022->hdl); |
7397bfbe GL |
856 | kfree(mt9v022); |
857 | ||
858 | return 0; | |
859 | } | |
3760f736 JD |
860 | static const struct i2c_device_id mt9v022_id[] = { |
861 | { "mt9v022", 0 }, | |
862 | { } | |
863 | }; | |
864 | MODULE_DEVICE_TABLE(i2c, mt9v022_id); | |
865 | ||
7397bfbe GL |
866 | static struct i2c_driver mt9v022_i2c_driver = { |
867 | .driver = { | |
868 | .name = "mt9v022", | |
869 | }, | |
870 | .probe = mt9v022_probe, | |
871 | .remove = mt9v022_remove, | |
3760f736 | 872 | .id_table = mt9v022_id, |
7397bfbe GL |
873 | }; |
874 | ||
c6e8d86f | 875 | module_i2c_driver(mt9v022_i2c_driver); |
7397bfbe GL |
876 | |
877 | MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); | |
878 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
879 | MODULE_LICENSE("GPL"); |