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7397bfbe GL |
1 | /* |
2 | * Driver for MT9V022 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/log2.h> | |
91e64c88 | 16 | #include <linux/gpio.h> |
7397bfbe GL |
17 | |
18 | #include <media/v4l2-common.h> | |
19 | #include <media/v4l2-chip-ident.h> | |
20 | #include <media/soc_camera.h> | |
21 | ||
7397bfbe GL |
22 | /* mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c |
23 | * The platform has to define i2c_board_info | |
24 | * and call i2c_register_board_info() */ | |
25 | ||
26 | static char *sensor_type; | |
27 | module_param(sensor_type, charp, S_IRUGO); | |
61a2d07d | 28 | MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\""); |
7397bfbe GL |
29 | |
30 | /* mt9v022 selected register addresses */ | |
31 | #define MT9V022_CHIP_VERSION 0x00 | |
32 | #define MT9V022_COLUMN_START 0x01 | |
33 | #define MT9V022_ROW_START 0x02 | |
34 | #define MT9V022_WINDOW_HEIGHT 0x03 | |
35 | #define MT9V022_WINDOW_WIDTH 0x04 | |
36 | #define MT9V022_HORIZONTAL_BLANKING 0x05 | |
37 | #define MT9V022_VERTICAL_BLANKING 0x06 | |
38 | #define MT9V022_CHIP_CONTROL 0x07 | |
39 | #define MT9V022_SHUTTER_WIDTH1 0x08 | |
40 | #define MT9V022_SHUTTER_WIDTH2 0x09 | |
41 | #define MT9V022_SHUTTER_WIDTH_CTRL 0x0a | |
42 | #define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b | |
43 | #define MT9V022_RESET 0x0c | |
44 | #define MT9V022_READ_MODE 0x0d | |
45 | #define MT9V022_MONITOR_MODE 0x0e | |
46 | #define MT9V022_PIXEL_OPERATION_MODE 0x0f | |
47 | #define MT9V022_LED_OUT_CONTROL 0x1b | |
48 | #define MT9V022_ADC_MODE_CONTROL 0x1c | |
49 | #define MT9V022_ANALOG_GAIN 0x34 | |
50 | #define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 | |
51 | #define MT9V022_PIXCLK_FV_LV 0x74 | |
52 | #define MT9V022_DIGITAL_TEST_PATTERN 0x7f | |
53 | #define MT9V022_AEC_AGC_ENABLE 0xAF | |
54 | #define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD | |
55 | ||
56 | /* Progressive scan, master, defaults */ | |
57 | #define MT9V022_CHIP_CONTROL_DEFAULT 0x188 | |
58 | ||
bb55de3b GL |
59 | static const struct soc_camera_data_format mt9v022_colour_formats[] = { |
60 | /* Order important: first natively supported, | |
61 | * second supported with a GPIO extender */ | |
7397bfbe | 62 | { |
bb55de3b | 63 | .name = "Bayer (sRGB) 10 bit", |
7397bfbe GL |
64 | .depth = 10, |
65 | .fourcc = V4L2_PIX_FMT_SBGGR16, | |
66 | .colorspace = V4L2_COLORSPACE_SRGB, | |
67 | }, { | |
bb55de3b GL |
68 | .name = "Bayer (sRGB) 8 bit", |
69 | .depth = 8, | |
70 | .fourcc = V4L2_PIX_FMT_SBGGR8, | |
71 | .colorspace = V4L2_COLORSPACE_SRGB, | |
72 | } | |
73 | }; | |
74 | ||
75 | static const struct soc_camera_data_format mt9v022_monochrome_formats[] = { | |
76 | /* Order important - see above */ | |
77 | { | |
7397bfbe GL |
78 | .name = "Monochrome 10 bit", |
79 | .depth = 10, | |
80 | .fourcc = V4L2_PIX_FMT_Y16, | |
81 | }, { | |
82 | .name = "Monochrome 8 bit", | |
83 | .depth = 8, | |
84 | .fourcc = V4L2_PIX_FMT_GREY, | |
85 | }, | |
86 | }; | |
87 | ||
88 | struct mt9v022 { | |
89 | struct i2c_client *client; | |
90 | struct soc_camera_device icd; | |
7fb0fd05 | 91 | int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */ |
7397bfbe GL |
92 | int switch_gpio; |
93 | u16 chip_control; | |
94 | unsigned char datawidth; | |
95 | }; | |
96 | ||
97 | static int reg_read(struct soc_camera_device *icd, const u8 reg) | |
98 | { | |
99 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
100 | struct i2c_client *client = mt9v022->client; | |
101 | s32 data = i2c_smbus_read_word_data(client, reg); | |
102 | return data < 0 ? data : swab16(data); | |
103 | } | |
104 | ||
105 | static int reg_write(struct soc_camera_device *icd, const u8 reg, | |
106 | const u16 data) | |
107 | { | |
108 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
109 | return i2c_smbus_write_word_data(mt9v022->client, reg, swab16(data)); | |
110 | } | |
111 | ||
112 | static int reg_set(struct soc_camera_device *icd, const u8 reg, | |
113 | const u16 data) | |
114 | { | |
115 | int ret; | |
116 | ||
117 | ret = reg_read(icd, reg); | |
118 | if (ret < 0) | |
119 | return ret; | |
120 | return reg_write(icd, reg, ret | data); | |
121 | } | |
122 | ||
123 | static int reg_clear(struct soc_camera_device *icd, const u8 reg, | |
124 | const u16 data) | |
125 | { | |
126 | int ret; | |
127 | ||
128 | ret = reg_read(icd, reg); | |
129 | if (ret < 0) | |
130 | return ret; | |
131 | return reg_write(icd, reg, ret & ~data); | |
132 | } | |
133 | ||
134 | static int mt9v022_init(struct soc_camera_device *icd) | |
135 | { | |
136 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
81034663 | 137 | struct soc_camera_link *icl = mt9v022->client->dev.platform_data; |
7397bfbe GL |
138 | int ret; |
139 | ||
81034663 SH |
140 | if (icl->power) { |
141 | ret = icl->power(&mt9v022->client->dev, 1); | |
142 | if (ret < 0) { | |
143 | dev_err(icd->vdev->parent, | |
144 | "Platform failed to power-on the camera.\n"); | |
145 | return ret; | |
146 | } | |
147 | } | |
148 | ||
149 | /* | |
150 | * The camera could have been already on, we hard-reset it additionally, | |
151 | * if available. Soft reset is done in video_probe(). | |
152 | */ | |
153 | if (icl->reset) | |
154 | icl->reset(&mt9v022->client->dev); | |
155 | ||
7397bfbe GL |
156 | /* Almost the default mode: master, parallel, simultaneous, and an |
157 | * undocumented bit 0x200, which is present in table 7, but not in 8, | |
158 | * plus snapshot mode to disable scan for now */ | |
159 | mt9v022->chip_control |= 0x10; | |
160 | ret = reg_write(icd, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
11211641 GL |
161 | if (!ret) |
162 | ret = reg_write(icd, MT9V022_READ_MODE, 0x300); | |
7397bfbe GL |
163 | |
164 | /* All defaults */ | |
11211641 | 165 | if (!ret) |
7397bfbe GL |
166 | /* AEC, AGC on */ |
167 | ret = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x3); | |
11211641 | 168 | if (!ret) |
7397bfbe | 169 | ret = reg_write(icd, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480); |
11211641 | 170 | if (!ret) |
7397bfbe GL |
171 | /* default - auto */ |
172 | ret = reg_clear(icd, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); | |
11211641 | 173 | if (!ret) |
7397bfbe GL |
174 | ret = reg_write(icd, MT9V022_DIGITAL_TEST_PATTERN, 0); |
175 | ||
11211641 | 176 | return ret; |
7397bfbe GL |
177 | } |
178 | ||
179 | static int mt9v022_release(struct soc_camera_device *icd) | |
180 | { | |
81034663 SH |
181 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); |
182 | struct soc_camera_link *icl = mt9v022->client->dev.platform_data; | |
183 | ||
184 | if (icl->power) | |
185 | icl->power(&mt9v022->client->dev, 0); | |
186 | ||
7397bfbe GL |
187 | return 0; |
188 | } | |
189 | ||
190 | static int mt9v022_start_capture(struct soc_camera_device *icd) | |
191 | { | |
192 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
193 | /* Switch to master "normal" mode */ | |
194 | mt9v022->chip_control &= ~0x10; | |
195 | if (reg_write(icd, MT9V022_CHIP_CONTROL, | |
196 | mt9v022->chip_control) < 0) | |
197 | return -EIO; | |
198 | return 0; | |
199 | } | |
200 | ||
201 | static int mt9v022_stop_capture(struct soc_camera_device *icd) | |
202 | { | |
203 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
204 | /* Switch to snapshot mode */ | |
205 | mt9v022->chip_control |= 0x10; | |
206 | if (reg_write(icd, MT9V022_CHIP_CONTROL, | |
207 | mt9v022->chip_control) < 0) | |
208 | return -EIO; | |
209 | return 0; | |
210 | } | |
211 | ||
212 | static int bus_switch_request(struct mt9v022 *mt9v022, struct soc_camera_link *icl) | |
213 | { | |
214 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
215 | int ret; | |
216 | unsigned int gpio = icl->gpio; | |
217 | ||
b4333a3b | 218 | if (gpio_is_valid(gpio)) { |
7397bfbe GL |
219 | /* We have a data bus switch. */ |
220 | ret = gpio_request(gpio, "mt9v022"); | |
221 | if (ret < 0) { | |
222 | dev_err(&mt9v022->client->dev, "Cannot get GPIO %u\n", gpio); | |
223 | return ret; | |
224 | } | |
225 | ||
226 | ret = gpio_direction_output(gpio, 0); | |
227 | if (ret < 0) { | |
228 | dev_err(&mt9v022->client->dev, | |
229 | "Cannot set GPIO %u to output\n", gpio); | |
230 | gpio_free(gpio); | |
231 | return ret; | |
232 | } | |
233 | } | |
234 | ||
235 | mt9v022->switch_gpio = gpio; | |
236 | #else | |
b4333a3b | 237 | mt9v022->switch_gpio = -EINVAL; |
7397bfbe GL |
238 | #endif |
239 | return 0; | |
240 | } | |
241 | ||
242 | static void bus_switch_release(struct mt9v022 *mt9v022) | |
243 | { | |
244 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
b4333a3b | 245 | if (gpio_is_valid(mt9v022->switch_gpio)) |
7397bfbe GL |
246 | gpio_free(mt9v022->switch_gpio); |
247 | #endif | |
248 | } | |
249 | ||
250 | static int bus_switch_act(struct mt9v022 *mt9v022, int go8bit) | |
251 | { | |
252 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
b4333a3b | 253 | if (!gpio_is_valid(mt9v022->switch_gpio)) |
7397bfbe GL |
254 | return -ENODEV; |
255 | ||
256 | gpio_set_value_cansleep(mt9v022->switch_gpio, go8bit); | |
257 | return 0; | |
258 | #else | |
259 | return -ENODEV; | |
260 | #endif | |
261 | } | |
262 | ||
ad5f2e85 GL |
263 | static int bus_switch_possible(struct mt9v022 *mt9v022) |
264 | { | |
265 | #ifdef CONFIG_MT9V022_PCA9536_SWITCH | |
266 | return gpio_is_valid(mt9v022->switch_gpio); | |
267 | #else | |
268 | return 0; | |
269 | #endif | |
270 | } | |
271 | ||
272 | static int mt9v022_set_bus_param(struct soc_camera_device *icd, | |
273 | unsigned long flags) | |
7397bfbe GL |
274 | { |
275 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
bd73b36f | 276 | struct soc_camera_link *icl = mt9v022->client->dev.platform_data; |
ad5f2e85 | 277 | unsigned int width_flag = flags & SOCAM_DATAWIDTH_MASK; |
7397bfbe | 278 | int ret; |
ad5f2e85 | 279 | u16 pixclk = 0; |
7397bfbe GL |
280 | |
281 | /* Only one width bit may be set */ | |
282 | if (!is_power_of_2(width_flag)) | |
283 | return -EINVAL; | |
284 | ||
ad5f2e85 GL |
285 | if ((mt9v022->datawidth != 10 && (width_flag == SOCAM_DATAWIDTH_10)) || |
286 | (mt9v022->datawidth != 9 && (width_flag == SOCAM_DATAWIDTH_9)) || | |
287 | (mt9v022->datawidth != 8 && (width_flag == SOCAM_DATAWIDTH_8))) { | |
288 | /* Well, we actually only can do 10 or 8 bits... */ | |
289 | if (width_flag == SOCAM_DATAWIDTH_9) | |
290 | return -EINVAL; | |
291 | ||
292 | ret = bus_switch_act(mt9v022, | |
293 | width_flag == SOCAM_DATAWIDTH_8); | |
294 | if (ret < 0) | |
295 | return ret; | |
296 | ||
297 | mt9v022->datawidth = width_flag == SOCAM_DATAWIDTH_8 ? 8 : 10; | |
298 | } | |
299 | ||
bd73b36f GL |
300 | flags = soc_camera_apply_sensor_flags(icl, flags); |
301 | ||
ad5f2e85 GL |
302 | if (flags & SOCAM_PCLK_SAMPLE_RISING) |
303 | pixclk |= 0x10; | |
304 | ||
305 | if (!(flags & SOCAM_HSYNC_ACTIVE_HIGH)) | |
306 | pixclk |= 0x1; | |
307 | ||
308 | if (!(flags & SOCAM_VSYNC_ACTIVE_HIGH)) | |
309 | pixclk |= 0x2; | |
310 | ||
311 | ret = reg_write(icd, MT9V022_PIXCLK_FV_LV, pixclk); | |
312 | if (ret < 0) | |
313 | return ret; | |
314 | ||
315 | if (!(flags & SOCAM_MASTER)) | |
316 | mt9v022->chip_control &= ~0x8; | |
317 | ||
318 | ret = reg_write(icd, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
319 | if (ret < 0) | |
320 | return ret; | |
321 | ||
322 | dev_dbg(&icd->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", | |
323 | pixclk, mt9v022->chip_control); | |
324 | ||
325 | return 0; | |
326 | } | |
327 | ||
328 | static unsigned long mt9v022_query_bus_param(struct soc_camera_device *icd) | |
329 | { | |
330 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
331 | unsigned int width_flag = SOCAM_DATAWIDTH_10; | |
332 | ||
333 | if (bus_switch_possible(mt9v022)) | |
334 | width_flag |= SOCAM_DATAWIDTH_8; | |
335 | ||
336 | return SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | | |
337 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW | | |
338 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | | |
339 | SOCAM_MASTER | SOCAM_SLAVE | | |
340 | width_flag; | |
341 | } | |
342 | ||
d8fac217 GL |
343 | static int mt9v022_set_fmt(struct soc_camera_device *icd, |
344 | __u32 pixfmt, struct v4l2_rect *rect) | |
ad5f2e85 GL |
345 | { |
346 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
347 | int ret; | |
348 | ||
7397bfbe | 349 | /* The caller provides a supported format, as verified per call to |
d8fac217 | 350 | * icd->try_fmt(), datawidth is from our supported format list */ |
7397bfbe GL |
351 | switch (pixfmt) { |
352 | case V4L2_PIX_FMT_GREY: | |
353 | case V4L2_PIX_FMT_Y16: | |
354 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM) | |
355 | return -EINVAL; | |
356 | break; | |
357 | case V4L2_PIX_FMT_SBGGR8: | |
358 | case V4L2_PIX_FMT_SBGGR16: | |
359 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) | |
360 | return -EINVAL; | |
361 | break; | |
362 | case 0: | |
363 | /* No format change, only geometry */ | |
364 | break; | |
365 | default: | |
366 | return -EINVAL; | |
367 | } | |
368 | ||
369 | /* Like in example app. Contradicts the datasheet though */ | |
370 | ret = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
371 | if (ret >= 0) { | |
372 | if (ret & 1) /* Autoexposure */ | |
373 | ret = reg_write(icd, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, | |
374 | rect->height + icd->y_skip_top + 43); | |
375 | else | |
376 | ret = reg_write(icd, MT9V022_TOTAL_SHUTTER_WIDTH, | |
377 | rect->height + icd->y_skip_top + 43); | |
378 | } | |
379 | /* Setup frame format: defaults apart from width and height */ | |
11211641 | 380 | if (!ret) |
7397bfbe | 381 | ret = reg_write(icd, MT9V022_COLUMN_START, rect->left); |
11211641 | 382 | if (!ret) |
7397bfbe | 383 | ret = reg_write(icd, MT9V022_ROW_START, rect->top); |
11211641 | 384 | if (!ret) |
7397bfbe GL |
385 | /* Default 94, Phytec driver says: |
386 | * "width + horizontal blank >= 660" */ | |
387 | ret = reg_write(icd, MT9V022_HORIZONTAL_BLANKING, | |
388 | rect->width > 660 - 43 ? 43 : | |
389 | 660 - rect->width); | |
11211641 | 390 | if (!ret) |
7397bfbe | 391 | ret = reg_write(icd, MT9V022_VERTICAL_BLANKING, 45); |
11211641 | 392 | if (!ret) |
7397bfbe | 393 | ret = reg_write(icd, MT9V022_WINDOW_WIDTH, rect->width); |
11211641 | 394 | if (!ret) |
7397bfbe GL |
395 | ret = reg_write(icd, MT9V022_WINDOW_HEIGHT, |
396 | rect->height + icd->y_skip_top); | |
397 | ||
398 | if (ret < 0) | |
399 | return ret; | |
400 | ||
401 | dev_dbg(&icd->dev, "Frame %ux%u pixel\n", rect->width, rect->height); | |
402 | ||
7397bfbe GL |
403 | return 0; |
404 | } | |
405 | ||
d8fac217 GL |
406 | static int mt9v022_try_fmt(struct soc_camera_device *icd, |
407 | struct v4l2_format *f) | |
7397bfbe | 408 | { |
64f5905e GL |
409 | struct v4l2_pix_format *pix = &f->fmt.pix; |
410 | ||
411 | if (pix->height < 32 + icd->y_skip_top) | |
412 | pix->height = 32 + icd->y_skip_top; | |
413 | if (pix->height > 480 + icd->y_skip_top) | |
414 | pix->height = 480 + icd->y_skip_top; | |
415 | if (pix->width < 48) | |
416 | pix->width = 48; | |
417 | if (pix->width > 752) | |
418 | pix->width = 752; | |
419 | pix->width &= ~0x03; /* ? */ | |
7397bfbe GL |
420 | |
421 | return 0; | |
422 | } | |
423 | ||
424 | static int mt9v022_get_chip_id(struct soc_camera_device *icd, | |
aecde8b5 | 425 | struct v4l2_dbg_chip_ident *id) |
7397bfbe GL |
426 | { |
427 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
428 | ||
aecde8b5 | 429 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
7397bfbe GL |
430 | return -EINVAL; |
431 | ||
aecde8b5 | 432 | if (id->match.addr != mt9v022->client->addr) |
7397bfbe GL |
433 | return -ENODEV; |
434 | ||
435 | id->ident = mt9v022->model; | |
436 | id->revision = 0; | |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
441 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
442 | static int mt9v022_get_register(struct soc_camera_device *icd, | |
aecde8b5 | 443 | struct v4l2_dbg_register *reg) |
7397bfbe GL |
444 | { |
445 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
446 | ||
aecde8b5 | 447 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
448 | return -EINVAL; |
449 | ||
aecde8b5 | 450 | if (reg->match.addr != mt9v022->client->addr) |
7397bfbe GL |
451 | return -ENODEV; |
452 | ||
aecde8b5 | 453 | reg->size = 2; |
7397bfbe GL |
454 | reg->val = reg_read(icd, reg->reg); |
455 | ||
456 | if (reg->val > 0xffff) | |
457 | return -EIO; | |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
462 | static int mt9v022_set_register(struct soc_camera_device *icd, | |
aecde8b5 | 463 | struct v4l2_dbg_register *reg) |
7397bfbe GL |
464 | { |
465 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
466 | ||
aecde8b5 | 467 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
468 | return -EINVAL; |
469 | ||
aecde8b5 | 470 | if (reg->match.addr != mt9v022->client->addr) |
7397bfbe GL |
471 | return -ENODEV; |
472 | ||
473 | if (reg_write(icd, reg->reg, reg->val) < 0) | |
474 | return -EIO; | |
475 | ||
476 | return 0; | |
477 | } | |
478 | #endif | |
479 | ||
4407a463 | 480 | static const struct v4l2_queryctrl mt9v022_controls[] = { |
7397bfbe GL |
481 | { |
482 | .id = V4L2_CID_VFLIP, | |
483 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
484 | .name = "Flip Vertically", | |
485 | .minimum = 0, | |
486 | .maximum = 1, | |
487 | .step = 1, | |
488 | .default_value = 0, | |
489 | }, { | |
490 | .id = V4L2_CID_HFLIP, | |
491 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
492 | .name = "Flip Horizontally", | |
493 | .minimum = 0, | |
494 | .maximum = 1, | |
495 | .step = 1, | |
496 | .default_value = 0, | |
497 | }, { | |
498 | .id = V4L2_CID_GAIN, | |
499 | .type = V4L2_CTRL_TYPE_INTEGER, | |
500 | .name = "Analog Gain", | |
501 | .minimum = 64, | |
502 | .maximum = 127, | |
503 | .step = 1, | |
504 | .default_value = 64, | |
505 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
506 | }, { | |
507 | .id = V4L2_CID_EXPOSURE, | |
508 | .type = V4L2_CTRL_TYPE_INTEGER, | |
509 | .name = "Exposure", | |
510 | .minimum = 1, | |
511 | .maximum = 255, | |
512 | .step = 1, | |
513 | .default_value = 255, | |
514 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
515 | }, { | |
516 | .id = V4L2_CID_AUTOGAIN, | |
517 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
518 | .name = "Automatic Gain", | |
519 | .minimum = 0, | |
520 | .maximum = 1, | |
521 | .step = 1, | |
522 | .default_value = 1, | |
523 | }, { | |
524 | .id = V4L2_CID_EXPOSURE_AUTO, | |
525 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
526 | .name = "Automatic Exposure", | |
527 | .minimum = 0, | |
528 | .maximum = 1, | |
529 | .step = 1, | |
530 | .default_value = 1, | |
531 | } | |
532 | }; | |
533 | ||
26f1b942 GL |
534 | static int mt9v022_video_probe(struct soc_camera_device *); |
535 | static void mt9v022_video_remove(struct soc_camera_device *); | |
536 | static int mt9v022_get_control(struct soc_camera_device *, struct v4l2_control *); | |
537 | static int mt9v022_set_control(struct soc_camera_device *, struct v4l2_control *); | |
7397bfbe GL |
538 | |
539 | static struct soc_camera_ops mt9v022_ops = { | |
540 | .owner = THIS_MODULE, | |
26f1b942 GL |
541 | .probe = mt9v022_video_probe, |
542 | .remove = mt9v022_video_remove, | |
7397bfbe GL |
543 | .init = mt9v022_init, |
544 | .release = mt9v022_release, | |
545 | .start_capture = mt9v022_start_capture, | |
546 | .stop_capture = mt9v022_stop_capture, | |
d8fac217 GL |
547 | .set_fmt = mt9v022_set_fmt, |
548 | .try_fmt = mt9v022_try_fmt, | |
ad5f2e85 GL |
549 | .set_bus_param = mt9v022_set_bus_param, |
550 | .query_bus_param = mt9v022_query_bus_param, | |
7397bfbe GL |
551 | .controls = mt9v022_controls, |
552 | .num_controls = ARRAY_SIZE(mt9v022_controls), | |
553 | .get_control = mt9v022_get_control, | |
554 | .set_control = mt9v022_set_control, | |
555 | .get_chip_id = mt9v022_get_chip_id, | |
556 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
557 | .get_register = mt9v022_get_register, | |
558 | .set_register = mt9v022_set_register, | |
559 | #endif | |
560 | }; | |
561 | ||
562 | static int mt9v022_get_control(struct soc_camera_device *icd, | |
563 | struct v4l2_control *ctrl) | |
564 | { | |
565 | int data; | |
566 | ||
567 | switch (ctrl->id) { | |
568 | case V4L2_CID_VFLIP: | |
569 | data = reg_read(icd, MT9V022_READ_MODE); | |
570 | if (data < 0) | |
571 | return -EIO; | |
572 | ctrl->value = !!(data & 0x10); | |
573 | break; | |
574 | case V4L2_CID_HFLIP: | |
575 | data = reg_read(icd, MT9V022_READ_MODE); | |
576 | if (data < 0) | |
577 | return -EIO; | |
578 | ctrl->value = !!(data & 0x20); | |
579 | break; | |
580 | case V4L2_CID_EXPOSURE_AUTO: | |
581 | data = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
582 | if (data < 0) | |
583 | return -EIO; | |
584 | ctrl->value = !!(data & 0x1); | |
585 | break; | |
586 | case V4L2_CID_AUTOGAIN: | |
587 | data = reg_read(icd, MT9V022_AEC_AGC_ENABLE); | |
588 | if (data < 0) | |
589 | return -EIO; | |
590 | ctrl->value = !!(data & 0x2); | |
591 | break; | |
592 | } | |
593 | return 0; | |
594 | } | |
595 | ||
596 | static int mt9v022_set_control(struct soc_camera_device *icd, | |
597 | struct v4l2_control *ctrl) | |
598 | { | |
599 | int data; | |
600 | const struct v4l2_queryctrl *qctrl; | |
601 | ||
602 | qctrl = soc_camera_find_qctrl(&mt9v022_ops, ctrl->id); | |
603 | ||
604 | if (!qctrl) | |
605 | return -EINVAL; | |
606 | ||
607 | switch (ctrl->id) { | |
608 | case V4L2_CID_VFLIP: | |
609 | if (ctrl->value) | |
610 | data = reg_set(icd, MT9V022_READ_MODE, 0x10); | |
611 | else | |
612 | data = reg_clear(icd, MT9V022_READ_MODE, 0x10); | |
613 | if (data < 0) | |
614 | return -EIO; | |
615 | break; | |
616 | case V4L2_CID_HFLIP: | |
617 | if (ctrl->value) | |
618 | data = reg_set(icd, MT9V022_READ_MODE, 0x20); | |
619 | else | |
620 | data = reg_clear(icd, MT9V022_READ_MODE, 0x20); | |
621 | if (data < 0) | |
622 | return -EIO; | |
623 | break; | |
624 | case V4L2_CID_GAIN: | |
625 | /* mt9v022 has minimum == default */ | |
626 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
627 | return -EINVAL; | |
628 | else { | |
629 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
630 | /* Datasheet says 16 to 64. autogain only works properly | |
631 | * after setting gain to maximum 14. Larger values | |
632 | * produce "white fly" noise effect. On the whole, | |
633 | * manually setting analog gain does no good. */ | |
634 | unsigned long gain = ((ctrl->value - qctrl->minimum) * | |
635 | 10 + range / 2) / range + 4; | |
636 | if (gain >= 32) | |
637 | gain &= ~1; | |
638 | /* The user wants to set gain manually, hope, she | |
639 | * knows, what she's doing... Switch AGC off. */ | |
640 | ||
641 | if (reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) | |
642 | return -EIO; | |
643 | ||
644 | dev_info(&icd->dev, "Setting gain from %d to %lu\n", | |
645 | reg_read(icd, MT9V022_ANALOG_GAIN), gain); | |
646 | if (reg_write(icd, MT9V022_ANALOG_GAIN, gain) < 0) | |
647 | return -EIO; | |
648 | icd->gain = ctrl->value; | |
649 | } | |
650 | break; | |
651 | case V4L2_CID_EXPOSURE: | |
652 | /* mt9v022 has maximum == default */ | |
653 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
654 | return -EINVAL; | |
655 | else { | |
656 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
657 | unsigned long shutter = ((ctrl->value - qctrl->minimum) * | |
658 | 479 + range / 2) / range + 1; | |
659 | /* The user wants to set shutter width manually, hope, | |
660 | * she knows, what she's doing... Switch AEC off. */ | |
661 | ||
662 | if (reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x1) < 0) | |
663 | return -EIO; | |
664 | ||
665 | dev_dbg(&icd->dev, "Shutter width from %d to %lu\n", | |
666 | reg_read(icd, MT9V022_TOTAL_SHUTTER_WIDTH), | |
667 | shutter); | |
668 | if (reg_write(icd, MT9V022_TOTAL_SHUTTER_WIDTH, | |
669 | shutter) < 0) | |
670 | return -EIO; | |
671 | icd->exposure = ctrl->value; | |
672 | } | |
673 | break; | |
674 | case V4L2_CID_AUTOGAIN: | |
675 | if (ctrl->value) | |
676 | data = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x2); | |
677 | else | |
678 | data = reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x2); | |
679 | if (data < 0) | |
680 | return -EIO; | |
681 | break; | |
682 | case V4L2_CID_EXPOSURE_AUTO: | |
683 | if (ctrl->value) | |
684 | data = reg_set(icd, MT9V022_AEC_AGC_ENABLE, 0x1); | |
685 | else | |
686 | data = reg_clear(icd, MT9V022_AEC_AGC_ENABLE, 0x1); | |
687 | if (data < 0) | |
688 | return -EIO; | |
689 | break; | |
690 | } | |
691 | return 0; | |
692 | } | |
693 | ||
694 | /* Interface active, can use i2c. If it fails, it can indeed mean, that | |
695 | * this wasn't our capture interface, so, we wait for the right one */ | |
696 | static int mt9v022_video_probe(struct soc_camera_device *icd) | |
697 | { | |
698 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
297a7ef7 | 699 | struct soc_camera_link *icl = mt9v022->client->dev.platform_data; |
7397bfbe GL |
700 | s32 data; |
701 | int ret; | |
702 | ||
703 | if (!icd->dev.parent || | |
704 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | |
705 | return -ENODEV; | |
706 | ||
707 | /* Read out the chip version register */ | |
708 | data = reg_read(icd, MT9V022_CHIP_VERSION); | |
709 | ||
710 | /* must be 0x1311 or 0x1313 */ | |
711 | if (data != 0x1311 && data != 0x1313) { | |
712 | ret = -ENODEV; | |
713 | dev_info(&icd->dev, "No MT9V022 detected, ID register 0x%x\n", | |
714 | data); | |
715 | goto ei2c; | |
716 | } | |
717 | ||
718 | /* Soft reset */ | |
719 | ret = reg_write(icd, MT9V022_RESET, 1); | |
720 | if (ret < 0) | |
721 | goto ei2c; | |
722 | /* 15 clock cycles */ | |
723 | udelay(200); | |
724 | if (reg_read(icd, MT9V022_RESET)) { | |
725 | dev_err(&icd->dev, "Resetting MT9V022 failed!\n"); | |
726 | goto ei2c; | |
727 | } | |
728 | ||
729 | /* Set monochrome or colour sensor type */ | |
730 | if (sensor_type && (!strcmp("colour", sensor_type) || | |
731 | !strcmp("color", sensor_type))) { | |
732 | ret = reg_write(icd, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); | |
733 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATC; | |
26f1b942 | 734 | icd->formats = mt9v022_colour_formats; |
297a7ef7 | 735 | if (gpio_is_valid(icl->gpio)) |
26f1b942 | 736 | icd->num_formats = ARRAY_SIZE(mt9v022_colour_formats); |
bb55de3b | 737 | else |
26f1b942 | 738 | icd->num_formats = 1; |
7397bfbe GL |
739 | } else { |
740 | ret = reg_write(icd, MT9V022_PIXEL_OPERATION_MODE, 0x11); | |
741 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATM; | |
26f1b942 | 742 | icd->formats = mt9v022_monochrome_formats; |
297a7ef7 | 743 | if (gpio_is_valid(icl->gpio)) |
26f1b942 | 744 | icd->num_formats = ARRAY_SIZE(mt9v022_monochrome_formats); |
bb55de3b | 745 | else |
26f1b942 | 746 | icd->num_formats = 1; |
7397bfbe GL |
747 | } |
748 | ||
11211641 | 749 | if (!ret) |
7397bfbe GL |
750 | ret = soc_camera_video_start(icd); |
751 | if (ret < 0) | |
752 | goto eisis; | |
753 | ||
754 | dev_info(&icd->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", | |
755 | data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ? | |
756 | "monochrome" : "colour"); | |
757 | ||
758 | return 0; | |
759 | ||
760 | eisis: | |
761 | ei2c: | |
762 | return ret; | |
763 | } | |
764 | ||
765 | static void mt9v022_video_remove(struct soc_camera_device *icd) | |
766 | { | |
767 | struct mt9v022 *mt9v022 = container_of(icd, struct mt9v022, icd); | |
768 | ||
769 | dev_dbg(&icd->dev, "Video %x removed: %p, %p\n", mt9v022->client->addr, | |
a85bdace GL |
770 | icd->dev.parent, icd->vdev); |
771 | soc_camera_video_stop(icd); | |
7397bfbe GL |
772 | } |
773 | ||
d2653e92 JD |
774 | static int mt9v022_probe(struct i2c_client *client, |
775 | const struct i2c_device_id *did) | |
7397bfbe GL |
776 | { |
777 | struct mt9v022 *mt9v022; | |
778 | struct soc_camera_device *icd; | |
779 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | |
780 | struct soc_camera_link *icl = client->dev.platform_data; | |
781 | int ret; | |
782 | ||
783 | if (!icl) { | |
784 | dev_err(&client->dev, "MT9V022 driver needs platform data\n"); | |
785 | return -EINVAL; | |
786 | } | |
787 | ||
788 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
789 | dev_warn(&adapter->dev, | |
790 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
791 | return -EIO; | |
792 | } | |
793 | ||
794 | mt9v022 = kzalloc(sizeof(struct mt9v022), GFP_KERNEL); | |
795 | if (!mt9v022) | |
796 | return -ENOMEM; | |
797 | ||
798 | mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; | |
799 | mt9v022->client = client; | |
800 | i2c_set_clientdata(client, mt9v022); | |
801 | ||
802 | icd = &mt9v022->icd; | |
7397bfbe GL |
803 | icd->ops = &mt9v022_ops; |
804 | icd->control = &client->dev; | |
805 | icd->x_min = 1; | |
806 | icd->y_min = 4; | |
807 | icd->x_current = 1; | |
808 | icd->y_current = 4; | |
809 | icd->width_min = 48; | |
810 | icd->width_max = 752; | |
811 | icd->height_min = 32; | |
812 | icd->height_max = 480; | |
813 | icd->y_skip_top = 1; | |
814 | icd->iface = icl->bus_id; | |
815 | /* Default datawidth - this is the only width this camera (normally) | |
816 | * supports. It is only with extra logic that it can support | |
817 | * other widths. Therefore it seems to be a sensible default. */ | |
818 | mt9v022->datawidth = 10; | |
819 | ||
820 | ret = bus_switch_request(mt9v022, icl); | |
821 | if (ret) | |
822 | goto eswinit; | |
823 | ||
824 | ret = soc_camera_device_register(icd); | |
825 | if (ret) | |
826 | goto eisdr; | |
827 | ||
828 | return 0; | |
829 | ||
830 | eisdr: | |
831 | bus_switch_release(mt9v022); | |
832 | eswinit: | |
833 | kfree(mt9v022); | |
834 | return ret; | |
835 | } | |
836 | ||
837 | static int mt9v022_remove(struct i2c_client *client) | |
838 | { | |
839 | struct mt9v022 *mt9v022 = i2c_get_clientdata(client); | |
840 | ||
841 | soc_camera_device_unregister(&mt9v022->icd); | |
842 | bus_switch_release(mt9v022); | |
843 | kfree(mt9v022); | |
844 | ||
845 | return 0; | |
846 | } | |
3760f736 JD |
847 | static const struct i2c_device_id mt9v022_id[] = { |
848 | { "mt9v022", 0 }, | |
849 | { } | |
850 | }; | |
851 | MODULE_DEVICE_TABLE(i2c, mt9v022_id); | |
852 | ||
7397bfbe GL |
853 | static struct i2c_driver mt9v022_i2c_driver = { |
854 | .driver = { | |
855 | .name = "mt9v022", | |
856 | }, | |
857 | .probe = mt9v022_probe, | |
858 | .remove = mt9v022_remove, | |
3760f736 | 859 | .id_table = mt9v022_id, |
7397bfbe GL |
860 | }; |
861 | ||
862 | static int __init mt9v022_mod_init(void) | |
863 | { | |
864 | return i2c_add_driver(&mt9v022_i2c_driver); | |
865 | } | |
866 | ||
867 | static void __exit mt9v022_mod_exit(void) | |
868 | { | |
869 | i2c_del_driver(&mt9v022_i2c_driver); | |
870 | } | |
871 | ||
872 | module_init(mt9v022_mod_init); | |
873 | module_exit(mt9v022_mod_exit); | |
874 | ||
875 | MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); | |
876 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
877 | MODULE_LICENSE("GPL"); |