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Merge branch 'x86/urgent' into x86/pat
[deliverable/linux.git] / drivers / media / video / mx3_camera.c
CommitLineData
4f67130a
GL		 1/*
2 * V4L2 Driver for i.MX3x camera host
3 *
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/version.h>
15#include <linux/videodev2.h>
16#include <linux/platform_device.h>
17#include <linux/clk.h>
18#include <linux/vmalloc.h>
19#include <linux/interrupt.h>
20
21#include <media/v4l2-common.h>
22#include <media/v4l2-dev.h>
23#include <media/videobuf-dma-contig.h>
24#include <media/soc_camera.h>
25
26#include <mach/ipu.h>
27#include <mach/mx3_camera.h>
28
29#define MX3_CAM_DRV_NAME "mx3-camera"
30
31/* CMOS Sensor Interface Registers */
32#define CSI_REG_START 0x60
33
34#define CSI_SENS_CONF (0x60 - CSI_REG_START)
35#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
36#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
37#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
38#define CSI_TST_CTRL (0x70 - CSI_REG_START)
39#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
40#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
41#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
42#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
43#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
44
45#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
46#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
47#define CSI_SENS_CONF_DATA_POL_SHIFT 2
48#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
49#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
50#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
51#define CSI_SENS_CONF_DATA_FMT_SHIFT 8
52#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
53#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
54#define CSI_SENS_CONF_DIVRATIO_SHIFT 16
55
56#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
57#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
58#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59
60#define MAX_VIDEO_MEM 16
61
62struct mx3_camera_buffer {
63 /* common v4l buffer stuff -- must be first */
64 struct videobuf_buffer vb;
65 const struct soc_camera_data_format *fmt;
66
67 /* One descriptot per scatterlist (per frame) */
68 struct dma_async_tx_descriptor *txd;
69
70 /* We have to "build" a scatterlist ourselves - one element per frame */
71 struct scatterlist sg;
72};
73
74/**
75 * struct mx3_camera_dev - i.MX3x camera (CSI) object
76 * @dev: camera device, to which the coherent buffer is attached
77 * @icd: currently attached camera sensor
78 * @clk: pointer to clock
79 * @base: remapped register base address
80 * @pdata: platform data
81 * @platform_flags: platform flags
82 * @mclk: master clock frequency in Hz
83 * @capture: list of capture videobuffers
84 * @lock: protects video buffer lists
85 * @active: active video buffer
86 * @idmac_channel: array of pointers to IPU DMAC DMA channels
87 * @soc_host: embedded soc_host object
88 */
89struct mx3_camera_dev {
4f67130a
GL		 90 /*
91 * i.MX3x is only supposed to handle one camera on its Camera Sensor
92 * Interface. If anyone ever builds hardware to enable more than one
93 * camera _simultaneously_, they will have to modify this driver too
94 */
95 struct soc_camera_device *icd;
96 struct clk *clk;
97
98 void __iomem *base;
99
100 struct mx3_camera_pdata *pdata;
101
102 unsigned long platform_flags;
103 unsigned long mclk;
104
105 struct list_head capture;
106 spinlock_t lock; /* Protects video buffer lists */
107 struct mx3_camera_buffer *active;
108
109 /* IDMAC / dmaengine interface */
110 struct idmac_channel *idmac_channel[1]; /* We need one channel */
111
112 struct soc_camera_host soc_host;
113};
114
115struct dma_chan_request {
116 struct mx3_camera_dev *mx3_cam;
117 enum ipu_channel id;
118};
119
120static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
121
122static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
123{
124 return __raw_readl(mx3->base + reg);
125}
126
127static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
128{
129 __raw_writel(value, mx3->base + reg);
130}
131
132/* Called from the IPU IDMAC ISR */
133static void mx3_cam_dma_done(void *arg)
134{
135 struct idmac_tx_desc *desc = to_tx_desc(arg);
136 struct dma_chan *chan = desc->txd.chan;
137 struct idmac_channel *ichannel = to_idmac_chan(chan);
138 struct mx3_camera_dev *mx3_cam = ichannel->client;
139 struct videobuf_buffer *vb;
140
141 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
142 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
143
144 spin_lock(&mx3_cam->lock);
145 if (mx3_cam->active) {
146 vb = &mx3_cam->active->vb;
147
148 list_del_init(&vb->queue);
149 vb->state = VIDEOBUF_DONE;
150 do_gettimeofday(&vb->ts);
151 vb->field_count++;
152 wake_up(&vb->done);
153 }
154
155 if (list_empty(&mx3_cam->capture)) {
156 mx3_cam->active = NULL;
157 spin_unlock(&mx3_cam->lock);
158
159 /*
160 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
161 * not get updated
162 */
163 return;
164 }
165
166 mx3_cam->active = list_entry(mx3_cam->capture.next,
167 struct mx3_camera_buffer, vb.queue);
168 mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
169 spin_unlock(&mx3_cam->lock);
170}
171
172static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
173{
174 struct soc_camera_device *icd = vq->priv_data;
175 struct videobuf_buffer *vb = &buf->vb;
176 struct dma_async_tx_descriptor *txd = buf->txd;
177 struct idmac_channel *ichan;
178
179 BUG_ON(in_interrupt());
180
181 dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
182 vb, vb->baddr, vb->bsize);
183
184 /*
185 * This waits until this buffer is out of danger, i.e., until it is no
186 * longer in STATE_QUEUED or STATE_ACTIVE
187 */
188 videobuf_waiton(vb, 0, 0);
189 if (txd) {
190 ichan = to_idmac_chan(txd->chan);
191 async_tx_ack(txd);
192 }
193 videobuf_dma_contig_free(vq, vb);
194 buf->txd = NULL;
195
196 vb->state = VIDEOBUF_NEEDS_INIT;
197}
198
199/*
200 * Videobuf operations
201 */
202
203/*
204 * Calculate the __buffer__ (not data) size and number of buffers.
205 * Called with .vb_lock held
206 */
207static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
208 unsigned int *size)
209{
210 struct soc_camera_device *icd = vq->priv_data;
211 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
212 struct mx3_camera_dev *mx3_cam = ici->priv;
213 /*
214 * bits-per-pixel (depth) as specified in camera's pixel format does
215 * not necessarily match what the camera interface writes to RAM, but
216 * it should be good enough for now.
217 */
218 unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
219
220 if (!mx3_cam->idmac_channel[0])
221 return -EINVAL;
222
223 *size = icd->width * icd->height * bpp;
224
225 if (!*count)
226 *count = 32;
227
228 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
229 *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
230
231 return 0;
232}
233
234/* Called with .vb_lock held */
235static int mx3_videobuf_prepare(struct videobuf_queue *vq,
236 struct videobuf_buffer *vb, enum v4l2_field field)
237{
238 struct soc_camera_device *icd = vq->priv_data;
239 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
240 struct mx3_camera_dev *mx3_cam = ici->priv;
241 struct mx3_camera_buffer *buf =
242 container_of(vb, struct mx3_camera_buffer, vb);
243 /* current_fmt _must_ always be set */
244 size_t new_size = icd->width * icd->height *
245 ((icd->current_fmt->depth + 7) >> 3);
246 int ret;
247
248 /*
249 * I think, in buf_prepare you only have to protect global data,
250 * the actual buffer is yours
251 */
252
253 if (buf->fmt != icd->current_fmt ||
254 vb->width != icd->width ||
255 vb->height != icd->height ||
256 vb->field != field) {
257 buf->fmt = icd->current_fmt;
258 vb->width = icd->width;
259 vb->height = icd->height;
260 vb->field = field;
261 if (vb->state != VIDEOBUF_NEEDS_INIT)
262 free_buffer(vq, buf);
263 }
264
265 if (vb->baddr && vb->bsize < new_size) {
266 /* User provided buffer, but it is too small */
267 ret = -ENOMEM;
268 goto out;
269 }
270
271 if (vb->state == VIDEOBUF_NEEDS_INIT) {
272 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
273 struct scatterlist *sg = &buf->sg;
274
275 /*
276 * The total size of video-buffers that will be allocated / mapped.
277 * *size that we calculated in videobuf_setup gets assigned to
278 * vb->bsize, and now we use the same calculation to get vb->size.
279 */
280 vb->size = new_size;
281
282 /* This actually (allocates and) maps buffers */
283 ret = videobuf_iolock(vq, vb, NULL);
284 if (ret)
285 goto fail;
286
287 /*
288 * We will have to configure the IDMAC channel. It has two slots
289 * for DMA buffers, we shall enter the first two buffers there,
290 * and then submit new buffers in DMA-ready interrupts
291 */
292 sg_init_table(sg, 1);
293 sg_dma_address(sg) = videobuf_to_dma_contig(vb);
294 sg_dma_len(sg) = vb->size;
295
296 buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
297 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
298 DMA_PREP_INTERRUPT);
299 if (!buf->txd) {
300 ret = -EIO;
301 goto fail;
302 }
303
304 buf->txd->callback_param = buf->txd;
305 buf->txd->callback = mx3_cam_dma_done;
306
307 vb->state = VIDEOBUF_PREPARED;
308 }
309
310 return 0;
311
312fail:
313 free_buffer(vq, buf);
314out:
315 return ret;
316}
317
318static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
319{
320 /* Add more formats as need arises and test possibilities appear... */
321 switch (fourcc) {
322 case V4L2_PIX_FMT_RGB565:
323 return IPU_PIX_FMT_RGB565;
324 case V4L2_PIX_FMT_RGB24:
325 return IPU_PIX_FMT_RGB24;
326 case V4L2_PIX_FMT_RGB332:
327 return IPU_PIX_FMT_RGB332;
328 case V4L2_PIX_FMT_YUV422P:
329 return IPU_PIX_FMT_YVU422P;
330 default:
331 return IPU_PIX_FMT_GENERIC;
332 }
333}
334
335/* Called with .vb_lock held */
336static void mx3_videobuf_queue(struct videobuf_queue *vq,
337 struct videobuf_buffer *vb)
338{
339 struct soc_camera_device *icd = vq->priv_data;
340 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
341 struct mx3_camera_dev *mx3_cam = ici->priv;
342 struct mx3_camera_buffer *buf =
343 container_of(vb, struct mx3_camera_buffer, vb);
344 struct dma_async_tx_descriptor *txd = buf->txd;
345 struct idmac_channel *ichan = to_idmac_chan(txd->chan);
346 struct idmac_video_param *video = &ichan->params.video;
347 const struct soc_camera_data_format *data_fmt = icd->current_fmt;
348 dma_cookie_t cookie;
349 unsigned long flags;
350
351 /* This is the configuration of one sg-element */
352 video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
353 video->out_width = icd->width;
354 video->out_height = icd->height;
355 video->out_stride = icd->width;
356
357#ifdef DEBUG
358 /* helps to see what DMA actually has written */
359 memset((void *)vb->baddr, 0xaa, vb->bsize);
360#endif
361
362 spin_lock_irqsave(&mx3_cam->lock, flags);
363
364 list_add_tail(&vb->queue, &mx3_cam->capture);
365
366 if (!mx3_cam->active) {
367 mx3_cam->active = buf;
368 vb->state = VIDEOBUF_ACTIVE;
369 } else {
370 vb->state = VIDEOBUF_QUEUED;
371 }
372
373 spin_unlock_irqrestore(&mx3_cam->lock, flags);
374
375 cookie = txd->tx_submit(txd);
376 dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
377 if (cookie >= 0)
378 return;
379
380 /* Submit error */
381 vb->state = VIDEOBUF_PREPARED;
382
383 spin_lock_irqsave(&mx3_cam->lock, flags);
384
385 list_del_init(&vb->queue);
386
387 if (mx3_cam->active == buf)
388 mx3_cam->active = NULL;
389
390 spin_unlock_irqrestore(&mx3_cam->lock, flags);
391}
392
393/* Called with .vb_lock held */
394static void mx3_videobuf_release(struct videobuf_queue *vq,
395 struct videobuf_buffer *vb)
396{
397 struct soc_camera_device *icd = vq->priv_data;
398 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
399 struct mx3_camera_dev *mx3_cam = ici->priv;
400 struct mx3_camera_buffer *buf =
401 container_of(vb, struct mx3_camera_buffer, vb);
402 unsigned long flags;
403
404 dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
405 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
406 vb->state, list_empty(&vb->queue) ? "" : "not ");
407 spin_lock_irqsave(&mx3_cam->lock, flags);
408 if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
409 !list_empty(&vb->queue)) {
410 vb->state = VIDEOBUF_ERROR;
411
412 list_del_init(&vb->queue);
413 if (mx3_cam->active == buf)
414 mx3_cam->active = NULL;
415 }
416 spin_unlock_irqrestore(&mx3_cam->lock, flags);
417 free_buffer(vq, buf);
418}
419
420static struct videobuf_queue_ops mx3_videobuf_ops = {
421 .buf_setup = mx3_videobuf_setup,
422 .buf_prepare = mx3_videobuf_prepare,
423 .buf_queue = mx3_videobuf_queue,
424 .buf_release = mx3_videobuf_release,
425};
426
427static void mx3_camera_init_videobuf(struct videobuf_queue *q,
428 struct soc_camera_device *icd)
429{
430 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
431 struct mx3_camera_dev *mx3_cam = ici->priv;
432
eff505fa 433 videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, ici->dev,
4f67130a
GL		 434 &mx3_cam->lock,
435 V4L2_BUF_TYPE_VIDEO_CAPTURE,
436 V4L2_FIELD_NONE,
437 sizeof(struct mx3_camera_buffer), icd);
438}
439
440/* First part of ipu_csi_init_interface() */
441static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
442 struct soc_camera_device *icd)
443{
444 u32 conf;
445 long rate;
446
447 /* Set default size: ipu_csi_set_window_size() */
448 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
449 /* ...and position to 0:0: ipu_csi_set_window_pos() */
450 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
451 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
452
453 /* We use only gated clock synchronisation mode so far */
454 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
455
456 /* Set generic data, platform-biggest bus-width */
457 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
458
459 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
460 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
461 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
462 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
463 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
464 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
465 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
466 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
467
468 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
469 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
470 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
471 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
472 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
473 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
474 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
475 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
476 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
477 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
478 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
479 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
480
481 /* ipu_csi_init_interface() */
482 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
483
484 clk_enable(mx3_cam->clk);
485 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
486 dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
487 if (rate)
488 clk_set_rate(mx3_cam->clk, rate);
489}
490
491/* Called with .video_lock held */
492static int mx3_camera_add_device(struct soc_camera_device *icd)
493{
494 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
495 struct mx3_camera_dev *mx3_cam = ici->priv;
496 int ret;
497
498 if (mx3_cam->icd) {
499 ret = -EBUSY;
500 goto ebusy;
501 }
502
503 mx3_camera_activate(mx3_cam, icd);
504 ret = icd->ops->init(icd);
505 if (ret < 0) {
506 clk_disable(mx3_cam->clk);
507 goto einit;
508 }
509
510 mx3_cam->icd = icd;
511
512einit:
513ebusy:
514 if (!ret)
515 dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
516 icd->devnum);
517
518 return ret;
519}
520
521/* Called with .video_lock held */
522static void mx3_camera_remove_device(struct soc_camera_device *icd)
523{
524 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
525 struct mx3_camera_dev *mx3_cam = ici->priv;
526 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
527
528 BUG_ON(icd != mx3_cam->icd);
529
530 if (*ichan) {
531 dma_release_channel(&(*ichan)->dma_chan);
532 *ichan = NULL;
533 }
534
535 icd->ops->release(icd);
536
537 clk_disable(mx3_cam->clk);
538
539 mx3_cam->icd = NULL;
540
541 dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
542 icd->devnum);
543}
544
545static bool channel_change_requested(struct soc_camera_device *icd,
09e231b3 546 struct v4l2_rect *rect)
4f67130a
GL		 547{
548 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
549 struct mx3_camera_dev *mx3_cam = ici->priv;
550 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
551
09e231b3
GL		 552 /* Do buffers have to be re-allocated or channel re-configured? */
553 return ichan && rect->width * rect->height > icd->width * icd->height;
4f67130a
GL		 554}
555
556static int test_platform_param(struct mx3_camera_dev *mx3_cam,
557 unsigned char buswidth, unsigned long *flags)
558{
559 /*
560 * Platform specified synchronization and pixel clock polarities are
561 * only a recommendation and are only used during probing. MX3x
562 * camera interface only works in master mode, i.e., uses HSYNC and
563 * VSYNC signals from the sensor
564 */
565 *flags = SOCAM_MASTER |
566 SOCAM_HSYNC_ACTIVE_HIGH |
567 SOCAM_HSYNC_ACTIVE_LOW |
568 SOCAM_VSYNC_ACTIVE_HIGH |
569 SOCAM_VSYNC_ACTIVE_LOW |
570 SOCAM_PCLK_SAMPLE_RISING |
571 SOCAM_PCLK_SAMPLE_FALLING |
572 SOCAM_DATA_ACTIVE_HIGH |
573 SOCAM_DATA_ACTIVE_LOW;
574
575 /* If requested data width is supported by the platform, use it or any
576 * possible lower value - i.MX31 is smart enough to schift bits */
577 switch (buswidth) {
578 case 15:
579 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
580 return -EINVAL;
581 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
582 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
583 break;
584 case 10:
585 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
586 return -EINVAL;
587 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
588 SOCAM_DATAWIDTH_4;
589 break;
590 case 8:
591 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
592 return -EINVAL;
593 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
594 break;
595 case 4:
596 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
597 return -EINVAL;
598 *flags |= SOCAM_DATAWIDTH_4;
599 break;
600 default:
eff505fa
GL		 601 dev_info(mx3_cam->soc_host.dev, "Unsupported bus width %d\n",
602 buswidth);
4f67130a
GL		 603 return -EINVAL;
604 }
605
606 return 0;
607}
608
609static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
610 const unsigned int depth)
611{
612 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
613 struct mx3_camera_dev *mx3_cam = ici->priv;
614 unsigned long bus_flags, camera_flags;
615 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
616
eff505fa 617 dev_dbg(ici->dev, "requested bus width %d bit: %d\n", depth, ret);
4f67130a
GL		 618
619 if (ret < 0)
620 return ret;
621
622 camera_flags = icd->ops->query_bus_param(icd);
623
624 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
625 if (ret < 0)
626 dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
627 camera_flags, bus_flags);
628
629 return ret;
630}
631
632static bool chan_filter(struct dma_chan *chan, void *arg)
633{
634 struct dma_chan_request *rq = arg;
635 struct mx3_camera_pdata *pdata;
636
637 if (!rq)
638 return false;
639
eff505fa 640 pdata = rq->mx3_cam->soc_host.dev->platform_data;
4f67130a
GL		 641
642 return rq->id == chan->chan_id &&
643 pdata->dma_dev == chan->device->dev;
644}
645
646static const struct soc_camera_data_format mx3_camera_formats[] = {
647 {
648 .name = "Bayer (sRGB) 8 bit",
649 .depth = 8,
650 .fourcc = V4L2_PIX_FMT_SBGGR8,
651 .colorspace = V4L2_COLORSPACE_SRGB,
652 }, {
653 .name = "Monochrome 8 bit",
654 .depth = 8,
655 .fourcc = V4L2_PIX_FMT_GREY,
656 .colorspace = V4L2_COLORSPACE_JPEG,
657 },
658};
659
660static bool buswidth_supported(struct soc_camera_host *ici, int depth)
661{
662 struct mx3_camera_dev *mx3_cam = ici->priv;
663
664 switch (depth) {
665 case 4:
666 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
667 case 8:
668 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
669 case 10:
670 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
671 case 15:
672 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
673 }
674 return false;
675}
676
677static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
678 struct soc_camera_format_xlate *xlate)
679{
680 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
681 int formats = 0, buswidth, ret;
682
683 buswidth = icd->formats[idx].depth;
684
685 if (!buswidth_supported(ici, buswidth))
686 return 0;
687
688 ret = mx3_camera_try_bus_param(icd, buswidth);
689 if (ret < 0)
690 return 0;
691
692 switch (icd->formats[idx].fourcc) {
693 case V4L2_PIX_FMT_SGRBG10:
694 formats++;
695 if (xlate) {
696 xlate->host_fmt = &mx3_camera_formats[0];
697 xlate->cam_fmt = icd->formats + idx;
698 xlate->buswidth = buswidth;
699 xlate++;
eff505fa 700 dev_dbg(ici->dev, "Providing format %s using %s\n",
4f67130a
GL		 701 mx3_camera_formats[0].name,
702 icd->formats[idx].name);
703 }
704 goto passthrough;
705 case V4L2_PIX_FMT_Y16:
706 formats++;
707 if (xlate) {
708 xlate->host_fmt = &mx3_camera_formats[1];
709 xlate->cam_fmt = icd->formats + idx;
710 xlate->buswidth = buswidth;
711 xlate++;
eff505fa 712 dev_dbg(ici->dev, "Providing format %s using %s\n",
4f67130a
GL		 713 mx3_camera_formats[0].name,
714 icd->formats[idx].name);
715 }
716 default:
717passthrough:
718 /* Generic pass-through */
719 formats++;
720 if (xlate) {
721 xlate->host_fmt = icd->formats + idx;
722 xlate->cam_fmt = icd->formats + idx;
723 xlate->buswidth = buswidth;
724 xlate++;
eff505fa 725 dev_dbg(ici->dev,
4f67130a
GL		 726 "Providing format %s in pass-through mode\n",
727 icd->formats[idx].name);
728 }
729 }
730
731 return formats;
732}
733
09e231b3
GL		 734static void configure_geometry(struct mx3_camera_dev *mx3_cam,
735 struct v4l2_rect *rect)
4f67130a 736{
4f67130a 737 u32 ctrl, width_field, height_field;
4f67130a
GL		 738
739 /* Setup frame size - this cannot be changed on-the-fly... */
740 width_field = rect->width - 1;
741 height_field = rect->height - 1;
742 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
743
744 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
745 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
746
747 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
748
749 /* ...and position */
750 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
751 /* Sensor does the cropping */
752 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
753
754 /*
755 * No need to free resources here if we fail, we'll see if we need to
756 * do this next time we are called
757 */
09e231b3
GL		 758}
759
760static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
761{
762 dma_cap_mask_t mask;
763 struct dma_chan *chan;
764 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
765 /* We have to use IDMAC_IC_7 for Bayer / generic data */
766 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
767 .id = IDMAC_IC_7};
768
769 if (*ichan) {
770 struct videobuf_buffer *vb, *_vb;
771 dma_release_channel(&(*ichan)->dma_chan);
772 *ichan = NULL;
773 mx3_cam->active = NULL;
774 list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
775 list_del_init(&vb->queue);
776 vb->state = VIDEOBUF_ERROR;
777 wake_up(&vb->done);
778 }
779 }
780
781 dma_cap_zero(mask);
782 dma_cap_set(DMA_SLAVE, mask);
783 dma_cap_set(DMA_PRIVATE, mask);
784 chan = dma_request_channel(mask, chan_filter, &rq);
785 if (!chan)
786 return -EBUSY;
787
788 *ichan = to_idmac_chan(chan);
789 (*ichan)->client = mx3_cam;
790
791 return 0;
792}
793
794static int mx3_camera_set_crop(struct soc_camera_device *icd,
795 struct v4l2_rect *rect)
796{
797 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
798 struct mx3_camera_dev *mx3_cam = ici->priv;
799
800 /*
801 * We now know pixel formats and can decide upon DMA-channel(s)
802 * So far only direct camera-to-memory is supported
803 */
804 if (channel_change_requested(icd, rect)) {
805 int ret = acquire_dma_channel(mx3_cam);
806 if (ret < 0)
807 return ret;
808 }
809
810 configure_geometry(mx3_cam, rect);
811
812 return icd->ops->set_crop(icd, rect);
813}
814
815static int mx3_camera_set_fmt(struct soc_camera_device *icd,
816 struct v4l2_format *f)
817{
818 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
819 struct mx3_camera_dev *mx3_cam = ici->priv;
820 const struct soc_camera_format_xlate *xlate;
821 struct v4l2_pix_format *pix = &f->fmt.pix;
822 struct v4l2_rect rect = {
823 .left = icd->x_current,
824 .top = icd->y_current,
825 .width = pix->width,
826 .height = pix->height,
827 };
828 int ret;
829
830 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
831 if (!xlate) {
eff505fa 832 dev_warn(ici->dev, "Format %x not found\n", pix->pixelformat);
09e231b3
GL		 833 return -EINVAL;
834 }
835
836 ret = acquire_dma_channel(mx3_cam);
837 if (ret < 0)
838 return ret;
839
840 /*
841 * Might have to perform a complete interface initialisation like in
842 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
843 * mxc_v4l2_s_fmt()
844 */
845
846 configure_geometry(mx3_cam, &rect);
4f67130a 847
09e231b3
GL		 848 ret = icd->ops->set_fmt(icd, f);
849 if (!ret) {
4f67130a
GL		 850 icd->buswidth = xlate->buswidth;
851 icd->current_fmt = xlate->host_fmt;
852 }
853
854 return ret;
855}
856
857static int mx3_camera_try_fmt(struct soc_camera_device *icd,
858 struct v4l2_format *f)
859{
860 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
861 const struct soc_camera_format_xlate *xlate;
862 struct v4l2_pix_format *pix = &f->fmt.pix;
863 __u32 pixfmt = pix->pixelformat;
864 enum v4l2_field field;
865 int ret;
866
867 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
868 if (pixfmt && !xlate) {
eff505fa 869 dev_warn(ici->dev, "Format %x not found\n", pixfmt);
4f67130a
GL		 870 return -EINVAL;
871 }
872
873 /* limit to MX3 hardware capabilities */
874 if (pix->height > 4096)
875 pix->height = 4096;
876 if (pix->width > 4096)
877 pix->width = 4096;
878
879 pix->bytesperline = pix->width *
880 DIV_ROUND_UP(xlate->host_fmt->depth, 8);
881 pix->sizeimage = pix->height * pix->bytesperline;
882
883 /* camera has to see its format, but the user the original one */
884 pix->pixelformat = xlate->cam_fmt->fourcc;
885 /* limit to sensor capabilities */
886 ret = icd->ops->try_fmt(icd, f);
887 pix->pixelformat = xlate->host_fmt->fourcc;
888
889 field = pix->field;
890
891 if (field == V4L2_FIELD_ANY) {
892 pix->field = V4L2_FIELD_NONE;
893 } else if (field != V4L2_FIELD_NONE) {
894 dev_err(&icd->dev, "Field type %d unsupported.\n", field);
895 return -EINVAL;
896 }
897
898 return ret;
899}
900
901static int mx3_camera_reqbufs(struct soc_camera_file *icf,
902 struct v4l2_requestbuffers *p)
903{
904 return 0;
905}
906
907static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
908{
909 struct soc_camera_file *icf = file->private_data;
910
911 return videobuf_poll_stream(file, &icf->vb_vidq, pt);
912}
913
914static int mx3_camera_querycap(struct soc_camera_host *ici,
915 struct v4l2_capability *cap)
916{
917 /* cap->name is set by the firendly caller:-> */
918 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
919 cap->version = KERNEL_VERSION(0, 2, 2);
920 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
921
922 return 0;
923}
924
925static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
926{
927 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
928 struct mx3_camera_dev *mx3_cam = ici->priv;
929 unsigned long bus_flags, camera_flags, common_flags;
930 u32 dw, sens_conf;
931 int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
932 const struct soc_camera_format_xlate *xlate;
933
934 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
935 if (!xlate) {
eff505fa 936 dev_warn(ici->dev, "Format %x not found\n", pixfmt);
4f67130a
GL		 937 return -EINVAL;
938 }
939
eff505fa 940 dev_dbg(ici->dev, "requested bus width %d bit: %d\n",
4f67130a
GL		 941 icd->buswidth, ret);
942
943 if (ret < 0)
944 return ret;
945
946 camera_flags = icd->ops->query_bus_param(icd);
947
948 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
949 if (!common_flags) {
eff505fa 950 dev_dbg(ici->dev, "no common flags: camera %lx, host %lx\n",
4f67130a
GL		 951 camera_flags, bus_flags);
952 return -EINVAL;
953 }
954
955 /* Make choices, based on platform preferences */
956 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
957 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
958 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
959 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
960 else
961 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
962 }
963
964 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
965 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
966 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
967 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
968 else
969 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
970 }
971
972 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
973 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
974 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
975 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
976 else
977 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
978 }
979
980 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
981 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
982 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
983 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
984 else
985 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
986 }
987
988 /* Make the camera work in widest common mode, we'll take care of
989 * the rest */
990 if (common_flags & SOCAM_DATAWIDTH_15)
991 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
992 SOCAM_DATAWIDTH_15;
993 else if (common_flags & SOCAM_DATAWIDTH_10)
994 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
995 SOCAM_DATAWIDTH_10;
996 else if (common_flags & SOCAM_DATAWIDTH_8)
997 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
998 SOCAM_DATAWIDTH_8;
999 else
1000 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1001 SOCAM_DATAWIDTH_4;
1002
1003 ret = icd->ops->set_bus_param(icd, common_flags);
1004 if (ret < 0)
1005 return ret;
1006
1007 /*
1008 * So far only gated clock mode is supported. Add a line
1009 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1010 * below and select the required mode when supporting other
1011 * synchronisation protocols.
1012 */
1013 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1014 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1015 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1016 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1017 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1018 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1019 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1020
1021 /* TODO: Support RGB and YUV formats */
1022
1023 /* This has been set in mx3_camera_activate(), but we clear it above */
1024 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1025
1026 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
1027 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1028 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
1029 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1030 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
1031 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1032 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
1033 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1034
1035 /* Just do what we're asked to do */
1036 switch (xlate->host_fmt->depth) {
1037 case 4:
1038 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1039 break;
1040 case 8:
1041 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1042 break;
1043 case 10:
1044 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1045 break;
1046 default:
1047 /*
1048 * Actually it can only be 15 now, default is just to silence
1049 * compiler warnings
1050 */
1051 case 15:
1052 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1053 }
1054
1055 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1056
eff505fa 1057 dev_dbg(ici->dev, "Set SENS_CONF to %x\n", sens_conf | dw);
4f67130a
GL		 1058
1059 return 0;
1060}
1061
1062static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1063 .owner = THIS_MODULE,
1064 .add = mx3_camera_add_device,
1065 .remove = mx3_camera_remove_device,
09e231b3 1066 .set_crop = mx3_camera_set_crop,
4f67130a
GL		 1067 .set_fmt = mx3_camera_set_fmt,
1068 .try_fmt = mx3_camera_try_fmt,
1069 .get_formats = mx3_camera_get_formats,
1070 .init_videobuf = mx3_camera_init_videobuf,
1071 .reqbufs = mx3_camera_reqbufs,
1072 .poll = mx3_camera_poll,
1073 .querycap = mx3_camera_querycap,
1074 .set_bus_param = mx3_camera_set_bus_param,
1075};
1076
e36bc31f 1077static int __devinit mx3_camera_probe(struct platform_device *pdev)
4f67130a
GL		 1078{
1079 struct mx3_camera_dev *mx3_cam;
1080 struct resource *res;
1081 void __iomem *base;
1082 int err = 0;
1083 struct soc_camera_host *soc_host;
1084
1085 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1086 if (!res) {
1087 err = -ENODEV;
1088 goto egetres;
1089 }
1090
1091 mx3_cam = vmalloc(sizeof(*mx3_cam));
1092 if (!mx3_cam) {
1093 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1094 err = -ENOMEM;
1095 goto ealloc;
1096 }
1097 memset(mx3_cam, 0, sizeof(*mx3_cam));
1098
b71df97a 1099 mx3_cam->clk = clk_get(&pdev->dev, NULL);
4f67130a
GL		 1100 if (IS_ERR(mx3_cam->clk)) {
1101 err = PTR_ERR(mx3_cam->clk);
1102 goto eclkget;
1103 }
1104
4f67130a
GL		 1105 mx3_cam->pdata = pdev->dev.platform_data;
1106 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1107 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
1108 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
1109 MX3_CAMERA_DATAWIDTH_15))) {
1110 /* Platform hasn't set available data widths. This is bad.
1111 * Warn and use a default. */
1112 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1113 "data widths, using default 8 bit\n");
1114 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1115 }
1116
1117 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1118 if (!mx3_cam->mclk) {
1119 dev_warn(&pdev->dev,
1120 "mclk_10khz == 0! Please, fix your platform data. "
1121 "Using default 20MHz\n");
1122 mx3_cam->mclk = 20000000;
1123 }
1124
1125 /* list of video-buffers */
1126 INIT_LIST_HEAD(&mx3_cam->capture);
1127 spin_lock_init(&mx3_cam->lock);
1128
1129 base = ioremap(res->start, res->end - res->start + 1);
1130 if (!base) {
1131 err = -ENOMEM;
1132 goto eioremap;
1133 }
1134
1135 mx3_cam->base = base;
4f67130a
GL		 1136
1137 soc_host = &mx3_cam->soc_host;
1138 soc_host->drv_name = MX3_CAM_DRV_NAME;
1139 soc_host->ops = &mx3_soc_camera_host_ops;
1140 soc_host->priv = mx3_cam;
eff505fa 1141 soc_host->dev = &pdev->dev;
4f67130a 1142 soc_host->nr = pdev->id;
eff505fa 1143
4f67130a
GL		 1144 err = soc_camera_host_register(soc_host);
1145 if (err)
1146 goto ecamhostreg;
1147
1148 /* IDMAC interface */
1149 dmaengine_get();
1150
1151 return 0;
1152
1153ecamhostreg:
1154 iounmap(base);
1155eioremap:
1156 clk_put(mx3_cam->clk);
1157eclkget:
1158 vfree(mx3_cam);
1159ealloc:
1160egetres:
1161 return err;
1162}
1163
1164static int __devexit mx3_camera_remove(struct platform_device *pdev)
1165{
eff505fa
GL		 1166 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1167 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1168 struct mx3_camera_dev, soc_host);
4f67130a
GL		 1169
1170 clk_put(mx3_cam->clk);
1171
eff505fa 1172 soc_camera_host_unregister(soc_host);
4f67130a
GL		 1173
1174 iounmap(mx3_cam->base);
1175
1176 /*
1177 * The channel has either not been allocated,
1178 * or should have been released
1179 */
1180 if (WARN_ON(mx3_cam->idmac_channel[0]))
1181 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1182
1183 vfree(mx3_cam);
1184
1185 dmaengine_put();
1186
1187 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
1188
1189 return 0;
1190}
1191
1192static struct platform_driver mx3_camera_driver = {
1193 .driver = {
1194 .name = MX3_CAM_DRV_NAME,
1195 },
1196 .probe = mx3_camera_probe,
e36bc31f 1197 .remove = __devexit_p(mx3_camera_remove),
4f67130a
GL		 1198};
1199
1200
e36bc31f 1201static int __init mx3_camera_init(void)
4f67130a
GL		 1202{
1203 return platform_driver_register(&mx3_camera_driver);
1204}
1205
1206static void __exit mx3_camera_exit(void)
1207{
1208 platform_driver_unregister(&mx3_camera_driver);
1209}
1210
1211module_init(mx3_camera_init);
1212module_exit(mx3_camera_exit);
1213
1214MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1215MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1216MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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