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[media] vivi: zero fmt.pix.priv as per spec
[deliverable/linux.git] / drivers / media / video / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
58#include <linux/delay.h>
59#include <linux/device.h>
60#include <linux/dma-mapping.h>
61#include <linux/i2c.h>
62#include <linux/interrupt.h>
63#include <linux/module.h>
64#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h>
66#include <linux/slab.h>
67#include <linux/sched.h>
68#include <linux/vmalloc.h>
69
70#include <media/v4l2-common.h>
71#include <media/v4l2-device.h>
72
73#include "isp.h"
74#include "ispreg.h"
75#include "ispccdc.h"
76#include "isppreview.h"
77#include "ispresizer.h"
78#include "ispcsi2.h"
79#include "ispccp2.h"
80#include "isph3a.h"
81#include "isphist.h"
82
83static unsigned int autoidle;
84module_param(autoidle, int, 0444);
85MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87static void isp_save_ctx(struct isp_device *isp);
88
89static void isp_restore_ctx(struct isp_device *isp);
90
91static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122};
123
124/* Structure for saving/restoring ISP module registers */
125static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130};
131
132/*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142void omap3isp_flush(struct isp_device *isp)
143{
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146}
147
148/*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152static void isp_enable_interrupts(struct isp_device *isp)
153{
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169}
170
171/*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175static void isp_disable_interrupts(struct isp_device *isp)
176{
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178}
179
180/**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194{
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
7c2c8f42 218 case ISP_XCLK_A:
448de7e7
SA		 219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
7c2c8f42 225 case ISP_XCLK_B:
448de7e7
SA		 226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
7c2c8f42 232 case ISP_XCLK_NONE:
448de7e7
SA		 233 default:
234 omap3isp_put(isp);
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
237 return -EINVAL;
238 }
239
240 /* Do we go from stable whatever to clock? */
7c2c8f42 241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
448de7e7
SA		 242 omap3isp_get(isp);
243 /* Stopping the clock. */
7c2c8f42 244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
448de7e7
SA		 245 omap3isp_put(isp);
246
7c2c8f42 247 isp->xclk_divisor[xclksel - 1] = divisor;
448de7e7
SA		 248
249 omap3isp_put(isp);
250
251 return currentxclk;
252}
253
254/*
255 * isp_power_settings - Sysconfig settings, for Power Management.
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
258 *
259 * Sets the power settings for the ISP, and SBL bus.
260 */
261static void isp_power_settings(struct isp_device *isp, int idle)
262{
263 isp_reg_writel(isp,
264 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
265 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
266 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
267 ((isp->revision == ISP_REVISION_15_0) ?
268 ISP_SYSCONFIG_AUTOIDLE : 0),
269 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
270
271 if (isp->autoidle)
272 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
273 ISP_CTRL);
274}
275
276/*
277 * Configure the bridge and lane shifter. Valid inputs are
278 *
279 * CCDC_INPUT_PARALLEL: Parallel interface
280 * CCDC_INPUT_CSI2A: CSI2a receiver
281 * CCDC_INPUT_CCP2B: CCP2b receiver
282 * CCDC_INPUT_CSI2C: CSI2c receiver
283 *
284 * The bridge and lane shifter are configured according to the selected input
285 * and the ISP platform data.
286 */
287void omap3isp_configure_bridge(struct isp_device *isp,
288 enum ccdc_input_entity input,
c09af044
MJ		 289 const struct isp_parallel_platform_data *pdata,
290 unsigned int shift)
448de7e7
SA		 291{
292 u32 ispctrl_val;
293
294 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
295 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
297 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
299
300 switch (input) {
301 case CCDC_INPUT_PARALLEL:
302 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7
SA		 303 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
304 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
c09af044 305 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 306 break;
307
308 case CCDC_INPUT_CSI2A:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
310 break;
311
312 case CCDC_INPUT_CCP2B:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
314 break;
315
316 case CCDC_INPUT_CSI2C:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
318 break;
319
320 default:
321 return;
322 }
323
c09af044
MJ		 324 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
325
448de7e7
SA		 326 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
327 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
328
329 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
330}
331
448de7e7
SA		 332void omap3isp_hist_dma_done(struct isp_device *isp)
333{
334 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
335 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
336 /* Histogram cannot be enabled in this frame anymore */
337 atomic_set(&isp->isp_hist.buf_err, 1);
338 dev_dbg(isp->dev, "hist: Out of synchronization with "
339 "CCDC. Ignoring next buffer.\n");
340 }
341}
342
343static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
344{
345 static const char *name[] = {
346 "CSIA_IRQ",
347 "res1",
348 "res2",
349 "CSIB_LCM_IRQ",
350 "CSIB_IRQ",
351 "res5",
352 "res6",
353 "res7",
354 "CCDC_VD0_IRQ",
355 "CCDC_VD1_IRQ",
356 "CCDC_VD2_IRQ",
357 "CCDC_ERR_IRQ",
358 "H3A_AF_DONE_IRQ",
359 "H3A_AWB_DONE_IRQ",
360 "res14",
361 "res15",
362 "HIST_DONE_IRQ",
363 "CCDC_LSC_DONE",
364 "CCDC_LSC_PREFETCH_COMPLETED",
365 "CCDC_LSC_PREFETCH_ERROR",
366 "PRV_DONE_IRQ",
367 "CBUFF_IRQ",
368 "res22",
369 "res23",
370 "RSZ_DONE_IRQ",
371 "OVF_IRQ",
372 "res26",
373 "res27",
374 "MMU_ERR_IRQ",
375 "OCP_ERR_IRQ",
376 "SEC_ERR_IRQ",
377 "HS_VS_IRQ",
378 };
379 int i;
380
6c20c635 381 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 382
383 for (i = 0; i < ARRAY_SIZE(name); i++) {
384 if ((1 << i) & irqstatus)
385 printk(KERN_CONT "%s ", name[i]);
386 }
387 printk(KERN_CONT "\n");
388}
389
390static void isp_isr_sbl(struct isp_device *isp)
391{
392 struct device *dev = isp->dev;
875e2e3e 393 struct isp_pipeline *pipe;
448de7e7
SA		 394 u32 sbl_pcr;
395
396 /*
397 * Handle shared buffer logic overflows for video buffers.
398 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
399 */
400 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
401 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
402 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
403
404 if (sbl_pcr)
405 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
406
875e2e3e
LP		 407 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
408 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
409 if (pipe != NULL)
410 pipe->error = true;
411 }
412
413 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
414 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
415 if (pipe != NULL)
416 pipe->error = true;
417 }
418
419 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
420 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
421 if (pipe != NULL)
422 pipe->error = true;
448de7e7
SA		 423 }
424
425 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 426 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
427 if (pipe != NULL)
428 pipe->error = true;
448de7e7
SA		 429 }
430
431 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
432 | ISPSBL_PCR_RSZ2_WBL_OVF
433 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 434 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
435 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
436 if (pipe != NULL)
437 pipe->error = true;
438 }
448de7e7
SA		 439
440 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
441 omap3isp_stat_sbl_overflow(&isp->isp_af);
442
443 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
444 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
445}
446
447/*
448 * isp_isr - Interrupt Service Routine for Camera ISP module.
449 * @irq: Not used currently.
450 * @_isp: Pointer to the OMAP3 ISP device
451 *
452 * Handles the corresponding callback if plugged in.
453 *
454 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
455 * IRQ wasn't handled.
456 */
457static irqreturn_t isp_isr(int irq, void *_isp)
458{
459 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
460 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
461 IRQ0STATUS_CCDC_VD0_IRQ |
462 IRQ0STATUS_CCDC_VD1_IRQ |
463 IRQ0STATUS_HS_VS_IRQ;
464 struct isp_device *isp = _isp;
465 u32 irqstatus;
448de7e7
SA		 466
467 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
468 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
469
470 isp_isr_sbl(isp);
471
875e2e3e
LP		 472 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
473 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 474
875e2e3e
LP		 475 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
476 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 477
478 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
479 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
480 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
481 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
482 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
483 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
484 omap3isp_stat_isr_frame_sync(&isp->isp_af);
485 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
486 }
487
488 if (irqstatus & ccdc_events)
489 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
490
491 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
492 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
493 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
494 omap3isp_preview_isr(&isp->isp_prev);
495 }
496
497 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
498 omap3isp_resizer_isr(&isp->isp_res);
499
500 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
501 omap3isp_stat_isr(&isp->isp_aewb);
502
503 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
504 omap3isp_stat_isr(&isp->isp_af);
505
506 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
507 omap3isp_stat_isr(&isp->isp_hist);
508
509 omap3isp_flush(isp);
510
511#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
512 isp_isr_dbg(isp, irqstatus);
513#endif
514
515 return IRQ_HANDLED;
516}
517
518/* -----------------------------------------------------------------------------
519 * Pipeline power management
520 *
521 * Entities must be powered up when part of a pipeline that contains at least
522 * one open video device node.
523 *
524 * To achieve this use the entity use_count field to track the number of users.
525 * For entities corresponding to video device nodes the use_count field stores
526 * the users count of the node. For entities corresponding to subdevs the
527 * use_count field stores the total number of users of all video device nodes
528 * in the pipeline.
529 *
530 * The omap3isp_pipeline_pm_use() function must be called in the open() and
531 * close() handlers of video device nodes. It increments or decrements the use
532 * count of all subdev entities in the pipeline.
533 *
534 * To react to link management on powered pipelines, the link setup notification
535 * callback updates the use count of all entities in the source and sink sides
536 * of the link.
537 */
538
539/*
540 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
541 * @entity: The entity
542 *
543 * Return the total number of users of all video device nodes in the pipeline.
544 */
545static int isp_pipeline_pm_use_count(struct media_entity *entity)
546{
547 struct media_entity_graph graph;
548 int use = 0;
549
550 media_entity_graph_walk_start(&graph, entity);
551
552 while ((entity = media_entity_graph_walk_next(&graph))) {
553 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
554 use += entity->use_count;
555 }
556
557 return use;
558}
559
560/*
561 * isp_pipeline_pm_power_one - Apply power change to an entity
562 * @entity: The entity
563 * @change: Use count change
564 *
565 * Change the entity use count by @change. If the entity is a subdev update its
566 * power state by calling the core::s_power operation when the use count goes
567 * from 0 to != 0 or from != 0 to 0.
568 *
569 * Return 0 on success or a negative error code on failure.
570 */
571static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
572{
573 struct v4l2_subdev *subdev;
574 int ret;
575
576 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
577 ? media_entity_to_v4l2_subdev(entity) : NULL;
578
579 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
580 ret = v4l2_subdev_call(subdev, core, s_power, 1);
581 if (ret < 0 && ret != -ENOIOCTLCMD)
582 return ret;
583 }
584
585 entity->use_count += change;
586 WARN_ON(entity->use_count < 0);
587
588 if (entity->use_count == 0 && change < 0 && subdev != NULL)
589 v4l2_subdev_call(subdev, core, s_power, 0);
590
591 return 0;
592}
593
594/*
595 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
596 * @entity: The entity
597 * @change: Use count change
598 *
599 * Walk the pipeline to update the use count and the power state of all non-node
600 * entities.
601 *
602 * Return 0 on success or a negative error code on failure.
603 */
604static int isp_pipeline_pm_power(struct media_entity *entity, int change)
605{
606 struct media_entity_graph graph;
607 struct media_entity *first = entity;
608 int ret = 0;
609
610 if (!change)
611 return 0;
612
613 media_entity_graph_walk_start(&graph, entity);
614
615 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
616 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
617 ret = isp_pipeline_pm_power_one(entity, change);
618
619 if (!ret)
620 return 0;
621
622 media_entity_graph_walk_start(&graph, first);
623
624 while ((first = media_entity_graph_walk_next(&graph))
625 && first != entity)
626 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
627 isp_pipeline_pm_power_one(first, -change);
628
629 return ret;
630}
631
632/*
633 * omap3isp_pipeline_pm_use - Update the use count of an entity
634 * @entity: The entity
635 * @use: Use (1) or stop using (0) the entity
636 *
637 * Update the use count of all entities in the pipeline and power entities on or
638 * off accordingly.
639 *
640 * Return 0 on success or a negative error code on failure. Powering entities
641 * off is assumed to never fail. No failure can occur when the use parameter is
642 * set to 0.
643 */
644int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
645{
646 int change = use ? 1 : -1;
647 int ret;
648
649 mutex_lock(&entity->parent->graph_mutex);
650
651 /* Apply use count to node. */
652 entity->use_count += change;
653 WARN_ON(entity->use_count < 0);
654
655 /* Apply power change to connected non-nodes. */
656 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 657 if (ret < 0)
658 entity->use_count -= change;
448de7e7
SA		 659
660 mutex_unlock(&entity->parent->graph_mutex);
661
662 return ret;
663}
664
665/*
666 * isp_pipeline_link_notify - Link management notification callback
667 * @source: Pad at the start of the link
668 * @sink: Pad at the end of the link
669 * @flags: New link flags that will be applied
670 *
671 * React to link management on powered pipelines by updating the use count of
672 * all entities in the source and sink sides of the link. Entities are powered
673 * on or off accordingly.
674 *
675 * Return 0 on success or a negative error code on failure. Powering entities
676 * off is assumed to never fail. This function will not fail for disconnection
677 * events.
678 */
679static int isp_pipeline_link_notify(struct media_pad *source,
680 struct media_pad *sink, u32 flags)
681{
682 int source_use = isp_pipeline_pm_use_count(source->entity);
683 int sink_use = isp_pipeline_pm_use_count(sink->entity);
684 int ret;
685
686 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
687 /* Powering off entities is assumed to never fail. */
688 isp_pipeline_pm_power(source->entity, -sink_use);
689 isp_pipeline_pm_power(sink->entity, -source_use);
690 return 0;
691 }
692
693 ret = isp_pipeline_pm_power(source->entity, sink_use);
694 if (ret < 0)
695 return ret;
696
697 ret = isp_pipeline_pm_power(sink->entity, source_use);
698 if (ret < 0)
699 isp_pipeline_pm_power(source->entity, -sink_use);
700
701 return ret;
702}
703
704/* -----------------------------------------------------------------------------
705 * Pipeline stream management
706 */
707
708/*
709 * isp_pipeline_enable - Enable streaming on a pipeline
710 * @pipe: ISP pipeline
711 * @mode: Stream mode (single shot or continuous)
712 *
713 * Walk the entities chain starting at the pipeline output video node and start
714 * all modules in the chain in the given mode.
715 *
25985edc 716 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 717 * operation otherwise.
718 */
719static int isp_pipeline_enable(struct isp_pipeline *pipe,
720 enum isp_pipeline_stream_state mode)
721{
722 struct isp_device *isp = pipe->output->isp;
723 struct media_entity *entity;
724 struct media_pad *pad;
725 struct v4l2_subdev *subdev;
726 unsigned long flags;
c62e2a19 727 int ret;
448de7e7 728
1567bb7d
LP		 729 /* If the preview engine crashed it might not respond to read/write
730 * operations on the L4 bus. This would result in a bus fault and a
731 * kernel oops. Refuse to start streaming in that case. This check must
732 * be performed before the loop below to avoid starting entities if the
733 * pipeline won't start anyway (those entities would then likely fail to
734 * stop, making the problem worse).
735 */
736 if ((pipe->entities & isp->crashed) &
737 (1U << isp->isp_prev.subdev.entity.id))
738 return -EIO;
739
448de7e7
SA		 740 spin_lock_irqsave(&pipe->lock, flags);
741 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
742 spin_unlock_irqrestore(&pipe->lock, flags);
743
744 pipe->do_propagation = false;
745
746 entity = &pipe->output->video.entity;
747 while (1) {
748 pad = &entity->pads[0];
749 if (!(pad->flags & MEDIA_PAD_FL_SINK))
750 break;
751
752 pad = media_entity_remote_source(pad);
753 if (pad == NULL ||
754 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
755 break;
756
757 entity = pad->entity;
758 subdev = media_entity_to_v4l2_subdev(entity);
759
760 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
761 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 762 return ret;
448de7e7
SA		 763
764 if (subdev == &isp->isp_ccdc.subdev) {
765 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
766 s_stream, mode);
767 v4l2_subdev_call(&isp->isp_af.subdev, video,
768 s_stream, mode);
769 v4l2_subdev_call(&isp->isp_hist.subdev, video,
770 s_stream, mode);
771 pipe->do_propagation = true;
772 }
773 }
774
c62e2a19 775 return 0;
448de7e7
SA		 776}
777
778static int isp_pipeline_wait_resizer(struct isp_device *isp)
779{
780 return omap3isp_resizer_busy(&isp->isp_res);
781}
782
783static int isp_pipeline_wait_preview(struct isp_device *isp)
784{
785 return omap3isp_preview_busy(&isp->isp_prev);
786}
787
788static int isp_pipeline_wait_ccdc(struct isp_device *isp)
789{
790 return omap3isp_stat_busy(&isp->isp_af)
791 || omap3isp_stat_busy(&isp->isp_aewb)
792 || omap3isp_stat_busy(&isp->isp_hist)
793 || omap3isp_ccdc_busy(&isp->isp_ccdc);
794}
795
796#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
797
798static int isp_pipeline_wait(struct isp_device *isp,
799 int(*busy)(struct isp_device *isp))
800{
801 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
802
803 while (!time_after(jiffies, timeout)) {
804 if (!busy(isp))
805 return 0;
806 }
807
808 return 1;
809}
810
811/*
812 * isp_pipeline_disable - Disable streaming on a pipeline
813 * @pipe: ISP pipeline
814 *
815 * Walk the entities chain starting at the pipeline output video node and stop
816 * all modules in the chain. Wait synchronously for the modules to be stopped if
817 * necessary.
818 *
819 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
820 * can't be stopped (in which case a software reset of the ISP is probably
821 * necessary).
822 */
823static int isp_pipeline_disable(struct isp_pipeline *pipe)
824{
825 struct isp_device *isp = pipe->output->isp;
826 struct media_entity *entity;
827 struct media_pad *pad;
828 struct v4l2_subdev *subdev;
829 int failure = 0;
830 int ret;
831
832 /*
833 * We need to stop all the modules after CCDC first or they'll
834 * never stop since they may not get a full frame from CCDC.
835 */
836 entity = &pipe->output->video.entity;
837 while (1) {
838 pad = &entity->pads[0];
839 if (!(pad->flags & MEDIA_PAD_FL_SINK))
840 break;
841
842 pad = media_entity_remote_source(pad);
843 if (pad == NULL ||
844 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
845 break;
846
847 entity = pad->entity;
848 subdev = media_entity_to_v4l2_subdev(entity);
849
850 if (subdev == &isp->isp_ccdc.subdev) {
851 v4l2_subdev_call(&isp->isp_aewb.subdev,
852 video, s_stream, 0);
853 v4l2_subdev_call(&isp->isp_af.subdev,
854 video, s_stream, 0);
855 v4l2_subdev_call(&isp->isp_hist.subdev,
856 video, s_stream, 0);
857 }
858
859 v4l2_subdev_call(subdev, video, s_stream, 0);
860
861 if (subdev == &isp->isp_res.subdev)
862 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
863 else if (subdev == &isp->isp_prev.subdev)
864 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
865 else if (subdev == &isp->isp_ccdc.subdev)
866 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
867 else
868 ret = 0;
869
870 if (ret) {
871 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1567bb7d
LP		 872 /* If the entity failed to stopped, assume it has
873 * crashed. Mark it as such, the ISP will be reset when
874 * applications will release it.
875 */
876 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 877 failure = -ETIMEDOUT;
878 }
879 }
880
881 return failure;
882}
883
884/*
885 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
886 * @pipe: ISP pipeline
887 * @state: Stream state (stopped, single shot or continuous)
888 *
889 * Set the pipeline to the given stream state. Pipelines can be started in
890 * single-shot or continuous mode.
891 *
25985edc 892 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 893 * operation otherwise. The pipeline state is not updated when the operation
894 * fails, except when stopping the pipeline.
448de7e7
SA		 895 */
896int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
897 enum isp_pipeline_stream_state state)
898{
899 int ret;
900
901 if (state == ISP_PIPELINE_STREAM_STOPPED)
902 ret = isp_pipeline_disable(pipe);
903 else
904 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 905
906 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
907 pipe->stream_state = state;
448de7e7
SA		 908
909 return ret;
910}
911
912/*
913 * isp_pipeline_resume - Resume streaming on a pipeline
914 * @pipe: ISP pipeline
915 *
916 * Resume video output and input and re-enable pipeline.
917 */
918static void isp_pipeline_resume(struct isp_pipeline *pipe)
919{
920 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
921
922 omap3isp_video_resume(pipe->output, !singleshot);
923 if (singleshot)
924 omap3isp_video_resume(pipe->input, 0);
925 isp_pipeline_enable(pipe, pipe->stream_state);
926}
927
928/*
929 * isp_pipeline_suspend - Suspend streaming on a pipeline
930 * @pipe: ISP pipeline
931 *
932 * Suspend pipeline.
933 */
934static void isp_pipeline_suspend(struct isp_pipeline *pipe)
935{
936 isp_pipeline_disable(pipe);
937}
938
939/*
940 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
941 * video node
942 * @me: ISP module's media entity
943 *
944 * Returns 1 if the entity has an enabled link to the output video node or 0
945 * otherwise. It's true only while pipeline can have no more than one output
946 * node.
947 */
948static int isp_pipeline_is_last(struct media_entity *me)
949{
950 struct isp_pipeline *pipe;
951 struct media_pad *pad;
952
953 if (!me->pipe)
954 return 0;
955 pipe = to_isp_pipeline(me);
956 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
957 return 0;
958 pad = media_entity_remote_source(&pipe->output->pad);
959 return pad->entity == me;
960}
961
962/*
963 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
964 * @me: ISP module's media entity
965 *
966 * Suspend the whole pipeline if module's entity has an enabled link to the
967 * output video node. It works only while pipeline can have no more than one
968 * output node.
969 */
970static void isp_suspend_module_pipeline(struct media_entity *me)
971{
972 if (isp_pipeline_is_last(me))
973 isp_pipeline_suspend(to_isp_pipeline(me));
974}
975
976/*
977 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
978 * @me: ISP module's media entity
979 *
980 * Resume the whole pipeline if module's entity has an enabled link to the
981 * output video node. It works only while pipeline can have no more than one
982 * output node.
983 */
984static void isp_resume_module_pipeline(struct media_entity *me)
985{
986 if (isp_pipeline_is_last(me))
987 isp_pipeline_resume(to_isp_pipeline(me));
988}
989
990/*
991 * isp_suspend_modules - Suspend ISP submodules.
992 * @isp: OMAP3 ISP device
993 *
994 * Returns 0 if suspend left in idle state all the submodules properly,
995 * or returns 1 if a general Reset is required to suspend the submodules.
996 */
997static int isp_suspend_modules(struct isp_device *isp)
998{
999 unsigned long timeout;
1000
1001 omap3isp_stat_suspend(&isp->isp_aewb);
1002 omap3isp_stat_suspend(&isp->isp_af);
1003 omap3isp_stat_suspend(&isp->isp_hist);
1004 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1005 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1006 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1007 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1008 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1009
1010 timeout = jiffies + ISP_STOP_TIMEOUT;
1011 while (omap3isp_stat_busy(&isp->isp_af)
1012 || omap3isp_stat_busy(&isp->isp_aewb)
1013 || omap3isp_stat_busy(&isp->isp_hist)
1014 || omap3isp_preview_busy(&isp->isp_prev)
1015 || omap3isp_resizer_busy(&isp->isp_res)
1016 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1017 if (time_after(jiffies, timeout)) {
1018 dev_info(isp->dev, "can't stop modules.\n");
1019 return 1;
1020 }
1021 msleep(1);
1022 }
1023
1024 return 0;
1025}
1026
1027/*
1028 * isp_resume_modules - Resume ISP submodules.
1029 * @isp: OMAP3 ISP device
1030 */
1031static void isp_resume_modules(struct isp_device *isp)
1032{
1033 omap3isp_stat_resume(&isp->isp_aewb);
1034 omap3isp_stat_resume(&isp->isp_af);
1035 omap3isp_stat_resume(&isp->isp_hist);
1036 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1037 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1038 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1039 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1040 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1041}
1042
1043/*
1044 * isp_reset - Reset ISP with a timeout wait for idle.
1045 * @isp: OMAP3 ISP device
1046 */
1047static int isp_reset(struct isp_device *isp)
1048{
1049 unsigned long timeout = 0;
1050
1051 isp_reg_writel(isp,
1052 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1053 | ISP_SYSCONFIG_SOFTRESET,
1054 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1055 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1056 ISP_SYSSTATUS) & 0x1)) {
1057 if (timeout++ > 10000) {
1058 dev_alert(isp->dev, "cannot reset ISP\n");
1059 return -ETIMEDOUT;
1060 }
1061 udelay(1);
1062 }
1063
1567bb7d 1064 isp->crashed = 0;
448de7e7
SA		 1065 return 0;
1066}
1067
1068/*
1069 * isp_save_context - Saves the values of the ISP module registers.
1070 * @isp: OMAP3 ISP device
1071 * @reg_list: Structure containing pairs of register address and value to
1072 * modify on OMAP.
1073 */
1074static void
1075isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1076{
1077 struct isp_reg *next = reg_list;
1078
1079 for (; next->reg != ISP_TOK_TERM; next++)
1080 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1081}
1082
1083/*
1084 * isp_restore_context - Restores the values of the ISP module registers.
1085 * @isp: OMAP3 ISP device
1086 * @reg_list: Structure containing pairs of register address and value to
1087 * modify on OMAP.
1088 */
1089static void
1090isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1091{
1092 struct isp_reg *next = reg_list;
1093
1094 for (; next->reg != ISP_TOK_TERM; next++)
1095 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1096}
1097
1098/*
1099 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1100 * @isp: OMAP3 ISP device
1101 *
1102 * Routine for saving the context of each module in the ISP.
1103 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1104 */
1105static void isp_save_ctx(struct isp_device *isp)
1106{
1107 isp_save_context(isp, isp_reg_list);
fabdbca8 1108 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1109}
1110
1111/*
1112 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1113 * @isp: OMAP3 ISP device
1114 *
1115 * Routine for restoring the context of each module in the ISP.
1116 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1117 */
1118static void isp_restore_ctx(struct isp_device *isp)
1119{
1120 isp_restore_context(isp, isp_reg_list);
fabdbca8 1121 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1122 omap3isp_ccdc_restore_context(isp);
1123 omap3isp_preview_restore_context(isp);
1124}
1125
1126/* -----------------------------------------------------------------------------
1127 * SBL resources management
1128 */
1129#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1130 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1131 OMAP3_ISP_SBL_PREVIEW_READ | \
1132 OMAP3_ISP_SBL_RESIZER_READ)
1133#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1134 OMAP3_ISP_SBL_CSI2A_WRITE | \
1135 OMAP3_ISP_SBL_CSI2C_WRITE | \
1136 OMAP3_ISP_SBL_CCDC_WRITE | \
1137 OMAP3_ISP_SBL_PREVIEW_WRITE)
1138
1139void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1140{
1141 u32 sbl = 0;
1142
1143 isp->sbl_resources |= res;
1144
1145 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1146 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1147
1148 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1149 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1150
1151 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1152 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1153
1154 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1155 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1156
1157 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1158 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1159
1160 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1161 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1162
1163 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1164}
1165
1166void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1167{
1168 u32 sbl = 0;
1169
1170 isp->sbl_resources &= ~res;
1171
1172 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1173 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1174
1175 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1176 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1177
1178 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1179 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1180
1181 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1182 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1183
1184 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1185 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1186
1187 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1188 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1189
1190 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1191}
1192
1193/*
1194 * isp_module_sync_idle - Helper to sync module with its idle state
1195 * @me: ISP submodule's media entity
1196 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1197 * @stopping: flag which tells module wants to stop
1198 *
1199 * This function checks if ISP submodule needs to wait for next interrupt. If
1200 * yes, makes the caller to sleep while waiting for such event.
1201 */
1202int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1203 atomic_t *stopping)
1204{
1205 struct isp_pipeline *pipe = to_isp_pipeline(me);
1206
1207 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1208 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1209 !isp_pipeline_ready(pipe)))
1210 return 0;
1211
1212 /*
1213 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1214 * scenario. We'll call it here to avoid race conditions.
1215 */
1216 atomic_set(stopping, 1);
1217 smp_mb();
1218
1219 /*
1220 * If module is the last one, it's writing to memory. In this case,
1221 * it's necessary to check if the module is already paused due to
1222 * DMA queue underrun or if it has to wait for next interrupt to be
1223 * idle.
1224 * If it isn't the last one, the function won't sleep but *stopping
1225 * will still be set to warn next submodule caller's interrupt the
1226 * module wants to be idle.
1227 */
1228 if (isp_pipeline_is_last(me)) {
1229 struct isp_video *video = pipe->output;
1230 unsigned long flags;
1231 spin_lock_irqsave(&video->queue->irqlock, flags);
1232 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1233 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1234 atomic_set(stopping, 0);
1235 smp_mb();
1236 return 0;
1237 }
1238 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1239 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1240 msecs_to_jiffies(1000))) {
1241 atomic_set(stopping, 0);
1242 smp_mb();
1243 return -ETIMEDOUT;
1244 }
1245 }
1246
1247 return 0;
1248}
1249
1250/*
1251 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1252 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1253 * @stopping: flag which tells module wants to stop
1254 *
1255 * This function checks if ISP submodule was stopping. In case of yes, it
1256 * notices the caller by setting stopping to 0 and waking up the wait queue.
1257 * Returns 1 if it was stopping or 0 otherwise.
1258 */
1259int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1260 atomic_t *stopping)
1261{
1262 if (atomic_cmpxchg(stopping, 1, 0)) {
1263 wake_up(wait);
1264 return 1;
1265 }
1266
1267 return 0;
1268}
1269
1270/* --------------------------------------------------------------------------
1271 * Clock management
1272 */
1273
1274#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1275 ISPCTRL_HIST_CLK_EN | \
1276 ISPCTRL_RSZ_CLK_EN | \
1277 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1278 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1279
1280static void __isp_subclk_update(struct isp_device *isp)
1281{
1282 u32 clk = 0;
1283
1284 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1285 clk |= ISPCTRL_H3A_CLK_EN;
1286
1287 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1288 clk |= ISPCTRL_HIST_CLK_EN;
1289
1290 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1291 clk |= ISPCTRL_RSZ_CLK_EN;
1292
1293 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1294 * RAM as well.
448de7e7
SA		 1295 */
1296 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1297 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1298
1299 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1300 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1301
1302 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1303 ISPCTRL_CLKS_MASK, clk);
1304}
1305
1306void omap3isp_subclk_enable(struct isp_device *isp,
1307 enum isp_subclk_resource res)
1308{
1309 isp->subclk_resources |= res;
1310
1311 __isp_subclk_update(isp);
1312}
1313
1314void omap3isp_subclk_disable(struct isp_device *isp,
1315 enum isp_subclk_resource res)
1316{
1317 isp->subclk_resources &= ~res;
1318
1319 __isp_subclk_update(isp);
1320}
1321
1322/*
1323 * isp_enable_clocks - Enable ISP clocks
1324 * @isp: OMAP3 ISP device
1325 *
1326 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1327 */
1328static int isp_enable_clocks(struct isp_device *isp)
1329{
1330 int r;
1331 unsigned long rate;
1332 int divisor;
1333
1334 /*
1335 * cam_mclk clock chain:
1336 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1337 *
1338 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1339 * set to the same value. Hence the rate set for dpll4_m5
1340 * has to be twice of what is set on OMAP3430 to get
1341 * the required value for cam_mclk
1342 */
1343 if (cpu_is_omap3630())
1344 divisor = 1;
1345 else
1346 divisor = 2;
1347
1348 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1349 if (r) {
1350 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1351 goto out_clk_enable_ick;
1352 }
1353 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1354 CM_CAM_MCLK_HZ/divisor);
1355 if (r) {
1356 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1357 goto out_clk_enable_mclk;
1358 }
1359 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1360 if (r) {
1361 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1362 goto out_clk_enable_mclk;
1363 }
1364 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1365 if (rate != CM_CAM_MCLK_HZ)
1366 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1367 " expected : %d\n"
1368 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1369 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1370 if (r) {
1371 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1372 goto out_clk_enable_csi2_fclk;
1373 }
1374 return 0;
1375
1376out_clk_enable_csi2_fclk:
1377 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1378out_clk_enable_mclk:
1379 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1380out_clk_enable_ick:
1381 return r;
1382}
1383
1384/*
1385 * isp_disable_clocks - Disable ISP clocks
1386 * @isp: OMAP3 ISP device
1387 */
1388static void isp_disable_clocks(struct isp_device *isp)
1389{
1390 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1391 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1392 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1393}
1394
1395static const char *isp_clocks[] = {
1396 "cam_ick",
1397 "cam_mclk",
1398 "dpll4_m5_ck",
1399 "csi2_96m_fck",
1400 "l3_ick",
1401};
1402
1403static void isp_put_clocks(struct isp_device *isp)
1404{
1405 unsigned int i;
1406
1407 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1408 if (isp->clock[i]) {
1409 clk_put(isp->clock[i]);
1410 isp->clock[i] = NULL;
1411 }
1412 }
1413}
1414
1415static int isp_get_clocks(struct isp_device *isp)
1416{
1417 struct clk *clk;
1418 unsigned int i;
1419
1420 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1421 clk = clk_get(isp->dev, isp_clocks[i]);
1422 if (IS_ERR(clk)) {
1423 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1424 isp_put_clocks(isp);
1425 return PTR_ERR(clk);
1426 }
1427
1428 isp->clock[i] = clk;
1429 }
1430
1431 return 0;
1432}
1433
1434/*
1435 * omap3isp_get - Acquire the ISP resource.
1436 *
1437 * Initializes the clocks for the first acquire.
1438 *
1439 * Increment the reference count on the ISP. If the first reference is taken,
1440 * enable clocks and power-up all submodules.
1441 *
25985edc 1442 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7
SA		 1443 */
1444struct isp_device *omap3isp_get(struct isp_device *isp)
1445{
1446 struct isp_device *__isp = isp;
1447
1448 if (isp == NULL)
1449 return NULL;
1450
1451 mutex_lock(&isp->isp_mutex);
1452 if (isp->ref_count > 0)
1453 goto out;
1454
1455 if (isp_enable_clocks(isp) < 0) {
1456 __isp = NULL;
1457 goto out;
1458 }
1459
1460 /* We don't want to restore context before saving it! */
1461 if (isp->has_context)
1462 isp_restore_ctx(isp);
1463 else
1464 isp->has_context = 1;
1465
1466 isp_enable_interrupts(isp);
1467
1468out:
1469 if (__isp != NULL)
1470 isp->ref_count++;
1471 mutex_unlock(&isp->isp_mutex);
1472
1473 return __isp;
1474}
1475
1476/*
1477 * omap3isp_put - Release the ISP
1478 *
1479 * Decrement the reference count on the ISP. If the last reference is released,
1480 * power-down all submodules, disable clocks and free temporary buffers.
1481 */
1482void omap3isp_put(struct isp_device *isp)
1483{
1484 if (isp == NULL)
1485 return;
1486
1487 mutex_lock(&isp->isp_mutex);
1488 BUG_ON(isp->ref_count == 0);
1489 if (--isp->ref_count == 0) {
1490 isp_disable_interrupts(isp);
a32f2f90
SA		 1491 if (isp->domain)
1492 isp_save_ctx(isp);
1567bb7d
LP		 1493 /* Reset the ISP if an entity has failed to stop. This is the
1494 * only way to recover from such conditions.
1495 */
1496 if (isp->crashed)
994d5375 1497 isp_reset(isp);
448de7e7
SA		 1498 isp_disable_clocks(isp);
1499 }
1500 mutex_unlock(&isp->isp_mutex);
1501}
1502
1503/* --------------------------------------------------------------------------
1504 * Platform device driver
1505 */
1506
1507/*
1508 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1509 * @isp: OMAP3 ISP device
1510 */
1511#define ISP_PRINT_REGISTER(isp, name)\
1512 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1513 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1514#define SBL_PRINT_REGISTER(isp, name)\
1515 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1516 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1517
1518void omap3isp_print_status(struct isp_device *isp)
1519{
1520 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1521
1522 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1523 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1524 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1525 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1526 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1527 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1528 ISP_PRINT_REGISTER(isp, CTRL);
1529 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1530 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1531 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1532 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1533 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1534 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1535 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1536 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1537
1538 SBL_PRINT_REGISTER(isp, PCR);
1539 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1540
1541 dev_dbg(isp->dev, "--------------------------------------------\n");
1542}
1543
1544#ifdef CONFIG_PM
1545
1546/*
1547 * Power management support.
1548 *
1549 * As the ISP can't properly handle an input video stream interruption on a non
1550 * frame boundary, the ISP pipelines need to be stopped before sensors get
1551 * suspended. However, as suspending the sensors can require a running clock,
1552 * which can be provided by the ISP, the ISP can't be completely suspended
1553 * before the sensor.
1554 *
1555 * To solve this problem power management support is split into prepare/complete
1556 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1557 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1558 * resume(), and the the pipelines are restarted in complete().
1559 *
1560 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1561 * yet.
1562 */
1563static int isp_pm_prepare(struct device *dev)
1564{
1565 struct isp_device *isp = dev_get_drvdata(dev);
1566 int reset;
1567
1568 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1569
1570 if (isp->ref_count == 0)
1571 return 0;
1572
1573 reset = isp_suspend_modules(isp);
1574 isp_disable_interrupts(isp);
1575 isp_save_ctx(isp);
1576 if (reset)
1577 isp_reset(isp);
1578
1579 return 0;
1580}
1581
1582static int isp_pm_suspend(struct device *dev)
1583{
1584 struct isp_device *isp = dev_get_drvdata(dev);
1585
1586 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1587
1588 if (isp->ref_count)
1589 isp_disable_clocks(isp);
1590
1591 return 0;
1592}
1593
1594static int isp_pm_resume(struct device *dev)
1595{
1596 struct isp_device *isp = dev_get_drvdata(dev);
1597
1598 if (isp->ref_count == 0)
1599 return 0;
1600
1601 return isp_enable_clocks(isp);
1602}
1603
1604static void isp_pm_complete(struct device *dev)
1605{
1606 struct isp_device *isp = dev_get_drvdata(dev);
1607
1608 if (isp->ref_count == 0)
1609 return;
1610
1611 isp_restore_ctx(isp);
1612 isp_enable_interrupts(isp);
1613 isp_resume_modules(isp);
1614}
1615
1616#else
1617
1618#define isp_pm_prepare NULL
1619#define isp_pm_suspend NULL
1620#define isp_pm_resume NULL
1621#define isp_pm_complete NULL
1622
1623#endif /* CONFIG_PM */
1624
1625static void isp_unregister_entities(struct isp_device *isp)
1626{
1627 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1628 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1629 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1630 omap3isp_preview_unregister_entities(&isp->isp_prev);
1631 omap3isp_resizer_unregister_entities(&isp->isp_res);
1632 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1633 omap3isp_stat_unregister_entities(&isp->isp_af);
1634 omap3isp_stat_unregister_entities(&isp->isp_hist);
1635
1636 v4l2_device_unregister(&isp->v4l2_dev);
1637 media_device_unregister(&isp->media_dev);
1638}
1639
1640/*
1641 * isp_register_subdev_group - Register a group of subdevices
1642 * @isp: OMAP3 ISP device
1643 * @board_info: I2C subdevs board information array
1644 *
1645 * Register all I2C subdevices in the board_info array. The array must be
1646 * terminated by a NULL entry, and the first entry must be the sensor.
1647 *
1648 * Return a pointer to the sensor media entity if it has been successfully
1649 * registered, or NULL otherwise.
1650 */
1651static struct v4l2_subdev *
1652isp_register_subdev_group(struct isp_device *isp,
1653 struct isp_subdev_i2c_board_info *board_info)
1654{
1655 struct v4l2_subdev *sensor = NULL;
1656 unsigned int first;
1657
1658 if (board_info->board_info == NULL)
1659 return NULL;
1660
1661 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1662 struct v4l2_subdev *subdev;
1663 struct i2c_adapter *adapter;
1664
1665 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1666 if (adapter == NULL) {
1667 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1668 "device %s\n", __func__,
1669 board_info->i2c_adapter_id,
1670 board_info->board_info->type);
1671 continue;
1672 }
1673
1674 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1675 board_info->board_info, NULL);
1676 if (subdev == NULL) {
1677 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1678 __func__, board_info->board_info->type);
1679 continue;
1680 }
1681
1682 if (first)
1683 sensor = subdev;
1684 }
1685
1686 return sensor;
1687}
1688
1689static int isp_register_entities(struct isp_device *isp)
1690{
1691 struct isp_platform_data *pdata = isp->pdata;
1692 struct isp_v4l2_subdevs_group *subdevs;
1693 int ret;
1694
1695 isp->media_dev.dev = isp->dev;
1696 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1697 sizeof(isp->media_dev.model));
083eb078 1698 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1699 isp->media_dev.link_notify = isp_pipeline_link_notify;
1700 ret = media_device_register(&isp->media_dev);
1701 if (ret < 0) {
1702 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1703 __func__, ret);
1704 return ret;
1705 }
1706
1707 isp->v4l2_dev.mdev = &isp->media_dev;
1708 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1709 if (ret < 0) {
1710 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1711 __func__, ret);
1712 goto done;
1713 }
1714
1715 /* Register internal entities */
1716 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1717 if (ret < 0)
1718 goto done;
1719
1720 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1721 if (ret < 0)
1722 goto done;
1723
1724 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1725 if (ret < 0)
1726 goto done;
1727
1728 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1729 &isp->v4l2_dev);
1730 if (ret < 0)
1731 goto done;
1732
1733 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1734 if (ret < 0)
1735 goto done;
1736
1737 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1738 if (ret < 0)
1739 goto done;
1740
1741 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1742 if (ret < 0)
1743 goto done;
1744
1745 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1746 if (ret < 0)
1747 goto done;
1748
1749 /* Register external entities */
ca4186f0 1750 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1751 struct v4l2_subdev *sensor;
1752 struct media_entity *input;
1753 unsigned int flags;
1754 unsigned int pad;
1755
1756 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1757 if (sensor == NULL)
1758 continue;
1759
1760 sensor->host_priv = subdevs;
1761
1762 /* Connect the sensor to the correct interface module. Parallel
1763 * sensors are connected directly to the CCDC, while serial
1764 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1765 * through CSIPHY1 or CSIPHY2.
1766 */
1767 switch (subdevs->interface) {
1768 case ISP_INTERFACE_PARALLEL:
1769 input = &isp->isp_ccdc.subdev.entity;
1770 pad = CCDC_PAD_SINK;
1771 flags = 0;
1772 break;
1773
1774 case ISP_INTERFACE_CSI2A_PHY2:
1775 input = &isp->isp_csi2a.subdev.entity;
1776 pad = CSI2_PAD_SINK;
1777 flags = MEDIA_LNK_FL_IMMUTABLE
1778 | MEDIA_LNK_FL_ENABLED;
1779 break;
1780
1781 case ISP_INTERFACE_CCP2B_PHY1:
1782 case ISP_INTERFACE_CCP2B_PHY2:
1783 input = &isp->isp_ccp2.subdev.entity;
1784 pad = CCP2_PAD_SINK;
1785 flags = 0;
1786 break;
1787
1788 case ISP_INTERFACE_CSI2C_PHY1:
1789 input = &isp->isp_csi2c.subdev.entity;
1790 pad = CSI2_PAD_SINK;
1791 flags = MEDIA_LNK_FL_IMMUTABLE
1792 | MEDIA_LNK_FL_ENABLED;
1793 break;
1794
1795 default:
1796 printk(KERN_ERR "%s: invalid interface type %u\n",
1797 __func__, subdevs->interface);
1798 ret = -EINVAL;
1799 goto done;
1800 }
1801
1802 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1803 flags);
1804 if (ret < 0)
1805 goto done;
1806 }
1807
1808 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1809
1810done:
1811 if (ret < 0)
1812 isp_unregister_entities(isp);
1813
1814 return ret;
1815}
1816
1817static void isp_cleanup_modules(struct isp_device *isp)
1818{
1819 omap3isp_h3a_aewb_cleanup(isp);
1820 omap3isp_h3a_af_cleanup(isp);
1821 omap3isp_hist_cleanup(isp);
1822 omap3isp_resizer_cleanup(isp);
1823 omap3isp_preview_cleanup(isp);
1824 omap3isp_ccdc_cleanup(isp);
1825 omap3isp_ccp2_cleanup(isp);
1826 omap3isp_csi2_cleanup(isp);
1827}
1828
1829static int isp_initialize_modules(struct isp_device *isp)
1830{
1831 int ret;
1832
1833 ret = omap3isp_csiphy_init(isp);
1834 if (ret < 0) {
1835 dev_err(isp->dev, "CSI PHY initialization failed\n");
1836 goto error_csiphy;
1837 }
1838
1839 ret = omap3isp_csi2_init(isp);
1840 if (ret < 0) {
1841 dev_err(isp->dev, "CSI2 initialization failed\n");
1842 goto error_csi2;
1843 }
1844
1845 ret = omap3isp_ccp2_init(isp);
1846 if (ret < 0) {
1847 dev_err(isp->dev, "CCP2 initialization failed\n");
1848 goto error_ccp2;
1849 }
1850
1851 ret = omap3isp_ccdc_init(isp);
1852 if (ret < 0) {
1853 dev_err(isp->dev, "CCDC initialization failed\n");
1854 goto error_ccdc;
1855 }
1856
1857 ret = omap3isp_preview_init(isp);
1858 if (ret < 0) {
1859 dev_err(isp->dev, "Preview initialization failed\n");
1860 goto error_preview;
1861 }
1862
1863 ret = omap3isp_resizer_init(isp);
1864 if (ret < 0) {
1865 dev_err(isp->dev, "Resizer initialization failed\n");
1866 goto error_resizer;
1867 }
1868
1869 ret = omap3isp_hist_init(isp);
1870 if (ret < 0) {
1871 dev_err(isp->dev, "Histogram initialization failed\n");
1872 goto error_hist;
1873 }
1874
1875 ret = omap3isp_h3a_aewb_init(isp);
1876 if (ret < 0) {
1877 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1878 goto error_h3a_aewb;
1879 }
1880
1881 ret = omap3isp_h3a_af_init(isp);
1882 if (ret < 0) {
1883 dev_err(isp->dev, "H3A AF initialization failed\n");
1884 goto error_h3a_af;
1885 }
1886
1887 /* Connect the submodules. */
1888 ret = media_entity_create_link(
1889 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1890 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1891 if (ret < 0)
1892 goto error_link;
1893
1894 ret = media_entity_create_link(
1895 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1896 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1897 if (ret < 0)
1898 goto error_link;
1899
1900 ret = media_entity_create_link(
1901 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1902 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1903 if (ret < 0)
1904 goto error_link;
1905
1906 ret = media_entity_create_link(
1907 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1908 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1909 if (ret < 0)
1910 goto error_link;
1911
1912 ret = media_entity_create_link(
1913 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1914 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1915 if (ret < 0)
1916 goto error_link;
1917
1918 ret = media_entity_create_link(
1919 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1920 &isp->isp_aewb.subdev.entity, 0,
1921 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1922 if (ret < 0)
1923 goto error_link;
1924
1925 ret = media_entity_create_link(
1926 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1927 &isp->isp_af.subdev.entity, 0,
1928 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1929 if (ret < 0)
1930 goto error_link;
1931
1932 ret = media_entity_create_link(
1933 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1934 &isp->isp_hist.subdev.entity, 0,
1935 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1936 if (ret < 0)
1937 goto error_link;
1938
1939 return 0;
1940
1941error_link:
1942 omap3isp_h3a_af_cleanup(isp);
1943error_h3a_af:
1944 omap3isp_h3a_aewb_cleanup(isp);
1945error_h3a_aewb:
1946 omap3isp_hist_cleanup(isp);
1947error_hist:
1948 omap3isp_resizer_cleanup(isp);
1949error_resizer:
1950 omap3isp_preview_cleanup(isp);
1951error_preview:
1952 omap3isp_ccdc_cleanup(isp);
1953error_ccdc:
1954 omap3isp_ccp2_cleanup(isp);
1955error_ccp2:
1956 omap3isp_csi2_cleanup(isp);
1957error_csi2:
1958error_csiphy:
1959 return ret;
1960}
1961
1962/*
1963 * isp_remove - Remove ISP platform device
1964 * @pdev: Pointer to ISP platform device
1965 *
1966 * Always returns 0.
1967 */
79c3a07d 1968static int __devexit isp_remove(struct platform_device *pdev)
448de7e7
SA		 1969{
1970 struct isp_device *isp = platform_get_drvdata(pdev);
1971 int i;
1972
1973 isp_unregister_entities(isp);
1974 isp_cleanup_modules(isp);
1975
1976 omap3isp_get(isp);
fabdbca8 1977 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d 1978 iommu_domain_free(isp->domain);
a32f2f90 1979 isp->domain = NULL;
448de7e7
SA		 1980 omap3isp_put(isp);
1981
1982 free_irq(isp->irq_num, isp);
1983 isp_put_clocks(isp);
1984
1985 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1986 if (isp->mmio_base[i]) {
1987 iounmap(isp->mmio_base[i]);
1988 isp->mmio_base[i] = NULL;
1989 }
1990
1991 if (isp->mmio_base_phys[i]) {
1992 release_mem_region(isp->mmio_base_phys[i],
1993 isp->mmio_size[i]);
1994 isp->mmio_base_phys[i] = 0;
1995 }
1996 }
1997
1998 regulator_put(isp->isp_csiphy1.vdd);
1999 regulator_put(isp->isp_csiphy2.vdd);
2000 kfree(isp);
2001
2002 return 0;
2003}
2004
2005static int isp_map_mem_resource(struct platform_device *pdev,
2006 struct isp_device *isp,
2007 enum isp_mem_resources res)
2008{
2009 struct resource *mem;
2010
2011 /* request the mem region for the camera registers */
2012
2013 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2014 if (!mem) {
2015 dev_err(isp->dev, "no mem resource?\n");
2016 return -ENODEV;
2017 }
2018
2019 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2020 dev_err(isp->dev,
2021 "cannot reserve camera register I/O region\n");
2022 return -ENODEV;
2023 }
2024 isp->mmio_base_phys[res] = mem->start;
2025 isp->mmio_size[res] = resource_size(mem);
2026
2027 /* map the region */
2028 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2029 isp->mmio_size[res]);
2030 if (!isp->mmio_base[res]) {
2031 dev_err(isp->dev, "cannot map camera register I/O region\n");
2032 return -ENODEV;
2033 }
2034
2035 return 0;
2036}
2037
2038/*
2039 * isp_probe - Probe ISP platform device
2040 * @pdev: Pointer to ISP platform device
2041 *
2042 * Returns 0 if successful,
2043 * -ENOMEM if no memory available,
2044 * -ENODEV if no platform device resources found
2045 * or no space for remapping registers,
2046 * -EINVAL if couldn't install ISR,
2047 * or clk_get return error value.
2048 */
79c3a07d 2049static int __devinit isp_probe(struct platform_device *pdev)
448de7e7
SA		 2050{
2051 struct isp_platform_data *pdata = pdev->dev.platform_data;
2052 struct isp_device *isp;
2053 int ret;
2054 int i, m;
2055
2056 if (pdata == NULL)
2057 return -EINVAL;
2058
2059 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2060 if (!isp) {
2061 dev_err(&pdev->dev, "could not allocate memory\n");
2062 return -ENOMEM;
2063 }
2064
2065 isp->autoidle = autoidle;
2066 isp->platform_cb.set_xclk = isp_set_xclk;
448de7e7
SA		 2067
2068 mutex_init(&isp->isp_mutex);
2069 spin_lock_init(&isp->stat_lock);
2070
2071 isp->dev = &pdev->dev;
2072 isp->pdata = pdata;
2073 isp->ref_count = 0;
2074
2075 isp->raw_dmamask = DMA_BIT_MASK(32);
2076 isp->dev->dma_mask = &isp->raw_dmamask;
2077 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2078
2079 platform_set_drvdata(pdev, isp);
2080
2081 /* Regulators */
2082 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2083 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2084
2085 /* Clocks */
2086 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2087 if (ret < 0)
2088 goto error;
2089
2090 ret = isp_get_clocks(isp);
2091 if (ret < 0)
2092 goto error;
2093
2094 if (omap3isp_get(isp) == NULL)
2095 goto error;
2096
2097 ret = isp_reset(isp);
2098 if (ret < 0)
2099 goto error_isp;
2100
2101 /* Memory resources */
2102 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2103 dev_info(isp->dev, "Revision %d.%d found\n",
2104 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2105
2106 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2107 if (isp->revision == isp_res_maps[m].isp_rev)
2108 break;
2109
2110 if (m == ARRAY_SIZE(isp_res_maps)) {
2111 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2112 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2113 ret = -ENODEV;
2114 goto error_isp;
2115 }
2116
2117 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2118 if (isp_res_maps[m].map & 1 << i) {
2119 ret = isp_map_mem_resource(pdev, isp, i);
2120 if (ret)
2121 goto error_isp;
2122 }
2123 }
2124
905d66c1 2125 isp->domain = iommu_domain_alloc(pdev->dev.bus);
f626b52d
OBC		 2126 if (!isp->domain) {
2127 dev_err(isp->dev, "can't alloc iommu domain\n");
2128 ret = -ENOMEM;
2129 goto error_isp;
2130 }
2131
fabdbca8 2132 ret = iommu_attach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2133 if (ret) {
2134 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2135 goto free_domain;
2136 }
2137
448de7e7
SA		 2138 /* Interrupt */
2139 isp->irq_num = platform_get_irq(pdev, 0);
2140 if (isp->irq_num <= 0) {
2141 dev_err(isp->dev, "No IRQ resource\n");
2142 ret = -ENODEV;
f626b52d 2143 goto detach_dev;
448de7e7
SA		 2144 }
2145
2146 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2147 dev_err(isp->dev, "Unable to request IRQ\n");
2148 ret = -EINVAL;
f626b52d 2149 goto detach_dev;
448de7e7
SA		 2150 }
2151
2152 /* Entities */
2153 ret = isp_initialize_modules(isp);
2154 if (ret < 0)
2155 goto error_irq;
2156
2157 ret = isp_register_entities(isp);
2158 if (ret < 0)
2159 goto error_modules;
2160
2161 isp_power_settings(isp, 1);
2162 omap3isp_put(isp);
2163
2164 return 0;
2165
2166error_modules:
2167 isp_cleanup_modules(isp);
2168error_irq:
2169 free_irq(isp->irq_num, isp);
f626b52d 2170detach_dev:
fabdbca8 2171 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2172free_domain:
2173 iommu_domain_free(isp->domain);
448de7e7 2174error_isp:
448de7e7
SA		 2175 omap3isp_put(isp);
2176error:
2177 isp_put_clocks(isp);
2178
2179 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2180 if (isp->mmio_base[i]) {
2181 iounmap(isp->mmio_base[i]);
2182 isp->mmio_base[i] = NULL;
2183 }
2184
2185 if (isp->mmio_base_phys[i]) {
2186 release_mem_region(isp->mmio_base_phys[i],
2187 isp->mmio_size[i]);
2188 isp->mmio_base_phys[i] = 0;
2189 }
2190 }
2191 regulator_put(isp->isp_csiphy2.vdd);
2192 regulator_put(isp->isp_csiphy1.vdd);
2193 platform_set_drvdata(pdev, NULL);
ed33ac8e
LP		 2194
2195 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2196 kfree(isp);
2197
2198 return ret;
2199}
2200
2201static const struct dev_pm_ops omap3isp_pm_ops = {
2202 .prepare = isp_pm_prepare,
2203 .suspend = isp_pm_suspend,
2204 .resume = isp_pm_resume,
2205 .complete = isp_pm_complete,
2206};
2207
2208static struct platform_device_id omap3isp_id_table[] = {
2209 { "omap3isp", 0 },
2210 { },
2211};
2212MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2213
2214static struct platform_driver omap3isp_driver = {
2215 .probe = isp_probe,
79c3a07d 2216 .remove = __devexit_p(isp_remove),
448de7e7
SA		 2217 .id_table = omap3isp_id_table,
2218 .driver = {
2219 .owner = THIS_MODULE,
2220 .name = "omap3isp",
2221 .pm = &omap3isp_pm_ops,
2222 },
2223};
2224
1d6629b1 2225module_platform_driver(omap3isp_driver);
448de7e7
SA		 2226
2227MODULE_AUTHOR("Nokia Corporation");
2228MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2229MODULE_LICENSE("GPL");
64dc3c1a 2230MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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