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Merge branch 'kirkwood/boards' of git://git.infradead.org/users/jcooper/linux into...
[deliverable/linux.git] / drivers / media / video / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
58#include <linux/delay.h>
59#include <linux/device.h>
60#include <linux/dma-mapping.h>
61#include <linux/i2c.h>
62#include <linux/interrupt.h>
63#include <linux/module.h>
64#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h>
66#include <linux/slab.h>
67#include <linux/sched.h>
68#include <linux/vmalloc.h>
69
70#include <media/v4l2-common.h>
71#include <media/v4l2-device.h>
72
ec2c0825
TL		 73#include <plat/cpu.h>
74
448de7e7
SA		 75#include "isp.h"
76#include "ispreg.h"
77#include "ispccdc.h"
78#include "isppreview.h"
79#include "ispresizer.h"
80#include "ispcsi2.h"
81#include "ispccp2.h"
82#include "isph3a.h"
83#include "isphist.h"
84
85static unsigned int autoidle;
86module_param(autoidle, int, 0444);
87MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
88
89static void isp_save_ctx(struct isp_device *isp);
90
91static void isp_restore_ctx(struct isp_device *isp);
92
93static const struct isp_res_mapping isp_res_maps[] = {
94 {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
105 1 << OMAP3_ISP_IOMEM_CSIPHY2,
106 },
107 {
108 .isp_rev = ISP_REVISION_15_0,
109 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
110 1 << OMAP3_ISP_IOMEM_CCP2 |
111 1 << OMAP3_ISP_IOMEM_CCDC |
112 1 << OMAP3_ISP_IOMEM_HIST |
113 1 << OMAP3_ISP_IOMEM_H3A |
114 1 << OMAP3_ISP_IOMEM_PREV |
115 1 << OMAP3_ISP_IOMEM_RESZ |
116 1 << OMAP3_ISP_IOMEM_SBL |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
118 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
119 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
121 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
122 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
123 },
124};
125
126/* Structure for saving/restoring ISP module registers */
127static struct isp_reg isp_reg_list[] = {
128 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
129 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
130 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
131 {0, ISP_TOK_TERM, 0}
132};
133
134/*
135 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
136 * @isp: OMAP3 ISP device
137 *
138 * In order to force posting of pending writes, we need to write and
139 * readback the same register, in this case the revision register.
140 *
141 * See this link for reference:
142 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
143 */
144void omap3isp_flush(struct isp_device *isp)
145{
146 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
147 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
148}
149
150/*
151 * isp_enable_interrupts - Enable ISP interrupts.
152 * @isp: OMAP3 ISP device
153 */
154static void isp_enable_interrupts(struct isp_device *isp)
155{
156 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
157 | IRQ0ENABLE_CSIB_IRQ
158 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
159 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
160 | IRQ0ENABLE_CCDC_VD0_IRQ
161 | IRQ0ENABLE_CCDC_VD1_IRQ
162 | IRQ0ENABLE_HS_VS_IRQ
163 | IRQ0ENABLE_HIST_DONE_IRQ
164 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
165 | IRQ0ENABLE_H3A_AF_DONE_IRQ
166 | IRQ0ENABLE_PRV_DONE_IRQ
167 | IRQ0ENABLE_RSZ_DONE_IRQ;
168
169 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
170 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
171}
172
173/*
174 * isp_disable_interrupts - Disable ISP interrupts.
175 * @isp: OMAP3 ISP device
176 */
177static void isp_disable_interrupts(struct isp_device *isp)
178{
179 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
180}
181
182/**
183 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
184 * @isp: OMAP3 ISP device
185 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
186 * @xclksel: XCLK to configure (0 = A, 1 = B).
187 *
188 * Configures the specified MCLK divisor in the ISP timing control register
189 * (TCTRL_CTRL) to generate the desired xclk clock value.
190 *
191 * Divisor = cam_mclk_hz / xclk
192 *
193 * Returns the final frequency that is actually being generated
194 **/
195static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
196{
197 u32 divisor;
198 u32 currentxclk;
199 unsigned long mclk_hz;
200
201 if (!omap3isp_get(isp))
202 return 0;
203
204 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
205
206 if (xclk >= mclk_hz) {
207 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
208 currentxclk = mclk_hz;
209 } else if (xclk >= 2) {
210 divisor = mclk_hz / xclk;
211 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
212 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
213 currentxclk = mclk_hz / divisor;
214 } else {
215 divisor = xclk;
216 currentxclk = 0;
217 }
218
219 switch (xclksel) {
7c2c8f42 220 case ISP_XCLK_A:
448de7e7
SA		 221 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
222 ISPTCTRL_CTRL_DIVA_MASK,
223 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
224 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
225 currentxclk);
226 break;
7c2c8f42 227 case ISP_XCLK_B:
448de7e7
SA		 228 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
229 ISPTCTRL_CTRL_DIVB_MASK,
230 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
231 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
232 currentxclk);
233 break;
7c2c8f42 234 case ISP_XCLK_NONE:
448de7e7
SA		 235 default:
236 omap3isp_put(isp);
237 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
238 "xclk. Must be 0 (A) or 1 (B).\n");
239 return -EINVAL;
240 }
241
242 /* Do we go from stable whatever to clock? */
7c2c8f42 243 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
448de7e7
SA		 244 omap3isp_get(isp);
245 /* Stopping the clock. */
7c2c8f42 246 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
448de7e7
SA		 247 omap3isp_put(isp);
248
7c2c8f42 249 isp->xclk_divisor[xclksel - 1] = divisor;
448de7e7
SA		 250
251 omap3isp_put(isp);
252
253 return currentxclk;
254}
255
256/*
257 * isp_power_settings - Sysconfig settings, for Power Management.
258 * @isp: OMAP3 ISP device
259 * @idle: Consider idle state.
260 *
261 * Sets the power settings for the ISP, and SBL bus.
262 */
263static void isp_power_settings(struct isp_device *isp, int idle)
264{
265 isp_reg_writel(isp,
266 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
267 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
268 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
269 ((isp->revision == ISP_REVISION_15_0) ?
270 ISP_SYSCONFIG_AUTOIDLE : 0),
271 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
272
273 if (isp->autoidle)
274 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
275 ISP_CTRL);
276}
277
278/*
279 * Configure the bridge and lane shifter. Valid inputs are
280 *
281 * CCDC_INPUT_PARALLEL: Parallel interface
282 * CCDC_INPUT_CSI2A: CSI2a receiver
283 * CCDC_INPUT_CCP2B: CCP2b receiver
284 * CCDC_INPUT_CSI2C: CSI2c receiver
285 *
286 * The bridge and lane shifter are configured according to the selected input
287 * and the ISP platform data.
288 */
289void omap3isp_configure_bridge(struct isp_device *isp,
290 enum ccdc_input_entity input,
c09af044
MJ		 291 const struct isp_parallel_platform_data *pdata,
292 unsigned int shift)
448de7e7
SA		 293{
294 u32 ispctrl_val;
295
296 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
297 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
299 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
300 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
301
302 switch (input) {
303 case CCDC_INPUT_PARALLEL:
304 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7
SA		 305 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
306 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
c09af044 307 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 308 break;
309
310 case CCDC_INPUT_CSI2A:
311 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
312 break;
313
314 case CCDC_INPUT_CCP2B:
315 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
316 break;
317
318 case CCDC_INPUT_CSI2C:
319 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
320 break;
321
322 default:
323 return;
324 }
325
c09af044
MJ		 326 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
327
448de7e7
SA		 328 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
329 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
330
331 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
332}
333
448de7e7
SA		 334void omap3isp_hist_dma_done(struct isp_device *isp)
335{
336 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
337 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
338 /* Histogram cannot be enabled in this frame anymore */
339 atomic_set(&isp->isp_hist.buf_err, 1);
340 dev_dbg(isp->dev, "hist: Out of synchronization with "
341 "CCDC. Ignoring next buffer.\n");
342 }
343}
344
345static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
346{
347 static const char *name[] = {
348 "CSIA_IRQ",
349 "res1",
350 "res2",
351 "CSIB_LCM_IRQ",
352 "CSIB_IRQ",
353 "res5",
354 "res6",
355 "res7",
356 "CCDC_VD0_IRQ",
357 "CCDC_VD1_IRQ",
358 "CCDC_VD2_IRQ",
359 "CCDC_ERR_IRQ",
360 "H3A_AF_DONE_IRQ",
361 "H3A_AWB_DONE_IRQ",
362 "res14",
363 "res15",
364 "HIST_DONE_IRQ",
365 "CCDC_LSC_DONE",
366 "CCDC_LSC_PREFETCH_COMPLETED",
367 "CCDC_LSC_PREFETCH_ERROR",
368 "PRV_DONE_IRQ",
369 "CBUFF_IRQ",
370 "res22",
371 "res23",
372 "RSZ_DONE_IRQ",
373 "OVF_IRQ",
374 "res26",
375 "res27",
376 "MMU_ERR_IRQ",
377 "OCP_ERR_IRQ",
378 "SEC_ERR_IRQ",
379 "HS_VS_IRQ",
380 };
381 int i;
382
6c20c635 383 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 384
385 for (i = 0; i < ARRAY_SIZE(name); i++) {
386 if ((1 << i) & irqstatus)
387 printk(KERN_CONT "%s ", name[i]);
388 }
389 printk(KERN_CONT "\n");
390}
391
392static void isp_isr_sbl(struct isp_device *isp)
393{
394 struct device *dev = isp->dev;
875e2e3e 395 struct isp_pipeline *pipe;
448de7e7
SA		 396 u32 sbl_pcr;
397
398 /*
399 * Handle shared buffer logic overflows for video buffers.
400 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
401 */
402 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
403 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
404 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
405
406 if (sbl_pcr)
407 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
408
875e2e3e
LP		 409 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
410 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
411 if (pipe != NULL)
412 pipe->error = true;
413 }
414
415 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
416 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
417 if (pipe != NULL)
418 pipe->error = true;
419 }
420
421 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
422 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
423 if (pipe != NULL)
424 pipe->error = true;
448de7e7
SA		 425 }
426
427 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 428 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
429 if (pipe != NULL)
430 pipe->error = true;
448de7e7
SA		 431 }
432
433 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
434 | ISPSBL_PCR_RSZ2_WBL_OVF
435 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 436 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
437 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
438 if (pipe != NULL)
439 pipe->error = true;
440 }
448de7e7
SA		 441
442 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
443 omap3isp_stat_sbl_overflow(&isp->isp_af);
444
445 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
446 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
447}
448
449/*
450 * isp_isr - Interrupt Service Routine for Camera ISP module.
451 * @irq: Not used currently.
452 * @_isp: Pointer to the OMAP3 ISP device
453 *
454 * Handles the corresponding callback if plugged in.
455 *
456 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
457 * IRQ wasn't handled.
458 */
459static irqreturn_t isp_isr(int irq, void *_isp)
460{
461 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
462 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
463 IRQ0STATUS_CCDC_VD0_IRQ |
464 IRQ0STATUS_CCDC_VD1_IRQ |
465 IRQ0STATUS_HS_VS_IRQ;
466 struct isp_device *isp = _isp;
467 u32 irqstatus;
448de7e7
SA		 468
469 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
470 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
471
472 isp_isr_sbl(isp);
473
875e2e3e
LP		 474 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
475 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 476
875e2e3e
LP		 477 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
478 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 479
480 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
481 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
482 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
483 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
484 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
485 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
486 omap3isp_stat_isr_frame_sync(&isp->isp_af);
487 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
488 }
489
490 if (irqstatus & ccdc_events)
491 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
492
493 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
494 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
495 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
496 omap3isp_preview_isr(&isp->isp_prev);
497 }
498
499 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
500 omap3isp_resizer_isr(&isp->isp_res);
501
502 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
503 omap3isp_stat_isr(&isp->isp_aewb);
504
505 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
506 omap3isp_stat_isr(&isp->isp_af);
507
508 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
509 omap3isp_stat_isr(&isp->isp_hist);
510
511 omap3isp_flush(isp);
512
513#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
514 isp_isr_dbg(isp, irqstatus);
515#endif
516
517 return IRQ_HANDLED;
518}
519
520/* -----------------------------------------------------------------------------
521 * Pipeline power management
522 *
523 * Entities must be powered up when part of a pipeline that contains at least
524 * one open video device node.
525 *
526 * To achieve this use the entity use_count field to track the number of users.
527 * For entities corresponding to video device nodes the use_count field stores
528 * the users count of the node. For entities corresponding to subdevs the
529 * use_count field stores the total number of users of all video device nodes
530 * in the pipeline.
531 *
532 * The omap3isp_pipeline_pm_use() function must be called in the open() and
533 * close() handlers of video device nodes. It increments or decrements the use
534 * count of all subdev entities in the pipeline.
535 *
536 * To react to link management on powered pipelines, the link setup notification
537 * callback updates the use count of all entities in the source and sink sides
538 * of the link.
539 */
540
541/*
542 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
543 * @entity: The entity
544 *
545 * Return the total number of users of all video device nodes in the pipeline.
546 */
547static int isp_pipeline_pm_use_count(struct media_entity *entity)
548{
549 struct media_entity_graph graph;
550 int use = 0;
551
552 media_entity_graph_walk_start(&graph, entity);
553
554 while ((entity = media_entity_graph_walk_next(&graph))) {
555 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
556 use += entity->use_count;
557 }
558
559 return use;
560}
561
562/*
563 * isp_pipeline_pm_power_one - Apply power change to an entity
564 * @entity: The entity
565 * @change: Use count change
566 *
567 * Change the entity use count by @change. If the entity is a subdev update its
568 * power state by calling the core::s_power operation when the use count goes
569 * from 0 to != 0 or from != 0 to 0.
570 *
571 * Return 0 on success or a negative error code on failure.
572 */
573static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
574{
575 struct v4l2_subdev *subdev;
576 int ret;
577
578 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
579 ? media_entity_to_v4l2_subdev(entity) : NULL;
580
581 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
582 ret = v4l2_subdev_call(subdev, core, s_power, 1);
583 if (ret < 0 && ret != -ENOIOCTLCMD)
584 return ret;
585 }
586
587 entity->use_count += change;
588 WARN_ON(entity->use_count < 0);
589
590 if (entity->use_count == 0 && change < 0 && subdev != NULL)
591 v4l2_subdev_call(subdev, core, s_power, 0);
592
593 return 0;
594}
595
596/*
597 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
598 * @entity: The entity
599 * @change: Use count change
600 *
601 * Walk the pipeline to update the use count and the power state of all non-node
602 * entities.
603 *
604 * Return 0 on success or a negative error code on failure.
605 */
606static int isp_pipeline_pm_power(struct media_entity *entity, int change)
607{
608 struct media_entity_graph graph;
609 struct media_entity *first = entity;
610 int ret = 0;
611
612 if (!change)
613 return 0;
614
615 media_entity_graph_walk_start(&graph, entity);
616
617 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
618 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
619 ret = isp_pipeline_pm_power_one(entity, change);
620
621 if (!ret)
622 return 0;
623
624 media_entity_graph_walk_start(&graph, first);
625
626 while ((first = media_entity_graph_walk_next(&graph))
627 && first != entity)
628 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
629 isp_pipeline_pm_power_one(first, -change);
630
631 return ret;
632}
633
634/*
635 * omap3isp_pipeline_pm_use - Update the use count of an entity
636 * @entity: The entity
637 * @use: Use (1) or stop using (0) the entity
638 *
639 * Update the use count of all entities in the pipeline and power entities on or
640 * off accordingly.
641 *
642 * Return 0 on success or a negative error code on failure. Powering entities
643 * off is assumed to never fail. No failure can occur when the use parameter is
644 * set to 0.
645 */
646int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
647{
648 int change = use ? 1 : -1;
649 int ret;
650
651 mutex_lock(&entity->parent->graph_mutex);
652
653 /* Apply use count to node. */
654 entity->use_count += change;
655 WARN_ON(entity->use_count < 0);
656
657 /* Apply power change to connected non-nodes. */
658 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 659 if (ret < 0)
660 entity->use_count -= change;
448de7e7
SA		 661
662 mutex_unlock(&entity->parent->graph_mutex);
663
664 return ret;
665}
666
667/*
668 * isp_pipeline_link_notify - Link management notification callback
669 * @source: Pad at the start of the link
670 * @sink: Pad at the end of the link
671 * @flags: New link flags that will be applied
672 *
673 * React to link management on powered pipelines by updating the use count of
674 * all entities in the source and sink sides of the link. Entities are powered
675 * on or off accordingly.
676 *
677 * Return 0 on success or a negative error code on failure. Powering entities
678 * off is assumed to never fail. This function will not fail for disconnection
679 * events.
680 */
681static int isp_pipeline_link_notify(struct media_pad *source,
682 struct media_pad *sink, u32 flags)
683{
684 int source_use = isp_pipeline_pm_use_count(source->entity);
685 int sink_use = isp_pipeline_pm_use_count(sink->entity);
686 int ret;
687
688 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
689 /* Powering off entities is assumed to never fail. */
690 isp_pipeline_pm_power(source->entity, -sink_use);
691 isp_pipeline_pm_power(sink->entity, -source_use);
692 return 0;
693 }
694
695 ret = isp_pipeline_pm_power(source->entity, sink_use);
696 if (ret < 0)
697 return ret;
698
699 ret = isp_pipeline_pm_power(sink->entity, source_use);
700 if (ret < 0)
701 isp_pipeline_pm_power(source->entity, -sink_use);
702
703 return ret;
704}
705
706/* -----------------------------------------------------------------------------
707 * Pipeline stream management
708 */
709
710/*
711 * isp_pipeline_enable - Enable streaming on a pipeline
712 * @pipe: ISP pipeline
713 * @mode: Stream mode (single shot or continuous)
714 *
715 * Walk the entities chain starting at the pipeline output video node and start
716 * all modules in the chain in the given mode.
717 *
25985edc 718 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 719 * operation otherwise.
720 */
721static int isp_pipeline_enable(struct isp_pipeline *pipe,
722 enum isp_pipeline_stream_state mode)
723{
724 struct isp_device *isp = pipe->output->isp;
725 struct media_entity *entity;
726 struct media_pad *pad;
727 struct v4l2_subdev *subdev;
728 unsigned long flags;
c62e2a19 729 int ret;
448de7e7 730
1567bb7d
LP		 731 /* If the preview engine crashed it might not respond to read/write
732 * operations on the L4 bus. This would result in a bus fault and a
733 * kernel oops. Refuse to start streaming in that case. This check must
734 * be performed before the loop below to avoid starting entities if the
735 * pipeline won't start anyway (those entities would then likely fail to
736 * stop, making the problem worse).
737 */
738 if ((pipe->entities & isp->crashed) &
739 (1U << isp->isp_prev.subdev.entity.id))
740 return -EIO;
741
448de7e7
SA		 742 spin_lock_irqsave(&pipe->lock, flags);
743 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
744 spin_unlock_irqrestore(&pipe->lock, flags);
745
746 pipe->do_propagation = false;
747
748 entity = &pipe->output->video.entity;
749 while (1) {
750 pad = &entity->pads[0];
751 if (!(pad->flags & MEDIA_PAD_FL_SINK))
752 break;
753
754 pad = media_entity_remote_source(pad);
755 if (pad == NULL ||
756 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
757 break;
758
759 entity = pad->entity;
760 subdev = media_entity_to_v4l2_subdev(entity);
761
762 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
763 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 764 return ret;
448de7e7
SA		 765
766 if (subdev == &isp->isp_ccdc.subdev) {
767 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
768 s_stream, mode);
769 v4l2_subdev_call(&isp->isp_af.subdev, video,
770 s_stream, mode);
771 v4l2_subdev_call(&isp->isp_hist.subdev, video,
772 s_stream, mode);
773 pipe->do_propagation = true;
774 }
775 }
776
c62e2a19 777 return 0;
448de7e7
SA		 778}
779
780static int isp_pipeline_wait_resizer(struct isp_device *isp)
781{
782 return omap3isp_resizer_busy(&isp->isp_res);
783}
784
785static int isp_pipeline_wait_preview(struct isp_device *isp)
786{
787 return omap3isp_preview_busy(&isp->isp_prev);
788}
789
790static int isp_pipeline_wait_ccdc(struct isp_device *isp)
791{
792 return omap3isp_stat_busy(&isp->isp_af)
793 || omap3isp_stat_busy(&isp->isp_aewb)
794 || omap3isp_stat_busy(&isp->isp_hist)
795 || omap3isp_ccdc_busy(&isp->isp_ccdc);
796}
797
798#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
799
800static int isp_pipeline_wait(struct isp_device *isp,
801 int(*busy)(struct isp_device *isp))
802{
803 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
804
805 while (!time_after(jiffies, timeout)) {
806 if (!busy(isp))
807 return 0;
808 }
809
810 return 1;
811}
812
813/*
814 * isp_pipeline_disable - Disable streaming on a pipeline
815 * @pipe: ISP pipeline
816 *
817 * Walk the entities chain starting at the pipeline output video node and stop
818 * all modules in the chain. Wait synchronously for the modules to be stopped if
819 * necessary.
820 *
821 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
822 * can't be stopped (in which case a software reset of the ISP is probably
823 * necessary).
824 */
825static int isp_pipeline_disable(struct isp_pipeline *pipe)
826{
827 struct isp_device *isp = pipe->output->isp;
828 struct media_entity *entity;
829 struct media_pad *pad;
830 struct v4l2_subdev *subdev;
831 int failure = 0;
832 int ret;
833
834 /*
835 * We need to stop all the modules after CCDC first or they'll
836 * never stop since they may not get a full frame from CCDC.
837 */
838 entity = &pipe->output->video.entity;
839 while (1) {
840 pad = &entity->pads[0];
841 if (!(pad->flags & MEDIA_PAD_FL_SINK))
842 break;
843
844 pad = media_entity_remote_source(pad);
845 if (pad == NULL ||
846 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
847 break;
848
849 entity = pad->entity;
850 subdev = media_entity_to_v4l2_subdev(entity);
851
852 if (subdev == &isp->isp_ccdc.subdev) {
853 v4l2_subdev_call(&isp->isp_aewb.subdev,
854 video, s_stream, 0);
855 v4l2_subdev_call(&isp->isp_af.subdev,
856 video, s_stream, 0);
857 v4l2_subdev_call(&isp->isp_hist.subdev,
858 video, s_stream, 0);
859 }
860
861 v4l2_subdev_call(subdev, video, s_stream, 0);
862
863 if (subdev == &isp->isp_res.subdev)
864 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
865 else if (subdev == &isp->isp_prev.subdev)
866 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
867 else if (subdev == &isp->isp_ccdc.subdev)
868 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
869 else
870 ret = 0;
871
872 if (ret) {
873 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1567bb7d
LP		 874 /* If the entity failed to stopped, assume it has
875 * crashed. Mark it as such, the ISP will be reset when
876 * applications will release it.
877 */
878 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 879 failure = -ETIMEDOUT;
880 }
881 }
882
883 return failure;
884}
885
886/*
887 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
888 * @pipe: ISP pipeline
889 * @state: Stream state (stopped, single shot or continuous)
890 *
891 * Set the pipeline to the given stream state. Pipelines can be started in
892 * single-shot or continuous mode.
893 *
25985edc 894 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 895 * operation otherwise. The pipeline state is not updated when the operation
896 * fails, except when stopping the pipeline.
448de7e7
SA		 897 */
898int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
899 enum isp_pipeline_stream_state state)
900{
901 int ret;
902
903 if (state == ISP_PIPELINE_STREAM_STOPPED)
904 ret = isp_pipeline_disable(pipe);
905 else
906 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 907
908 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
909 pipe->stream_state = state;
448de7e7
SA		 910
911 return ret;
912}
913
914/*
915 * isp_pipeline_resume - Resume streaming on a pipeline
916 * @pipe: ISP pipeline
917 *
918 * Resume video output and input and re-enable pipeline.
919 */
920static void isp_pipeline_resume(struct isp_pipeline *pipe)
921{
922 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
923
924 omap3isp_video_resume(pipe->output, !singleshot);
925 if (singleshot)
926 omap3isp_video_resume(pipe->input, 0);
927 isp_pipeline_enable(pipe, pipe->stream_state);
928}
929
930/*
931 * isp_pipeline_suspend - Suspend streaming on a pipeline
932 * @pipe: ISP pipeline
933 *
934 * Suspend pipeline.
935 */
936static void isp_pipeline_suspend(struct isp_pipeline *pipe)
937{
938 isp_pipeline_disable(pipe);
939}
940
941/*
942 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
943 * video node
944 * @me: ISP module's media entity
945 *
946 * Returns 1 if the entity has an enabled link to the output video node or 0
947 * otherwise. It's true only while pipeline can have no more than one output
948 * node.
949 */
950static int isp_pipeline_is_last(struct media_entity *me)
951{
952 struct isp_pipeline *pipe;
953 struct media_pad *pad;
954
955 if (!me->pipe)
956 return 0;
957 pipe = to_isp_pipeline(me);
958 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
959 return 0;
960 pad = media_entity_remote_source(&pipe->output->pad);
961 return pad->entity == me;
962}
963
964/*
965 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
966 * @me: ISP module's media entity
967 *
968 * Suspend the whole pipeline if module's entity has an enabled link to the
969 * output video node. It works only while pipeline can have no more than one
970 * output node.
971 */
972static void isp_suspend_module_pipeline(struct media_entity *me)
973{
974 if (isp_pipeline_is_last(me))
975 isp_pipeline_suspend(to_isp_pipeline(me));
976}
977
978/*
979 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
980 * @me: ISP module's media entity
981 *
982 * Resume the whole pipeline if module's entity has an enabled link to the
983 * output video node. It works only while pipeline can have no more than one
984 * output node.
985 */
986static void isp_resume_module_pipeline(struct media_entity *me)
987{
988 if (isp_pipeline_is_last(me))
989 isp_pipeline_resume(to_isp_pipeline(me));
990}
991
992/*
993 * isp_suspend_modules - Suspend ISP submodules.
994 * @isp: OMAP3 ISP device
995 *
996 * Returns 0 if suspend left in idle state all the submodules properly,
997 * or returns 1 if a general Reset is required to suspend the submodules.
998 */
999static int isp_suspend_modules(struct isp_device *isp)
1000{
1001 unsigned long timeout;
1002
1003 omap3isp_stat_suspend(&isp->isp_aewb);
1004 omap3isp_stat_suspend(&isp->isp_af);
1005 omap3isp_stat_suspend(&isp->isp_hist);
1006 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1007 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1008 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1009 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1010 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1011
1012 timeout = jiffies + ISP_STOP_TIMEOUT;
1013 while (omap3isp_stat_busy(&isp->isp_af)
1014 || omap3isp_stat_busy(&isp->isp_aewb)
1015 || omap3isp_stat_busy(&isp->isp_hist)
1016 || omap3isp_preview_busy(&isp->isp_prev)
1017 || omap3isp_resizer_busy(&isp->isp_res)
1018 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1019 if (time_after(jiffies, timeout)) {
1020 dev_info(isp->dev, "can't stop modules.\n");
1021 return 1;
1022 }
1023 msleep(1);
1024 }
1025
1026 return 0;
1027}
1028
1029/*
1030 * isp_resume_modules - Resume ISP submodules.
1031 * @isp: OMAP3 ISP device
1032 */
1033static void isp_resume_modules(struct isp_device *isp)
1034{
1035 omap3isp_stat_resume(&isp->isp_aewb);
1036 omap3isp_stat_resume(&isp->isp_af);
1037 omap3isp_stat_resume(&isp->isp_hist);
1038 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1039 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1040 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1041 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1042 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1043}
1044
1045/*
1046 * isp_reset - Reset ISP with a timeout wait for idle.
1047 * @isp: OMAP3 ISP device
1048 */
1049static int isp_reset(struct isp_device *isp)
1050{
1051 unsigned long timeout = 0;
1052
1053 isp_reg_writel(isp,
1054 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1055 | ISP_SYSCONFIG_SOFTRESET,
1056 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1057 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1058 ISP_SYSSTATUS) & 0x1)) {
1059 if (timeout++ > 10000) {
1060 dev_alert(isp->dev, "cannot reset ISP\n");
1061 return -ETIMEDOUT;
1062 }
1063 udelay(1);
1064 }
1065
1567bb7d 1066 isp->crashed = 0;
448de7e7
SA		 1067 return 0;
1068}
1069
1070/*
1071 * isp_save_context - Saves the values of the ISP module registers.
1072 * @isp: OMAP3 ISP device
1073 * @reg_list: Structure containing pairs of register address and value to
1074 * modify on OMAP.
1075 */
1076static void
1077isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1078{
1079 struct isp_reg *next = reg_list;
1080
1081 for (; next->reg != ISP_TOK_TERM; next++)
1082 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1083}
1084
1085/*
1086 * isp_restore_context - Restores the values of the ISP module registers.
1087 * @isp: OMAP3 ISP device
1088 * @reg_list: Structure containing pairs of register address and value to
1089 * modify on OMAP.
1090 */
1091static void
1092isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1093{
1094 struct isp_reg *next = reg_list;
1095
1096 for (; next->reg != ISP_TOK_TERM; next++)
1097 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1098}
1099
1100/*
1101 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1102 * @isp: OMAP3 ISP device
1103 *
1104 * Routine for saving the context of each module in the ISP.
1105 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1106 */
1107static void isp_save_ctx(struct isp_device *isp)
1108{
1109 isp_save_context(isp, isp_reg_list);
fabdbca8 1110 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1111}
1112
1113/*
1114 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1115 * @isp: OMAP3 ISP device
1116 *
1117 * Routine for restoring the context of each module in the ISP.
1118 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1119 */
1120static void isp_restore_ctx(struct isp_device *isp)
1121{
1122 isp_restore_context(isp, isp_reg_list);
fabdbca8 1123 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1124 omap3isp_ccdc_restore_context(isp);
1125 omap3isp_preview_restore_context(isp);
1126}
1127
1128/* -----------------------------------------------------------------------------
1129 * SBL resources management
1130 */
1131#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1132 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1133 OMAP3_ISP_SBL_PREVIEW_READ | \
1134 OMAP3_ISP_SBL_RESIZER_READ)
1135#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1136 OMAP3_ISP_SBL_CSI2A_WRITE | \
1137 OMAP3_ISP_SBL_CSI2C_WRITE | \
1138 OMAP3_ISP_SBL_CCDC_WRITE | \
1139 OMAP3_ISP_SBL_PREVIEW_WRITE)
1140
1141void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1142{
1143 u32 sbl = 0;
1144
1145 isp->sbl_resources |= res;
1146
1147 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1148 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1149
1150 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1151 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1152
1153 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1154 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1155
1156 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1157 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1158
1159 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1160 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1161
1162 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1163 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1164
1165 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1166}
1167
1168void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1169{
1170 u32 sbl = 0;
1171
1172 isp->sbl_resources &= ~res;
1173
1174 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1175 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1176
1177 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1178 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1179
1180 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1181 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1182
1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1184 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1185
1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1187 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1188
1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1190 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1191
1192 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1193}
1194
1195/*
1196 * isp_module_sync_idle - Helper to sync module with its idle state
1197 * @me: ISP submodule's media entity
1198 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1199 * @stopping: flag which tells module wants to stop
1200 *
1201 * This function checks if ISP submodule needs to wait for next interrupt. If
1202 * yes, makes the caller to sleep while waiting for such event.
1203 */
1204int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1205 atomic_t *stopping)
1206{
1207 struct isp_pipeline *pipe = to_isp_pipeline(me);
1208
1209 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1210 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1211 !isp_pipeline_ready(pipe)))
1212 return 0;
1213
1214 /*
1215 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1216 * scenario. We'll call it here to avoid race conditions.
1217 */
1218 atomic_set(stopping, 1);
1219 smp_mb();
1220
1221 /*
1222 * If module is the last one, it's writing to memory. In this case,
1223 * it's necessary to check if the module is already paused due to
1224 * DMA queue underrun or if it has to wait for next interrupt to be
1225 * idle.
1226 * If it isn't the last one, the function won't sleep but *stopping
1227 * will still be set to warn next submodule caller's interrupt the
1228 * module wants to be idle.
1229 */
1230 if (isp_pipeline_is_last(me)) {
1231 struct isp_video *video = pipe->output;
1232 unsigned long flags;
1233 spin_lock_irqsave(&video->queue->irqlock, flags);
1234 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1235 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1236 atomic_set(stopping, 0);
1237 smp_mb();
1238 return 0;
1239 }
1240 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1241 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1242 msecs_to_jiffies(1000))) {
1243 atomic_set(stopping, 0);
1244 smp_mb();
1245 return -ETIMEDOUT;
1246 }
1247 }
1248
1249 return 0;
1250}
1251
1252/*
1253 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1254 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1255 * @stopping: flag which tells module wants to stop
1256 *
1257 * This function checks if ISP submodule was stopping. In case of yes, it
1258 * notices the caller by setting stopping to 0 and waking up the wait queue.
1259 * Returns 1 if it was stopping or 0 otherwise.
1260 */
1261int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1262 atomic_t *stopping)
1263{
1264 if (atomic_cmpxchg(stopping, 1, 0)) {
1265 wake_up(wait);
1266 return 1;
1267 }
1268
1269 return 0;
1270}
1271
1272/* --------------------------------------------------------------------------
1273 * Clock management
1274 */
1275
1276#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1277 ISPCTRL_HIST_CLK_EN | \
1278 ISPCTRL_RSZ_CLK_EN | \
1279 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1280 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1281
1282static void __isp_subclk_update(struct isp_device *isp)
1283{
1284 u32 clk = 0;
1285
1286 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1287 clk |= ISPCTRL_H3A_CLK_EN;
1288
1289 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1290 clk |= ISPCTRL_HIST_CLK_EN;
1291
1292 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1293 clk |= ISPCTRL_RSZ_CLK_EN;
1294
1295 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1296 * RAM as well.
448de7e7
SA		 1297 */
1298 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1299 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1300
1301 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1302 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1303
1304 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1305 ISPCTRL_CLKS_MASK, clk);
1306}
1307
1308void omap3isp_subclk_enable(struct isp_device *isp,
1309 enum isp_subclk_resource res)
1310{
1311 isp->subclk_resources |= res;
1312
1313 __isp_subclk_update(isp);
1314}
1315
1316void omap3isp_subclk_disable(struct isp_device *isp,
1317 enum isp_subclk_resource res)
1318{
1319 isp->subclk_resources &= ~res;
1320
1321 __isp_subclk_update(isp);
1322}
1323
1324/*
1325 * isp_enable_clocks - Enable ISP clocks
1326 * @isp: OMAP3 ISP device
1327 *
1328 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1329 */
1330static int isp_enable_clocks(struct isp_device *isp)
1331{
1332 int r;
1333 unsigned long rate;
1334 int divisor;
1335
1336 /*
1337 * cam_mclk clock chain:
1338 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1339 *
1340 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1341 * set to the same value. Hence the rate set for dpll4_m5
1342 * has to be twice of what is set on OMAP3430 to get
1343 * the required value for cam_mclk
1344 */
1345 if (cpu_is_omap3630())
1346 divisor = 1;
1347 else
1348 divisor = 2;
1349
1350 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1351 if (r) {
1352 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1353 goto out_clk_enable_ick;
1354 }
1355 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1356 CM_CAM_MCLK_HZ/divisor);
1357 if (r) {
1358 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1359 goto out_clk_enable_mclk;
1360 }
1361 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1362 if (r) {
1363 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1364 goto out_clk_enable_mclk;
1365 }
1366 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1367 if (rate != CM_CAM_MCLK_HZ)
1368 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1369 " expected : %d\n"
1370 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1371 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1372 if (r) {
1373 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1374 goto out_clk_enable_csi2_fclk;
1375 }
1376 return 0;
1377
1378out_clk_enable_csi2_fclk:
1379 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1380out_clk_enable_mclk:
1381 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1382out_clk_enable_ick:
1383 return r;
1384}
1385
1386/*
1387 * isp_disable_clocks - Disable ISP clocks
1388 * @isp: OMAP3 ISP device
1389 */
1390static void isp_disable_clocks(struct isp_device *isp)
1391{
1392 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1393 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1394 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1395}
1396
1397static const char *isp_clocks[] = {
1398 "cam_ick",
1399 "cam_mclk",
1400 "dpll4_m5_ck",
1401 "csi2_96m_fck",
1402 "l3_ick",
1403};
1404
1405static void isp_put_clocks(struct isp_device *isp)
1406{
1407 unsigned int i;
1408
1409 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1410 if (isp->clock[i]) {
1411 clk_put(isp->clock[i]);
1412 isp->clock[i] = NULL;
1413 }
1414 }
1415}
1416
1417static int isp_get_clocks(struct isp_device *isp)
1418{
1419 struct clk *clk;
1420 unsigned int i;
1421
1422 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1423 clk = clk_get(isp->dev, isp_clocks[i]);
1424 if (IS_ERR(clk)) {
1425 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1426 isp_put_clocks(isp);
1427 return PTR_ERR(clk);
1428 }
1429
1430 isp->clock[i] = clk;
1431 }
1432
1433 return 0;
1434}
1435
1436/*
1437 * omap3isp_get - Acquire the ISP resource.
1438 *
1439 * Initializes the clocks for the first acquire.
1440 *
1441 * Increment the reference count on the ISP. If the first reference is taken,
1442 * enable clocks and power-up all submodules.
1443 *
25985edc 1444 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7
SA		 1445 */
1446struct isp_device *omap3isp_get(struct isp_device *isp)
1447{
1448 struct isp_device *__isp = isp;
1449
1450 if (isp == NULL)
1451 return NULL;
1452
1453 mutex_lock(&isp->isp_mutex);
1454 if (isp->ref_count > 0)
1455 goto out;
1456
1457 if (isp_enable_clocks(isp) < 0) {
1458 __isp = NULL;
1459 goto out;
1460 }
1461
1462 /* We don't want to restore context before saving it! */
1463 if (isp->has_context)
1464 isp_restore_ctx(isp);
1465 else
1466 isp->has_context = 1;
1467
1468 isp_enable_interrupts(isp);
1469
1470out:
1471 if (__isp != NULL)
1472 isp->ref_count++;
1473 mutex_unlock(&isp->isp_mutex);
1474
1475 return __isp;
1476}
1477
1478/*
1479 * omap3isp_put - Release the ISP
1480 *
1481 * Decrement the reference count on the ISP. If the last reference is released,
1482 * power-down all submodules, disable clocks and free temporary buffers.
1483 */
1484void omap3isp_put(struct isp_device *isp)
1485{
1486 if (isp == NULL)
1487 return;
1488
1489 mutex_lock(&isp->isp_mutex);
1490 BUG_ON(isp->ref_count == 0);
1491 if (--isp->ref_count == 0) {
1492 isp_disable_interrupts(isp);
a32f2f90
SA		 1493 if (isp->domain)
1494 isp_save_ctx(isp);
1567bb7d
LP		 1495 /* Reset the ISP if an entity has failed to stop. This is the
1496 * only way to recover from such conditions.
1497 */
1498 if (isp->crashed)
994d5375 1499 isp_reset(isp);
448de7e7
SA		 1500 isp_disable_clocks(isp);
1501 }
1502 mutex_unlock(&isp->isp_mutex);
1503}
1504
1505/* --------------------------------------------------------------------------
1506 * Platform device driver
1507 */
1508
1509/*
1510 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1511 * @isp: OMAP3 ISP device
1512 */
1513#define ISP_PRINT_REGISTER(isp, name)\
1514 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1515 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1516#define SBL_PRINT_REGISTER(isp, name)\
1517 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1518 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1519
1520void omap3isp_print_status(struct isp_device *isp)
1521{
1522 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1523
1524 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1525 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1526 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1527 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1528 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1529 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1530 ISP_PRINT_REGISTER(isp, CTRL);
1531 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1532 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1533 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1534 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1535 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1536 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1537 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1538 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1539
1540 SBL_PRINT_REGISTER(isp, PCR);
1541 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1542
1543 dev_dbg(isp->dev, "--------------------------------------------\n");
1544}
1545
1546#ifdef CONFIG_PM
1547
1548/*
1549 * Power management support.
1550 *
1551 * As the ISP can't properly handle an input video stream interruption on a non
1552 * frame boundary, the ISP pipelines need to be stopped before sensors get
1553 * suspended. However, as suspending the sensors can require a running clock,
1554 * which can be provided by the ISP, the ISP can't be completely suspended
1555 * before the sensor.
1556 *
1557 * To solve this problem power management support is split into prepare/complete
1558 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1559 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1560 * resume(), and the the pipelines are restarted in complete().
1561 *
1562 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1563 * yet.
1564 */
1565static int isp_pm_prepare(struct device *dev)
1566{
1567 struct isp_device *isp = dev_get_drvdata(dev);
1568 int reset;
1569
1570 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1571
1572 if (isp->ref_count == 0)
1573 return 0;
1574
1575 reset = isp_suspend_modules(isp);
1576 isp_disable_interrupts(isp);
1577 isp_save_ctx(isp);
1578 if (reset)
1579 isp_reset(isp);
1580
1581 return 0;
1582}
1583
1584static int isp_pm_suspend(struct device *dev)
1585{
1586 struct isp_device *isp = dev_get_drvdata(dev);
1587
1588 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1589
1590 if (isp->ref_count)
1591 isp_disable_clocks(isp);
1592
1593 return 0;
1594}
1595
1596static int isp_pm_resume(struct device *dev)
1597{
1598 struct isp_device *isp = dev_get_drvdata(dev);
1599
1600 if (isp->ref_count == 0)
1601 return 0;
1602
1603 return isp_enable_clocks(isp);
1604}
1605
1606static void isp_pm_complete(struct device *dev)
1607{
1608 struct isp_device *isp = dev_get_drvdata(dev);
1609
1610 if (isp->ref_count == 0)
1611 return;
1612
1613 isp_restore_ctx(isp);
1614 isp_enable_interrupts(isp);
1615 isp_resume_modules(isp);
1616}
1617
1618#else
1619
1620#define isp_pm_prepare NULL
1621#define isp_pm_suspend NULL
1622#define isp_pm_resume NULL
1623#define isp_pm_complete NULL
1624
1625#endif /* CONFIG_PM */
1626
1627static void isp_unregister_entities(struct isp_device *isp)
1628{
1629 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1630 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1631 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1632 omap3isp_preview_unregister_entities(&isp->isp_prev);
1633 omap3isp_resizer_unregister_entities(&isp->isp_res);
1634 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1635 omap3isp_stat_unregister_entities(&isp->isp_af);
1636 omap3isp_stat_unregister_entities(&isp->isp_hist);
1637
1638 v4l2_device_unregister(&isp->v4l2_dev);
1639 media_device_unregister(&isp->media_dev);
1640}
1641
1642/*
1643 * isp_register_subdev_group - Register a group of subdevices
1644 * @isp: OMAP3 ISP device
1645 * @board_info: I2C subdevs board information array
1646 *
1647 * Register all I2C subdevices in the board_info array. The array must be
1648 * terminated by a NULL entry, and the first entry must be the sensor.
1649 *
1650 * Return a pointer to the sensor media entity if it has been successfully
1651 * registered, or NULL otherwise.
1652 */
1653static struct v4l2_subdev *
1654isp_register_subdev_group(struct isp_device *isp,
1655 struct isp_subdev_i2c_board_info *board_info)
1656{
1657 struct v4l2_subdev *sensor = NULL;
1658 unsigned int first;
1659
1660 if (board_info->board_info == NULL)
1661 return NULL;
1662
1663 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1664 struct v4l2_subdev *subdev;
1665 struct i2c_adapter *adapter;
1666
1667 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1668 if (adapter == NULL) {
1669 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1670 "device %s\n", __func__,
1671 board_info->i2c_adapter_id,
1672 board_info->board_info->type);
1673 continue;
1674 }
1675
1676 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1677 board_info->board_info, NULL);
1678 if (subdev == NULL) {
1679 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1680 __func__, board_info->board_info->type);
1681 continue;
1682 }
1683
1684 if (first)
1685 sensor = subdev;
1686 }
1687
1688 return sensor;
1689}
1690
1691static int isp_register_entities(struct isp_device *isp)
1692{
1693 struct isp_platform_data *pdata = isp->pdata;
1694 struct isp_v4l2_subdevs_group *subdevs;
1695 int ret;
1696
1697 isp->media_dev.dev = isp->dev;
1698 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1699 sizeof(isp->media_dev.model));
083eb078 1700 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1701 isp->media_dev.link_notify = isp_pipeline_link_notify;
1702 ret = media_device_register(&isp->media_dev);
1703 if (ret < 0) {
1704 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1705 __func__, ret);
1706 return ret;
1707 }
1708
1709 isp->v4l2_dev.mdev = &isp->media_dev;
1710 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1711 if (ret < 0) {
1712 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1713 __func__, ret);
1714 goto done;
1715 }
1716
1717 /* Register internal entities */
1718 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1719 if (ret < 0)
1720 goto done;
1721
1722 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1723 if (ret < 0)
1724 goto done;
1725
1726 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1727 if (ret < 0)
1728 goto done;
1729
1730 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1731 &isp->v4l2_dev);
1732 if (ret < 0)
1733 goto done;
1734
1735 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1736 if (ret < 0)
1737 goto done;
1738
1739 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1740 if (ret < 0)
1741 goto done;
1742
1743 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1744 if (ret < 0)
1745 goto done;
1746
1747 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1748 if (ret < 0)
1749 goto done;
1750
1751 /* Register external entities */
ca4186f0 1752 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1753 struct v4l2_subdev *sensor;
1754 struct media_entity *input;
1755 unsigned int flags;
1756 unsigned int pad;
1757
1758 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1759 if (sensor == NULL)
1760 continue;
1761
1762 sensor->host_priv = subdevs;
1763
1764 /* Connect the sensor to the correct interface module. Parallel
1765 * sensors are connected directly to the CCDC, while serial
1766 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1767 * through CSIPHY1 or CSIPHY2.
1768 */
1769 switch (subdevs->interface) {
1770 case ISP_INTERFACE_PARALLEL:
1771 input = &isp->isp_ccdc.subdev.entity;
1772 pad = CCDC_PAD_SINK;
1773 flags = 0;
1774 break;
1775
1776 case ISP_INTERFACE_CSI2A_PHY2:
1777 input = &isp->isp_csi2a.subdev.entity;
1778 pad = CSI2_PAD_SINK;
1779 flags = MEDIA_LNK_FL_IMMUTABLE
1780 | MEDIA_LNK_FL_ENABLED;
1781 break;
1782
1783 case ISP_INTERFACE_CCP2B_PHY1:
1784 case ISP_INTERFACE_CCP2B_PHY2:
1785 input = &isp->isp_ccp2.subdev.entity;
1786 pad = CCP2_PAD_SINK;
1787 flags = 0;
1788 break;
1789
1790 case ISP_INTERFACE_CSI2C_PHY1:
1791 input = &isp->isp_csi2c.subdev.entity;
1792 pad = CSI2_PAD_SINK;
1793 flags = MEDIA_LNK_FL_IMMUTABLE
1794 | MEDIA_LNK_FL_ENABLED;
1795 break;
1796
1797 default:
1798 printk(KERN_ERR "%s: invalid interface type %u\n",
1799 __func__, subdevs->interface);
1800 ret = -EINVAL;
1801 goto done;
1802 }
1803
1804 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1805 flags);
1806 if (ret < 0)
1807 goto done;
1808 }
1809
1810 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1811
1812done:
1813 if (ret < 0)
1814 isp_unregister_entities(isp);
1815
1816 return ret;
1817}
1818
1819static void isp_cleanup_modules(struct isp_device *isp)
1820{
1821 omap3isp_h3a_aewb_cleanup(isp);
1822 omap3isp_h3a_af_cleanup(isp);
1823 omap3isp_hist_cleanup(isp);
1824 omap3isp_resizer_cleanup(isp);
1825 omap3isp_preview_cleanup(isp);
1826 omap3isp_ccdc_cleanup(isp);
1827 omap3isp_ccp2_cleanup(isp);
1828 omap3isp_csi2_cleanup(isp);
1829}
1830
1831static int isp_initialize_modules(struct isp_device *isp)
1832{
1833 int ret;
1834
1835 ret = omap3isp_csiphy_init(isp);
1836 if (ret < 0) {
1837 dev_err(isp->dev, "CSI PHY initialization failed\n");
1838 goto error_csiphy;
1839 }
1840
1841 ret = omap3isp_csi2_init(isp);
1842 if (ret < 0) {
1843 dev_err(isp->dev, "CSI2 initialization failed\n");
1844 goto error_csi2;
1845 }
1846
1847 ret = omap3isp_ccp2_init(isp);
1848 if (ret < 0) {
1849 dev_err(isp->dev, "CCP2 initialization failed\n");
1850 goto error_ccp2;
1851 }
1852
1853 ret = omap3isp_ccdc_init(isp);
1854 if (ret < 0) {
1855 dev_err(isp->dev, "CCDC initialization failed\n");
1856 goto error_ccdc;
1857 }
1858
1859 ret = omap3isp_preview_init(isp);
1860 if (ret < 0) {
1861 dev_err(isp->dev, "Preview initialization failed\n");
1862 goto error_preview;
1863 }
1864
1865 ret = omap3isp_resizer_init(isp);
1866 if (ret < 0) {
1867 dev_err(isp->dev, "Resizer initialization failed\n");
1868 goto error_resizer;
1869 }
1870
1871 ret = omap3isp_hist_init(isp);
1872 if (ret < 0) {
1873 dev_err(isp->dev, "Histogram initialization failed\n");
1874 goto error_hist;
1875 }
1876
1877 ret = omap3isp_h3a_aewb_init(isp);
1878 if (ret < 0) {
1879 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1880 goto error_h3a_aewb;
1881 }
1882
1883 ret = omap3isp_h3a_af_init(isp);
1884 if (ret < 0) {
1885 dev_err(isp->dev, "H3A AF initialization failed\n");
1886 goto error_h3a_af;
1887 }
1888
1889 /* Connect the submodules. */
1890 ret = media_entity_create_link(
1891 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1892 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1893 if (ret < 0)
1894 goto error_link;
1895
1896 ret = media_entity_create_link(
1897 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1898 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1899 if (ret < 0)
1900 goto error_link;
1901
1902 ret = media_entity_create_link(
1903 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1904 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1905 if (ret < 0)
1906 goto error_link;
1907
1908 ret = media_entity_create_link(
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1910 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1911 if (ret < 0)
1912 goto error_link;
1913
1914 ret = media_entity_create_link(
1915 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1916 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1917 if (ret < 0)
1918 goto error_link;
1919
1920 ret = media_entity_create_link(
1921 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1922 &isp->isp_aewb.subdev.entity, 0,
1923 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1924 if (ret < 0)
1925 goto error_link;
1926
1927 ret = media_entity_create_link(
1928 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1929 &isp->isp_af.subdev.entity, 0,
1930 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1931 if (ret < 0)
1932 goto error_link;
1933
1934 ret = media_entity_create_link(
1935 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1936 &isp->isp_hist.subdev.entity, 0,
1937 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1938 if (ret < 0)
1939 goto error_link;
1940
1941 return 0;
1942
1943error_link:
1944 omap3isp_h3a_af_cleanup(isp);
1945error_h3a_af:
1946 omap3isp_h3a_aewb_cleanup(isp);
1947error_h3a_aewb:
1948 omap3isp_hist_cleanup(isp);
1949error_hist:
1950 omap3isp_resizer_cleanup(isp);
1951error_resizer:
1952 omap3isp_preview_cleanup(isp);
1953error_preview:
1954 omap3isp_ccdc_cleanup(isp);
1955error_ccdc:
1956 omap3isp_ccp2_cleanup(isp);
1957error_ccp2:
1958 omap3isp_csi2_cleanup(isp);
1959error_csi2:
1960error_csiphy:
1961 return ret;
1962}
1963
1964/*
1965 * isp_remove - Remove ISP platform device
1966 * @pdev: Pointer to ISP platform device
1967 *
1968 * Always returns 0.
1969 */
79c3a07d 1970static int __devexit isp_remove(struct platform_device *pdev)
448de7e7
SA		 1971{
1972 struct isp_device *isp = platform_get_drvdata(pdev);
1973 int i;
1974
1975 isp_unregister_entities(isp);
1976 isp_cleanup_modules(isp);
1977
1978 omap3isp_get(isp);
fabdbca8 1979 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d 1980 iommu_domain_free(isp->domain);
a32f2f90 1981 isp->domain = NULL;
448de7e7
SA		 1982 omap3isp_put(isp);
1983
1984 free_irq(isp->irq_num, isp);
1985 isp_put_clocks(isp);
1986
1987 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1988 if (isp->mmio_base[i]) {
1989 iounmap(isp->mmio_base[i]);
1990 isp->mmio_base[i] = NULL;
1991 }
1992
1993 if (isp->mmio_base_phys[i]) {
1994 release_mem_region(isp->mmio_base_phys[i],
1995 isp->mmio_size[i]);
1996 isp->mmio_base_phys[i] = 0;
1997 }
1998 }
1999
2000 regulator_put(isp->isp_csiphy1.vdd);
2001 regulator_put(isp->isp_csiphy2.vdd);
2002 kfree(isp);
2003
2004 return 0;
2005}
2006
2007static int isp_map_mem_resource(struct platform_device *pdev,
2008 struct isp_device *isp,
2009 enum isp_mem_resources res)
2010{
2011 struct resource *mem;
2012
2013 /* request the mem region for the camera registers */
2014
2015 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2016 if (!mem) {
2017 dev_err(isp->dev, "no mem resource?\n");
2018 return -ENODEV;
2019 }
2020
2021 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2022 dev_err(isp->dev,
2023 "cannot reserve camera register I/O region\n");
2024 return -ENODEV;
2025 }
2026 isp->mmio_base_phys[res] = mem->start;
2027 isp->mmio_size[res] = resource_size(mem);
2028
2029 /* map the region */
2030 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2031 isp->mmio_size[res]);
2032 if (!isp->mmio_base[res]) {
2033 dev_err(isp->dev, "cannot map camera register I/O region\n");
2034 return -ENODEV;
2035 }
2036
2037 return 0;
2038}
2039
2040/*
2041 * isp_probe - Probe ISP platform device
2042 * @pdev: Pointer to ISP platform device
2043 *
2044 * Returns 0 if successful,
2045 * -ENOMEM if no memory available,
2046 * -ENODEV if no platform device resources found
2047 * or no space for remapping registers,
2048 * -EINVAL if couldn't install ISR,
2049 * or clk_get return error value.
2050 */
79c3a07d 2051static int __devinit isp_probe(struct platform_device *pdev)
448de7e7
SA		 2052{
2053 struct isp_platform_data *pdata = pdev->dev.platform_data;
2054 struct isp_device *isp;
2055 int ret;
2056 int i, m;
2057
2058 if (pdata == NULL)
2059 return -EINVAL;
2060
2061 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2062 if (!isp) {
2063 dev_err(&pdev->dev, "could not allocate memory\n");
2064 return -ENOMEM;
2065 }
2066
2067 isp->autoidle = autoidle;
2068 isp->platform_cb.set_xclk = isp_set_xclk;
448de7e7
SA		 2069
2070 mutex_init(&isp->isp_mutex);
2071 spin_lock_init(&isp->stat_lock);
2072
2073 isp->dev = &pdev->dev;
2074 isp->pdata = pdata;
2075 isp->ref_count = 0;
2076
2077 isp->raw_dmamask = DMA_BIT_MASK(32);
2078 isp->dev->dma_mask = &isp->raw_dmamask;
2079 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2080
2081 platform_set_drvdata(pdev, isp);
2082
2083 /* Regulators */
2084 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2085 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2086
2087 /* Clocks */
2088 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2089 if (ret < 0)
2090 goto error;
2091
2092 ret = isp_get_clocks(isp);
2093 if (ret < 0)
2094 goto error;
2095
2096 if (omap3isp_get(isp) == NULL)
2097 goto error;
2098
2099 ret = isp_reset(isp);
2100 if (ret < 0)
2101 goto error_isp;
2102
2103 /* Memory resources */
2104 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2105 dev_info(isp->dev, "Revision %d.%d found\n",
2106 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2107
2108 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2109 if (isp->revision == isp_res_maps[m].isp_rev)
2110 break;
2111
2112 if (m == ARRAY_SIZE(isp_res_maps)) {
2113 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2114 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2115 ret = -ENODEV;
2116 goto error_isp;
2117 }
2118
2119 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2120 if (isp_res_maps[m].map & 1 << i) {
2121 ret = isp_map_mem_resource(pdev, isp, i);
2122 if (ret)
2123 goto error_isp;
2124 }
2125 }
2126
905d66c1 2127 isp->domain = iommu_domain_alloc(pdev->dev.bus);
f626b52d
OBC		 2128 if (!isp->domain) {
2129 dev_err(isp->dev, "can't alloc iommu domain\n");
2130 ret = -ENOMEM;
2131 goto error_isp;
2132 }
2133
fabdbca8 2134 ret = iommu_attach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2135 if (ret) {
2136 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2137 goto free_domain;
2138 }
2139
448de7e7
SA		 2140 /* Interrupt */
2141 isp->irq_num = platform_get_irq(pdev, 0);
2142 if (isp->irq_num <= 0) {
2143 dev_err(isp->dev, "No IRQ resource\n");
2144 ret = -ENODEV;
f626b52d 2145 goto detach_dev;
448de7e7
SA		 2146 }
2147
2148 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2149 dev_err(isp->dev, "Unable to request IRQ\n");
2150 ret = -EINVAL;
f626b52d 2151 goto detach_dev;
448de7e7
SA		 2152 }
2153
2154 /* Entities */
2155 ret = isp_initialize_modules(isp);
2156 if (ret < 0)
2157 goto error_irq;
2158
2159 ret = isp_register_entities(isp);
2160 if (ret < 0)
2161 goto error_modules;
2162
2163 isp_power_settings(isp, 1);
2164 omap3isp_put(isp);
2165
2166 return 0;
2167
2168error_modules:
2169 isp_cleanup_modules(isp);
2170error_irq:
2171 free_irq(isp->irq_num, isp);
f626b52d 2172detach_dev:
fabdbca8 2173 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2174free_domain:
2175 iommu_domain_free(isp->domain);
448de7e7 2176error_isp:
448de7e7
SA		 2177 omap3isp_put(isp);
2178error:
2179 isp_put_clocks(isp);
2180
2181 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2182 if (isp->mmio_base[i]) {
2183 iounmap(isp->mmio_base[i]);
2184 isp->mmio_base[i] = NULL;
2185 }
2186
2187 if (isp->mmio_base_phys[i]) {
2188 release_mem_region(isp->mmio_base_phys[i],
2189 isp->mmio_size[i]);
2190 isp->mmio_base_phys[i] = 0;
2191 }
2192 }
2193 regulator_put(isp->isp_csiphy2.vdd);
2194 regulator_put(isp->isp_csiphy1.vdd);
2195 platform_set_drvdata(pdev, NULL);
ed33ac8e
LP		 2196
2197 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2198 kfree(isp);
2199
2200 return ret;
2201}
2202
2203static const struct dev_pm_ops omap3isp_pm_ops = {
2204 .prepare = isp_pm_prepare,
2205 .suspend = isp_pm_suspend,
2206 .resume = isp_pm_resume,
2207 .complete = isp_pm_complete,
2208};
2209
2210static struct platform_device_id omap3isp_id_table[] = {
2211 { "omap3isp", 0 },
2212 { },
2213};
2214MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2215
2216static struct platform_driver omap3isp_driver = {
2217 .probe = isp_probe,
79c3a07d 2218 .remove = __devexit_p(isp_remove),
448de7e7
SA		 2219 .id_table = omap3isp_id_table,
2220 .driver = {
2221 .owner = THIS_MODULE,
2222 .name = "omap3isp",
2223 .pm = &omap3isp_pm_ops,
2224 },
2225};
2226
1d6629b1 2227module_platform_driver(omap3isp_driver);
448de7e7
SA		 2228
2229MODULE_AUTHOR("Nokia Corporation");
2230MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2231MODULE_LICENSE("GPL");
64dc3c1a 2232MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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