projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[media] V4L: soc-camera: make (almost) all client drivers re-usable outside of the...
[deliverable/linux.git] / drivers / media / video / rj54n1cb0c.c
CommitLineData
8f37cf25 1/*
0172fea3 2 * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
8f37cf25
GL		 3 *
4 * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/i2c.h>
13#include <linux/slab.h>
14#include <linux/videodev2.h>
15
a6b5f200 16#include <media/rj54n1cb0c.h>
8f37cf25 17#include <media/soc_camera.h>
760697be 18#include <media/soc_mediabus.h>
a6b5f200
GL		 19#include <media/v4l2-subdev.h>
20#include <media/v4l2-chip-ident.h>
25e965ad 21#include <media/v4l2-ctrls.h>
8f37cf25
GL		 22
23#define RJ54N1_DEV_CODE 0x0400
24#define RJ54N1_DEV_CODE2 0x0401
25#define RJ54N1_OUT_SEL 0x0403
26#define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
27#define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
28#define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
29#define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
30#define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
31#define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
32#define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
33#define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
34#define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
35#define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
36#define RJ54N1_RESIZE_N 0x040e
37#define RJ54N1_RESIZE_N_STEP 0x040f
38#define RJ54N1_RESIZE_STEP 0x0410
39#define RJ54N1_RESIZE_HOLD_H 0x0411
40#define RJ54N1_RESIZE_HOLD_L 0x0412
41#define RJ54N1_H_OBEN_OFS 0x0413
42#define RJ54N1_V_OBEN_OFS 0x0414
43#define RJ54N1_RESIZE_CONTROL 0x0415
a6b5f200 44#define RJ54N1_STILL_CONTROL 0x0417
8f37cf25
GL		 45#define RJ54N1_INC_USE_SEL_H 0x0425
46#define RJ54N1_INC_USE_SEL_L 0x0426
47#define RJ54N1_MIRROR_STILL_MODE 0x0427
48#define RJ54N1_INIT_START 0x0428
49#define RJ54N1_SCALE_1_2_LEV 0x0429
50#define RJ54N1_SCALE_4_LEV 0x042a
51#define RJ54N1_Y_GAIN 0x04d8
52#define RJ54N1_APT_GAIN_UP 0x04fa
53#define RJ54N1_RA_SEL_UL 0x0530
54#define RJ54N1_BYTE_SWAP 0x0531
55#define RJ54N1_OUT_SIGPO 0x053b
a6b5f200
GL		 56#define RJ54N1_WB_SEL_WEIGHT_I 0x054e
57#define RJ54N1_BIT8_WB 0x0569
58#define RJ54N1_HCAPS_WB 0x056a
59#define RJ54N1_VCAPS_WB 0x056b
60#define RJ54N1_HCAPE_WB 0x056c
61#define RJ54N1_VCAPE_WB 0x056d
62#define RJ54N1_EXPOSURE_CONTROL 0x058c
8f37cf25
GL		 63#define RJ54N1_FRAME_LENGTH_S_H 0x0595
64#define RJ54N1_FRAME_LENGTH_S_L 0x0596
65#define RJ54N1_FRAME_LENGTH_P_H 0x0597
66#define RJ54N1_FRAME_LENGTH_P_L 0x0598
a6b5f200
GL		 67#define RJ54N1_PEAK_H 0x05b7
68#define RJ54N1_PEAK_50 0x05b8
69#define RJ54N1_PEAK_60 0x05b9
70#define RJ54N1_PEAK_DIFF 0x05ba
8f37cf25
GL		 71#define RJ54N1_IOC 0x05ef
72#define RJ54N1_TG_BYPASS 0x0700
73#define RJ54N1_PLL_L 0x0701
74#define RJ54N1_PLL_N 0x0702
75#define RJ54N1_PLL_EN 0x0704
76#define RJ54N1_RATIO_TG 0x0706
77#define RJ54N1_RATIO_T 0x0707
78#define RJ54N1_RATIO_R 0x0708
79#define RJ54N1_RAMP_TGCLK_EN 0x0709
80#define RJ54N1_OCLK_DSP 0x0710
81#define RJ54N1_RATIO_OP 0x0711
82#define RJ54N1_RATIO_O 0x0712
83#define RJ54N1_OCLK_SEL_EN 0x0713
84#define RJ54N1_CLK_RST 0x0717
85#define RJ54N1_RESET_STANDBY 0x0718
a6b5f200 86#define RJ54N1_FWFLG 0x07fe
8f37cf25
GL		 87
88#define E_EXCLK (1 << 7)
89#define SOFT_STDBY (1 << 4)
90#define SEN_RSTX (1 << 2)
91#define TG_RSTX (1 << 1)
92#define DSP_RSTX (1 << 0)
93
94#define RESIZE_HOLD_SEL (1 << 2)
95#define RESIZE_GO (1 << 1)
96
a6b5f200
GL		 97/*
98 * When cropping, the camera automatically centers the cropped region, there
99 * doesn't seem to be a way to specify an explicit location of the rectangle.
100 */
8f37cf25
GL		 101#define RJ54N1_COLUMN_SKIP 0
102#define RJ54N1_ROW_SKIP 0
103#define RJ54N1_MAX_WIDTH 1600
104#define RJ54N1_MAX_HEIGHT 1200
105
a6b5f200
GL		 106#define PLL_L 2
107#define PLL_N 0x31
108
8f37cf25
GL		 109/* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
110
760697be
GL		 111/* RJ54N1CB0C has only one fixed colorspace per pixelcode */
112struct rj54n1_datafmt {
113 enum v4l2_mbus_pixelcode code;
114 enum v4l2_colorspace colorspace;
115};
116
117/* Find a data format by a pixel code in an array */
118static const struct rj54n1_datafmt *rj54n1_find_datafmt(
119 enum v4l2_mbus_pixelcode code, const struct rj54n1_datafmt *fmt,
120 int n)
121{
122 int i;
123 for (i = 0; i < n; i++)
124 if (fmt[i].code == code)
125 return fmt + i;
126
127 return NULL;
128}
129
130static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
ace6e979
GL		 131 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
132 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
760697be
GL		 133 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
134 {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
135 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
136 {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
137 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
138 {V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
139 {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
8f37cf25
GL		 140};
141
142struct rj54n1_clock_div {
a6b5f200 143 u8 ratio_tg; /* can be 0 or an odd number */
8f37cf25
GL		 144 u8 ratio_t;
145 u8 ratio_r;
146 u8 ratio_op;
147 u8 ratio_o;
148};
149
150struct rj54n1 {
151 struct v4l2_subdev subdev;
25e965ad 152 struct v4l2_ctrl_handler hdl;
a6b5f200 153 struct rj54n1_clock_div clk_div;
760697be 154 const struct rj54n1_datafmt *fmt;
8f37cf25 155 struct v4l2_rect rect; /* Sensor window */
a6b5f200
GL		 156 unsigned int tgclk_mhz;
157 bool auto_wb;
8f37cf25
GL		 158 unsigned short width; /* Output window */
159 unsigned short height;
160 unsigned short resize; /* Sensor * 1024 / resize = Output */
8f37cf25
GL		 161 unsigned short scale;
162 u8 bank;
163};
164
165struct rj54n1_reg_val {
166 u16 reg;
167 u8 val;
168};
169
9d68e8de 170static const struct rj54n1_reg_val bank_4[] = {
8f37cf25
GL		 171 {0x417, 0},
172 {0x42c, 0},
173 {0x42d, 0xf0},
174 {0x42e, 0},
175 {0x42f, 0x50},
176 {0x430, 0xf5},
177 {0x431, 0x16},
178 {0x432, 0x20},
179 {0x433, 0},
180 {0x434, 0xc8},
181 {0x43c, 8},
182 {0x43e, 0x90},
183 {0x445, 0x83},
184 {0x4ba, 0x58},
185 {0x4bb, 4},
186 {0x4bc, 0x20},
187 {0x4db, 4},
188 {0x4fe, 2},
189};
190
9d68e8de 191static const struct rj54n1_reg_val bank_5[] = {
8f37cf25
GL		 192 {0x514, 0},
193 {0x516, 0},
194 {0x518, 0},
195 {0x51a, 0},
196 {0x51d, 0xff},
197 {0x56f, 0x28},
198 {0x575, 0x40},
199 {0x5bc, 0x48},
200 {0x5c1, 6},
201 {0x5e5, 0x11},
202 {0x5e6, 0x43},
203 {0x5e7, 0x33},
204 {0x5e8, 0x21},
205 {0x5e9, 0x30},
206 {0x5ea, 0x0},
207 {0x5eb, 0xa5},
208 {0x5ec, 0xff},
209 {0x5fe, 2},
210};
211
9d68e8de 212static const struct rj54n1_reg_val bank_7[] = {
8f37cf25
GL		 213 {0x70a, 0},
214 {0x714, 0xff},
215 {0x715, 0xff},
216 {0x716, 0x1f},
a6b5f200 217 {0x7FE, 2},
8f37cf25
GL		 218};
219
9d68e8de 220static const struct rj54n1_reg_val bank_8[] = {
8f37cf25
GL		 221 {0x800, 0x00},
222 {0x801, 0x01},
223 {0x802, 0x61},
224 {0x805, 0x00},
225 {0x806, 0x00},
226 {0x807, 0x00},
227 {0x808, 0x00},
228 {0x809, 0x01},
229 {0x80A, 0x61},
230 {0x80B, 0x00},
231 {0x80C, 0x01},
232 {0x80D, 0x00},
233 {0x80E, 0x00},
234 {0x80F, 0x00},
235 {0x810, 0x00},
236 {0x811, 0x01},
237 {0x812, 0x61},
238 {0x813, 0x00},
239 {0x814, 0x11},
240 {0x815, 0x00},
241 {0x816, 0x41},
242 {0x817, 0x00},
243 {0x818, 0x51},
244 {0x819, 0x01},
245 {0x81A, 0x1F},
246 {0x81B, 0x00},
247 {0x81C, 0x01},
248 {0x81D, 0x00},
249 {0x81E, 0x11},
250 {0x81F, 0x00},
251 {0x820, 0x41},
252 {0x821, 0x00},
253 {0x822, 0x51},
254 {0x823, 0x00},
255 {0x824, 0x00},
256 {0x825, 0x00},
257 {0x826, 0x47},
258 {0x827, 0x01},
259 {0x828, 0x4F},
260 {0x829, 0x00},
261 {0x82A, 0x00},
262 {0x82B, 0x00},
263 {0x82C, 0x30},
264 {0x82D, 0x00},
265 {0x82E, 0x40},
266 {0x82F, 0x00},
267 {0x830, 0xB3},
268 {0x831, 0x00},
269 {0x832, 0xE3},
270 {0x833, 0x00},
271 {0x834, 0x00},
272 {0x835, 0x00},
273 {0x836, 0x00},
274 {0x837, 0x00},
275 {0x838, 0x00},
276 {0x839, 0x01},
277 {0x83A, 0x61},
278 {0x83B, 0x00},
279 {0x83C, 0x01},
280 {0x83D, 0x00},
281 {0x83E, 0x00},
282 {0x83F, 0x00},
283 {0x840, 0x00},
284 {0x841, 0x01},
285 {0x842, 0x61},
286 {0x843, 0x00},
287 {0x844, 0x1D},
288 {0x845, 0x00},
289 {0x846, 0x00},
290 {0x847, 0x00},
291 {0x848, 0x00},
292 {0x849, 0x01},
293 {0x84A, 0x1F},
294 {0x84B, 0x00},
295 {0x84C, 0x05},
296 {0x84D, 0x00},
297 {0x84E, 0x19},
298 {0x84F, 0x01},
299 {0x850, 0x21},
300 {0x851, 0x01},
301 {0x852, 0x5D},
302 {0x853, 0x00},
303 {0x854, 0x00},
304 {0x855, 0x00},
305 {0x856, 0x19},
306 {0x857, 0x01},
307 {0x858, 0x21},
308 {0x859, 0x00},
309 {0x85A, 0x00},
310 {0x85B, 0x00},
311 {0x85C, 0x00},
312 {0x85D, 0x00},
313 {0x85E, 0x00},
314 {0x85F, 0x00},
315 {0x860, 0xB3},
316 {0x861, 0x00},
317 {0x862, 0xE3},
318 {0x863, 0x00},
319 {0x864, 0x00},
320 {0x865, 0x00},
321 {0x866, 0x00},
322 {0x867, 0x00},
323 {0x868, 0x00},
324 {0x869, 0xE2},
325 {0x86A, 0x00},
326 {0x86B, 0x01},
327 {0x86C, 0x06},
328 {0x86D, 0x00},
329 {0x86E, 0x00},
330 {0x86F, 0x00},
331 {0x870, 0x60},
332 {0x871, 0x8C},
333 {0x872, 0x10},
334 {0x873, 0x00},
335 {0x874, 0xE0},
336 {0x875, 0x00},
337 {0x876, 0x27},
338 {0x877, 0x01},
339 {0x878, 0x00},
340 {0x879, 0x00},
341 {0x87A, 0x00},
342 {0x87B, 0x03},
343 {0x87C, 0x00},
344 {0x87D, 0x00},
345 {0x87E, 0x00},
346 {0x87F, 0x00},
347 {0x880, 0x00},
348 {0x881, 0x00},
349 {0x882, 0x00},
350 {0x883, 0x00},
351 {0x884, 0x00},
352 {0x885, 0x00},
353 {0x886, 0xF8},
354 {0x887, 0x00},
355 {0x888, 0x03},
356 {0x889, 0x00},
357 {0x88A, 0x64},
358 {0x88B, 0x00},
359 {0x88C, 0x03},
360 {0x88D, 0x00},
361 {0x88E, 0xB1},
362 {0x88F, 0x00},
363 {0x890, 0x03},
364 {0x891, 0x01},
365 {0x892, 0x1D},
366 {0x893, 0x00},
367 {0x894, 0x03},
368 {0x895, 0x01},
369 {0x896, 0x4B},
370 {0x897, 0x00},
371 {0x898, 0xE5},
372 {0x899, 0x00},
373 {0x89A, 0x01},
374 {0x89B, 0x00},
375 {0x89C, 0x01},
376 {0x89D, 0x04},
377 {0x89E, 0xC8},
378 {0x89F, 0x00},
379 {0x8A0, 0x01},
380 {0x8A1, 0x01},
381 {0x8A2, 0x61},
382 {0x8A3, 0x00},
383 {0x8A4, 0x01},
384 {0x8A5, 0x00},
385 {0x8A6, 0x00},
386 {0x8A7, 0x00},
387 {0x8A8, 0x00},
388 {0x8A9, 0x00},
389 {0x8AA, 0x7F},
390 {0x8AB, 0x03},
391 {0x8AC, 0x00},
392 {0x8AD, 0x00},
393 {0x8AE, 0x00},
394 {0x8AF, 0x00},
395 {0x8B0, 0x00},
396 {0x8B1, 0x00},
397 {0x8B6, 0x00},
398 {0x8B7, 0x01},
399 {0x8B8, 0x00},
400 {0x8B9, 0x00},
401 {0x8BA, 0x02},
402 {0x8BB, 0x00},
403 {0x8BC, 0xFF},
404 {0x8BD, 0x00},
a6b5f200 405 {0x8FE, 2},
8f37cf25
GL		 406};
407
9d68e8de 408static const struct rj54n1_reg_val bank_10[] = {
8f37cf25
GL		 409 {0x10bf, 0x69}
410};
411
412/* Clock dividers - these are default register values, divider = register + 1 */
9d68e8de 413static const struct rj54n1_clock_div clk_div = {
8f37cf25
GL		 414 .ratio_tg = 3 /* default: 5 */,
415 .ratio_t = 4 /* default: 1 */,
416 .ratio_r = 4 /* default: 0 */,
417 .ratio_op = 1 /* default: 5 */,
418 .ratio_o = 9 /* default: 0 */,
419};
420
421static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
422{
423 return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
424}
425
426static int reg_read(struct i2c_client *client, const u16 reg)
427{
428 struct rj54n1 *rj54n1 = to_rj54n1(client);
429 int ret;
430
431 /* set bank */
432 if (rj54n1->bank != reg >> 8) {
433 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
434 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
435 if (ret < 0)
436 return ret;
437 rj54n1->bank = reg >> 8;
438 }
439 return i2c_smbus_read_byte_data(client, reg & 0xff);
440}
441
442static int reg_write(struct i2c_client *client, const u16 reg,
443 const u8 data)
444{
445 struct rj54n1 *rj54n1 = to_rj54n1(client);
446 int ret;
447
448 /* set bank */
449 if (rj54n1->bank != reg >> 8) {
450 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
451 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
452 if (ret < 0)
453 return ret;
454 rj54n1->bank = reg >> 8;
455 }
456 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
457 return i2c_smbus_write_byte_data(client, reg & 0xff, data);
458}
459
460static int reg_set(struct i2c_client *client, const u16 reg,
461 const u8 data, const u8 mask)
462{
463 int ret;
464
465 ret = reg_read(client, reg);
466 if (ret < 0)
467 return ret;
468 return reg_write(client, reg, (ret & ~mask) | (data & mask));
469}
470
471static int reg_write_multiple(struct i2c_client *client,
472 const struct rj54n1_reg_val *rv, const int n)
473{
474 int i, ret;
475
476 for (i = 0; i < n; i++) {
477 ret = reg_write(client, rv->reg, rv->val);
478 if (ret < 0)
479 return ret;
480 rv++;
481 }
482
483 return 0;
484}
485
3805f201 486static int rj54n1_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
760697be
GL		 487 enum v4l2_mbus_pixelcode *code)
488{
3805f201 489 if (index >= ARRAY_SIZE(rj54n1_colour_fmts))
760697be
GL		 490 return -EINVAL;
491
492 *code = rj54n1_colour_fmts[index].code;
493 return 0;
494}
495
8f37cf25
GL		 496static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
497{
c4ce6d14 498 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200
GL		 499
500 /* Switch between preview and still shot modes */
501 return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
8f37cf25
GL		 502}
503
8f37cf25
GL		 504static int rj54n1_set_rect(struct i2c_client *client,
505 u16 reg_x, u16 reg_y, u16 reg_xy,
506 u32 width, u32 height)
507{
508 int ret;
509
510 ret = reg_write(client, reg_xy,
511 ((width >> 4) & 0x70) |
512 ((height >> 8) & 7));
513
514 if (!ret)
515 ret = reg_write(client, reg_x, width & 0xff);
516 if (!ret)
517 ret = reg_write(client, reg_y, height & 0xff);
518
519 return ret;
520}
521
522/*
523 * Some commands, specifically certain initialisation sequences, require
524 * a commit operation.
525 */
526static int rj54n1_commit(struct i2c_client *client)
527{
528 int ret = reg_write(client, RJ54N1_INIT_START, 1);
529 msleep(10);
530 if (!ret)
531 ret = reg_write(client, RJ54N1_INIT_START, 0);
532 return ret;
533}
534
e26b3144
MN		 535static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
536 s32 *out_w, s32 *out_h);
a6b5f200
GL		 537
538static int rj54n1_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
539{
c4ce6d14 540 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200
GL		 541 struct rj54n1 *rj54n1 = to_rj54n1(client);
542 struct v4l2_rect *rect = &a->c;
e26b3144 543 int dummy = 0, output_w, output_h,
a6b5f200
GL		 544 input_w = rect->width, input_h = rect->height;
545 int ret;
546
547 /* arbitrary minimum width and height, edges unimportant */
548 soc_camera_limit_side(&dummy, &input_w,
549 RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
550
551 soc_camera_limit_side(&dummy, &input_h,
552 RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
553
554 output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
555 output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
556
e26b3144 557 dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
a6b5f200
GL		 558 input_w, input_h, rj54n1->resize, output_w, output_h);
559
560 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
561 if (ret < 0)
562 return ret;
563
564 rj54n1->width = output_w;
565 rj54n1->height = output_h;
566 rj54n1->resize = ret;
567 rj54n1->rect.width = input_w;
568 rj54n1->rect.height = input_h;
569
570 return 0;
571}
572
8f37cf25
GL		 573static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
574{
c4ce6d14 575 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 576 struct rj54n1 *rj54n1 = to_rj54n1(client);
577
578 a->c = rj54n1->rect;
579 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
580
581 return 0;
582}
583
584static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
585{
586 a->bounds.left = RJ54N1_COLUMN_SKIP;
587 a->bounds.top = RJ54N1_ROW_SKIP;
588 a->bounds.width = RJ54N1_MAX_WIDTH;
589 a->bounds.height = RJ54N1_MAX_HEIGHT;
590 a->defrect = a->bounds;
591 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
592 a->pixelaspect.numerator = 1;
593 a->pixelaspect.denominator = 1;
594
595 return 0;
596}
597
760697be
GL		 598static int rj54n1_g_fmt(struct v4l2_subdev *sd,
599 struct v4l2_mbus_framefmt *mf)
8f37cf25 600{
c4ce6d14 601 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25 602 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25 603
760697be
GL		 604 mf->code = rj54n1->fmt->code;
605 mf->colorspace = rj54n1->fmt->colorspace;
606 mf->field = V4L2_FIELD_NONE;
607 mf->width = rj54n1->width;
608 mf->height = rj54n1->height;
8f37cf25
GL		 609
610 return 0;
611}
612
613/*
614 * The actual geometry configuration routine. It scales the input window into
615 * the output one, updates the window sizes and returns an error or the resize
616 * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
617 */
e26b3144
MN		 618static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
619 s32 *out_w, s32 *out_h)
8f37cf25 620{
c4ce6d14 621 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200 622 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25
GL		 623 unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
624 output_w = *out_w, output_h = *out_h;
a6b5f200
GL		 625 u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
626 unsigned int peak, peak_50, peak_60;
8f37cf25
GL		 627 int ret;
628
a6b5f200
GL		 629 /*
630 * We have a problem with crops, where the window is larger than 512x384
631 * and output window is larger than a half of the input one. In this
632 * case we have to either reduce the input window to equal or below
633 * 512x384 or the output window to equal or below 1/2 of the input.
634 */
635 if (output_w > max(512U, input_w / 2)) {
636 if (2 * output_w > RJ54N1_MAX_WIDTH) {
637 input_w = RJ54N1_MAX_WIDTH;
638 output_w = RJ54N1_MAX_WIDTH / 2;
639 } else {
640 input_w = output_w * 2;
641 }
642
643 dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
644 input_w, output_w);
645 }
646
647 if (output_h > max(384U, input_h / 2)) {
648 if (2 * output_h > RJ54N1_MAX_HEIGHT) {
649 input_h = RJ54N1_MAX_HEIGHT;
650 output_h = RJ54N1_MAX_HEIGHT / 2;
651 } else {
652 input_h = output_h * 2;
653 }
654
655 dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
656 input_h, output_h);
657 }
658
659 /* Idea: use the read mode for snapshots, handle separate geometries */
8f37cf25
GL		 660 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
661 RJ54N1_Y_OUTPUT_SIZE_S_L,
662 RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
663 if (!ret)
664 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
665 RJ54N1_Y_OUTPUT_SIZE_P_L,
666 RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
667
668 if (ret < 0)
669 return ret;
670
a6b5f200 671 if (output_w > input_w && output_h > input_h) {
8f37cf25
GL		 672 input_w = output_w;
673 input_h = output_h;
674
675 resize = 1024;
676 } else {
677 unsigned int resize_x, resize_y;
a6b5f200
GL		 678 resize_x = (input_w * 1024 + output_w / 2) / output_w;
679 resize_y = (input_h * 1024 + output_h / 2) / output_h;
680
681 /* We want max(resize_x, resize_y), check if it still fits */
682 if (resize_x > resize_y &&
683 (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
684 resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
685 output_h;
686 else if (resize_y > resize_x &&
687 (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
688 resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
689 output_w;
690 else
691 resize = max(resize_x, resize_y);
8f37cf25
GL		 692
693 /* Prohibited value ranges */
694 switch (resize) {
695 case 2040 ... 2047:
696 resize = 2039;
697 break;
698 case 4080 ... 4095:
699 resize = 4079;
700 break;
701 case 8160 ... 8191:
702 resize = 8159;
703 break;
a6b5f200 704 case 16320 ... 16384:
8f37cf25
GL		 705 resize = 16319;
706 }
8f37cf25
GL		 707 }
708
709 /* Set scaling */
710 ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
711 if (!ret)
712 ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
713
714 if (ret < 0)
715 return ret;
716
717 /*
718 * Configure a skipping bitmask. The sensor will select a skipping value
a6b5f200
GL		 719 * among set bits automatically. This is very unclear in the datasheet
720 * too. I was told, in this register one enables all skipping values,
721 * that are required for a specific resize, and the camera selects
722 * automatically, which ones to use. But it is unclear how to identify,
723 * which cropping values are needed. Secondly, why don't we just set all
724 * bits and let the camera choose? Would it increase processing time and
725 * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
726 * improve the image quality or stability for larger frames (see comment
727 * above), but I didn't check the framerate.
8f37cf25 728 */
e26b3144 729 skip = min(resize / 1024, 15U);
a6b5f200 730
8f37cf25
GL		 731 inc_sel = 1 << skip;
732
733 if (inc_sel <= 2)
734 inc_sel = 0xc;
735 else if (resize & 1023 && skip < 15)
736 inc_sel |= 1 << (skip + 1);
737
738 ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
739 if (!ret)
740 ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
741
a6b5f200
GL		 742 if (!rj54n1->auto_wb) {
743 /* Auto white balance window */
744 wb_left = output_w / 16;
745 wb_right = (3 * output_w / 4 - 3) / 4;
746 wb_top = output_h / 16;
747 wb_bottom = (3 * output_h / 4 - 3) / 4;
748 wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
749 ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
750
751 if (!ret)
752 ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
753 if (!ret)
754 ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
755 if (!ret)
756 ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
757 if (!ret)
758 ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
759 if (!ret)
760 ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
761 }
762
763 /* Antiflicker */
764 peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
765 10000;
766 peak_50 = peak / 6;
767 peak_60 = peak / 5;
768
769 if (!ret)
770 ret = reg_write(client, RJ54N1_PEAK_H,
771 ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
772 if (!ret)
773 ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
774 if (!ret)
775 ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
776 if (!ret)
777 ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
778
8f37cf25
GL		 779 /* Start resizing */
780 if (!ret)
781 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
782 RESIZE_HOLD_SEL | RESIZE_GO | 1);
783
784 if (ret < 0)
785 return ret;
786
8f37cf25
GL		 787 /* Constant taken from manufacturer's example */
788 msleep(230);
789
790 ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
791 if (ret < 0)
792 return ret;
793
a6b5f200
GL		 794 *in_w = (output_w * resize + 512) / 1024;
795 *in_h = (output_h * resize + 512) / 1024;
8f37cf25
GL		 796 *out_w = output_w;
797 *out_h = output_h;
798
e26b3144 799 dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
a6b5f200
GL		 800 *in_w, *in_h, resize, output_w, output_h, skip);
801
8f37cf25
GL		 802 return resize;
803}
804
805static int rj54n1_set_clock(struct i2c_client *client)
806{
807 struct rj54n1 *rj54n1 = to_rj54n1(client);
808 int ret;
809
810 /* Enable external clock */
811 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
a6b5f200 812 /* Leave stand-by. Note: use this when implementing suspend / resume */
8f37cf25
GL		 813 if (!ret)
814 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
815
816 if (!ret)
a6b5f200 817 ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
8f37cf25 818 if (!ret)
a6b5f200 819 ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
8f37cf25
GL		 820
821 /* TGCLK dividers */
822 if (!ret)
823 ret = reg_write(client, RJ54N1_RATIO_TG,
824 rj54n1->clk_div.ratio_tg);
825 if (!ret)
826 ret = reg_write(client, RJ54N1_RATIO_T,
827 rj54n1->clk_div.ratio_t);
828 if (!ret)
829 ret = reg_write(client, RJ54N1_RATIO_R,
830 rj54n1->clk_div.ratio_r);
831
832 /* Enable TGCLK & RAMP */
833 if (!ret)
834 ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
835
836 /* Disable clock output */
837 if (!ret)
838 ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
839
840 /* Set divisors */
841 if (!ret)
842 ret = reg_write(client, RJ54N1_RATIO_OP,
843 rj54n1->clk_div.ratio_op);
844 if (!ret)
845 ret = reg_write(client, RJ54N1_RATIO_O,
846 rj54n1->clk_div.ratio_o);
847
848 /* Enable OCLK */
849 if (!ret)
850 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
851
852 /* Use PLL for Timing Generator, write 2 to reserved bits */
853 if (!ret)
854 ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
855
856 /* Take sensor out of reset */
857 if (!ret)
858 ret = reg_write(client, RJ54N1_RESET_STANDBY,
859 E_EXCLK | SEN_RSTX);
860 /* Enable PLL */
861 if (!ret)
862 ret = reg_write(client, RJ54N1_PLL_EN, 1);
863
864 /* Wait for PLL to stabilise */
865 msleep(10);
866
867 /* Enable clock to frequency divider */
868 if (!ret)
869 ret = reg_write(client, RJ54N1_CLK_RST, 1);
870
871 if (!ret)
872 ret = reg_read(client, RJ54N1_CLK_RST);
873 if (ret != 1) {
874 dev_err(&client->dev,
875 "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
876 return -EIO;
877 }
a6b5f200 878
8f37cf25
GL		 879 /* Start the PLL */
880 ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
881
882 /* Enable OCLK */
883 if (!ret)
884 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
885
886 return ret;
887}
888
889static int rj54n1_reg_init(struct i2c_client *client)
890{
a6b5f200 891 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25
GL		 892 int ret = rj54n1_set_clock(client);
893
894 if (!ret)
895 ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
896 if (!ret)
897 ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
898
899 /* Set binning divisors */
900 if (!ret)
901 ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
902 if (!ret)
903 ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
904
905 /* Switch to fixed resize mode */
906 if (!ret)
907 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
908 RESIZE_HOLD_SEL | 1);
909
910 /* Set gain */
911 if (!ret)
912 ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
913
a6b5f200
GL		 914 /*
915 * Mirror the image back: default is upside down and left-to-right...
916 * Set manual preview / still shot switching
917 */
8f37cf25 918 if (!ret)
a6b5f200 919 ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
8f37cf25
GL		 920
921 if (!ret)
922 ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
a6b5f200
GL		 923
924 /* Auto exposure area */
925 if (!ret)
926 ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
927 /* Check current auto WB config */
8f37cf25 928 if (!ret)
a6b5f200
GL		 929 ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
930 if (ret >= 0) {
931 rj54n1->auto_wb = ret & 0x80;
8f37cf25 932 ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
a6b5f200 933 }
8f37cf25
GL		 934 if (!ret)
935 ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
936
937 if (!ret)
938 ret = reg_write(client, RJ54N1_RESET_STANDBY,
939 E_EXCLK | DSP_RSTX | SEN_RSTX);
940
941 /* Commit init */
942 if (!ret)
943 ret = rj54n1_commit(client);
944
945 /* Take DSP, TG, sensor out of reset */
946 if (!ret)
947 ret = reg_write(client, RJ54N1_RESET_STANDBY,
948 E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
949
a6b5f200 950 /* Start register update? Same register as 0x?FE in many bank_* sets */
8f37cf25 951 if (!ret)
a6b5f200 952 ret = reg_write(client, RJ54N1_FWFLG, 2);
8f37cf25
GL		 953
954 /* Constant taken from manufacturer's example */
955 msleep(700);
956
957 return ret;
958}
959
760697be
GL		 960static int rj54n1_try_fmt(struct v4l2_subdev *sd,
961 struct v4l2_mbus_framefmt *mf)
8f37cf25 962{
c4ce6d14 963 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be
GL		 964 struct rj54n1 *rj54n1 = to_rj54n1(client);
965 const struct rj54n1_datafmt *fmt;
966 int align = mf->code == V4L2_MBUS_FMT_SBGGR10_1X10 ||
967 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE ||
968 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE ||
969 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE ||
970 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE;
971
972 dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
973 __func__, mf->code, mf->width, mf->height);
974
975 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
976 ARRAY_SIZE(rj54n1_colour_fmts));
977 if (!fmt) {
978 fmt = rj54n1->fmt;
979 mf->code = fmt->code;
980 }
8f37cf25 981
760697be
GL		 982 mf->field = V4L2_FIELD_NONE;
983 mf->colorspace = fmt->colorspace;
8f37cf25 984
760697be
GL		 985 v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
986 &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
8f37cf25
GL		 987
988 return 0;
989}
990
760697be
GL		 991static int rj54n1_s_fmt(struct v4l2_subdev *sd,
992 struct v4l2_mbus_framefmt *mf)
8f37cf25 993{
c4ce6d14 994 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25 995 struct rj54n1 *rj54n1 = to_rj54n1(client);
760697be 996 const struct rj54n1_datafmt *fmt;
e26b3144 997 int output_w, output_h, max_w, max_h,
8f37cf25
GL		 998 input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
999 int ret;
1000
1001 /*
1002 * The host driver can call us without .try_fmt(), so, we have to take
1003 * care ourseleves
1004 */
a6b5f200 1005 rj54n1_try_fmt(sd, mf);
8f37cf25
GL		 1006
1007 /*
1008 * Verify if the sensor has just been powered on. TODO: replace this
1009 * with proper PM, when a suitable API is available.
1010 */
a6b5f200 1011 ret = reg_read(client, RJ54N1_RESET_STANDBY);
8f37cf25
GL		 1012 if (ret < 0)
1013 return ret;
1014
1015 if (!(ret & E_EXCLK)) {
1016 ret = rj54n1_reg_init(client);
1017 if (ret < 0)
1018 return ret;
1019 }
1020
a6b5f200
GL		 1021 dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
1022 __func__, mf->code, mf->width, mf->height);
1023
8f37cf25 1024 /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
760697be 1025 switch (mf->code) {
ace6e979 1026 case V4L2_MBUS_FMT_YUYV8_2X8:
8f37cf25
GL		 1027 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1028 if (!ret)
1029 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1030 break;
ace6e979 1031 case V4L2_MBUS_FMT_YVYU8_2X8:
760697be
GL		 1032 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1033 if (!ret)
1034 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1035 break;
1036 case V4L2_MBUS_FMT_RGB565_2X8_LE:
8f37cf25
GL		 1037 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1038 if (!ret)
1039 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1040 break;
760697be
GL		 1041 case V4L2_MBUS_FMT_RGB565_2X8_BE:
1042 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1043 if (!ret)
1044 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1045 break;
1046 case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE:
1047 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1048 if (!ret)
1049 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1050 if (!ret)
1051 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1052 break;
1053 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
1054 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1055 if (!ret)
1056 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1057 if (!ret)
1058 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1059 break;
1060 case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE:
1061 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1062 if (!ret)
1063 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1064 if (!ret)
1065 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1066 break;
1067 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
1068 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1069 if (!ret)
1070 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1071 if (!ret)
1072 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1073 break;
1074 case V4L2_MBUS_FMT_SBGGR10_1X10:
1075 ret = reg_write(client, RJ54N1_OUT_SEL, 5);
1076 break;
8f37cf25
GL		 1077 default:
1078 ret = -EINVAL;
1079 }
1080
760697be
GL		 1081 /* Special case: a raw mode with 10 bits of data per clock tick */
1082 if (!ret)
1083 ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
1084 (mf->code == V4L2_MBUS_FMT_SBGGR10_1X10) << 1, 2);
1085
8f37cf25
GL		 1086 if (ret < 0)
1087 return ret;
1088
760697be
GL		 1089 /* Supported scales 1:1 >= scale > 1:16 */
1090 max_w = mf->width * (16 * 1024 - 1) / 1024;
1091 if (input_w > max_w)
1092 input_w = max_w;
1093 max_h = mf->height * (16 * 1024 - 1) / 1024;
1094 if (input_h > max_h)
1095 input_h = max_h;
8f37cf25 1096
760697be
GL		 1097 output_w = mf->width;
1098 output_h = mf->height;
8f37cf25
GL		 1099
1100 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
1101 if (ret < 0)
1102 return ret;
1103
760697be
GL		 1104 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1105 ARRAY_SIZE(rj54n1_colour_fmts));
1106
1107 rj54n1->fmt = fmt;
8f37cf25
GL		 1108 rj54n1->resize = ret;
1109 rj54n1->rect.width = input_w;
1110 rj54n1->rect.height = input_h;
1111 rj54n1->width = output_w;
1112 rj54n1->height = output_h;
1113
760697be
GL		 1114 mf->width = output_w;
1115 mf->height = output_h;
1116 mf->field = V4L2_FIELD_NONE;
1117 mf->colorspace = fmt->colorspace;
8f37cf25 1118
760697be 1119 return 0;
8f37cf25
GL		 1120}
1121
1122static int rj54n1_g_chip_ident(struct v4l2_subdev *sd,
1123 struct v4l2_dbg_chip_ident *id)
1124{
c4ce6d14 1125 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 1126
1127 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
1128 return -EINVAL;
1129
1130 if (id->match.addr != client->addr)
1131 return -ENODEV;
1132
1133 id->ident = V4L2_IDENT_RJ54N1CB0C;
1134 id->revision = 0;
1135
1136 return 0;
1137}
1138
1139#ifdef CONFIG_VIDEO_ADV_DEBUG
1140static int rj54n1_g_register(struct v4l2_subdev *sd,
1141 struct v4l2_dbg_register *reg)
1142{
c4ce6d14 1143 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 1144
1145 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
1146 reg->reg < 0x400 || reg->reg > 0x1fff)
1147 /* Registers > 0x0800 are only available from Sharp support */
1148 return -EINVAL;
1149
1150 if (reg->match.addr != client->addr)
1151 return -ENODEV;
1152
1153 reg->size = 1;
1154 reg->val = reg_read(client, reg->reg);
1155
1156 if (reg->val > 0xff)
1157 return -EIO;
1158
1159 return 0;
1160}
1161
1162static int rj54n1_s_register(struct v4l2_subdev *sd,
1163 struct v4l2_dbg_register *reg)
1164{
c4ce6d14 1165 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 1166
1167 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
1168 reg->reg < 0x400 || reg->reg > 0x1fff)
1169 /* Registers >= 0x0800 are only available from Sharp support */
1170 return -EINVAL;
1171
1172 if (reg->match.addr != client->addr)
1173 return -ENODEV;
1174
1175 if (reg_write(client, reg->reg, reg->val) < 0)
1176 return -EIO;
1177
1178 return 0;
1179}
1180#endif
1181
25e965ad 1182static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
8f37cf25 1183{
25e965ad
HV		 1184 struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
1185 struct v4l2_subdev *sd = &rj54n1->subdev;
c4ce6d14 1186 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 1187 int data;
1188
1189 switch (ctrl->id) {
1190 case V4L2_CID_VFLIP:
25e965ad 1191 if (ctrl->val)
8f37cf25
GL		 1192 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1193 else
1194 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1195 if (data < 0)
1196 return -EIO;
25e965ad 1197 return 0;
8f37cf25 1198 case V4L2_CID_HFLIP:
25e965ad 1199 if (ctrl->val)
8f37cf25
GL		 1200 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1201 else
1202 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1203 if (data < 0)
1204 return -EIO;
25e965ad 1205 return 0;
8f37cf25 1206 case V4L2_CID_GAIN:
25e965ad 1207 if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
8f37cf25 1208 return -EIO;
25e965ad 1209 return 0;
a6b5f200
GL		 1210 case V4L2_CID_AUTO_WHITE_BALANCE:
1211 /* Auto WB area - whole image */
25e965ad 1212 if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
a6b5f200
GL		 1213 0x80) < 0)
1214 return -EIO;
25e965ad
HV		 1215 rj54n1->auto_wb = ctrl->val;
1216 return 0;
8f37cf25
GL		 1217 }
1218
25e965ad 1219 return -EINVAL;
8f37cf25
GL		 1220}
1221
25e965ad
HV		 1222static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
1223 .s_ctrl = rj54n1_s_ctrl,
1224};
1225
8f37cf25 1226static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
8f37cf25
GL		 1227 .g_chip_ident = rj54n1_g_chip_ident,
1228#ifdef CONFIG_VIDEO_ADV_DEBUG
1229 .g_register = rj54n1_g_register,
1230 .s_register = rj54n1_s_register,
1231#endif
1232};
1233
bc1a1f3a
GL		 1234static int rj54n1_g_mbus_config(struct v4l2_subdev *sd,
1235 struct v4l2_mbus_config *cfg)
1236{
1237 struct i2c_client *client = v4l2_get_subdevdata(sd);
14178aa5 1238 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
bc1a1f3a
GL		 1239
1240 cfg->flags =
1241 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
1242 V4L2_MBUS_MASTER | V4L2_MBUS_DATA_ACTIVE_HIGH |
1243 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1244 cfg->type = V4L2_MBUS_PARALLEL;
1245 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
1246
1247 return 0;
1248}
1249
1250static int rj54n1_s_mbus_config(struct v4l2_subdev *sd,
1251 const struct v4l2_mbus_config *cfg)
1252{
1253 struct i2c_client *client = v4l2_get_subdevdata(sd);
14178aa5 1254 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
bc1a1f3a
GL		 1255
1256 /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
1257 if (soc_camera_apply_board_flags(icl, cfg) &
1258 V4L2_MBUS_PCLK_SAMPLE_RISING)
1259 return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
1260 else
1261 return reg_write(client, RJ54N1_OUT_SIGPO, 0);
1262}
1263
8f37cf25
GL		 1264static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
1265 .s_stream = rj54n1_s_stream,
760697be
GL		 1266 .s_mbus_fmt = rj54n1_s_fmt,
1267 .g_mbus_fmt = rj54n1_g_fmt,
1268 .try_mbus_fmt = rj54n1_try_fmt,
1269 .enum_mbus_fmt = rj54n1_enum_fmt,
8f37cf25 1270 .g_crop = rj54n1_g_crop,
a6b5f200 1271 .s_crop = rj54n1_s_crop,
8f37cf25 1272 .cropcap = rj54n1_cropcap,
bc1a1f3a
GL		 1273 .g_mbus_config = rj54n1_g_mbus_config,
1274 .s_mbus_config = rj54n1_s_mbus_config,
8f37cf25
GL		 1275};
1276
1277static struct v4l2_subdev_ops rj54n1_subdev_ops = {
1278 .core = &rj54n1_subdev_core_ops,
1279 .video = &rj54n1_subdev_video_ops,
1280};
1281
8f37cf25
GL		 1282/*
1283 * Interface active, can use i2c. If it fails, it can indeed mean, that
1284 * this wasn't our capture interface, so, we wait for the right one
1285 */
14178aa5 1286static int rj54n1_video_probe(struct i2c_client *client,
a6b5f200 1287 struct rj54n1_pdata *priv)
8f37cf25
GL		 1288{
1289 int data1, data2;
1290 int ret;
1291
8f37cf25
GL		 1292 /* Read out the chip version register */
1293 data1 = reg_read(client, RJ54N1_DEV_CODE);
1294 data2 = reg_read(client, RJ54N1_DEV_CODE2);
1295
1296 if (data1 != 0x51 || data2 != 0x10) {
1297 ret = -ENODEV;
1298 dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1299 data1, data2);
1300 goto ei2c;
1301 }
1302
a6b5f200
GL		 1303 /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
1304 ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
8f37cf25
GL		 1305 if (ret < 0)
1306 goto ei2c;
1307
1308 dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1309 data1, data2);
1310
1311ei2c:
1312 return ret;
1313}
1314
1315static int rj54n1_probe(struct i2c_client *client,
1316 const struct i2c_device_id *did)
1317{
1318 struct rj54n1 *rj54n1;
14178aa5 1319 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
8f37cf25 1320 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
a6b5f200 1321 struct rj54n1_pdata *rj54n1_priv;
8f37cf25
GL		 1322 int ret;
1323
a6b5f200 1324 if (!icl || !icl->priv) {
8f37cf25
GL		 1325 dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1326 return -EINVAL;
1327 }
1328
a6b5f200
GL		 1329 rj54n1_priv = icl->priv;
1330
8f37cf25
GL		 1331 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1332 dev_warn(&adapter->dev,
1333 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1334 return -EIO;
1335 }
1336
1337 rj54n1 = kzalloc(sizeof(struct rj54n1), GFP_KERNEL);
1338 if (!rj54n1)
1339 return -ENOMEM;
1340
1341 v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
25e965ad
HV		 1342 v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
1343 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1344 V4L2_CID_VFLIP, 0, 1, 1, 0);
1345 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1346 V4L2_CID_HFLIP, 0, 1, 1, 0);
1347 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1348 V4L2_CID_GAIN, 0, 127, 1, 66);
1349 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1350 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1351 rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
1352 if (rj54n1->hdl.error) {
1353 int err = rj54n1->hdl.error;
8f37cf25 1354
25e965ad
HV		 1355 kfree(rj54n1);
1356 return err;
1357 }
8f37cf25
GL		 1358
1359 rj54n1->clk_div = clk_div;
1360 rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
1361 rj54n1->rect.top = RJ54N1_ROW_SKIP;
1362 rj54n1->rect.width = RJ54N1_MAX_WIDTH;
1363 rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
1364 rj54n1->width = RJ54N1_MAX_WIDTH;
1365 rj54n1->height = RJ54N1_MAX_HEIGHT;
760697be 1366 rj54n1->fmt = &rj54n1_colour_fmts[0];
8f37cf25 1367 rj54n1->resize = 1024;
a6b5f200
GL		 1368 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
1369 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
8f37cf25 1370
14178aa5 1371 ret = rj54n1_video_probe(client, rj54n1_priv);
8f37cf25 1372 if (ret < 0) {
25e965ad 1373 v4l2_ctrl_handler_free(&rj54n1->hdl);
8f37cf25
GL		 1374 kfree(rj54n1);
1375 return ret;
1376 }
25e965ad 1377 return v4l2_ctrl_handler_setup(&rj54n1->hdl);
8f37cf25
GL		 1378}
1379
1380static int rj54n1_remove(struct i2c_client *client)
1381{
1382 struct rj54n1 *rj54n1 = to_rj54n1(client);
14178aa5 1383 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
8f37cf25 1384
25e965ad 1385 v4l2_device_unregister_subdev(&rj54n1->subdev);
8f37cf25
GL		 1386 if (icl->free_bus)
1387 icl->free_bus(icl);
25e965ad 1388 v4l2_ctrl_handler_free(&rj54n1->hdl);
8f37cf25
GL		 1389 kfree(rj54n1);
1390
1391 return 0;
1392}
1393
1394static const struct i2c_device_id rj54n1_id[] = {
1395 { "rj54n1cb0c", 0 },
1396 { }
1397};
1398MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1399
1400static struct i2c_driver rj54n1_i2c_driver = {
1401 .driver = {
1402 .name = "rj54n1cb0c",
1403 },
1404 .probe = rj54n1_probe,
1405 .remove = rj54n1_remove,
1406 .id_table = rj54n1_id,
1407};
1408
1409static int __init rj54n1_mod_init(void)
1410{
1411 return i2c_add_driver(&rj54n1_i2c_driver);
1412}
1413
1414static void __exit rj54n1_mod_exit(void)
1415{
1416 i2c_del_driver(&rj54n1_i2c_driver);
1417}
1418
1419module_init(rj54n1_mod_init);
1420module_exit(rj54n1_mod_exit);
1421
1422MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1423MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1424MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
This page took 0.26285 seconds and 5 git commands to generate.