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[media] s5p-fimc: Prevent lock-up in multiple sensor systems
[deliverable/linux.git] / drivers / media / video / s5p-fimc / fimc-lite.c
CommitLineData
4af81310
SN		 1/*
2 * Samsung EXYNOS FIMC-LITE (camera host interface) driver
3*
4 * Copyright (C) 2012 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
12
13#include <linux/bug.h>
14#include <linux/device.h>
15#include <linux/errno.h>
16#include <linux/interrupt.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/module.h>
20#include <linux/types.h>
21#include <linux/platform_device.h>
22#include <linux/pm_runtime.h>
23#include <linux/slab.h>
24#include <linux/videodev2.h>
25
26#include <media/v4l2-device.h>
27#include <media/v4l2-ioctl.h>
28#include <media/v4l2-mem2mem.h>
29#include <media/videobuf2-core.h>
30#include <media/videobuf2-dma-contig.h>
31
32#include "fimc-mdevice.h"
33#include "fimc-core.h"
34#include "fimc-lite-reg.h"
35
36static int debug;
37module_param(debug, int, 0644);
38
39static const struct fimc_fmt fimc_lite_formats[] = {
40 {
41 .name = "YUV 4:2:2 packed, YCbYCr",
42 .fourcc = V4L2_PIX_FMT_YUYV,
43 .depth = { 16 },
44 .color = FIMC_FMT_YCBYCR422,
45 .memplanes = 1,
46 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
47 }, {
48 .name = "YUV 4:2:2 packed, CbYCrY",
49 .fourcc = V4L2_PIX_FMT_UYVY,
50 .depth = { 16 },
51 .color = FIMC_FMT_CBYCRY422,
52 .memplanes = 1,
53 .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
54 }, {
55 .name = "YUV 4:2:2 packed, CrYCbY",
56 .fourcc = V4L2_PIX_FMT_VYUY,
57 .depth = { 16 },
58 .color = FIMC_FMT_CRYCBY422,
59 .memplanes = 1,
60 .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
61 }, {
62 .name = "YUV 4:2:2 packed, YCrYCb",
63 .fourcc = V4L2_PIX_FMT_YVYU,
64 .depth = { 16 },
65 .color = FIMC_FMT_YCRYCB422,
66 .memplanes = 1,
67 .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
68 }, {
69 .name = "RAW8 (GRBG)",
70 .fourcc = V4L2_PIX_FMT_SGRBG8,
71 .depth = { 8 },
72 .color = FIMC_FMT_RAW8,
73 .memplanes = 1,
74 .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
75 }, {
76 .name = "RAW10 (GRBG)",
77 .fourcc = V4L2_PIX_FMT_SGRBG10,
78 .depth = { 10 },
79 .color = FIMC_FMT_RAW10,
80 .memplanes = 1,
81 .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
82 }, {
83 .name = "RAW12 (GRBG)",
84 .fourcc = V4L2_PIX_FMT_SGRBG12,
85 .depth = { 12 },
86 .color = FIMC_FMT_RAW12,
87 .memplanes = 1,
88 .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
89 },
90};
91
92/**
93 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
94 * @pixelformat: fourcc to match, ignored if null
95 * @mbus_code: media bus code to match, ignored if null
96 * @index: index to the fimc_lite_formats array, ignored if negative
97 */
98static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
99 const u32 *mbus_code, int index)
100{
101 const struct fimc_fmt *fmt, *def_fmt = NULL;
102 unsigned int i;
103 int id = 0;
104
105 if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
106 return NULL;
107
108 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
109 fmt = &fimc_lite_formats[i];
110 if (pixelformat && fmt->fourcc == *pixelformat)
111 return fmt;
112 if (mbus_code && fmt->mbus_code == *mbus_code)
113 return fmt;
114 if (index == id)
115 def_fmt = fmt;
116 id++;
117 }
118 return def_fmt;
119}
120
121static int fimc_lite_hw_init(struct fimc_lite *fimc)
122{
123 struct fimc_pipeline *pipeline = &fimc->pipeline;
124 struct fimc_sensor_info *sensor;
125 unsigned long flags;
126
127 if (pipeline->subdevs[IDX_SENSOR] == NULL)
128 return -ENXIO;
129
130 if (fimc->fmt == NULL)
131 return -EINVAL;
132
133 sensor = v4l2_get_subdev_hostdata(pipeline->subdevs[IDX_SENSOR]);
134 spin_lock_irqsave(&fimc->slock, flags);
135
136 flite_hw_set_camera_bus(fimc, sensor->pdata);
137 flite_hw_set_source_format(fimc, &fimc->inp_frame);
138 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
139 flite_hw_set_output_dma(fimc, &fimc->out_frame, true);
140 flite_hw_set_interrupt_mask(fimc);
141 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
142
143 if (debug > 0)
144 flite_hw_dump_regs(fimc, __func__);
145
146 spin_unlock_irqrestore(&fimc->slock, flags);
147 return 0;
148}
149
150/*
151 * Reinitialize the driver so it is ready to start the streaming again.
152 * Set fimc->state to indicate stream off and the hardware shut down state.
153 * If not suspending (@suspend is false), return any buffers to videobuf2.
154 * Otherwise put any owned buffers onto the pending buffers queue, so they
155 * can be re-spun when the device is being resumed. Also perform FIMC
156 * software reset and disable streaming on the whole pipeline if required.
157 */
158static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
159{
160 struct flite_buffer *buf;
161 unsigned long flags;
162 bool streaming;
163
164 spin_lock_irqsave(&fimc->slock, flags);
165 streaming = fimc->state & (1 << ST_SENSOR_STREAM);
166
167 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
168 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
169 if (suspend)
170 fimc->state |= (1 << ST_FLITE_SUSPENDED);
171 else
172 fimc->state &= ~(1 << ST_FLITE_PENDING |
173 1 << ST_FLITE_SUSPENDED);
174
175 /* Release unused buffers */
176 while (!suspend && !list_empty(&fimc->pending_buf_q)) {
177 buf = fimc_lite_pending_queue_pop(fimc);
178 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
179 }
180 /* If suspending put unused buffers onto pending queue */
181 while (!list_empty(&fimc->active_buf_q)) {
182 buf = fimc_lite_active_queue_pop(fimc);
183 if (suspend)
184 fimc_lite_pending_queue_add(fimc, buf);
185 else
186 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
187 }
188
189 spin_unlock_irqrestore(&fimc->slock, flags);
190
191 flite_hw_reset(fimc);
192
193 if (!streaming)
194 return 0;
195
196 return fimc_pipeline_s_stream(&fimc->pipeline, 0);
197}
198
199static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
200{
201 unsigned long flags;
202
203 if (!fimc_lite_active(fimc))
204 return 0;
205
206 spin_lock_irqsave(&fimc->slock, flags);
207 set_bit(ST_FLITE_OFF, &fimc->state);
208 flite_hw_capture_stop(fimc);
209 spin_unlock_irqrestore(&fimc->slock, flags);
210
211 wait_event_timeout(fimc->irq_queue,
212 !test_bit(ST_FLITE_OFF, &fimc->state),
213 (2*HZ/10)); /* 200 ms */
214
215 return fimc_lite_reinit(fimc, suspend);
216}
217
218/* Must be called with fimc.slock spinlock held. */
219static void fimc_lite_config_update(struct fimc_lite *fimc)
220{
221 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
222 flite_hw_set_dma_window(fimc, &fimc->out_frame);
223 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
224 clear_bit(ST_FLITE_CONFIG, &fimc->state);
225}
226
227static irqreturn_t flite_irq_handler(int irq, void *priv)
228{
229 struct fimc_lite *fimc = priv;
230 struct flite_buffer *vbuf;
231 unsigned long flags;
232 struct timeval *tv;
233 struct timespec ts;
234 u32 intsrc;
235
236 spin_lock_irqsave(&fimc->slock, flags);
237
238 intsrc = flite_hw_get_interrupt_source(fimc);
239 flite_hw_clear_pending_irq(fimc);
240
241 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
242 wake_up(&fimc->irq_queue);
243 goto done;
244 }
245
246 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
247 clear_bit(ST_FLITE_RUN, &fimc->state);
248 fimc->events.data_overflow++;
249 }
250
251 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
252 flite_hw_clear_last_capture_end(fimc);
253 clear_bit(ST_FLITE_STREAM, &fimc->state);
254 wake_up(&fimc->irq_queue);
255 }
256
257 if (fimc->out_path != FIMC_IO_DMA)
258 goto done;
259
260 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
261 test_bit(ST_FLITE_RUN, &fimc->state) &&
262 !list_empty(&fimc->active_buf_q) &&
263 !list_empty(&fimc->pending_buf_q)) {
264 vbuf = fimc_lite_active_queue_pop(fimc);
265 ktime_get_ts(&ts);
266 tv = &vbuf->vb.v4l2_buf.timestamp;
267 tv->tv_sec = ts.tv_sec;
268 tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
269 vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
270 vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
271
272 vbuf = fimc_lite_pending_queue_pop(fimc);
273 flite_hw_set_output_addr(fimc, vbuf->paddr);
274 fimc_lite_active_queue_add(fimc, vbuf);
275 }
276
277 if (test_bit(ST_FLITE_CONFIG, &fimc->state))
278 fimc_lite_config_update(fimc);
279
280 if (list_empty(&fimc->pending_buf_q)) {
281 flite_hw_capture_stop(fimc);
282 clear_bit(ST_FLITE_STREAM, &fimc->state);
283 }
284done:
285 set_bit(ST_FLITE_RUN, &fimc->state);
286 spin_unlock_irqrestore(&fimc->slock, flags);
287 return IRQ_HANDLED;
288}
289
290static int start_streaming(struct vb2_queue *q, unsigned int count)
291{
292 struct fimc_lite *fimc = q->drv_priv;
293 int ret;
294
295 fimc->frame_count = 0;
296
297 ret = fimc_lite_hw_init(fimc);
298 if (ret) {
299 fimc_lite_reinit(fimc, false);
300 return ret;
301 }
302
303 set_bit(ST_FLITE_PENDING, &fimc->state);
304
305 if (!list_empty(&fimc->active_buf_q) &&
306 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
307 flite_hw_capture_start(fimc);
308
309 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
310 fimc_pipeline_s_stream(&fimc->pipeline, 1);
311 }
312 if (debug > 0)
313 flite_hw_dump_regs(fimc, __func__);
314
315 return 0;
316}
317
318static int stop_streaming(struct vb2_queue *q)
319{
320 struct fimc_lite *fimc = q->drv_priv;
321
322 if (!fimc_lite_active(fimc))
323 return -EINVAL;
324
325 return fimc_lite_stop_capture(fimc, false);
326}
327
328static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
329 unsigned int *num_buffers, unsigned int *num_planes,
330 unsigned int sizes[], void *allocators[])
331{
332 const struct v4l2_pix_format_mplane *pixm = NULL;
333 struct fimc_lite *fimc = vq->drv_priv;
334 struct flite_frame *frame = &fimc->out_frame;
335 const struct fimc_fmt *fmt = fimc->fmt;
336 unsigned long wh;
337 int i;
338
339 if (pfmt) {
340 pixm = &pfmt->fmt.pix_mp;
341 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
342 wh = pixm->width * pixm->height;
343 } else {
344 wh = frame->f_width * frame->f_height;
345 }
346
347 if (fmt == NULL)
348 return -EINVAL;
349
350 *num_planes = fmt->memplanes;
351
352 for (i = 0; i < fmt->memplanes; i++) {
353 unsigned int size = (wh * fmt->depth[i]) / 8;
354 if (pixm)
355 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
356 else
357 sizes[i] = size;
358 allocators[i] = fimc->alloc_ctx;
359 }
360
361 return 0;
362}
363
364static int buffer_prepare(struct vb2_buffer *vb)
365{
366 struct vb2_queue *vq = vb->vb2_queue;
367 struct fimc_lite *fimc = vq->drv_priv;
368 int i;
369
370 if (fimc->fmt == NULL)
371 return -EINVAL;
372
373 for (i = 0; i < fimc->fmt->memplanes; i++) {
374 unsigned long size = fimc->payload[i];
375
376 if (vb2_plane_size(vb, i) < size) {
377 v4l2_err(fimc->vfd,
378 "User buffer too small (%ld < %ld)\n",
379 vb2_plane_size(vb, i), size);
380 return -EINVAL;
381 }
382 vb2_set_plane_payload(vb, i, size);
383 }
384
385 return 0;
386}
387
388static void buffer_queue(struct vb2_buffer *vb)
389{
390 struct flite_buffer *buf
391 = container_of(vb, struct flite_buffer, vb);
392 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
393 unsigned long flags;
394
395 spin_lock_irqsave(&fimc->slock, flags);
396 buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
397
398 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
399 !test_bit(ST_FLITE_STREAM, &fimc->state) &&
400 list_empty(&fimc->active_buf_q)) {
401 flite_hw_set_output_addr(fimc, buf->paddr);
402 fimc_lite_active_queue_add(fimc, buf);
403 } else {
404 fimc_lite_pending_queue_add(fimc, buf);
405 }
406
407 if (vb2_is_streaming(&fimc->vb_queue) &&
408 !list_empty(&fimc->pending_buf_q) &&
409 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
410 flite_hw_capture_start(fimc);
411 spin_unlock_irqrestore(&fimc->slock, flags);
412
413 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
414 fimc_pipeline_s_stream(&fimc->pipeline, 1);
415 return;
416 }
417 spin_unlock_irqrestore(&fimc->slock, flags);
418}
419
420static void fimc_lock(struct vb2_queue *vq)
421{
422 struct fimc_lite *fimc = vb2_get_drv_priv(vq);
423 mutex_lock(&fimc->lock);
424}
425
426static void fimc_unlock(struct vb2_queue *vq)
427{
428 struct fimc_lite *fimc = vb2_get_drv_priv(vq);
429 mutex_unlock(&fimc->lock);
430}
431
432static const struct vb2_ops fimc_lite_qops = {
433 .queue_setup = queue_setup,
434 .buf_prepare = buffer_prepare,
435 .buf_queue = buffer_queue,
436 .wait_prepare = fimc_unlock,
437 .wait_finish = fimc_lock,
438 .start_streaming = start_streaming,
439 .stop_streaming = stop_streaming,
440};
441
442static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
443{
444 unsigned long flags;
445
446 spin_lock_irqsave(&fimc->slock, flags);
447 memset(&fimc->events, 0, sizeof(fimc->events));
448 spin_unlock_irqrestore(&fimc->slock, flags);
449}
450
451static int fimc_lite_open(struct file *file)
452{
453 struct fimc_lite *fimc = video_drvdata(file);
e3fc82e8 454 int ret;
4af81310
SN		 455
456 set_bit(ST_FLITE_IN_USE, &fimc->state);
e3fc82e8
SN		 457 ret = pm_runtime_get_sync(&fimc->pdev->dev);
458 if (ret < 0)
459 return ret;
4af81310
SN		 460
461 if (++fimc->ref_count != 1 || fimc->out_path != FIMC_IO_DMA)
e3fc82e8
SN		 462 return 0;
463
464 ret = v4l2_fh_open(file);
465 if (ret < 0)
4af81310
SN		 466 return ret;
467
468 ret = fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity,
469 true);
470 if (ret < 0) {
4af81310
SN		 471 pm_runtime_put_sync(&fimc->pdev->dev);
472 fimc->ref_count--;
473 v4l2_fh_release(file);
474 clear_bit(ST_FLITE_IN_USE, &fimc->state);
475 }
476
477 fimc_lite_clear_event_counters(fimc);
478 return ret;
479}
480
481static int fimc_lite_close(struct file *file)
482{
483 struct fimc_lite *fimc = video_drvdata(file);
484
485 if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) {
486 clear_bit(ST_FLITE_IN_USE, &fimc->state);
487 fimc_lite_stop_capture(fimc, false);
488 fimc_pipeline_shutdown(&fimc->pipeline);
489 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
490 }
491
492 pm_runtime_put(&fimc->pdev->dev);
493
494 if (fimc->ref_count == 0)
495 vb2_queue_release(&fimc->vb_queue);
496
497 return v4l2_fh_release(file);
498}
499
500static unsigned int fimc_lite_poll(struct file *file,
501 struct poll_table_struct *wait)
502{
503 struct fimc_lite *fimc = video_drvdata(file);
504 return vb2_poll(&fimc->vb_queue, file, wait);
505}
506
507static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)
508{
509 struct fimc_lite *fimc = video_drvdata(file);
510 return vb2_mmap(&fimc->vb_queue, vma);
511}
512
513static const struct v4l2_file_operations fimc_lite_fops = {
514 .owner = THIS_MODULE,
515 .open = fimc_lite_open,
516 .release = fimc_lite_close,
517 .poll = fimc_lite_poll,
518 .unlocked_ioctl = video_ioctl2,
519 .mmap = fimc_lite_mmap,
520};
521
522/*
523 * Format and crop negotiation helpers
524 */
525
526static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
527 u32 *width, u32 *height,
528 u32 *code, u32 *fourcc, int pad)
529{
530 struct flite_variant *variant = fimc->variant;
531 const struct fimc_fmt *fmt;
532
533 fmt = fimc_lite_find_format(fourcc, code, 0);
534 if (WARN_ON(!fmt))
535 return NULL;
536
537 if (code)
538 *code = fmt->mbus_code;
539 if (fourcc)
540 *fourcc = fmt->fourcc;
541
542 if (pad == FLITE_SD_PAD_SINK) {
543 v4l_bound_align_image(width, 8, variant->max_width,
544 ffs(variant->out_width_align) - 1,
545 height, 0, variant->max_height, 0, 0);
546 } else {
547 v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
548 ffs(variant->out_width_align) - 1,
549 height, 0, fimc->inp_frame.rect.height,
550 0, 0);
551 }
552
553 v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
554 code ? *code : 0, *width, *height);
555
556 return fmt;
557}
558
559static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
560{
561 struct flite_frame *frame = &fimc->inp_frame;
562
563 v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
564 &r->height, 0, frame->f_height, 0, 0);
565
566 /* Adjust left/top if cropping rectangle got out of bounds */
567 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
568 r->left = round_down(r->left, fimc->variant->win_hor_offs_align);
569 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
570
571 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",
572 r->left, r->top, r->width, r->height,
573 frame->f_width, frame->f_height);
574}
575
576static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
577{
578 struct flite_frame *frame = &fimc->out_frame;
579 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
580
581 /* Scaling is not supported so we enforce compose rectangle size
582 same as size of the sink crop rectangle. */
583 r->width = crop_rect->width;
584 r->height = crop_rect->height;
585
586 /* Adjust left/top if the composing rectangle got out of bounds */
587 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
588 r->left = round_down(r->left, fimc->variant->out_hor_offs_align);
589 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
590
591 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",
592 r->left, r->top, r->width, r->height,
593 frame->f_width, frame->f_height);
594}
595
596/*
597 * Video node ioctl operations
598 */
599static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
600 struct v4l2_capability *cap)
601{
602 strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
603 cap->bus_info[0] = 0;
604 cap->card[0] = 0;
605 cap->capabilities = V4L2_CAP_STREAMING;
606 return 0;
607}
608
609static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
610 struct v4l2_fmtdesc *f)
611{
612 const struct fimc_fmt *fmt;
613
614 if (f->index >= ARRAY_SIZE(fimc_lite_formats))
615 return -EINVAL;
616
617 fmt = &fimc_lite_formats[f->index];
618 strlcpy(f->description, fmt->name, sizeof(f->description));
619 f->pixelformat = fmt->fourcc;
620
621 return 0;
622}
623
624static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
625 struct v4l2_format *f)
626{
627 struct fimc_lite *fimc = video_drvdata(file);
628 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
629 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
630 struct flite_frame *frame = &fimc->out_frame;
631 const struct fimc_fmt *fmt = fimc->fmt;
632
633 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
634 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
635
636 pixm->num_planes = fmt->memplanes;
637 pixm->pixelformat = fmt->fourcc;
638 pixm->width = frame->f_width;
639 pixm->height = frame->f_height;
640 pixm->field = V4L2_FIELD_NONE;
641 pixm->colorspace = V4L2_COLORSPACE_JPEG;
642 return 0;
643}
644
645static int fimc_lite_try_fmt(struct fimc_lite *fimc,
646 struct v4l2_pix_format_mplane *pixm,
647 const struct fimc_fmt **ffmt)
648{
649 struct flite_variant *variant = fimc->variant;
650 u32 bpl = pixm->plane_fmt[0].bytesperline;
651 const struct fimc_fmt *fmt;
652
653 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
654 if (WARN_ON(fmt == NULL))
655 return -EINVAL;
656 if (ffmt)
657 *ffmt = fmt;
658 v4l_bound_align_image(&pixm->width, 8, variant->max_width,
659 ffs(variant->out_width_align) - 1,
660 &pixm->height, 0, variant->max_height, 0, 0);
661
662 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
663 pixm->plane_fmt[0].bytesperline = (pixm->width *
664 fmt->depth[0]) / 8;
665
666 if (pixm->plane_fmt[0].sizeimage == 0)
667 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
668 fmt->depth[0]) / 8;
669 pixm->num_planes = fmt->memplanes;
670 pixm->pixelformat = fmt->fourcc;
671 pixm->colorspace = V4L2_COLORSPACE_JPEG;
672 pixm->field = V4L2_FIELD_NONE;
673 return 0;
674}
675
676static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
677 struct v4l2_format *f)
678{
679 struct fimc_lite *fimc = video_drvdata(file);
680
681 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
682}
683
684static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
685 struct v4l2_format *f)
686{
687 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
688 struct fimc_lite *fimc = video_drvdata(file);
689 struct flite_frame *frame = &fimc->out_frame;
690 const struct fimc_fmt *fmt = NULL;
691 int ret;
692
693 if (vb2_is_busy(&fimc->vb_queue))
694 return -EBUSY;
695
696 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
697 if (ret < 0)
698 return ret;
699
700 fimc->fmt = fmt;
701 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
702 pixm->plane_fmt[0].sizeimage);
703 frame->f_width = pixm->width;
704 frame->f_height = pixm->height;
705
706 return 0;
707}
708
709static int fimc_pipeline_validate(struct fimc_lite *fimc)
710{
711 struct v4l2_subdev *sd = &fimc->subdev;
712 struct v4l2_subdev_format sink_fmt, src_fmt;
713 struct media_pad *pad;
714 int ret;
715
716 while (1) {
717 /* Retrieve format at the sink pad */
718 pad = &sd->entity.pads[0];
719 if (!(pad->flags & MEDIA_PAD_FL_SINK))
720 break;
721 /* Don't call FIMC subdev operation to avoid nested locking */
722 if (sd == &fimc->subdev) {
723 struct flite_frame *ff = &fimc->out_frame;
724 sink_fmt.format.width = ff->f_width;
725 sink_fmt.format.height = ff->f_height;
726 sink_fmt.format.code = fimc->fmt->mbus_code;
727 } else {
728 sink_fmt.pad = pad->index;
729 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
730 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
731 &sink_fmt);
732 if (ret < 0 && ret != -ENOIOCTLCMD)
733 return -EPIPE;
734 }
735 /* Retrieve format at the source pad */
736 pad = media_entity_remote_source(pad);
737 if (pad == NULL ||
738 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
739 break;
740
741 sd = media_entity_to_v4l2_subdev(pad->entity);
742 src_fmt.pad = pad->index;
743 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
744 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
745 if (ret < 0 && ret != -ENOIOCTLCMD)
746 return -EPIPE;
747
748 if (src_fmt.format.width != sink_fmt.format.width ||
749 src_fmt.format.height != sink_fmt.format.height ||
750 src_fmt.format.code != sink_fmt.format.code)
751 return -EPIPE;
752 }
753 return 0;
754}
755
756static int fimc_lite_streamon(struct file *file, void *priv,
757 enum v4l2_buf_type type)
758{
759 struct fimc_lite *fimc = video_drvdata(file);
760 struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
761 struct fimc_pipeline *p = &fimc->pipeline;
762 int ret;
763
764 if (fimc_lite_active(fimc))
765 return -EBUSY;
766
767 media_entity_pipeline_start(&sensor->entity, p->m_pipeline);
768
769 ret = fimc_pipeline_validate(fimc);
770 if (ret) {
771 media_entity_pipeline_stop(&sensor->entity);
772 return ret;
773 }
774
775 return vb2_streamon(&fimc->vb_queue, type);
776}
777
778static int fimc_lite_streamoff(struct file *file, void *priv,
779 enum v4l2_buf_type type)
780{
781 struct fimc_lite *fimc = video_drvdata(file);
782 struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
783 int ret;
784
785 ret = vb2_streamoff(&fimc->vb_queue, type);
786 if (ret == 0)
787 media_entity_pipeline_stop(&sd->entity);
788 return ret;
789}
790
791static int fimc_lite_reqbufs(struct file *file, void *priv,
792 struct v4l2_requestbuffers *reqbufs)
793{
794 struct fimc_lite *fimc = video_drvdata(file);
795 int ret;
796
797 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
798 ret = vb2_reqbufs(&fimc->vb_queue, reqbufs);
799 if (!ret < 0)
800 fimc->reqbufs_count = reqbufs->count;
801
802 return ret;
803}
804
805static int fimc_lite_querybuf(struct file *file, void *priv,
806 struct v4l2_buffer *buf)
807{
808 struct fimc_lite *fimc = video_drvdata(file);
809
810 return vb2_querybuf(&fimc->vb_queue, buf);
811}
812
813static int fimc_lite_qbuf(struct file *file, void *priv,
814 struct v4l2_buffer *buf)
815{
816 struct fimc_lite *fimc = video_drvdata(file);
817
818 return vb2_qbuf(&fimc->vb_queue, buf);
819}
820
821static int fimc_lite_dqbuf(struct file *file, void *priv,
822 struct v4l2_buffer *buf)
823{
824 struct fimc_lite *fimc = video_drvdata(file);
825
826 return vb2_dqbuf(&fimc->vb_queue, buf, file->f_flags & O_NONBLOCK);
827}
828
829static int fimc_lite_create_bufs(struct file *file, void *priv,
830 struct v4l2_create_buffers *create)
831{
832 struct fimc_lite *fimc = video_drvdata(file);
833
834 return vb2_create_bufs(&fimc->vb_queue, create);
835}
836
837static int fimc_lite_prepare_buf(struct file *file, void *priv,
838 struct v4l2_buffer *b)
839{
840 struct fimc_lite *fimc = video_drvdata(file);
841
842 return vb2_prepare_buf(&fimc->vb_queue, b);
843}
844
845/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
846static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
847{
848 if (a->left < b->left || a->top < b->top)
849 return 0;
850 if (a->left + a->width > b->left + b->width)
851 return 0;
852 if (a->top + a->height > b->top + b->height)
853 return 0;
854
855 return 1;
856}
857
858static int fimc_lite_g_selection(struct file *file, void *fh,
859 struct v4l2_selection *sel)
860{
861 struct fimc_lite *fimc = video_drvdata(file);
862 struct flite_frame *f = &fimc->out_frame;
863
864 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
865 return -EINVAL;
866
867 switch (sel->target) {
868 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
869 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
870 sel->r.left = 0;
871 sel->r.top = 0;
872 sel->r.width = f->f_width;
873 sel->r.height = f->f_height;
874 return 0;
875
876 case V4L2_SEL_TGT_COMPOSE_ACTIVE:
877 sel->r = f->rect;
878 return 0;
879 }
880
881 return -EINVAL;
882}
883
884static int fimc_lite_s_selection(struct file *file, void *fh,
885 struct v4l2_selection *sel)
886{
887 struct fimc_lite *fimc = video_drvdata(file);
888 struct flite_frame *f = &fimc->out_frame;
889 struct v4l2_rect rect = sel->r;
890 unsigned long flags;
891
892 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
893 sel->target != V4L2_SEL_TGT_COMPOSE_ACTIVE)
894 return -EINVAL;
895
896 fimc_lite_try_compose(fimc, &rect);
897
898 if ((sel->flags & V4L2_SEL_FLAG_LE) &&
899 !enclosed_rectangle(&rect, &sel->r))
900 return -ERANGE;
901
902 if ((sel->flags & V4L2_SEL_FLAG_GE) &&
903 !enclosed_rectangle(&sel->r, &rect))
904 return -ERANGE;
905
906 sel->r = rect;
907 spin_lock_irqsave(&fimc->slock, flags);
908 f->rect = rect;
909 set_bit(ST_FLITE_CONFIG, &fimc->state);
910 spin_unlock_irqrestore(&fimc->slock, flags);
911
912 return 0;
913}
914
915static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
916 .vidioc_querycap = fimc_vidioc_querycap_capture,
917 .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
918 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
919 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
920 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
921 .vidioc_g_selection = fimc_lite_g_selection,
922 .vidioc_s_selection = fimc_lite_s_selection,
923 .vidioc_reqbufs = fimc_lite_reqbufs,
924 .vidioc_querybuf = fimc_lite_querybuf,
925 .vidioc_prepare_buf = fimc_lite_prepare_buf,
926 .vidioc_create_bufs = fimc_lite_create_bufs,
927 .vidioc_qbuf = fimc_lite_qbuf,
928 .vidioc_dqbuf = fimc_lite_dqbuf,
929 .vidioc_streamon = fimc_lite_streamon,
930 .vidioc_streamoff = fimc_lite_streamoff,
931};
932
933/* Capture subdev media entity operations */
934static int fimc_lite_link_setup(struct media_entity *entity,
935 const struct media_pad *local,
936 const struct media_pad *remote, u32 flags)
937{
938 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
939 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
940 unsigned int remote_ent_type = media_entity_type(remote->entity);
941
942 if (WARN_ON(fimc == NULL))
943 return 0;
944
945 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x",
946 __func__, local->entity->name, remote->entity->name,
947 flags, fimc->source_subdev_grp_id);
948
949 switch (local->index) {
950 case FIMC_SD_PAD_SINK:
951 if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)
952 return -EINVAL;
953
954 if (flags & MEDIA_LNK_FL_ENABLED) {
955 if (fimc->source_subdev_grp_id != 0)
956 return -EBUSY;
957 fimc->source_subdev_grp_id = sd->grp_id;
958 return 0;
959 }
960
961 fimc->source_subdev_grp_id = 0;
962 break;
963
964 case FIMC_SD_PAD_SOURCE:
965 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
966 fimc->out_path = FIMC_IO_NONE;
967 return 0;
968 }
969 if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
970 fimc->out_path = FIMC_IO_ISP;
971 else
972 fimc->out_path = FIMC_IO_DMA;
973 break;
974
975 default:
976 v4l2_err(sd, "Invalid pad index\n");
977 return -EINVAL;
978 }
979
980 return 0;
981}
982
983static const struct media_entity_operations fimc_lite_subdev_media_ops = {
984 .link_setup = fimc_lite_link_setup,
985};
986
987static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
988 struct v4l2_subdev_fh *fh,
989 struct v4l2_subdev_mbus_code_enum *code)
990{
991 const struct fimc_fmt *fmt;
992
993 fmt = fimc_lite_find_format(NULL, NULL, code->index);
994 if (!fmt)
995 return -EINVAL;
996 code->code = fmt->mbus_code;
997 return 0;
998}
999
1000static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1001 struct v4l2_subdev_fh *fh,
1002 struct v4l2_subdev_format *fmt)
1003{
1004 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1005 struct v4l2_mbus_framefmt *mf = &fmt->format;
1006 struct flite_frame *f = &fimc->out_frame;
1007
1008 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1009 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1010 fmt->format = *mf;
1011 return 0;
1012 }
1013 mf->colorspace = V4L2_COLORSPACE_JPEG;
1014
1015 mutex_lock(&fimc->lock);
1016 mf->code = fimc->fmt->mbus_code;
1017
1018 if (fmt->pad == FLITE_SD_PAD_SINK) {
1019 /* full camera input frame size */
1020 mf->width = f->f_width;
1021 mf->height = f->f_height;
1022 } else {
1023 /* crop size */
1024 mf->width = f->rect.width;
1025 mf->height = f->rect.height;
1026 }
1027 mutex_unlock(&fimc->lock);
1028 return 0;
1029}
1030
1031static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1032 struct v4l2_subdev_fh *fh,
1033 struct v4l2_subdev_format *fmt)
1034{
1035 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1036 struct v4l2_mbus_framefmt *mf = &fmt->format;
1037 struct flite_frame *sink = &fimc->inp_frame;
1038 const struct fimc_fmt *ffmt;
1039
1040 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",
1041 fmt->pad, mf->code, mf->width, mf->height);
1042
1043 mf->colorspace = V4L2_COLORSPACE_JPEG;
1044 mutex_lock(&fimc->lock);
1045
1046 if ((fimc->out_path == FIMC_IO_ISP && sd->entity.stream_count > 0) ||
1047 (fimc->out_path == FIMC_IO_DMA && vb2_is_busy(&fimc->vb_queue))) {
1048 mutex_unlock(&fimc->lock);
1049 return -EBUSY;
1050 }
1051
1052 ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
1053 &mf->code, NULL, fmt->pad);
1054
1055 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1056 mf = v4l2_subdev_get_try_format(fh, fmt->pad);
1057 *mf = fmt->format;
1058 mutex_unlock(&fimc->lock);
1059 return 0;
1060 }
1061
1062 if (fmt->pad == FLITE_SD_PAD_SINK) {
1063 sink->f_width = mf->width;
1064 sink->f_height = mf->height;
1065 fimc->fmt = ffmt;
1066 /* Set sink crop rectangle */
1067 sink->rect.width = mf->width;
1068 sink->rect.height = mf->height;
1069 sink->rect.left = 0;
1070 sink->rect.top = 0;
1071 /* Reset source crop rectangle */
1072 fimc->out_frame.rect = sink->rect;
1073 } else {
1074 /* Allow changing format only on sink pad */
1075 mf->code = fimc->fmt->mbus_code;
1076 mf->width = sink->rect.width;
1077 mf->height = sink->rect.height;
1078 }
1079
1080 mutex_unlock(&fimc->lock);
1081 return 0;
1082}
1083
1084static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1085 struct v4l2_subdev_fh *fh,
1086 struct v4l2_subdev_selection *sel)
1087{
1088 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1089 struct flite_frame *f = &fimc->inp_frame;
1090
1091 if ((sel->target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL &&
1092 sel->target != V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS) ||
1093 sel->pad != FLITE_SD_PAD_SINK)
1094 return -EINVAL;
1095
1096 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1097 sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
1098 return 0;
1099 }
1100
1101 mutex_lock(&fimc->lock);
1102 if (sel->target == V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL) {
1103 sel->r = f->rect;
1104 } else {
1105 sel->r.left = 0;
1106 sel->r.top = 0;
1107 sel->r.width = f->f_width;
1108 sel->r.height = f->f_height;
1109 }
1110 mutex_unlock(&fimc->lock);
1111
1112 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
1113 __func__, f->rect.left, f->rect.top, f->rect.width,
1114 f->rect.height, f->f_width, f->f_height);
1115
1116 return 0;
1117}
1118
1119static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1120 struct v4l2_subdev_fh *fh,
1121 struct v4l2_subdev_selection *sel)
1122{
1123 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1124 struct flite_frame *f = &fimc->inp_frame;
1125 int ret = 0;
1126
1127 if (sel->target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||
1128 sel->pad != FLITE_SD_PAD_SINK)
1129 return -EINVAL;
1130
1131 mutex_lock(&fimc->lock);
1132 fimc_lite_try_crop(fimc, &sel->r);
1133
1134 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1135 *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
1136 } else {
1137 unsigned long flags;
1138 spin_lock_irqsave(&fimc->slock, flags);
1139 f->rect = sel->r;
1140 /* Same crop rectangle on the source pad */
1141 fimc->out_frame.rect = sel->r;
1142 set_bit(ST_FLITE_CONFIG, &fimc->state);
1143 spin_unlock_irqrestore(&fimc->slock, flags);
1144 }
1145 mutex_unlock(&fimc->lock);
1146
1147 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
1148 __func__, f->rect.left, f->rect.top, f->rect.width,
1149 f->rect.height, f->f_width, f->f_height);
1150
1151 return ret;
1152}
1153
1154static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1155{
1156 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1157
1158 if (fimc->out_path == FIMC_IO_DMA)
1159 return -ENOIOCTLCMD;
1160
1161 /* TODO: */
1162
1163 return 0;
1164}
1165
1166static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)
1167{
1168 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1169
1170 if (fimc->out_path == FIMC_IO_DMA)
1171 return -ENOIOCTLCMD;
1172
1173 /* TODO: */
1174
1175 return 0;
1176}
1177
1178static int fimc_lite_log_status(struct v4l2_subdev *sd)
1179{
1180 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1181
1182 flite_hw_dump_regs(fimc, __func__);
1183 return 0;
1184}
1185
1186static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1187{
1188 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1189 struct vb2_queue *q = &fimc->vb_queue;
1190 struct video_device *vfd;
1191 int ret;
1192
1193 fimc->fmt = &fimc_lite_formats[0];
1194 fimc->out_path = FIMC_IO_DMA;
1195
1196 vfd = video_device_alloc();
1197 if (!vfd) {
1198 v4l2_err(sd->v4l2_dev, "Failed to allocate video device\n");
1199 return -ENOMEM;
1200 }
1201
1202 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1203 fimc->index);
1204
1205 vfd->fops = &fimc_lite_fops;
1206 vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1207 vfd->v4l2_dev = sd->v4l2_dev;
1208 vfd->minor = -1;
1209 vfd->release = video_device_release;
1210 vfd->lock = &fimc->lock;
1211 fimc->vfd = vfd;
1212 fimc->ref_count = 0;
1213 fimc->reqbufs_count = 0;
1214
1215 INIT_LIST_HEAD(&fimc->pending_buf_q);
1216 INIT_LIST_HEAD(&fimc->active_buf_q);
1217
1218 memset(q, 0, sizeof(*q));
1219 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1220 q->io_modes = VB2_MMAP | VB2_USERPTR;
1221 q->ops = &fimc_lite_qops;
1222 q->mem_ops = &vb2_dma_contig_memops;
1223 q->buf_struct_size = sizeof(struct flite_buffer);
1224 q->drv_priv = fimc;
1225
1226 vb2_queue_init(q);
1227
1228 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1229 ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
1230 if (ret)
1231 goto err;
1232
1233 video_set_drvdata(vfd, fimc);
1234
1235 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1236 if (ret)
1237 goto err_vd;
1238
1239 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1240 vfd->name, video_device_node_name(vfd));
1241 return 0;
1242
1243 err_vd:
1244 media_entity_cleanup(&vfd->entity);
1245 err:
1246 video_device_release(vfd);
1247 return ret;
1248}
1249
1250static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1251{
1252 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1253
1254 if (fimc == NULL)
1255 return;
1256
1257 if (fimc->vfd) {
1258 video_unregister_device(fimc->vfd);
1259 media_entity_cleanup(&fimc->vfd->entity);
1260 fimc->vfd = NULL;
1261 }
1262}
1263
1264static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1265 .registered = fimc_lite_subdev_registered,
1266 .unregistered = fimc_lite_subdev_unregistered,
1267};
1268
1269static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1270 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1271 .get_selection = fimc_lite_subdev_get_selection,
1272 .set_selection = fimc_lite_subdev_set_selection,
1273 .get_fmt = fimc_lite_subdev_get_fmt,
1274 .set_fmt = fimc_lite_subdev_set_fmt,
1275};
1276
1277static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1278 .s_stream = fimc_lite_subdev_s_stream,
1279};
1280
1281static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
1282 .s_power = fimc_lite_subdev_s_power,
1283 .log_status = fimc_lite_log_status,
1284};
1285
1286static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1287 .core = &fimc_lite_core_ops,
1288 .video = &fimc_lite_subdev_video_ops,
1289 .pad = &fimc_lite_subdev_pad_ops,
1290};
1291
1292static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1293{
1294 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1295 ctrl_handler);
1296 set_bit(ST_FLITE_CONFIG, &fimc->state);
1297 return 0;
1298}
1299
1300static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1301 .s_ctrl = fimc_lite_s_ctrl,
1302};
1303
1304static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1305 .ops = &fimc_lite_ctrl_ops,
1306 .id = V4L2_CTRL_CLASS_USER | 0x1001,
1307 .type = V4L2_CTRL_TYPE_BOOLEAN,
1308 .name = "Test Pattern 640x480",
1309};
1310
1311static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1312{
1313 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1314 struct v4l2_subdev *sd = &fimc->subdev;
1315 int ret;
1316
1317 v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
1318 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
1319 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1320
1321 fimc->subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1322 fimc->subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1323 ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
1324 fimc->subdev_pads, 0);
1325 if (ret)
1326 return ret;
1327
1328 v4l2_ctrl_handler_init(handler, 1);
1329 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1330 NULL);
1331 if (handler->error) {
1332 media_entity_cleanup(&sd->entity);
1333 return handler->error;
1334 }
1335
1336 sd->ctrl_handler = handler;
1337 sd->internal_ops = &fimc_lite_subdev_internal_ops;
1338 sd->entity.ops = &fimc_lite_subdev_media_ops;
1339 v4l2_set_subdevdata(sd, fimc);
1340
1341 return 0;
1342}
1343
1344static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1345{
1346 struct v4l2_subdev *sd = &fimc->subdev;
1347
1348 v4l2_device_unregister_subdev(sd);
1349 media_entity_cleanup(&sd->entity);
1350 v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1351 v4l2_set_subdevdata(sd, NULL);
1352}
1353
1354static void fimc_lite_clk_put(struct fimc_lite *fimc)
1355{
1356 if (IS_ERR_OR_NULL(fimc->clock))
1357 return;
1358
1359 clk_unprepare(fimc->clock);
1360 clk_put(fimc->clock);
1361 fimc->clock = NULL;
1362}
1363
1364static int fimc_lite_clk_get(struct fimc_lite *fimc)
1365{
1366 int ret;
1367
1368 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1369 if (IS_ERR(fimc->clock))
1370 return PTR_ERR(fimc->clock);
1371
1372 ret = clk_prepare(fimc->clock);
1373 if (ret < 0) {
1374 clk_put(fimc->clock);
1375 fimc->clock = NULL;
1376 }
1377 return ret;
1378}
1379
1380static int __devinit fimc_lite_probe(struct platform_device *pdev)
1381{
1382 struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);
1383 struct fimc_lite *fimc;
1384 struct resource *res;
1385 int ret;
1386
1387 fimc = devm_kzalloc(&pdev->dev, sizeof(*fimc), GFP_KERNEL);
1388 if (!fimc)
1389 return -ENOMEM;
1390
1391 fimc->index = pdev->id;
1392 fimc->variant = drv_data->variant[fimc->index];
1393 fimc->pdev = pdev;
1394
1395 init_waitqueue_head(&fimc->irq_queue);
1396 spin_lock_init(&fimc->slock);
1397 mutex_init(&fimc->lock);
1398
1399 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1400 fimc->regs = devm_request_and_ioremap(&pdev->dev, res);
1401 if (fimc->regs == NULL) {
1402 dev_err(&pdev->dev, "Failed to obtain io memory\n");
1403 return -ENOENT;
1404 }
1405
1406 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1407 if (res == NULL) {
1408 dev_err(&pdev->dev, "Failed to get IRQ resource\n");
1409 return -ENXIO;
1410 }
1411
1412 ret = fimc_lite_clk_get(fimc);
1413 if (ret)
1414 return ret;
1415
1416 ret = devm_request_irq(&pdev->dev, res->start, flite_irq_handler,
1417 0, dev_name(&pdev->dev), fimc);
1418 if (ret) {
1419 dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
1420 goto err_clk;
1421 }
1422
1423 /* The video node will be created within the subdev's registered() op */
1424 ret = fimc_lite_create_capture_subdev(fimc);
1425 if (ret)
1426 goto err_clk;
1427
1428 platform_set_drvdata(pdev, fimc);
1429 pm_runtime_enable(&pdev->dev);
1430 ret = pm_runtime_get_sync(&pdev->dev);
1431 if (ret < 0)
1432 goto err_sd;
1433
1434 fimc->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1435 if (IS_ERR(fimc->alloc_ctx)) {
1436 ret = PTR_ERR(fimc->alloc_ctx);
1437 goto err_pm;
1438 }
1439 pm_runtime_put(&pdev->dev);
1440
1441 dev_dbg(&pdev->dev, "FIMC-LITE.%d registered successfully\n",
1442 fimc->index);
1443 return 0;
1444err_pm:
1445 pm_runtime_put(&pdev->dev);
1446err_sd:
1447 fimc_lite_unregister_capture_subdev(fimc);
1448err_clk:
1449 fimc_lite_clk_put(fimc);
1450 return ret;
1451}
1452
1453static int fimc_lite_runtime_resume(struct device *dev)
1454{
1455 struct fimc_lite *fimc = dev_get_drvdata(dev);
1456
1457 clk_enable(fimc->clock);
1458 return 0;
1459}
1460
1461static int fimc_lite_runtime_suspend(struct device *dev)
1462{
1463 struct fimc_lite *fimc = dev_get_drvdata(dev);
1464
1465 clk_disable(fimc->clock);
1466 return 0;
1467}
1468
1469#ifdef CONFIG_PM_SLEEP
1470static int fimc_lite_resume(struct device *dev)
1471{
1472 struct fimc_lite *fimc = dev_get_drvdata(dev);
1473 struct flite_buffer *buf;
1474 unsigned long flags;
1475 int i;
1476
1477 spin_lock_irqsave(&fimc->slock, flags);
1478 if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1479 !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1480 spin_unlock_irqrestore(&fimc->slock, flags);
1481 return 0;
1482 }
1483 flite_hw_reset(fimc);
1484 spin_unlock_irqrestore(&fimc->slock, flags);
1485
1486 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1487 return 0;
1488
1489 INIT_LIST_HEAD(&fimc->active_buf_q);
1490 fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity, false);
1491 fimc_lite_hw_init(fimc);
1492 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1493
1494 for (i = 0; i < fimc->reqbufs_count; i++) {
1495 if (list_empty(&fimc->pending_buf_q))
1496 break;
1497 buf = fimc_lite_pending_queue_pop(fimc);
1498 buffer_queue(&buf->vb);
1499 }
1500 return 0;
1501}
1502
1503static int fimc_lite_suspend(struct device *dev)
1504{
1505 struct fimc_lite *fimc = dev_get_drvdata(dev);
1506 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1507 int ret;
1508
1509 if (test_and_set_bit(ST_LPM, &fimc->state))
1510 return 0;
1511
1512 ret = fimc_lite_stop_capture(fimc, suspend);
1513 if (ret)
1514 return ret;
1515
1516 return fimc_pipeline_shutdown(&fimc->pipeline);
1517}
1518#endif /* CONFIG_PM_SLEEP */
1519
1520static int __devexit fimc_lite_remove(struct platform_device *pdev)
1521{
1522 struct fimc_lite *fimc = platform_get_drvdata(pdev);
1523 struct device *dev = &pdev->dev;
1524
1525 pm_runtime_disable(dev);
1526 pm_runtime_set_suspended(dev);
1527 fimc_lite_unregister_capture_subdev(fimc);
1528 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
1529 fimc_lite_clk_put(fimc);
1530
1531 dev_info(dev, "Driver unloaded\n");
1532 return 0;
1533}
1534
1535static struct flite_variant fimc_lite0_variant_exynos4 = {
1536 .max_width = 8192,
1537 .max_height = 8192,
1538 .out_width_align = 8,
1539 .win_hor_offs_align = 2,
1540 .out_hor_offs_align = 8,
1541};
1542
1543/* EXYNOS4212, EXYNOS4412 */
1544static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
1545 .variant = {
1546 [0] = &fimc_lite0_variant_exynos4,
1547 [1] = &fimc_lite0_variant_exynos4,
1548 },
1549};
1550
1551static struct platform_device_id fimc_lite_driver_ids[] = {
1552 {
1553 .name = "exynos-fimc-lite",
1554 .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
1555 },
1556 { /* sentinel */ },
1557};
1558MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
1559
1560static const struct dev_pm_ops fimc_lite_pm_ops = {
1561 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1562 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1563 NULL)
1564};
1565
1566static struct platform_driver fimc_lite_driver = {
1567 .probe = fimc_lite_probe,
1568 .remove = __devexit_p(fimc_lite_remove),
1569 .id_table = fimc_lite_driver_ids,
1570 .driver = {
1571 .name = FIMC_LITE_DRV_NAME,
1572 .owner = THIS_MODULE,
1573 .pm = &fimc_lite_pm_ops,
1574 }
1575};
1576module_platform_driver(fimc_lite_driver);
1577MODULE_LICENSE("GPL");
1578MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);
Linux kernel - Deliverables
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