Merge branch 'for-linus' of git://git.kernel.dk/linux-block
[deliverable/linux.git] / drivers / media / video / s5p-fimc / regs-fimc.h
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1/*
2 * Register definition file for Samsung Camera Interface (FIMC) driver
3 *
4 * Copyright (c) 2010 Samsung Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef REGS_FIMC_H_
12#define REGS_FIMC_H_
13
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14/* Input source format */
15#define S5P_CISRCFMT 0x00
16#define S5P_CISRCFMT_ITU601_8BIT (1 << 31)
17#define S5P_CISRCFMT_ITU601_16BIT (1 << 29)
18#define S5P_CISRCFMT_ORDER422_YCBYCR (0 << 14)
19#define S5P_CISRCFMT_ORDER422_YCRYCB (1 << 14)
20#define S5P_CISRCFMT_ORDER422_CBYCRY (2 << 14)
21#define S5P_CISRCFMT_ORDER422_CRYCBY (3 << 14)
22#define S5P_CISRCFMT_HSIZE(x) ((x) << 16)
23#define S5P_CISRCFMT_VSIZE(x) ((x) << 0)
24
25/* Window offset */
26#define S5P_CIWDOFST 0x04
77e62082 27#define S5P_CIWDOFST_OFF_EN (1 << 31)
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28#define S5P_CIWDOFST_CLROVFIY (1 << 30)
29#define S5P_CIWDOFST_CLROVRLB (1 << 29)
77e62082 30#define S5P_CIWDOFST_HOROFF_MASK (0x7ff << 16)
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31#define S5P_CIWDOFST_CLROVFICB (1 << 15)
32#define S5P_CIWDOFST_CLROVFICR (1 << 14)
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33#define S5P_CIWDOFST_HOROFF(x) ((x) << 16)
34#define S5P_CIWDOFST_VEROFF(x) ((x) << 0)
35#define S5P_CIWDOFST_VEROFF_MASK (0xfff << 0)
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36
37/* Global control */
38#define S5P_CIGCTRL 0x08
39#define S5P_CIGCTRL_SWRST (1 << 31)
40#define S5P_CIGCTRL_CAMRST_A (1 << 30)
41#define S5P_CIGCTRL_SELCAM_ITU_A (1 << 29)
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42#define S5P_CIGCTRL_TESTPAT_NORMAL (0 << 27)
43#define S5P_CIGCTRL_TESTPAT_COLOR_BAR (1 << 27)
44#define S5P_CIGCTRL_TESTPAT_HOR_INC (2 << 27)
45#define S5P_CIGCTRL_TESTPAT_VER_INC (3 << 27)
46#define S5P_CIGCTRL_TESTPAT_MASK (3 << 27)
47#define S5P_CIGCTRL_TESTPAT_SHIFT (27)
48#define S5P_CIGCTRL_INVPOLPCLK (1 << 26)
49#define S5P_CIGCTRL_INVPOLVSYNC (1 << 25)
50#define S5P_CIGCTRL_INVPOLHREF (1 << 24)
51#define S5P_CIGCTRL_IRQ_OVFEN (1 << 22)
52#define S5P_CIGCTRL_HREF_MASK (1 << 21)
53#define S5P_CIGCTRL_IRQ_LEVEL (1 << 20)
54#define S5P_CIGCTRL_IRQ_CLR (1 << 19)
55#define S5P_CIGCTRL_IRQ_ENABLE (1 << 16)
56#define S5P_CIGCTRL_SHDW_DISABLE (1 << 12)
ee7160e5 57#define S5P_CIGCTRL_CAM_JPEG (1 << 8)
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58#define S5P_CIGCTRL_SELCAM_MIPI_A (1 << 7)
59#define S5P_CIGCTRL_CAMIF_SELWB (1 << 6)
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60/* 0 - ITU601; 1 - ITU709 */
61#define S5P_CIGCTRL_CSC_ITU601_709 (1 << 5)
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62#define S5P_CIGCTRL_INVPOLHSYNC (1 << 4)
63#define S5P_CIGCTRL_SELCAM_MIPI (1 << 3)
12ecf56d 64#define S5P_CIGCTRL_INVPOLFIELD (1 << 1)
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65#define S5P_CIGCTRL_INTERLACE (1 << 0)
66
67/* Window offset 2 */
68#define S5P_CIWDOFST2 0x14
69#define S5P_CIWDOFST2_HOROFF_MASK (0xfff << 16)
70#define S5P_CIWDOFST2_VEROFF_MASK (0xfff << 0)
71#define S5P_CIWDOFST2_HOROFF(x) ((x) << 16)
72#define S5P_CIWDOFST2_VEROFF(x) ((x) << 0)
73
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74/* Output DMA Y/Cb/Cr plane start addresses */
75#define S5P_CIOYSA(n) (0x18 + (n) * 4)
76#define S5P_CIOCBSA(n) (0x28 + (n) * 4)
77#define S5P_CIOCRSA(n) (0x38 + (n) * 4)
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78
79/* Target image format */
80#define S5P_CITRGFMT 0x48
81#define S5P_CITRGFMT_INROT90 (1 << 31)
82#define S5P_CITRGFMT_YCBCR420 (0 << 29)
83#define S5P_CITRGFMT_YCBCR422 (1 << 29)
84#define S5P_CITRGFMT_YCBCR422_1P (2 << 29)
85#define S5P_CITRGFMT_RGB (3 << 29)
86#define S5P_CITRGFMT_FMT_MASK (3 << 29)
87#define S5P_CITRGFMT_HSIZE_MASK (0xfff << 16)
88#define S5P_CITRGFMT_FLIP_SHIFT (14)
89#define S5P_CITRGFMT_FLIP_NORMAL (0 << 14)
90#define S5P_CITRGFMT_FLIP_X_MIRROR (1 << 14)
91#define S5P_CITRGFMT_FLIP_Y_MIRROR (2 << 14)
92#define S5P_CITRGFMT_FLIP_180 (3 << 14)
93#define S5P_CITRGFMT_FLIP_MASK (3 << 14)
94#define S5P_CITRGFMT_OUTROT90 (1 << 13)
95#define S5P_CITRGFMT_VSIZE_MASK (0xfff << 0)
96#define S5P_CITRGFMT_HSIZE(x) ((x) << 16)
97#define S5P_CITRGFMT_VSIZE(x) ((x) << 0)
98
99/* Output DMA control */
100#define S5P_CIOCTRL 0x4c
101#define S5P_CIOCTRL_ORDER422_MASK (3 << 0)
102#define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0)
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103#define S5P_CIOCTRL_ORDER422_CBYCRY (1 << 0)
104#define S5P_CIOCTRL_ORDER422_YCRYCB (2 << 0)
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105#define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0)
106#define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2)
107#define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3)
108#define S5P_CIOCTRL_YCBCR_2PLANE (1 << 3)
109#define S5P_CIOCTRL_YCBCR_PLANE_MASK (1 << 3)
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110#define S5P_CIOCTRL_ALPHA_OUT_MASK (0xff << 4)
111#define S5P_CIOCTRL_RGB16FMT_MASK (3 << 16)
112#define S5P_CIOCTRL_RGB565 (0 << 16)
113#define S5P_CIOCTRL_ARGB1555 (1 << 16)
114#define S5P_CIOCTRL_ARGB4444 (2 << 16)
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115#define S5P_CIOCTRL_ORDER2P_SHIFT (24)
116#define S5P_CIOCTRL_ORDER2P_MASK (3 << 24)
117#define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 << 24)
118
119/* Pre-scaler control 1 */
120#define S5P_CISCPRERATIO 0x50
121#define S5P_CISCPRERATIO_SHFACTOR(x) ((x) << 28)
122#define S5P_CISCPRERATIO_HOR(x) ((x) << 16)
123#define S5P_CISCPRERATIO_VER(x) ((x) << 0)
124
125#define S5P_CISCPREDST 0x54
126#define S5P_CISCPREDST_WIDTH(x) ((x) << 16)
127#define S5P_CISCPREDST_HEIGHT(x) ((x) << 0)
128
129/* Main scaler control */
130#define S5P_CISCCTRL 0x58
131#define S5P_CISCCTRL_SCALERBYPASS (1 << 31)
132#define S5P_CISCCTRL_SCALEUP_H (1 << 30)
133#define S5P_CISCCTRL_SCALEUP_V (1 << 29)
134#define S5P_CISCCTRL_CSCR2Y_WIDE (1 << 28)
135#define S5P_CISCCTRL_CSCY2R_WIDE (1 << 27)
136#define S5P_CISCCTRL_LCDPATHEN_FIFO (1 << 26)
137#define S5P_CISCCTRL_INTERLACE (1 << 25)
138#define S5P_CISCCTRL_SCALERSTART (1 << 15)
139#define S5P_CISCCTRL_INRGB_FMT_RGB565 (0 << 13)
140#define S5P_CISCCTRL_INRGB_FMT_RGB666 (1 << 13)
141#define S5P_CISCCTRL_INRGB_FMT_RGB888 (2 << 13)
142#define S5P_CISCCTRL_INRGB_FMT_MASK (3 << 13)
143#define S5P_CISCCTRL_OUTRGB_FMT_RGB565 (0 << 11)
144#define S5P_CISCCTRL_OUTRGB_FMT_RGB666 (1 << 11)
145#define S5P_CISCCTRL_OUTRGB_FMT_RGB888 (2 << 11)
146#define S5P_CISCCTRL_OUTRGB_FMT_MASK (3 << 11)
147#define S5P_CISCCTRL_RGB_EXT (1 << 10)
148#define S5P_CISCCTRL_ONE2ONE (1 << 9)
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149#define S5P_CISCCTRL_MHRATIO(x) ((x) << 16)
150#define S5P_CISCCTRL_MVRATIO(x) ((x) << 0)
151#define S5P_CISCCTRL_MHRATIO_MASK (0x1ff << 16)
152#define S5P_CISCCTRL_MVRATIO_MASK (0x1ff << 0)
153#define S5P_CISCCTRL_MHRATIO_EXT(x) (((x) >> 6) << 16)
154#define S5P_CISCCTRL_MVRATIO_EXT(x) (((x) >> 6) << 0)
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155
156/* Target area */
157#define S5P_CITAREA 0x5c
158#define S5P_CITAREA_MASK 0x0fffffff
159
160/* General status */
161#define S5P_CISTATUS 0x64
162#define S5P_CISTATUS_OVFIY (1 << 31)
163#define S5P_CISTATUS_OVFICB (1 << 30)
164#define S5P_CISTATUS_OVFICR (1 << 29)
165#define S5P_CISTATUS_VSYNC (1 << 28)
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166#define S5P_CISTATUS_FRAMECNT_MASK (3 << 26)
167#define S5P_CISTATUS_FRAMECNT_SHIFT 26
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168#define S5P_CISTATUS_WINOFF_EN (1 << 25)
169#define S5P_CISTATUS_IMGCPT_EN (1 << 22)
170#define S5P_CISTATUS_IMGCPT_SCEN (1 << 21)
171#define S5P_CISTATUS_VSYNC_A (1 << 20)
172#define S5P_CISTATUS_VSYNC_B (1 << 19)
173#define S5P_CISTATUS_OVRLB (1 << 18)
174#define S5P_CISTATUS_FRAME_END (1 << 17)
175#define S5P_CISTATUS_LASTCAPT_END (1 << 16)
176#define S5P_CISTATUS_VVALID_A (1 << 15)
177#define S5P_CISTATUS_VVALID_B (1 << 14)
178
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179/* Indexes to the last and the currently processed buffer. */
180#define S5P_CISTATUS2 0x68
181
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182/* Image capture control */
183#define S5P_CIIMGCPT 0xc0
184#define S5P_CIIMGCPT_IMGCPTEN (1 << 31)
185#define S5P_CIIMGCPT_IMGCPTEN_SC (1 << 30)
186#define S5P_CIIMGCPT_CPT_FREN_ENABLE (1 << 25)
187#define S5P_CIIMGCPT_CPT_FRMOD_CNT (1 << 18)
188
189/* Frame capture sequence */
190#define S5P_CICPTSEQ 0xc4
191
192/* Image effect */
193#define S5P_CIIMGEFF 0xd0
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194#define S5P_CIIMGEFF_IE_ENABLE (1 << 30)
195#define S5P_CIIMGEFF_IE_SC_BEFORE (0 << 29)
196#define S5P_CIIMGEFF_IE_SC_AFTER (1 << 29)
197#define S5P_CIIMGEFF_FIN_BYPASS (0 << 26)
198#define S5P_CIIMGEFF_FIN_ARBITRARY (1 << 26)
199#define S5P_CIIMGEFF_FIN_NEGATIVE (2 << 26)
200#define S5P_CIIMGEFF_FIN_ARTFREEZE (3 << 26)
201#define S5P_CIIMGEFF_FIN_EMBOSSING (4 << 26)
202#define S5P_CIIMGEFF_FIN_SILHOUETTE (5 << 26)
203#define S5P_CIIMGEFF_FIN_MASK (7 << 26)
204#define S5P_CIIMGEFF_PAT_CBCR_MASK ((0xff < 13) | (0xff < 0))
205#define S5P_CIIMGEFF_PAT_CB(x) ((x) << 13)
206#define S5P_CIIMGEFF_PAT_CR(x) ((x) << 0)
207
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208/* Input DMA Y/Cb/Cr plane start address 0/1 */
209#define S5P_CIIYSA(n) (0xd4 + (n) * 0x70)
210#define S5P_CIICBSA(n) (0xd8 + (n) * 0x70)
211#define S5P_CIICRSA(n) (0xdc + (n) * 0x70)
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212
213/* Real input DMA image size */
214#define S5P_CIREAL_ISIZE 0xf8
215#define S5P_CIREAL_ISIZE_AUTOLOAD_EN (1 << 31)
216#define S5P_CIREAL_ISIZE_ADDR_CH_DIS (1 << 30)
217#define S5P_CIREAL_ISIZE_HEIGHT(x) ((x) << 16)
218#define S5P_CIREAL_ISIZE_WIDTH(x) ((x) << 0)
219
220
221/* Input DMA control */
222#define S5P_MSCTRL 0xfc
d9160afd 223#define S5P_MSCTRL_IN_BURST_COUNT_MASK (0xF << 24)
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224#define S5P_MSCTRL_2P_IN_ORDER_MASK (3 << 16)
225#define S5P_MSCTRL_2P_IN_ORDER_SHIFT 16
226#define S5P_MSCTRL_C_INT_IN_3PLANE (0 << 15)
227#define S5P_MSCTRL_C_INT_IN_2PLANE (1 << 15)
228#define S5P_MSCTRL_C_INT_IN_MASK (1 << 15)
229#define S5P_MSCTRL_FLIP_SHIFT 13
230#define S5P_MSCTRL_FLIP_MASK (3 << 13)
231#define S5P_MSCTRL_FLIP_NORMAL (0 << 13)
232#define S5P_MSCTRL_FLIP_X_MIRROR (1 << 13)
233#define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13)
234#define S5P_MSCTRL_FLIP_180 (3 << 13)
5bbe425e 235#define S5P_MSCTRL_FIFO_CTRL_FULL (1 << 12)
5fd8f738 236#define S5P_MSCTRL_ORDER422_SHIFT 4
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237#define S5P_MSCTRL_ORDER422_YCBYCR (0 << 4)
238#define S5P_MSCTRL_ORDER422_CBYCRY (1 << 4)
239#define S5P_MSCTRL_ORDER422_YCRYCB (2 << 4)
240#define S5P_MSCTRL_ORDER422_CRYCBY (3 << 4)
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241#define S5P_MSCTRL_ORDER422_MASK (3 << 4)
242#define S5P_MSCTRL_INPUT_EXTCAM (0 << 3)
243#define S5P_MSCTRL_INPUT_MEMORY (1 << 3)
244#define S5P_MSCTRL_INPUT_MASK (1 << 3)
245#define S5P_MSCTRL_INFORMAT_YCBCR420 (0 << 1)
246#define S5P_MSCTRL_INFORMAT_YCBCR422 (1 << 1)
247#define S5P_MSCTRL_INFORMAT_YCBCR422_1P (2 << 1)
248#define S5P_MSCTRL_INFORMAT_RGB (3 << 1)
249#define S5P_MSCTRL_INFORMAT_MASK (3 << 1)
250#define S5P_MSCTRL_ENVID (1 << 0)
d9160afd 251#define S5P_MSCTRL_IN_BURST_COUNT(x) ((x) << 24)
5fd8f738 252
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253/* Output DMA Y/Cb/Cr offset */
254#define S5P_CIOYOFF 0x168
255#define S5P_CIOCBOFF 0x16c
256#define S5P_CIOCROFF 0x170
257
258/* Input DMA Y/Cb/Cr offset */
259#define S5P_CIIYOFF 0x174
260#define S5P_CIICBOFF 0x178
261#define S5P_CIICROFF 0x17c
262
263#define S5P_CIO_OFFS_VER(x) ((x) << 16)
264#define S5P_CIO_OFFS_HOR(x) ((x) << 0)
265
266/* Input DMA original image size */
267#define S5P_ORGISIZE 0x180
268
269/* Output DMA original image size */
270#define S5P_ORGOSIZE 0x184
271
272#define S5P_ORIG_SIZE_VER(x) ((x) << 16)
273#define S5P_ORIG_SIZE_HOR(x) ((x) << 0)
274
275/* Real output DMA image size (extension register) */
276#define S5P_CIEXTEN 0x188
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277#define S5P_CIEXTEN_MHRATIO_EXT(x) (((x) & 0x3f) << 10)
278#define S5P_CIEXTEN_MVRATIO_EXT(x) ((x) & 0x3f)
279#define S5P_CIEXTEN_MHRATIO_EXT_MASK (0x3f << 10)
280#define S5P_CIEXTEN_MVRATIO_EXT_MASK 0x3f
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281
282#define S5P_CIDMAPARAM 0x18c
283#define S5P_CIDMAPARAM_R_LINEAR (0 << 29)
284#define S5P_CIDMAPARAM_R_64X32 (3 << 29)
285#define S5P_CIDMAPARAM_W_LINEAR (0 << 13)
286#define S5P_CIDMAPARAM_W_64X32 (3 << 13)
287#define S5P_CIDMAPARAM_TILE_MASK ((3 << 29) | (3 << 13))
288
289/* MIPI CSI image format */
290#define S5P_CSIIMGFMT 0x194
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291#define S5P_CSIIMGFMT_YCBCR422_8BIT 0x1e
292#define S5P_CSIIMGFMT_RAW8 0x2a
293#define S5P_CSIIMGFMT_RAW10 0x2b
294#define S5P_CSIIMGFMT_RAW12 0x2c
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295/* User defined formats. x = 0...16. */
296#define S5P_CSIIMGFMT_USER(x) (0x30 + x - 1)
5fd8f738 297
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298/* Output frame buffer sequence mask */
299#define S5P_CIFCNTSEQ 0x1FC
300
5fd8f738 301#endif /* REGS_FIMC_H_ */
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