Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
34 | ||
29780bb7 | 35 | #ifdef HAVE_MT352 |
86ddd96f MCC |
36 | # include "mt352.h" |
37 | # include "mt352_priv.h" /* FIXME */ | |
38 | #endif | |
29780bb7 | 39 | #ifdef HAVE_TDA1004X |
86ddd96f MCC |
40 | # include "tda1004x.h" |
41 | #endif | |
1da177e4 LT |
42 | |
43 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
44 | MODULE_LICENSE("GPL"); | |
45 | ||
46 | static unsigned int antenna_pwr = 0; | |
86ddd96f | 47 | |
1da177e4 LT |
48 | module_param(antenna_pwr, int, 0444); |
49 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
50 | ||
51 | /* ------------------------------------------------------------------ */ | |
52 | ||
29780bb7 | 53 | #ifdef HAVE_MT352 |
1da177e4 LT |
54 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
55 | { | |
56 | u32 ok; | |
57 | ||
58 | if (!on) { | |
59 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
60 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
61 | return 0; | |
62 | } | |
63 | ||
64 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
65 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
66 | udelay(10); | |
67 | ||
68 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
69 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
70 | udelay(10); | |
71 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
72 | udelay(10); | |
73 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
74 | printk("%s: %s %s\n", dev->name, __FUNCTION__, | |
75 | ok ? "on" : "off"); | |
76 | ||
77 | if (!ok) | |
78 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
79 | return ok; | |
80 | } | |
81 | ||
82 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
83 | { | |
84 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
85 | static u8 reset [] = { RESET, 0x80 }; | |
86 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
87 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
88 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
89 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
90 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
91 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
92 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
93 | struct saa7134_dev *dev= fe->dvb->priv; | |
94 | ||
95 | printk("%s: %s called\n",dev->name,__FUNCTION__); | |
96 | ||
97 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
98 | udelay(200); | |
99 | mt352_write(fe, reset, sizeof(reset)); | |
100 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
101 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
102 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
103 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
104 | ||
105 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
106 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
107 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
108 | return 0; | |
109 | } | |
110 | ||
111 | static int mt352_pinnacle_pll_set(struct dvb_frontend* fe, | |
112 | struct dvb_frontend_parameters* params, | |
113 | u8* pllbuf) | |
114 | { | |
115 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
116 | static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE; | |
117 | struct saa7134_dev *dev = fe->dvb->priv; | |
118 | struct v4l2_frequency f; | |
119 | ||
120 | /* set frequency (mt2050) */ | |
121 | f.tuner = 0; | |
122 | f.type = V4L2_TUNER_DIGITAL_TV; | |
123 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
124 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
125 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); | |
126 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off); | |
127 | ||
128 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
129 | ||
130 | /* mt352 setup */ | |
131 | mt352_pinnacle_init(fe); | |
132 | pllbuf[0] = 0xc2; | |
133 | pllbuf[1] = 0x00; | |
134 | pllbuf[2] = 0x00; | |
135 | pllbuf[3] = 0x80; | |
136 | pllbuf[4] = 0x00; | |
137 | return 0; | |
138 | } | |
139 | ||
140 | static struct mt352_config pinnacle_300i = { | |
141 | .demod_address = 0x3c >> 1, | |
142 | .adc_clock = 20333, | |
143 | .if2 = 36150, | |
144 | .no_tuner = 1, | |
145 | .demod_init = mt352_pinnacle_init, | |
146 | .pll_set = mt352_pinnacle_pll_set, | |
147 | }; | |
86ddd96f | 148 | #endif |
1da177e4 LT |
149 | |
150 | /* ------------------------------------------------------------------ */ | |
151 | ||
29780bb7 | 152 | #ifdef HAVE_TDA1004X |
1da177e4 | 153 | |
2cf36ac4 | 154 | static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
1da177e4 LT |
155 | { |
156 | struct saa7134_dev *dev = fe->dvb->priv; | |
86ddd96f | 157 | u8 tuner_buf[4]; |
2cf36ac4 | 158 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
159 | sizeof(tuner_buf) }; |
160 | int tuner_frequency = 0; | |
161 | u8 band, cp, filter; | |
162 | ||
163 | /* determine charge pump */ | |
164 | tuner_frequency = params->frequency + 36166000; | |
165 | if (tuner_frequency < 87000000) | |
166 | return -EINVAL; | |
167 | else if (tuner_frequency < 130000000) | |
168 | cp = 3; | |
169 | else if (tuner_frequency < 160000000) | |
170 | cp = 5; | |
171 | else if (tuner_frequency < 200000000) | |
172 | cp = 6; | |
173 | else if (tuner_frequency < 290000000) | |
174 | cp = 3; | |
175 | else if (tuner_frequency < 420000000) | |
176 | cp = 5; | |
177 | else if (tuner_frequency < 480000000) | |
178 | cp = 6; | |
179 | else if (tuner_frequency < 620000000) | |
180 | cp = 3; | |
181 | else if (tuner_frequency < 830000000) | |
182 | cp = 5; | |
183 | else if (tuner_frequency < 895000000) | |
184 | cp = 7; | |
185 | else | |
186 | return -EINVAL; | |
187 | ||
188 | /* determine band */ | |
189 | if (params->frequency < 49000000) | |
190 | return -EINVAL; | |
191 | else if (params->frequency < 161000000) | |
192 | band = 1; | |
193 | else if (params->frequency < 444000000) | |
194 | band = 2; | |
195 | else if (params->frequency < 861000000) | |
196 | band = 4; | |
197 | else | |
198 | return -EINVAL; | |
199 | ||
200 | /* setup PLL filter */ | |
201 | switch (params->u.ofdm.bandwidth) { | |
202 | case BANDWIDTH_6_MHZ: | |
203 | filter = 0; | |
204 | break; | |
205 | ||
206 | case BANDWIDTH_7_MHZ: | |
207 | filter = 0; | |
208 | break; | |
209 | ||
210 | case BANDWIDTH_8_MHZ: | |
211 | filter = 1; | |
212 | break; | |
1da177e4 | 213 | |
86ddd96f MCC |
214 | default: |
215 | return -EINVAL; | |
216 | } | |
217 | ||
218 | /* calculate divisor | |
219 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 220 | */ |
86ddd96f MCC |
221 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
222 | ||
223 | /* setup tuner buffer */ | |
224 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
225 | tuner_buf[1] = tuner_frequency & 0xff; | |
226 | tuner_buf[2] = 0xca; | |
227 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
228 | ||
229 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
230 | return -EIO; | |
2cf36ac4 HH |
231 | msleep(1); |
232 | return 0; | |
233 | } | |
234 | ||
235 | static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe) | |
236 | { | |
237 | struct saa7134_dev *dev = fe->dvb->priv; | |
238 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; | |
239 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 240 | |
2cf36ac4 HH |
241 | /* setup PLL configuration */ |
242 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
243 | return -EIO; | |
86ddd96f | 244 | msleep(1); |
2cf36ac4 | 245 | |
1da177e4 LT |
246 | return 0; |
247 | } | |
248 | ||
2cf36ac4 HH |
249 | /* ------------------------------------------------------------------ */ |
250 | ||
251 | static int philips_tu1216_pll_60_init(struct dvb_frontend *fe) | |
252 | { | |
253 | return philips_tda6651_pll_init(0x60, fe); | |
254 | } | |
255 | ||
256 | static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
257 | { | |
258 | return philips_tda6651_pll_set(0x60, fe, params); | |
259 | } | |
260 | ||
86ddd96f MCC |
261 | static int philips_tu1216_request_firmware(struct dvb_frontend *fe, |
262 | const struct firmware **fw, char *name) | |
1da177e4 LT |
263 | { |
264 | struct saa7134_dev *dev = fe->dvb->priv; | |
265 | return request_firmware(fw, name, &dev->pci->dev); | |
266 | } | |
267 | ||
2cf36ac4 | 268 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
269 | |
270 | .demod_address = 0x8, | |
271 | .invert = 1, | |
2cf36ac4 | 272 | .invert_oclk = 0, |
86ddd96f MCC |
273 | .xtal_freq = TDA10046_XTAL_4M, |
274 | .agc_config = TDA10046_AGC_DEFAULT, | |
275 | .if_freq = TDA10046_FREQ_3617, | |
2cf36ac4 HH |
276 | .pll_init = philips_tu1216_pll_60_init, |
277 | .pll_set = philips_tu1216_pll_60_set, | |
86ddd96f MCC |
278 | .pll_sleep = NULL, |
279 | .request_firmware = philips_tu1216_request_firmware, | |
280 | }; | |
281 | ||
282 | /* ------------------------------------------------------------------ */ | |
283 | ||
2cf36ac4 HH |
284 | static int philips_tu1216_pll_61_init(struct dvb_frontend *fe) |
285 | { | |
286 | return philips_tda6651_pll_init(0x61, fe); | |
287 | } | |
288 | ||
289 | static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
290 | { | |
291 | return philips_tda6651_pll_set(0x61, fe, params); | |
292 | } | |
293 | ||
294 | static struct tda1004x_config philips_tu1216_61_config = { | |
295 | ||
296 | .demod_address = 0x8, | |
297 | .invert = 1, | |
298 | .invert_oclk = 0, | |
299 | .xtal_freq = TDA10046_XTAL_4M, | |
300 | .agc_config = TDA10046_AGC_DEFAULT, | |
301 | .if_freq = TDA10046_FREQ_3617, | |
302 | .pll_init = philips_tu1216_pll_61_init, | |
303 | .pll_set = philips_tu1216_pll_61_set, | |
304 | .pll_sleep = NULL, | |
305 | .request_firmware = philips_tu1216_request_firmware, | |
306 | }; | |
307 | ||
308 | /* ------------------------------------------------------------------ */ | |
309 | ||
310 | static int philips_europa_pll_init(struct dvb_frontend *fe) | |
311 | { | |
312 | struct saa7134_dev *dev = fe->dvb->priv; | |
313 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; | |
314 | struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
315 | ||
316 | /* setup PLL configuration */ | |
317 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
318 | return -EIO; | |
319 | msleep(1); | |
320 | ||
321 | /* switch the board to dvb mode */ | |
322 | init_msg.addr = 0x43; | |
323 | init_msg.len = 0x02; | |
324 | msg[0] = 0x00; | |
325 | msg[1] = 0x40; | |
326 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
327 | return -EIO; | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
332 | static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
333 | { | |
334 | return philips_tda6651_pll_set(0x61, fe, params); | |
335 | } | |
336 | ||
337 | static void philips_europa_analog(struct dvb_frontend *fe) | |
338 | { | |
339 | struct saa7134_dev *dev = fe->dvb->priv; | |
340 | /* this message actually turns the tuner back to analog mode */ | |
341 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
342 | struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
343 | ||
344 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); | |
345 | msleep(1); | |
346 | ||
347 | /* switch the board to analog mode */ | |
348 | analog_msg.addr = 0x43; | |
349 | analog_msg.len = 0x02; | |
350 | msg[0] = 0x00; | |
351 | msg[1] = 0x14; | |
352 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); | |
353 | } | |
354 | ||
355 | static struct tda1004x_config philips_europa_config = { | |
356 | ||
357 | .demod_address = 0x8, | |
358 | .invert = 0, | |
359 | .invert_oclk = 0, | |
360 | .xtal_freq = TDA10046_XTAL_4M, | |
361 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
362 | .if_freq = TDA10046_FREQ_052, | |
363 | .pll_init = philips_europa_pll_init, | |
364 | .pll_set = philips_td1316_pll_set, | |
365 | .pll_sleep = philips_europa_analog, | |
366 | .request_firmware = NULL, | |
367 | }; | |
368 | ||
369 | /* ------------------------------------------------------------------ */ | |
86ddd96f MCC |
370 | |
371 | static int philips_fmd1216_pll_init(struct dvb_frontend *fe) | |
372 | { | |
373 | struct saa7134_dev *dev = fe->dvb->priv; | |
374 | /* this message is to set up ATC and ALC */ | |
375 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | |
376 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
377 | ||
378 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
379 | return -EIO; | |
380 | msleep(1); | |
381 | ||
382 | return 0; | |
383 | } | |
384 | ||
385 | static void philips_fmd1216_analog(struct dvb_frontend *fe) | |
386 | { | |
387 | struct saa7134_dev *dev = fe->dvb->priv; | |
388 | /* this message actually turns the tuner back to analog mode */ | |
389 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; | |
390 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
391 | ||
392 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
393 | msleep(1); | |
394 | fmd1216_init[2] = 0x86; | |
395 | fmd1216_init[3] = 0x54; | |
396 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
397 | msleep(1); | |
398 | } | |
399 | ||
400 | static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
401 | { | |
402 | struct saa7134_dev *dev = fe->dvb->priv; | |
403 | u8 tuner_buf[4]; | |
404 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len = | |
405 | sizeof(tuner_buf) }; | |
406 | int tuner_frequency = 0; | |
407 | int divider = 0; | |
408 | u8 band, mode, cp; | |
409 | ||
410 | /* determine charge pump */ | |
411 | tuner_frequency = params->frequency + 36130000; | |
412 | if (tuner_frequency < 87000000) | |
413 | return -EINVAL; | |
414 | /* low band */ | |
415 | else if (tuner_frequency < 180000000) { | |
416 | band = 1; | |
417 | mode = 7; | |
418 | cp = 0; | |
419 | } else if (tuner_frequency < 195000000) { | |
420 | band = 1; | |
421 | mode = 6; | |
422 | cp = 1; | |
423 | /* mid band */ | |
424 | } else if (tuner_frequency < 366000000) { | |
425 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
426 | band = 10; | |
427 | } else { | |
428 | band = 2; | |
429 | } | |
430 | mode = 7; | |
431 | cp = 0; | |
432 | } else if (tuner_frequency < 478000000) { | |
433 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
434 | band = 10; | |
435 | } else { | |
436 | band = 2; | |
437 | } | |
438 | mode = 6; | |
439 | cp = 1; | |
440 | /* high band */ | |
441 | } else if (tuner_frequency < 662000000) { | |
442 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
443 | band = 12; | |
444 | } else { | |
445 | band = 4; | |
446 | } | |
447 | mode = 7; | |
448 | cp = 0; | |
449 | } else if (tuner_frequency < 840000000) { | |
450 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
451 | band = 12; | |
452 | } else { | |
453 | band = 4; | |
454 | } | |
455 | mode = 6; | |
456 | cp = 1; | |
457 | } else { | |
458 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
459 | band = 12; | |
460 | } else { | |
461 | band = 4; | |
462 | } | |
463 | mode = 7; | |
464 | cp = 1; | |
465 | ||
466 | } | |
467 | /* calculate divisor */ | |
468 | /* ((36166000 + Finput) / 166666) rounded! */ | |
469 | divider = (tuner_frequency + 83333) / 166667; | |
470 | ||
471 | /* setup tuner buffer */ | |
472 | tuner_buf[0] = (divider >> 8) & 0x7f; | |
473 | tuner_buf[1] = divider & 0xff; | |
474 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; | |
475 | tuner_buf[3] = 0x40 | band; | |
476 | ||
477 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
478 | return -EIO; | |
479 | return 0; | |
480 | } | |
481 | ||
408b664a | 482 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
483 | .demod_address = 0x08, |
484 | .invert = 1, | |
485 | .invert_oclk = 0, | |
486 | .xtal_freq = TDA10046_XTAL_16M, | |
487 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
488 | .if_freq = TDA10046_FREQ_3613, | |
489 | .pll_init = philips_fmd1216_pll_init, | |
490 | .pll_set = philips_fmd1216_pll_set, | |
491 | .pll_sleep = philips_fmd1216_analog, | |
492 | .request_firmware = NULL, | |
493 | }; | |
494 | ||
495 | /* ------------------------------------------------------------------ */ | |
496 | ||
497 | struct tda827x_data { | |
498 | u32 lomax; | |
499 | u8 spd; | |
500 | u8 bs; | |
501 | u8 bp; | |
502 | u8 cp; | |
503 | u8 gc3; | |
504 | u8 div1p5; | |
505 | }; | |
506 | ||
507 | static struct tda827x_data tda827x_dvbt[] = { | |
508 | { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
509 | { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
510 | { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
511 | { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
512 | { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
513 | { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
514 | { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
515 | { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
516 | { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
517 | { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
518 | { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
519 | { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
520 | { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
521 | { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
522 | { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
523 | { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
524 | { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
525 | { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
526 | { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
527 | { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
528 | { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
529 | { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
530 | { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
531 | { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
532 | { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
533 | { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
534 | { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
535 | { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
536 | { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} | |
537 | }; | |
538 | ||
539 | static int philips_tda827x_pll_init(struct dvb_frontend *fe) | |
540 | { | |
541 | return 0; | |
542 | } | |
543 | ||
544 | static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
545 | { | |
546 | struct saa7134_dev *dev = fe->dvb->priv; | |
547 | u8 tuner_buf[14]; | |
548 | ||
549 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf, | |
4ac97914 | 550 | .len = sizeof(tuner_buf) }; |
86ddd96f MCC |
551 | int i, tuner_freq, if_freq; |
552 | u32 N; | |
553 | switch (params->u.ofdm.bandwidth) { | |
554 | case BANDWIDTH_6_MHZ: | |
555 | if_freq = 4000000; | |
556 | break; | |
557 | case BANDWIDTH_7_MHZ: | |
558 | if_freq = 4500000; | |
559 | break; | |
560 | default: /* 8 MHz or Auto */ | |
561 | if_freq = 5000000; | |
562 | break; | |
563 | } | |
564 | tuner_freq = params->frequency + if_freq; | |
565 | ||
566 | i = 0; | |
567 | while (tda827x_dvbt[i].lomax < tuner_freq) { | |
568 | if(tda827x_dvbt[i + 1].lomax == 0) | |
569 | break; | |
570 | i++; | |
571 | } | |
572 | ||
573 | N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2); | |
574 | tuner_buf[0] = 0; | |
575 | tuner_buf[1] = (N>>8) | 0x40; | |
576 | tuner_buf[2] = N & 0xff; | |
577 | tuner_buf[3] = 0; | |
578 | tuner_buf[4] = 0x52; | |
579 | tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) + | |
580 | (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp; | |
581 | tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f; | |
582 | tuner_buf[7] = 0xbf; | |
583 | tuner_buf[8] = 0x2a; | |
584 | tuner_buf[9] = 0x05; | |
585 | tuner_buf[10] = 0xff; | |
586 | tuner_buf[11] = 0x00; | |
587 | tuner_buf[12] = 0x00; | |
588 | tuner_buf[13] = 0x40; | |
589 | ||
590 | tuner_msg.len = 14; | |
591 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
592 | return -EIO; | |
593 | ||
594 | msleep(500); | |
595 | /* correct CP value */ | |
596 | tuner_buf[0] = 0x30; | |
597 | tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp; | |
598 | tuner_msg.len = 2; | |
599 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
600 | ||
601 | return 0; | |
602 | } | |
603 | ||
604 | static void philips_tda827x_pll_sleep(struct dvb_frontend *fe) | |
605 | { | |
606 | struct saa7134_dev *dev = fe->dvb->priv; | |
607 | static u8 tda827x_sleep[] = { 0x30, 0xd0}; | |
608 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep, | |
4ac97914 | 609 | .len = sizeof(tda827x_sleep) }; |
86ddd96f MCC |
610 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
611 | } | |
612 | ||
613 | static struct tda1004x_config tda827x_lifeview_config = { | |
614 | .demod_address = 0x08, | |
615 | .invert = 1, | |
616 | .invert_oclk = 0, | |
617 | .xtal_freq = TDA10046_XTAL_16M, | |
618 | .agc_config = TDA10046_AGC_TDA827X, | |
619 | .if_freq = TDA10046_FREQ_045, | |
620 | .pll_init = philips_tda827x_pll_init, | |
621 | .pll_set = philips_tda827x_pll_set, | |
622 | .pll_sleep = philips_tda827x_pll_sleep, | |
623 | .request_firmware = NULL, | |
1da177e4 | 624 | }; |
86ddd96f | 625 | #endif |
1da177e4 LT |
626 | |
627 | /* ------------------------------------------------------------------ */ | |
628 | ||
629 | static int dvb_init(struct saa7134_dev *dev) | |
630 | { | |
631 | /* init struct videobuf_dvb */ | |
632 | dev->ts.nr_bufs = 32; | |
633 | dev->ts.nr_packets = 32*4; | |
634 | dev->dvb.name = dev->name; | |
635 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, | |
636 | dev->pci, &dev->slock, | |
637 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
638 | V4L2_FIELD_ALTERNATE, | |
639 | sizeof(struct saa7134_buf), | |
640 | dev); | |
641 | ||
642 | switch (dev->board) { | |
29780bb7 | 643 | #ifdef HAVE_MT352 |
1da177e4 LT |
644 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: |
645 | printk("%s: pinnacle 300i dvb setup\n",dev->name); | |
646 | dev->dvb.frontend = mt352_attach(&pinnacle_300i, | |
647 | &dev->i2c_adap); | |
648 | break; | |
86ddd96f | 649 | #endif |
29780bb7 | 650 | #ifdef HAVE_TDA1004X |
1da177e4 LT |
651 | case SAA7134_BOARD_MD7134: |
652 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, | |
653 | &dev->i2c_adap); | |
1da177e4 | 654 | break; |
86ddd96f | 655 | case SAA7134_BOARD_PHILIPS_TOUGH: |
2cf36ac4 | 656 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config, |
86ddd96f MCC |
657 | &dev->i2c_adap); |
658 | break; | |
659 | case SAA7134_BOARD_FLYDVBTDUO: | |
660 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, | |
661 | &dev->i2c_adap); | |
662 | break; | |
663 | case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS: | |
664 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, | |
665 | &dev->i2c_adap); | |
666 | break; | |
2cf36ac4 HH |
667 | case SAA7134_BOARD_PHILIPS_EUROPA: |
668 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, | |
669 | &dev->i2c_adap); | |
670 | break; | |
671 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: | |
672 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, | |
673 | &dev->i2c_adap); | |
674 | break; | |
675 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
676 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config, | |
677 | &dev->i2c_adap); | |
678 | break; | |
86ddd96f | 679 | #endif |
1da177e4 LT |
680 | default: |
681 | printk("%s: Huh? unknown DVB card?\n",dev->name); | |
682 | break; | |
683 | } | |
684 | ||
685 | if (NULL == dev->dvb.frontend) { | |
686 | printk("%s: frontend initialization failed\n",dev->name); | |
687 | return -1; | |
688 | } | |
689 | ||
690 | /* register everything else */ | |
691 | return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); | |
692 | } | |
693 | ||
694 | static int dvb_fini(struct saa7134_dev *dev) | |
695 | { | |
696 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
697 | ||
1da177e4 LT |
698 | switch (dev->board) { |
699 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
700 | /* otherwise we don't detect the tuner on next insmod */ | |
701 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
702 | break; | |
703 | }; | |
704 | videobuf_dvb_unregister(&dev->dvb); | |
705 | return 0; | |
706 | } | |
707 | ||
708 | static struct saa7134_mpeg_ops dvb_ops = { | |
709 | .type = SAA7134_MPEG_DVB, | |
710 | .init = dvb_init, | |
711 | .fini = dvb_fini, | |
712 | }; | |
713 | ||
714 | static int __init dvb_register(void) | |
715 | { | |
716 | return saa7134_ts_register(&dvb_ops); | |
717 | } | |
718 | ||
719 | static void __exit dvb_unregister(void) | |
720 | { | |
721 | saa7134_ts_unregister(&dvb_ops); | |
722 | } | |
723 | ||
724 | module_init(dvb_register); | |
725 | module_exit(dvb_unregister); | |
726 | ||
727 | /* ------------------------------------------------------------------ */ | |
728 | /* | |
729 | * Local variables: | |
730 | * c-basic-offset: 8 | |
731 | * End: | |
732 | */ |