Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
1da177e4 | 36 | |
1f10c7af AQ |
37 | #include "mt352.h" |
38 | #include "mt352_priv.h" /* FIXME */ | |
39 | #include "tda1004x.h" | |
40 | #include "nxt200x.h" | |
1da177e4 | 41 | |
e2ac28fa IL |
42 | #include "tda10086.h" |
43 | #include "tda826x.h" | |
8ce47dad | 44 | #include "tda827x.h" |
e2ac28fa | 45 | #include "isl6421.h" |
8ce47dad | 46 | |
1da177e4 LT |
47 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
48 | MODULE_LICENSE("GPL"); | |
49 | ||
50 | static unsigned int antenna_pwr = 0; | |
86ddd96f | 51 | |
1da177e4 LT |
52 | module_param(antenna_pwr, int, 0444); |
53 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
54 | ||
b331daa0 SB |
55 | static int use_frontend = 0; |
56 | module_param(use_frontend, int, 0644); | |
57 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 58 | |
58ef4f92 HH |
59 | static int debug = 0; |
60 | module_param(debug, int, 0644); | |
61 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
62 | ||
cf3c34c8 TP |
63 | #define dprintk(fmt, arg...) do { if (debug) \ |
64 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
65 | ||
66 | /* Print a warning */ | |
67 | #define wprintk(fmt, arg...) \ | |
68 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
69 | |
70 | /* ------------------------------------------------------------------ | |
71 | * mt352 based DVB-T cards | |
72 | */ | |
73 | ||
1da177e4 LT |
74 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
75 | { | |
76 | u32 ok; | |
77 | ||
78 | if (!on) { | |
79 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
80 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
81 | return 0; | |
82 | } | |
83 | ||
84 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
85 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
86 | udelay(10); | |
87 | ||
88 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
89 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
90 | udelay(10); | |
91 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
92 | udelay(10); | |
93 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
cf3c34c8 | 94 | dprintk("%s %s\n", __FUNCTION__, ok ? "on" : "off"); |
1da177e4 LT |
95 | |
96 | if (!ok) | |
97 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
98 | return ok; | |
99 | } | |
100 | ||
101 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
102 | { | |
103 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
104 | static u8 reset [] = { RESET, 0x80 }; | |
105 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
106 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
107 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
108 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
109 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
110 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
111 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
112 | struct saa7134_dev *dev= fe->dvb->priv; | |
113 | ||
cf3c34c8 | 114 | dprintk("%s called\n", __FUNCTION__); |
1da177e4 LT |
115 | |
116 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
117 | udelay(200); | |
118 | mt352_write(fe, reset, sizeof(reset)); | |
119 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
120 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
121 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
122 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
123 | ||
124 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
125 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
126 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 127 | |
1da177e4 LT |
128 | return 0; |
129 | } | |
130 | ||
a78d0bfa JAR |
131 | static int mt352_aver777_init(struct dvb_frontend* fe) |
132 | { | |
133 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
134 | static u8 reset [] = { RESET, 0x80 }; | |
135 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
136 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
137 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
138 | ||
139 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
140 | udelay(200); | |
141 | mt352_write(fe, reset, sizeof(reset)); | |
142 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
143 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
144 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
0463f12c AQ |
149 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
150 | struct dvb_frontend_parameters* params) | |
1da177e4 | 151 | { |
df8cf706 HH |
152 | u8 off[] = { 0x00, 0xf1}; |
153 | u8 on[] = { 0x00, 0x71}; | |
154 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
155 | ||
1da177e4 LT |
156 | struct saa7134_dev *dev = fe->dvb->priv; |
157 | struct v4l2_frequency f; | |
158 | ||
159 | /* set frequency (mt2050) */ | |
160 | f.tuner = 0; | |
161 | f.type = V4L2_TUNER_DIGITAL_TV; | |
162 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
163 | if (fe->ops.i2c_gate_ctrl) |
164 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 165 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 | 166 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); |
df8cf706 | 167 | msg.buf = on; |
dea74869 PB |
168 | if (fe->ops.i2c_gate_ctrl) |
169 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 170 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
171 | |
172 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
173 | ||
174 | /* mt352 setup */ | |
0463f12c | 175 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
176 | } |
177 | ||
178 | static struct mt352_config pinnacle_300i = { | |
179 | .demod_address = 0x3c >> 1, | |
180 | .adc_clock = 20333, | |
181 | .if2 = 36150, | |
182 | .no_tuner = 1, | |
183 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 184 | }; |
a78d0bfa JAR |
185 | |
186 | static struct mt352_config avermedia_777 = { | |
187 | .demod_address = 0xf, | |
188 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 189 | }; |
1da177e4 | 190 | |
58ef4f92 HH |
191 | /* ================================================================== |
192 | * tda1004x based DVB-T cards, helper functions | |
193 | */ | |
194 | ||
195 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
196 | const struct firmware **fw, char *name) | |
1da177e4 LT |
197 | { |
198 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
199 | return request_firmware(fw, name, &dev->pci->dev); |
200 | } | |
201 | ||
58ef4f92 HH |
202 | /* ------------------------------------------------------------------ |
203 | * these tuners are tu1216, td1316(a) | |
204 | */ | |
205 | ||
206 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
207 | { | |
208 | struct saa7134_dev *dev = fe->dvb->priv; | |
209 | struct tda1004x_state *state = fe->demodulator_priv; | |
210 | u8 addr = state->config->tuner_address; | |
86ddd96f | 211 | u8 tuner_buf[4]; |
2cf36ac4 | 212 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
213 | sizeof(tuner_buf) }; |
214 | int tuner_frequency = 0; | |
215 | u8 band, cp, filter; | |
216 | ||
217 | /* determine charge pump */ | |
218 | tuner_frequency = params->frequency + 36166000; | |
219 | if (tuner_frequency < 87000000) | |
220 | return -EINVAL; | |
221 | else if (tuner_frequency < 130000000) | |
222 | cp = 3; | |
223 | else if (tuner_frequency < 160000000) | |
224 | cp = 5; | |
225 | else if (tuner_frequency < 200000000) | |
226 | cp = 6; | |
227 | else if (tuner_frequency < 290000000) | |
228 | cp = 3; | |
229 | else if (tuner_frequency < 420000000) | |
230 | cp = 5; | |
231 | else if (tuner_frequency < 480000000) | |
232 | cp = 6; | |
233 | else if (tuner_frequency < 620000000) | |
234 | cp = 3; | |
235 | else if (tuner_frequency < 830000000) | |
236 | cp = 5; | |
237 | else if (tuner_frequency < 895000000) | |
238 | cp = 7; | |
239 | else | |
240 | return -EINVAL; | |
241 | ||
242 | /* determine band */ | |
243 | if (params->frequency < 49000000) | |
244 | return -EINVAL; | |
245 | else if (params->frequency < 161000000) | |
246 | band = 1; | |
247 | else if (params->frequency < 444000000) | |
248 | band = 2; | |
249 | else if (params->frequency < 861000000) | |
250 | band = 4; | |
251 | else | |
252 | return -EINVAL; | |
253 | ||
254 | /* setup PLL filter */ | |
255 | switch (params->u.ofdm.bandwidth) { | |
256 | case BANDWIDTH_6_MHZ: | |
257 | filter = 0; | |
258 | break; | |
259 | ||
260 | case BANDWIDTH_7_MHZ: | |
261 | filter = 0; | |
262 | break; | |
263 | ||
264 | case BANDWIDTH_8_MHZ: | |
265 | filter = 1; | |
266 | break; | |
1da177e4 | 267 | |
86ddd96f MCC |
268 | default: |
269 | return -EINVAL; | |
270 | } | |
271 | ||
272 | /* calculate divisor | |
273 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 274 | */ |
86ddd96f MCC |
275 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
276 | ||
277 | /* setup tuner buffer */ | |
278 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
279 | tuner_buf[1] = tuner_frequency & 0xff; | |
280 | tuner_buf[2] = 0xca; | |
281 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
282 | ||
dea74869 PB |
283 | if (fe->ops.i2c_gate_ctrl) |
284 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 285 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
286 | wprintk("could not write to tuner at addr: 0x%02x\n", |
287 | addr << 1); | |
86ddd96f | 288 | return -EIO; |
58ef4f92 | 289 | } |
2cf36ac4 HH |
290 | msleep(1); |
291 | return 0; | |
292 | } | |
293 | ||
58ef4f92 | 294 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
295 | { |
296 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
297 | struct tda1004x_state *state = fe->demodulator_priv; |
298 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
299 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
300 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 301 | |
2cf36ac4 | 302 | /* setup PLL configuration */ |
dea74869 PB |
303 | if (fe->ops.i2c_gate_ctrl) |
304 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
305 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
306 | return -EIO; | |
86ddd96f | 307 | msleep(1); |
2cf36ac4 | 308 | |
1da177e4 LT |
309 | return 0; |
310 | } | |
311 | ||
2cf36ac4 HH |
312 | /* ------------------------------------------------------------------ */ |
313 | ||
2cf36ac4 | 314 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
315 | .demod_address = 0x8, |
316 | .invert = 1, | |
2cf36ac4 | 317 | .invert_oclk = 0, |
86ddd96f MCC |
318 | .xtal_freq = TDA10046_XTAL_4M, |
319 | .agc_config = TDA10046_AGC_DEFAULT, | |
320 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
321 | .tuner_address = 0x60, |
322 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
323 | }; |
324 | ||
2cf36ac4 HH |
325 | static struct tda1004x_config philips_tu1216_61_config = { |
326 | ||
327 | .demod_address = 0x8, | |
328 | .invert = 1, | |
329 | .invert_oclk = 0, | |
330 | .xtal_freq = TDA10046_XTAL_4M, | |
331 | .agc_config = TDA10046_AGC_DEFAULT, | |
332 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
333 | .tuner_address = 0x61, |
334 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
335 | }; |
336 | ||
337 | /* ------------------------------------------------------------------ */ | |
338 | ||
cbb94521 | 339 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
340 | { |
341 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
342 | struct tda1004x_state *state = fe->demodulator_priv; |
343 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 344 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 345 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
346 | |
347 | /* setup PLL configuration */ | |
dea74869 PB |
348 | if (fe->ops.i2c_gate_ctrl) |
349 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
350 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
351 | return -EIO; | |
2cf36ac4 HH |
352 | return 0; |
353 | } | |
354 | ||
a79ddae9 | 355 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 356 | { |
58ef4f92 HH |
357 | return philips_tda6651_pll_set(fe, params); |
358 | } | |
359 | ||
360 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
361 | { | |
362 | struct saa7134_dev *dev = fe->dvb->priv; | |
363 | struct tda1004x_state *state = fe->demodulator_priv; | |
364 | u8 addr = state->config->tuner_address; | |
365 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
366 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
367 | ||
368 | /* switch the tuner to analog mode */ | |
369 | if (fe->ops.i2c_gate_ctrl) | |
370 | fe->ops.i2c_gate_ctrl(fe, 1); | |
371 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
372 | return -EIO; | |
373 | return 0; | |
2cf36ac4 HH |
374 | } |
375 | ||
58ef4f92 HH |
376 | /* ------------------------------------------------------------------ */ |
377 | ||
cbb94521 HH |
378 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
379 | { | |
380 | struct saa7134_dev *dev = fe->dvb->priv; | |
381 | static u8 msg[] = { 0x00, 0x40}; | |
382 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
383 | ||
384 | ||
385 | if (philips_td1316_tuner_init(fe)) | |
386 | return -EIO; | |
387 | msleep(1); | |
388 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
389 | return -EIO; | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
a79ddae9 | 394 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
395 | { |
396 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 397 | |
58ef4f92 HH |
398 | static u8 msg[] = { 0x00, 0x14 }; |
399 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
400 | ||
401 | if (philips_td1316_tuner_sleep(fe)) | |
402 | return -EIO; | |
2cf36ac4 HH |
403 | |
404 | /* switch the board to analog mode */ | |
dea74869 PB |
405 | if (fe->ops.i2c_gate_ctrl) |
406 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 407 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
408 | return 0; |
409 | } | |
410 | ||
411 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
412 | { | |
413 | struct saa7134_dev *dev = fe->dvb->priv; | |
414 | ||
415 | if (dev->original_demod_sleep) | |
416 | dev->original_demod_sleep(fe); | |
dea74869 | 417 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 418 | return 0; |
2cf36ac4 HH |
419 | } |
420 | ||
421 | static struct tda1004x_config philips_europa_config = { | |
422 | ||
423 | .demod_address = 0x8, | |
424 | .invert = 0, | |
425 | .invert_oclk = 0, | |
426 | .xtal_freq = TDA10046_XTAL_4M, | |
427 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
428 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
429 | .tuner_address = 0x61, |
430 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
431 | }; |
432 | ||
433 | /* ------------------------------------------------------------------ */ | |
86ddd96f | 434 | |
a79ddae9 | 435 | static int philips_fmd1216_tuner_init(struct dvb_frontend *fe) |
86ddd96f MCC |
436 | { |
437 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
438 | struct tda1004x_state *state = fe->demodulator_priv; |
439 | u8 addr = state->config->tuner_address; | |
86ddd96f MCC |
440 | /* this message is to set up ATC and ALC */ |
441 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | |
58ef4f92 | 442 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
86ddd96f | 443 | |
dea74869 PB |
444 | if (fe->ops.i2c_gate_ctrl) |
445 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
446 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
447 | return -EIO; | |
448 | msleep(1); | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
a79ddae9 | 453 | static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe) |
86ddd96f MCC |
454 | { |
455 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
456 | struct tda1004x_state *state = fe->demodulator_priv; |
457 | u8 addr = state->config->tuner_address; | |
86ddd96f | 458 | /* this message actually turns the tuner back to analog mode */ |
cf83ac43 | 459 | u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; |
58ef4f92 | 460 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
86ddd96f | 461 | |
dea74869 PB |
462 | if (fe->ops.i2c_gate_ctrl) |
463 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
464 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
465 | msleep(1); | |
466 | fmd1216_init[2] = 0x86; | |
467 | fmd1216_init[3] = 0x54; | |
dea74869 PB |
468 | if (fe->ops.i2c_gate_ctrl) |
469 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
470 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
471 | msleep(1); | |
a79ddae9 | 472 | return 0; |
86ddd96f MCC |
473 | } |
474 | ||
a79ddae9 | 475 | static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
86ddd96f MCC |
476 | { |
477 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
478 | struct tda1004x_state *state = fe->demodulator_priv; |
479 | u8 addr = state->config->tuner_address; | |
86ddd96f | 480 | u8 tuner_buf[4]; |
58ef4f92 | 481 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
482 | sizeof(tuner_buf) }; |
483 | int tuner_frequency = 0; | |
484 | int divider = 0; | |
485 | u8 band, mode, cp; | |
486 | ||
487 | /* determine charge pump */ | |
488 | tuner_frequency = params->frequency + 36130000; | |
489 | if (tuner_frequency < 87000000) | |
490 | return -EINVAL; | |
491 | /* low band */ | |
492 | else if (tuner_frequency < 180000000) { | |
493 | band = 1; | |
494 | mode = 7; | |
495 | cp = 0; | |
496 | } else if (tuner_frequency < 195000000) { | |
497 | band = 1; | |
498 | mode = 6; | |
499 | cp = 1; | |
500 | /* mid band */ | |
501 | } else if (tuner_frequency < 366000000) { | |
502 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
503 | band = 10; | |
504 | } else { | |
505 | band = 2; | |
506 | } | |
507 | mode = 7; | |
508 | cp = 0; | |
509 | } else if (tuner_frequency < 478000000) { | |
510 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
511 | band = 10; | |
512 | } else { | |
513 | band = 2; | |
514 | } | |
515 | mode = 6; | |
516 | cp = 1; | |
517 | /* high band */ | |
518 | } else if (tuner_frequency < 662000000) { | |
519 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
520 | band = 12; | |
521 | } else { | |
522 | band = 4; | |
523 | } | |
524 | mode = 7; | |
525 | cp = 0; | |
526 | } else if (tuner_frequency < 840000000) { | |
527 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
528 | band = 12; | |
529 | } else { | |
530 | band = 4; | |
531 | } | |
532 | mode = 6; | |
533 | cp = 1; | |
534 | } else { | |
535 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
536 | band = 12; | |
537 | } else { | |
538 | band = 4; | |
539 | } | |
540 | mode = 7; | |
541 | cp = 1; | |
542 | ||
543 | } | |
544 | /* calculate divisor */ | |
545 | /* ((36166000 + Finput) / 166666) rounded! */ | |
546 | divider = (tuner_frequency + 83333) / 166667; | |
547 | ||
548 | /* setup tuner buffer */ | |
549 | tuner_buf[0] = (divider >> 8) & 0x7f; | |
550 | tuner_buf[1] = divider & 0xff; | |
551 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; | |
552 | tuner_buf[3] = 0x40 | band; | |
553 | ||
dea74869 PB |
554 | if (fe->ops.i2c_gate_ctrl) |
555 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 556 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
557 | wprintk("could not write to tuner at addr: 0x%02x\n", |
558 | addr << 1); | |
86ddd96f | 559 | return -EIO; |
58ef4f92 | 560 | } |
86ddd96f MCC |
561 | return 0; |
562 | } | |
563 | ||
408b664a | 564 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
565 | .demod_address = 0x08, |
566 | .invert = 1, | |
567 | .invert_oclk = 0, | |
568 | .xtal_freq = TDA10046_XTAL_16M, | |
569 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
570 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
571 | .tuner_address = 0x61, |
572 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
573 | }; |
574 | ||
58ef4f92 HH |
575 | /* ------------------------------------------------------------------ |
576 | * tda 1004x based cards with philips silicon tuner | |
577 | */ | |
578 | ||
579 | static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high) | |
580 | { | |
581 | struct saa7134_dev *dev = fe->dvb->priv; | |
582 | struct tda1004x_state *state = fe->demodulator_priv; | |
583 | u8 addr = state->config->i2c_gate; | |
584 | u8 config = state->config->tuner_config; | |
585 | u8 GP00_CF[] = {0x20, 0x01}; | |
586 | u8 GP00_LEV[] = {0x22, 0x00}; | |
587 | ||
588 | struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2}; | |
589 | if (config) { | |
590 | if (high) { | |
591 | dprintk("setting LNA to high gain\n"); | |
592 | } else { | |
593 | dprintk("setting LNA to low gain\n"); | |
594 | } | |
595 | } | |
596 | switch (config) { | |
597 | case 0: /* no LNA */ | |
598 | break; | |
599 | case 1: /* switch is GPIO 0 of tda8290 */ | |
600 | case 2: | |
601 | /* turn Vsync off */ | |
602 | saa7134_set_gpio(dev, 22, 0); | |
603 | GP00_LEV[1] = high ? 0 : 1; | |
604 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
cf3c34c8 TP |
605 | wprintk("could not access tda8290 at addr: 0x%02x\n", |
606 | addr << 1); | |
58ef4f92 HH |
607 | return; |
608 | } | |
609 | msg.buf = GP00_LEV; | |
610 | if (config == 2) | |
611 | GP00_LEV[1] = high ? 1 : 0; | |
612 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
613 | break; | |
614 | case 3: /* switch with GPIO of saa713x */ | |
615 | saa7134_set_gpio(dev, 22, high); | |
616 | break; | |
617 | } | |
618 | } | |
619 | ||
620 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) | |
621 | { | |
58ef4f92 HH |
622 | struct tda1004x_state *state = fe->demodulator_priv; |
623 | ||
624 | u8 addr = state->config->i2c_gate; | |
625 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
626 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
627 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
628 | if (enable) { | |
629 | tda8290_msg.buf = tda8290_close; | |
630 | } else { | |
631 | tda8290_msg.buf = tda8290_open; | |
632 | } | |
06be3035 | 633 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
634 | struct saa7134_dev *dev = fe->dvb->priv; |
635 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
636 | return -EIO; |
637 | } | |
638 | msleep(20); | |
639 | return 0; | |
640 | } | |
641 | ||
86ddd96f MCC |
642 | /* ------------------------------------------------------------------ */ |
643 | ||
58ef4f92 | 644 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 645 | { |
90e9df7f | 646 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 647 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 648 | |
58ef4f92 HH |
649 | switch (state->config->antenna_switch) { |
650 | case 0: break; | |
651 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
652 | saa7134_set_gpio(dev, 21, 0); | |
653 | break; | |
654 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
655 | saa7134_set_gpio(dev, 21, 1); | |
656 | break; | |
587d2fd7 | 657 | } |
587d2fd7 HH |
658 | return 0; |
659 | } | |
660 | ||
58ef4f92 | 661 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 662 | { |
58ef4f92 HH |
663 | struct saa7134_dev *dev = fe->dvb->priv; |
664 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 665 | |
58ef4f92 HH |
666 | switch (state->config->antenna_switch) { |
667 | case 0: break; | |
668 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
669 | saa7134_set_gpio(dev, 21, 1); | |
670 | break; | |
671 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
672 | saa7134_set_gpio(dev, 21, 0); | |
673 | break; | |
674 | } | |
587d2fd7 | 675 | return 0; |
2d6b5f62 | 676 | } |
90e9df7f | 677 | |
8ce47dad MK |
678 | static struct tda827x_config tda827x_cfg = { |
679 | .lna_gain = philips_tda827x_lna_gain, | |
680 | .init = philips_tda827x_tuner_init, | |
681 | .sleep = philips_tda827x_tuner_sleep | |
682 | }; | |
90e9df7f | 683 | |
b8bc76d8 | 684 | static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf) |
90e9df7f | 685 | { |
58ef4f92 HH |
686 | dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap); |
687 | if (dev->dvb.frontend) { | |
688 | if (tda_conf->i2c_gate) | |
689 | dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; | |
ede2200d HH |
690 | if (dvb_attach(tda827x_attach, dev->dvb.frontend, tda_conf->tuner_address, |
691 | &dev->i2c_adap,&tda827x_cfg) == NULL) { | |
cf3c34c8 | 692 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d HH |
693 | tda_conf->tuner_address); |
694 | } | |
58ef4f92 | 695 | } |
90e9df7f HH |
696 | } |
697 | ||
58ef4f92 HH |
698 | /* ------------------------------------------------------------------ */ |
699 | static struct tda1004x_config tda827x_lifeview_config = { | |
90e9df7f HH |
700 | .demod_address = 0x08, |
701 | .invert = 1, | |
702 | .invert_oclk = 0, | |
703 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
704 | .agc_config = TDA10046_AGC_TDA827X, |
705 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 706 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
707 | .tuner_address = 0x60, |
708 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 709 | }; |
550a9a5e | 710 | |
58ef4f92 HH |
711 | static struct tda1004x_config philips_tiger_config = { |
712 | .demod_address = 0x08, | |
713 | .invert = 1, | |
714 | .invert_oclk = 0, | |
715 | .xtal_freq = TDA10046_XTAL_16M, | |
716 | .agc_config = TDA10046_AGC_TDA827X, | |
717 | .gpio_config = TDA10046_GP11_I, | |
718 | .if_freq = TDA10046_FREQ_045, | |
719 | .i2c_gate = 0x4b, | |
720 | .tuner_address = 0x61, | |
721 | .tuner_config = 0, | |
722 | .antenna_switch= 1, | |
723 | .request_firmware = philips_tda1004x_request_firmware | |
724 | }; | |
550a9a5e HH |
725 | |
726 | static struct tda1004x_config cinergy_ht_config = { | |
727 | .demod_address = 0x08, | |
728 | .invert = 1, | |
729 | .invert_oclk = 0, | |
730 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
731 | .agc_config = TDA10046_AGC_TDA827X, |
732 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 733 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
734 | .i2c_gate = 0x4b, |
735 | .tuner_address = 0x61, | |
736 | .tuner_config = 0, | |
737 | .request_firmware = philips_tda1004x_request_firmware | |
90e9df7f HH |
738 | }; |
739 | ||
58ef4f92 HH |
740 | static struct tda1004x_config cinergy_ht_pci_config = { |
741 | .demod_address = 0x08, | |
742 | .invert = 1, | |
743 | .invert_oclk = 0, | |
744 | .xtal_freq = TDA10046_XTAL_16M, | |
745 | .agc_config = TDA10046_AGC_TDA827X, | |
746 | .gpio_config = TDA10046_GP01_I, | |
747 | .if_freq = TDA10046_FREQ_045, | |
748 | .i2c_gate = 0x4b, | |
749 | .tuner_address = 0x60, | |
750 | .tuner_config = 0, | |
751 | .request_firmware = philips_tda1004x_request_firmware | |
752 | }; | |
753 | ||
754 | static struct tda1004x_config philips_tiger_s_config = { | |
755 | .demod_address = 0x08, | |
756 | .invert = 1, | |
757 | .invert_oclk = 0, | |
758 | .xtal_freq = TDA10046_XTAL_16M, | |
759 | .agc_config = TDA10046_AGC_TDA827X, | |
760 | .gpio_config = TDA10046_GP01_I, | |
761 | .if_freq = TDA10046_FREQ_045, | |
762 | .i2c_gate = 0x4b, | |
763 | .tuner_address = 0x61, | |
764 | .tuner_config = 2, | |
765 | .antenna_switch= 1, | |
766 | .request_firmware = philips_tda1004x_request_firmware | |
767 | }; | |
df42eaf2 | 768 | |
587d2fd7 HH |
769 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
770 | .demod_address = 0x08, | |
771 | .invert = 1, | |
772 | .invert_oclk = 0, | |
773 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
774 | .agc_config = TDA10046_AGC_TDA827X, |
775 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 776 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
777 | .i2c_gate = 0x4b, |
778 | .tuner_address = 0x61, | |
779 | .tuner_config = 1, | |
780 | .request_firmware = philips_tda1004x_request_firmware | |
587d2fd7 HH |
781 | }; |
782 | ||
c6e53daf TG |
783 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
784 | .demod_address = 0x08, | |
785 | .invert = 1, | |
786 | .invert_oclk = 0, | |
787 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
788 | .agc_config = TDA10046_AGC_TDA827X, |
789 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 790 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
791 | .i2c_gate = 0x4b, |
792 | .tuner_address = 0x61, | |
793 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
794 | }; |
795 | ||
83646817 HH |
796 | static struct tda1004x_config asus_p7131_dual_config = { |
797 | .demod_address = 0x08, | |
798 | .invert = 1, | |
799 | .invert_oclk = 0, | |
800 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
801 | .agc_config = TDA10046_AGC_TDA827X, |
802 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 803 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
804 | .i2c_gate = 0x4b, |
805 | .tuner_address = 0x61, | |
806 | .tuner_config = 0, | |
807 | .antenna_switch= 2, | |
808 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
809 | }; |
810 | ||
420f32fe NS |
811 | static struct tda1004x_config lifeview_trio_config = { |
812 | .demod_address = 0x09, | |
813 | .invert = 1, | |
814 | .invert_oclk = 0, | |
815 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
816 | .agc_config = TDA10046_AGC_TDA827X, |
817 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 818 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
819 | .tuner_address = 0x60, |
820 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
821 | }; |
822 | ||
58ef4f92 | 823 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
824 | .demod_address = 0x08, |
825 | .invert = 1, | |
826 | .invert_oclk = 0, | |
827 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 828 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 829 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 830 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
831 | .tuner_address = 0x60, |
832 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
833 | }; |
834 | ||
58ef4f92 | 835 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
836 | .demod_address = 0x08, |
837 | .invert = 1, | |
838 | .invert_oclk = 0, | |
839 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 840 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 841 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 842 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
843 | .i2c_gate = 0x4b, |
844 | .tuner_address = 0x60, | |
845 | .tuner_config = 0, | |
846 | .request_firmware = philips_tda1004x_request_firmware | |
3dfb729f PH |
847 | }; |
848 | ||
e06cea4c HH |
849 | static struct tda1004x_config asus_p7131_4871_config = { |
850 | .demod_address = 0x08, | |
851 | .invert = 1, | |
852 | .invert_oclk = 0, | |
853 | .xtal_freq = TDA10046_XTAL_16M, | |
854 | .agc_config = TDA10046_AGC_TDA827X, | |
855 | .gpio_config = TDA10046_GP01_I, | |
856 | .if_freq = TDA10046_FREQ_045, | |
857 | .i2c_gate = 0x4b, | |
858 | .tuner_address = 0x61, | |
859 | .tuner_config = 2, | |
860 | .antenna_switch= 2, | |
861 | .request_firmware = philips_tda1004x_request_firmware | |
862 | }; | |
863 | ||
f3eec0c0 | 864 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
865 | .demod_address = 0x08, |
866 | .invert = 1, | |
867 | .invert_oclk = 0, | |
868 | .xtal_freq = TDA10046_XTAL_16M, | |
869 | .agc_config = TDA10046_AGC_TDA827X, | |
870 | .gpio_config = TDA10046_GP11_I, | |
871 | .if_freq = TDA10046_FREQ_045, | |
872 | .i2c_gate = 0x4b, | |
873 | .tuner_address = 0x61, | |
874 | .tuner_config = 2, | |
875 | .antenna_switch= 2, | |
876 | .request_firmware = philips_tda1004x_request_firmware | |
877 | }; | |
b39423a9 SF |
878 | static struct tda1004x_config kworld_dvb_t_210_config = { |
879 | .demod_address = 0x08, | |
880 | .invert = 1, | |
881 | .invert_oclk = 0, | |
882 | .xtal_freq = TDA10046_XTAL_16M, | |
883 | .agc_config = TDA10046_AGC_TDA827X, | |
884 | .gpio_config = TDA10046_GP11_I, | |
885 | .if_freq = TDA10046_FREQ_045, | |
886 | .i2c_gate = 0x4b, | |
887 | .tuner_address = 0x61, | |
888 | .tuner_config = 2, | |
889 | .antenna_switch= 1, | |
890 | .request_firmware = philips_tda1004x_request_firmware | |
891 | }; | |
58ef4f92 HH |
892 | /* ------------------------------------------------------------------ |
893 | * special case: this card uses saa713x GPIO22 for the mode switch | |
894 | */ | |
5eda227f | 895 | |
58ef4f92 | 896 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
897 | { |
898 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
899 | philips_tda827x_tuner_init(fe); |
900 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 901 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
902 | return 0; |
903 | } | |
904 | ||
58ef4f92 | 905 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 906 | { |
5eda227f | 907 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 908 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 909 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
910 | philips_tda827x_tuner_sleep(fe); |
911 | return 0; | |
5eda227f HH |
912 | } |
913 | ||
8ce47dad MK |
914 | static struct tda827x_config ads_duo_cfg = { |
915 | .lna_gain = philips_tda827x_lna_gain, | |
916 | .init = ads_duo_tuner_init, | |
917 | .sleep = ads_duo_tuner_sleep | |
918 | }; | |
919 | ||
58ef4f92 | 920 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
921 | .demod_address = 0x08, |
922 | .invert = 1, | |
923 | .invert_oclk = 0, | |
924 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 925 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 926 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 927 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
928 | .tuner_address = 0x61, |
929 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
930 | }; |
931 | ||
58ef4f92 HH |
932 | /* ================================================================== |
933 | * tda10086 based DVB-S cards, helper functions | |
934 | */ | |
935 | ||
e2ac28fa IL |
936 | static struct tda10086_config flydvbs = { |
937 | .demod_address = 0x0e, | |
938 | .invert = 0, | |
939 | }; | |
940 | ||
58ef4f92 HH |
941 | /* ================================================================== |
942 | * nxt200x based ATSC cards, helper functions | |
943 | */ | |
90e9df7f | 944 | |
3b64e8e2 MK |
945 | static struct nxt200x_config avertvhda180 = { |
946 | .demod_address = 0x0a, | |
3b64e8e2 | 947 | }; |
3e1410ad AB |
948 | |
949 | static struct nxt200x_config kworldatsc110 = { | |
950 | .demod_address = 0x0a, | |
3e1410ad | 951 | }; |
3b64e8e2 | 952 | |
58ef4f92 HH |
953 | /* ================================================================== |
954 | * Core code | |
955 | */ | |
1da177e4 LT |
956 | |
957 | static int dvb_init(struct saa7134_dev *dev) | |
958 | { | |
1c4f76ab | 959 | int ret; |
1da177e4 LT |
960 | /* init struct videobuf_dvb */ |
961 | dev->ts.nr_bufs = 32; | |
962 | dev->ts.nr_packets = 32*4; | |
963 | dev->dvb.name = dev->name; | |
964 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, | |
965 | dev->pci, &dev->slock, | |
966 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
967 | V4L2_FIELD_ALTERNATE, | |
968 | sizeof(struct saa7134_buf), | |
969 | dev); | |
970 | ||
971 | switch (dev->board) { | |
972 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 973 | dprintk("pinnacle 300i dvb setup\n"); |
2bfe031d | 974 | dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 975 | &dev->i2c_adap); |
6b3ccab7 | 976 | if (dev->dvb.frontend) { |
dea74869 | 977 | dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; |
6b3ccab7 | 978 | } |
1da177e4 | 979 | break; |
a78d0bfa | 980 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 981 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 982 | dprintk("avertv 777 dvb setup\n"); |
2bfe031d | 983 | dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 984 | &dev->i2c_adap); |
6b3ccab7 | 985 | if (dev->dvb.frontend) { |
8511df9e MK |
986 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
987 | NULL, &dvb_pll_philips_td1316); | |
6b3ccab7 | 988 | } |
a78d0bfa | 989 | break; |
1da177e4 | 990 | case SAA7134_BOARD_MD7134: |
f7b54b10 MK |
991 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
992 | &medion_cardbus, | |
993 | &dev->i2c_adap); | |
6b3ccab7 | 994 | if (dev->dvb.frontend) { |
dea74869 PB |
995 | dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init; |
996 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep; | |
997 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params; | |
6b3ccab7 | 998 | } |
1da177e4 | 999 | break; |
86ddd96f | 1000 | case SAA7134_BOARD_PHILIPS_TOUGH: |
f7b54b10 MK |
1001 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1002 | &philips_tu1216_60_config, | |
1003 | &dev->i2c_adap); | |
6b3ccab7 | 1004 | if (dev->dvb.frontend) { |
58ef4f92 HH |
1005 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
1006 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1007 | } |
86ddd96f MCC |
1008 | break; |
1009 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1010 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
b8bc76d8 | 1011 | configure_tda827x_fe(dev, &tda827x_lifeview_config); |
86ddd96f | 1012 | break; |
2cf36ac4 | 1013 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1014 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
f7b54b10 MK |
1015 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1016 | &philips_europa_config, | |
1017 | &dev->i2c_adap); | |
6b3ccab7 | 1018 | if (dev->dvb.frontend) { |
588f9831 HH |
1019 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; |
1020 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
dea74869 PB |
1021 | dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; |
1022 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1023 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1024 | } |
2cf36ac4 HH |
1025 | break; |
1026 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
f7b54b10 MK |
1027 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1028 | &philips_tu1216_61_config, | |
1029 | &dev->i2c_adap); | |
6b3ccab7 | 1030 | if (dev->dvb.frontend) { |
58ef4f92 HH |
1031 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
1032 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1033 | } |
2cf36ac4 | 1034 | break; |
b39423a9 SF |
1035 | case SAA7134_BOARD_KWORLD_DVBT_210: |
1036 | configure_tda827x_fe(dev, &kworld_dvb_t_210_config); | |
1037 | break; | |
90e9df7f | 1038 | case SAA7134_BOARD_PHILIPS_TIGER: |
b8bc76d8 | 1039 | configure_tda827x_fe(dev, &philips_tiger_config); |
587d2fd7 HH |
1040 | break; |
1041 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
b8bc76d8 | 1042 | configure_tda827x_fe(dev, &pinnacle_pctv_310i_config); |
90e9df7f | 1043 | break; |
c6e53daf | 1044 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
b8bc76d8 | 1045 | configure_tda827x_fe(dev, &hauppauge_hvr_1110_config); |
c6e53daf | 1046 | break; |
d4b0aba4 | 1047 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
b8bc76d8 | 1048 | configure_tda827x_fe(dev, &asus_p7131_dual_config); |
d4b0aba4 | 1049 | break; |
3d8466ec | 1050 | case SAA7134_BOARD_FLYDVBT_LR301: |
b8bc76d8 | 1051 | configure_tda827x_fe(dev, &tda827x_lifeview_config); |
3d8466ec | 1052 | break; |
420f32fe | 1053 | case SAA7134_BOARD_FLYDVB_TRIO: |
b331daa0 | 1054 | if(! use_frontend) { //terrestrial |
b8bc76d8 | 1055 | configure_tda827x_fe(dev, &lifeview_trio_config); |
1f683cd8 NS |
1056 | } else { //satellite |
1057 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); | |
1058 | if (dev->dvb.frontend) { | |
1059 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63, | |
1060 | &dev->i2c_adap, 0) == NULL) { | |
cf3c34c8 | 1061 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__); |
1f683cd8 NS |
1062 | } |
1063 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap, | |
1064 | 0x08, 0, 0) == NULL) { | |
cf3c34c8 | 1065 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__); |
1f683cd8 NS |
1066 | } |
1067 | } | |
6b3ccab7 | 1068 | } |
420f32fe | 1069 | break; |
df42eaf2 | 1070 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1071 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
f7b54b10 MK |
1072 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1073 | &ads_tech_duo_config, | |
1074 | &dev->i2c_adap); | |
6b3ccab7 | 1075 | if (dev->dvb.frontend) { |
ede2200d | 1076 | if (dvb_attach(tda827x_attach,dev->dvb.frontend, |
8ce47dad | 1077 | ads_tech_duo_config.tuner_address, |
ede2200d | 1078 | &dev->i2c_adap,&ads_duo_cfg) == NULL) { |
cf3c34c8 | 1079 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d HH |
1080 | ads_tech_duo_config.tuner_address); |
1081 | } | |
6b3ccab7 | 1082 | } |
df42eaf2 | 1083 | break; |
3dfb729f | 1084 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
b8bc76d8 | 1085 | configure_tda827x_fe(dev, &tevion_dvbt220rf_config); |
d95b8942 | 1086 | break; |
5eda227f | 1087 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
b8bc76d8 | 1088 | configure_tda827x_fe(dev, &md8800_dvbt_config); |
5eda227f | 1089 | break; |
3b64e8e2 | 1090 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
f7b54b10 MK |
1091 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
1092 | &dev->i2c_adap); | |
a79ddae9 | 1093 | if (dev->dvb.frontend) { |
4ad8eee5 MK |
1094 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
1095 | NULL, &dvb_pll_tdhu2); | |
a79ddae9 | 1096 | } |
3b64e8e2 | 1097 | break; |
3e1410ad | 1098 | case SAA7134_BOARD_KWORLD_ATSC110: |
f7b54b10 MK |
1099 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
1100 | &dev->i2c_adap); | |
a79ddae9 | 1101 | if (dev->dvb.frontend) { |
4ad8eee5 MK |
1102 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
1103 | NULL, &dvb_pll_tuv1236d); | |
a79ddae9 | 1104 | } |
3e1410ad | 1105 | break; |
e2ac28fa | 1106 | case SAA7134_BOARD_FLYDVBS_LR300: |
f7b54b10 MK |
1107 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
1108 | &dev->i2c_adap); | |
e2ac28fa | 1109 | if (dev->dvb.frontend) { |
f7b54b10 MK |
1110 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60, |
1111 | &dev->i2c_adap, 0) == NULL) { | |
cf3c34c8 | 1112 | wprintk("%s: No tda826x found!\n", __FUNCTION__); |
e2ac28fa | 1113 | } |
f7b54b10 MK |
1114 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, |
1115 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { | |
cf3c34c8 | 1116 | wprintk("%s: No ISL6421 found!\n", __FUNCTION__); |
e2ac28fa IL |
1117 | } |
1118 | } | |
1119 | break; | |
cf146ca4 HH |
1120 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
1121 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, | |
1122 | &dev->i2c_adap); | |
1123 | if (dev->dvb.frontend) { | |
1124 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; | |
1125 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1126 | dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init; | |
1127 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep; | |
1128 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params; | |
1129 | } | |
1130 | break; | |
cbb94521 HH |
1131 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
1132 | dev->dvb.frontend = dvb_attach(tda10046_attach, | |
1133 | &philips_europa_config, | |
1134 | &dev->i2c_adap); | |
1135 | if (dev->dvb.frontend) { | |
1136 | dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1137 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1138 | } | |
1139 | break; | |
550a9a5e | 1140 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
b8bc76d8 | 1141 | configure_tda827x_fe(dev, &cinergy_ht_config); |
9de271e6 MK |
1142 | break; |
1143 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
b8bc76d8 | 1144 | configure_tda827x_fe(dev, &cinergy_ht_pci_config); |
58ef4f92 HH |
1145 | break; |
1146 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
b8bc76d8 | 1147 | configure_tda827x_fe(dev, &philips_tiger_s_config); |
550a9a5e | 1148 | break; |
e06cea4c HH |
1149 | case SAA7134_BOARD_ASUS_P7131_4871: |
1150 | configure_tda827x_fe(dev, &asus_p7131_4871_config); | |
1151 | break; | |
f3eec0c0 HH |
1152 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
1153 | configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config); | |
e06cea4c | 1154 | break; |
1da177e4 | 1155 | default: |
cf3c34c8 | 1156 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1157 | break; |
1158 | } | |
1159 | ||
1160 | if (NULL == dev->dvb.frontend) { | |
cf3c34c8 | 1161 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
1da177e4 LT |
1162 | return -1; |
1163 | } | |
1164 | ||
1165 | /* register everything else */ | |
1c4f76ab HH |
1166 | ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev); |
1167 | ||
1168 | /* this sequence is necessary to make the tda1004x load its firmware | |
1169 | * and to enter analog mode of hybrid boards | |
1170 | */ | |
1171 | if (!ret) { | |
1172 | if (dev->dvb.frontend->ops.init) | |
1173 | dev->dvb.frontend->ops.init(dev->dvb.frontend); | |
1174 | if (dev->dvb.frontend->ops.sleep) | |
1175 | dev->dvb.frontend->ops.sleep(dev->dvb.frontend); | |
9971f4f1 HH |
1176 | if (dev->dvb.frontend->ops.tuner_ops.sleep) |
1177 | dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend); | |
1c4f76ab HH |
1178 | } |
1179 | return ret; | |
1da177e4 LT |
1180 | } |
1181 | ||
1182 | static int dvb_fini(struct saa7134_dev *dev) | |
1183 | { | |
1184 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1185 | ||
1da177e4 LT |
1186 | switch (dev->board) { |
1187 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
1188 | /* otherwise we don't detect the tuner on next insmod */ | |
1189 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
1190 | break; | |
1191 | }; | |
1192 | videobuf_dvb_unregister(&dev->dvb); | |
1193 | return 0; | |
1194 | } | |
1195 | ||
1196 | static struct saa7134_mpeg_ops dvb_ops = { | |
1197 | .type = SAA7134_MPEG_DVB, | |
1198 | .init = dvb_init, | |
1199 | .fini = dvb_fini, | |
1200 | }; | |
1201 | ||
1202 | static int __init dvb_register(void) | |
1203 | { | |
1204 | return saa7134_ts_register(&dvb_ops); | |
1205 | } | |
1206 | ||
1207 | static void __exit dvb_unregister(void) | |
1208 | { | |
1209 | saa7134_ts_unregister(&dvb_ops); | |
1210 | } | |
1211 | ||
1212 | module_init(dvb_register); | |
1213 | module_exit(dvb_unregister); | |
1214 | ||
1215 | /* ------------------------------------------------------------------ */ | |
1216 | /* | |
1217 | * Local variables: | |
1218 | * c-basic-offset: 8 | |
1219 | * End: | |
1220 | */ |